Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/8463/?format=api
{ "id": 8463, "url": "https://patches.dpdk.org/api/patches/8463/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1446231162-8075-13-git-send-email-adrien.mazarguil@6wind.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1446231162-8075-13-git-send-email-adrien.mazarguil@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1446231162-8075-13-git-send-email-adrien.mazarguil@6wind.com", "date": "2015-10-30T18:52:41", "name": "[dpdk-dev,v2,12/13] mlx5: add checksum offloading support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "c4910c2f1f3253ba5092791f10f0bd27511602ba", "submitter": { "id": 165, "url": "https://patches.dpdk.org/api/people/165/?format=api", "name": "Adrien Mazarguil", "email": "adrien.mazarguil@6wind.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1446231162-8075-13-git-send-email-adrien.mazarguil@6wind.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/8463/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/8463/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id C8296935C;\n\tFri, 30 Oct 2015 19:53:56 +0100 (CET)", "from mail-wm0-f47.google.com (mail-wm0-f47.google.com\n\t[74.125.82.47]) by dpdk.org (Postfix) with ESMTP id 2933E91C1\n\tfor <dev@dpdk.org>; Fri, 30 Oct 2015 19:53:42 +0100 (CET)", "by wmeg8 with SMTP id g8so18526161wme.0\n\tfor <dev@dpdk.org>; Fri, 30 Oct 2015 11:53:42 -0700 (PDT)", "from 6wind.com (guy78-3-82-239-227-177.fbx.proxad.net.\n\t[82.239.227.177]) by smtp.gmail.com with ESMTPSA id\n\tb12sm4218259wma.6.2015.10.30.11.53.40\n\t(version=TLSv1.2 cipher=RC4-SHA bits=128/128);\n\tFri, 30 Oct 2015 11:53:41 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=6wind_com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=OTlVIDoSwKl6X0FmkMq6uf2wItfagcDnLQL2sZoZDGE=;\n\tb=LzTzV1AXVR/Gj5uW3Pqi5sNLHVzxNNfpSL7X7JJELJqjxod5UuwzEewHDwmb9ESr2U\n\tKpdq0IPasUSRi5HG3UO4imQbCfWXdAq245DQHH7shJYRWhVMkKdGb6ar7CK+zThnVF1N\n\t2dkIK27hzrPUZ7eqrnGNs5jL8xcGZ1ky6st5mNn4ddwvIdl7X/5/sN7TMT8S0Bp4NM6j\n\tp8Yi7QXIEm35LkeTksddl9pC6j8/EvytI+A/7mnqqw/XY2qvm+0nd1qtRb3sgxsfaW2J\n\tDCGawDFGT2dvnjV17/4LKwKrbjUW2e7i+PYO+b6IcYa2rw3J1kO6wkhGMbZU2RzMOEBO\n\tj7uw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=OTlVIDoSwKl6X0FmkMq6uf2wItfagcDnLQL2sZoZDGE=;\n\tb=jt+BxT0kY3G5++mPmQfvix+XOLtiF8FQbfCeCToRM1H1GFndUiiTxBH4JeXq/Jz46r\n\tm9iPIqH5cB0xPOFFg7oZ49olKZ2wA4EWro/QrfxrCZ2iU97lRDmiN2ebnPYu63ZeX1Wt\n\tZ+mbW76dBArPK94A0CsJm0HmlDWEm2Iwcxyc6VleXaBeYKACzS9pv23ORVH3gWJYkJfE\n\tV8nxmEAYRiP4G3RqIdVirkOaadjGRYlCQuDcutxjAx14ztzYStt1zQHpQlVCia8gTs/5\n\t3H0FV5TsfNbqNJ/8rrlOJhoFcyLKcSMwVshCRN9ACmknPL9/stPmoVq14nSVoczpCcY2\n\tnQvQ==", "X-Gm-Message-State": "ALoCoQmfIKsudr4iIwj3115icl3kut7eohZCFoBfaZXeNxzMktpzee7bVsyPUXHlQb9ibe+GYZIM", "X-Received": "by 10.28.22.203 with SMTP id 194mr4825142wmw.45.1446231222029;\n\tFri, 30 Oct 2015 11:53:42 -0700 (PDT)", "From": "Adrien Mazarguil <adrien.mazarguil@6wind.com>", "To": "dev@dpdk.org", "Date": "Fri, 30 Oct 2015 19:52:41 +0100", "Message-Id": "<1446231162-8075-13-git-send-email-adrien.mazarguil@6wind.com>", "X-Mailer": "git-send-email 2.1.0", "In-Reply-To": "<1446231162-8075-1-git-send-email-adrien.mazarguil@6wind.com>", "References": "<1444067589-29513-1-git-send-email-adrien.mazarguil@6wind.com>\n\t<1446231162-8075-1-git-send-email-adrien.mazarguil@6wind.com>", "Subject": "[dpdk-dev] [PATCH v2 12/13] mlx5: add checksum offloading support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This is the same implementation as mlx4.\n\nSigned-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>\nSigned-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>\n---\n drivers/net/mlx5/mlx5_rxq.c | 14 +++++++\n drivers/net/mlx5/mlx5_rxtx.c | 94 +++++++++++++++++++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_rxtx.h | 2 +\n drivers/net/mlx5/mlx5_utils.h | 6 +++\n 4 files changed, 116 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 1cd28c2..5a55886 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -565,6 +565,15 @@ rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)\n \t/* Number of descriptors and mbufs currently allocated. */\n \tdesc_n = (tmpl.elts_n * (tmpl.sp ? MLX5_PMD_SGE_WR_N : 1));\n \tmbuf_n = desc_n;\n+\t/* Toggle RX checksum offload if hardware supports it. */\n+\tif (priv->hw_csum) {\n+\t\ttmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;\n+\t\trxq->csum = tmpl.csum;\n+\t}\n+\tif (priv->hw_csum_l2tun) {\n+\t\ttmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;\n+\t\trxq->csum_l2tun = tmpl.csum_l2tun;\n+\t}\n \t/* Enable scattered packets support for this queue if necessary. */\n \tif ((dev->data->dev_conf.rxmode.jumbo_frame) &&\n \t (dev->data->dev_conf.rxmode.max_rx_pkt_len >\n@@ -785,6 +794,11 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq *rxq, uint16_t desc,\n \t\trte_pktmbuf_tailroom(buf)) == tmpl.mb_len);\n \tassert(rte_pktmbuf_headroom(buf) == RTE_PKTMBUF_HEADROOM);\n \trte_pktmbuf_free(buf);\n+\t/* Toggle RX checksum offload if hardware supports it. */\n+\tif (priv->hw_csum)\n+\t\ttmpl.csum = !!dev->data->dev_conf.rxmode.hw_ip_checksum;\n+\tif (priv->hw_csum_l2tun)\n+\t\ttmpl.csum_l2tun = !!dev->data->dev_conf.rxmode.hw_ip_checksum;\n \t/* Enable scattered packets support for this queue if necessary. */\n \tif ((dev->data->dev_conf.rxmode.jumbo_frame) &&\n \t (dev->data->dev_conf.rxmode.max_rx_pkt_len >\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c\nindex eccbbb9..623219d 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.c\n+++ b/drivers/net/mlx5/mlx5_rxtx.c\n@@ -390,6 +390,17 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\t\t++elts_comp;\n \t\t\tsend_flags |= IBV_EXP_QP_BURST_SIGNALED;\n \t\t}\n+\t\t/* Should we enable HW CKSUM offload */\n+\t\tif (buf->ol_flags &\n+\t\t (PKT_TX_IP_CKSUM | PKT_TX_TCP_CKSUM | PKT_TX_UDP_CKSUM)) {\n+\t\t\tsend_flags |= IBV_EXP_QP_BURST_IP_CSUM;\n+\t\t\t/* HW does not support checksum offloads at arbitrary\n+\t\t\t * offsets but automatically recognizes the packet\n+\t\t\t * type. For inner L3/L4 checksums, only VXLAN (UDP)\n+\t\t\t * tunnels are currently supported. */\n+\t\t\tif (RTE_ETH_IS_TUNNEL_PKT(buf->packet_type))\n+\t\t\t\tsend_flags |= IBV_EXP_QP_BURST_TUNNEL;\n+\t\t}\n \t\tif (likely(segs == 1)) {\n \t\t\tuintptr_t addr;\n \t\t\tuint32_t length;\n@@ -491,6 +502,85 @@ stop:\n }\n \n /**\n+ * Translate RX completion flags to packet type.\n+ *\n+ * @param flags\n+ * RX completion flags returned by poll_length_flags().\n+ *\n+ * @return\n+ * Packet type for struct rte_mbuf.\n+ */\n+static inline uint32_t\n+rxq_cq_to_pkt_type(uint32_t flags)\n+{\n+\tuint32_t pkt_type;\n+\n+\tif (flags & IBV_EXP_CQ_RX_TUNNEL_PACKET)\n+\t\tpkt_type =\n+\t\t\tTRANSPOSE(flags,\n+\t\t\t\t IBV_EXP_CQ_RX_OUTER_IPV4_PACKET,\n+\t\t\t\t RTE_PTYPE_L3_IPV4) |\n+\t\t\tTRANSPOSE(flags,\n+\t\t\t\t IBV_EXP_CQ_RX_OUTER_IPV6_PACKET,\n+\t\t\t\t RTE_PTYPE_L3_IPV6) |\n+\t\t\tTRANSPOSE(flags,\n+\t\t\t\t IBV_EXP_CQ_RX_IPV4_PACKET,\n+\t\t\t\t RTE_PTYPE_INNER_L3_IPV4) |\n+\t\t\tTRANSPOSE(flags,\n+\t\t\t\t IBV_EXP_CQ_RX_IPV6_PACKET,\n+\t\t\t\t RTE_PTYPE_INNER_L3_IPV6);\n+\telse\n+\t\tpkt_type =\n+\t\t\tTRANSPOSE(flags,\n+\t\t\t\t IBV_EXP_CQ_RX_IPV4_PACKET,\n+\t\t\t\t RTE_PTYPE_L3_IPV4) |\n+\t\t\tTRANSPOSE(flags,\n+\t\t\t\t IBV_EXP_CQ_RX_IPV6_PACKET,\n+\t\t\t\t RTE_PTYPE_L3_IPV6);\n+\treturn pkt_type;\n+}\n+\n+/**\n+ * Translate RX completion flags to offload flags.\n+ *\n+ * @param[in] rxq\n+ * Pointer to RX queue structure.\n+ * @param flags\n+ * RX completion flags returned by poll_length_flags().\n+ *\n+ * @return\n+ * Offload flags (ol_flags) for struct rte_mbuf.\n+ */\n+static inline uint32_t\n+rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)\n+{\n+\tuint32_t ol_flags = 0;\n+\n+\tif (rxq->csum)\n+\t\tol_flags |=\n+\t\t\tTRANSPOSE(~flags,\n+\t\t\t\t IBV_EXP_CQ_RX_IP_CSUM_OK,\n+\t\t\t\t PKT_RX_IP_CKSUM_BAD) |\n+\t\t\tTRANSPOSE(~flags,\n+\t\t\t\t IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,\n+\t\t\t\t PKT_RX_L4_CKSUM_BAD);\n+\t/*\n+\t * PKT_RX_IP_CKSUM_BAD and PKT_RX_L4_CKSUM_BAD are used in place\n+\t * of PKT_RX_EIP_CKSUM_BAD because the latter is not functional\n+\t * (its value is 0).\n+\t */\n+\tif ((flags & IBV_EXP_CQ_RX_TUNNEL_PACKET) && (rxq->csum_l2tun))\n+\t\tol_flags |=\n+\t\t\tTRANSPOSE(~flags,\n+\t\t\t\t IBV_EXP_CQ_RX_OUTER_IP_CSUM_OK,\n+\t\t\t\t PKT_RX_IP_CKSUM_BAD) |\n+\t\t\tTRANSPOSE(~flags,\n+\t\t\t\t IBV_EXP_CQ_RX_OUTER_TCP_UDP_CSUM_OK,\n+\t\t\t\t PKT_RX_L4_CKSUM_BAD);\n+\treturn ol_flags;\n+}\n+\n+/**\n * DPDK callback for RX with scattered packets support.\n *\n * @param dpdk_rxq\n@@ -669,6 +759,8 @@ mlx5_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\tNB_SEGS(pkt_buf) = j;\n \t\tPORT(pkt_buf) = rxq->port_id;\n \t\tPKT_LEN(pkt_buf) = pkt_buf_len;\n+\t\tpkt_buf->packet_type = rxq_cq_to_pkt_type(flags);\n+\t\tpkt_buf->ol_flags = rxq_cq_to_ol_flags(rxq, flags);\n \n \t\t/* Return packet. */\n \t\t*(pkts++) = pkt_buf;\n@@ -829,6 +921,8 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\tNEXT(seg) = NULL;\n \t\tPKT_LEN(seg) = len;\n \t\tDATA_LEN(seg) = len;\n+\t\tseg->packet_type = rxq_cq_to_pkt_type(flags);\n+\t\tseg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);\n \n \t\t/* Return packet. */\n \t\t*(pkts++) = seg;\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 521aee0..d86d623 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -116,6 +116,8 @@ struct rxq {\n \t\tstruct rxq_elt (*no_sp)[]; /* RX elements. */\n \t} elts;\n \tunsigned int sp:1; /* Use scattered RX elements. */\n+\tunsigned int csum:1; /* Enable checksum offloading. */\n+\tunsigned int csum_l2tun:1; /* Same for L2 tunnels. */\n \tuint32_t mb_len; /* Length of a mp-issued mbuf. */\n \tstruct mlx5_rxq_stats stats; /* RX queue counters. */\n \tunsigned int socket; /* CPU socket ID for allocations. */\ndiff --git a/drivers/net/mlx5/mlx5_utils.h b/drivers/net/mlx5/mlx5_utils.h\nindex e48e6b6..8ff075b 100644\n--- a/drivers/net/mlx5/mlx5_utils.h\n+++ b/drivers/net/mlx5/mlx5_utils.h\n@@ -149,6 +149,12 @@ pmd_drv_log_basename(const char *s)\n #define NB_SEGS(m) ((m)->nb_segs)\n #define PORT(m) ((m)->port)\n \n+/* Transpose flags. Useful to convert IBV to DPDK flags. */\n+#define TRANSPOSE(val, from, to) \\\n+\t(((from) >= (to)) ? \\\n+\t (((val) & (from)) / ((from) / (to))) : \\\n+\t (((val) & (from)) * ((to) / (from))))\n+\n /* Allocate a buffer on the stack and fill it with a printf format string. */\n #define MKSTR(name, ...) \\\n \tchar name[snprintf(NULL, 0, __VA_ARGS__) + 1]; \\\n", "prefixes": [ "dpdk-dev", "v2", "12/13" ] }