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GET /api/patches/84307/?format=api
{ "id": 84307, "url": "https://patches.dpdk.org/api/patches/84307/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/c1aaa4a92d9f8402b7ebd70920b72ec508976827.1605689124.git.dekelp@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<c1aaa4a92d9f8402b7ebd70920b72ec508976827.1605689124.git.dekelp@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/c1aaa4a92d9f8402b7ebd70920b72ec508976827.1605689124.git.dekelp@nvidia.com", "date": "2020-11-18T08:59:57", "name": "[3/3] common/mlx5: move to formal ASO action API", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "f41f124f8ac0067a421151dd2b4cc5d7efd1a39e", "submitter": { "id": 1897, "url": "https://patches.dpdk.org/api/people/1897/?format=api", "name": "Dekel Peled", "email": "dekelp@nvidia.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/c1aaa4a92d9f8402b7ebd70920b72ec508976827.1605689124.git.dekelp@nvidia.com/mbox/", "series": [ { "id": 13946, "url": "https://patches.dpdk.org/api/series/13946/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=13946", "date": "2020-11-18T08:59:55", "name": "ASO age action fixes", "version": 1, "mbox": "https://patches.dpdk.org/series/13946/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/84307/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/84307/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 3A48DA04E6;\n\tWed, 18 Nov 2020 10:02:33 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E199EC8B4;\n\tWed, 18 Nov 2020 10:02:15 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id F212C5937\n for <dev@dpdk.org>; Wed, 18 Nov 2020 10:02:10 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n dekelp@nvidia.com) with SMTP; 18 Nov 2020 11:00:54 +0200", "from mtl-vdi-280.wap.labs.mlnx. (mtl-vdi-280.wap.labs.mlnx\n [10.228.134.250])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 0AI90mxf021118;\n Wed, 18 Nov 2020 11:00:54 +0200" ], "From": "Dekel Peled <dekelp@nvidia.com>", "To": "viacheslavo@nvidia.com, shahafs@nvidia.com, matan@nvidia.com", "Cc": "dev@dpdk.org", "Date": "Wed, 18 Nov 2020 10:59:57 +0200", "Message-Id": "\n <c1aaa4a92d9f8402b7ebd70920b72ec508976827.1605689124.git.dekelp@nvidia.com>", "X-Mailer": "git-send-email 1.7.1", "In-Reply-To": "<cover.1605689124.git.dekelp@nvidia.com>", "References": "<cover.1605689124.git.dekelp@nvidia.com>", "Subject": "[dpdk-dev] [PATCH 3/3] common/mlx5: move to formal ASO action API", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Existing code uses the previous API offered by rdma-core in order\nto create ASO Flow Hit action.\n\nA general API is now formally released, to create ASO action of any type.\nThis patch moves the MLX5 PMD code to use the formal API.\n\nSigned-off-by: Dekel Peled <dekelp@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/linux/meson.build | 4 +--\n drivers/common/mlx5/linux/mlx5_glue.c | 38 ++++++++++++++++-----------\n drivers/common/mlx5/linux/mlx5_glue.h | 6 ++---\n drivers/net/mlx5/linux/mlx5_os.c | 4 +--\n drivers/net/mlx5/mlx5_flow_dv.c | 11 +++++---\n 5 files changed, 36 insertions(+), 27 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/linux/meson.build b/drivers/common/mlx5/linux/meson.build\nindex 87f7bfda51..63b78e4bce 100644\n--- a/drivers/common/mlx5/linux/meson.build\n+++ b/drivers/common/mlx5/linux/meson.build\n@@ -181,8 +181,8 @@ has_sym_args = [\n \t[ 'HAVE_MLX5_DR_CREATE_ACTION_DEST_ARRAY', 'infiniband/mlx5dv.h',\n \t'mlx5dv_dr_action_create_dest_array'],\n \t[ 'HAVE_DEVLINK', 'linux/devlink.h', 'DEVLINK_GENL_NAME' ],\n- [ 'HAVE_MLX5DV_DR_ACTION_FLOW_HIT', 'infiniband/mlx5dv.h',\n- 'mlx5dv_dr_action_create_flow_hit'],\n+ [ 'HAVE_MLX5_DR_CREATE_ACTION_ASO', 'infiniband/mlx5dv.h',\n+ 'mlx5dv_dr_action_create_aso' ],\n ]\n config = configuration_data()\n foreach arg:has_sym_args\ndiff --git a/drivers/common/mlx5/linux/mlx5_glue.c b/drivers/common/mlx5/linux/mlx5_glue.c\nindex cc6670c5bd..8146c79287 100644\n--- a/drivers/common/mlx5/linux/mlx5_glue.c\n+++ b/drivers/common/mlx5/linux/mlx5_glue.c\n@@ -811,6 +811,27 @@ mlx5_glue_dv_modify_flow_action_meter(void *action,\n #endif\n }\n \n+static void *\n+mlx5_glue_dv_create_flow_action_aso(struct mlx5dv_dr_domain *domain,\n+\t\t\t\t void *aso_obj,\n+\t\t\t\t uint32_t offset,\n+\t\t\t\t uint32_t flags,\n+\t\t\t\t uint8_t return_reg_c)\n+{\n+#if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_ASO)\n+\treturn mlx5dv_dr_action_create_aso(domain, aso_obj, offset,\n+\t\t\t\t\t flags, return_reg_c);\n+#else\n+\t(void)domain;\n+\t(void)aso_obj;\n+\t(void)offset;\n+\t(void)flags;\n+\t(void)return_reg_c;\n+\terrno = ENOTSUP;\n+\treturn NULL;\n+#endif\n+}\n+\n static void *\n mlx5_glue_dr_create_flow_action_default_miss(void)\n {\n@@ -1281,21 +1302,6 @@ mlx5_glue_dv_free_pp(struct mlx5dv_pp *pp)\n #endif\n }\n \n-static void *\n-mlx5_glue_dr_action_create_flow_hit(struct mlx5dv_devx_obj *devx_obj,\n-\t\t\t\t uint32_t offset, uint8_t reg_c_index)\n-{\n-#ifdef HAVE_MLX5DV_DR_ACTION_FLOW_HIT\n-\treturn mlx5dv_dr_action_create_flow_hit(devx_obj, offset, reg_c_index);\n-#else\n-\t(void)(devx_obj);\n-\t(void)(offset);\n-\t(void)(reg_c_index);\n-\terrno = ENOTSUP;\n-\treturn NULL;\n-#endif\n-}\n-\n __rte_cache_aligned\n const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue) {\n \t.version = MLX5_GLUE_VERSION,\n@@ -1379,6 +1385,7 @@ const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue) {\n \t.dv_create_flow_action_tag = mlx5_glue_dv_create_flow_action_tag,\n \t.dv_create_flow_action_meter = mlx5_glue_dv_create_flow_action_meter,\n \t.dv_modify_flow_action_meter = mlx5_glue_dv_modify_flow_action_meter,\n+\t.dv_create_flow_action_aso = mlx5_glue_dv_create_flow_action_aso,\n \t.dr_create_flow_action_default_miss =\n \t\tmlx5_glue_dr_create_flow_action_default_miss,\n \t.dv_destroy_flow = mlx5_glue_dv_destroy_flow,\n@@ -1415,5 +1422,4 @@ const struct mlx5_glue *mlx5_glue = &(const struct mlx5_glue) {\n \t.dv_free_var = mlx5_glue_dv_free_var,\n \t.dv_alloc_pp = mlx5_glue_dv_alloc_pp,\n \t.dv_free_pp = mlx5_glue_dv_free_pp,\n-\t.dr_action_create_flow_hit = mlx5_glue_dr_action_create_flow_hit,\n };\ndiff --git a/drivers/common/mlx5/linux/mlx5_glue.h b/drivers/common/mlx5/linux/mlx5_glue.h\nindex c5d7853ea9..8be446a902 100644\n--- a/drivers/common/mlx5/linux/mlx5_glue.h\n+++ b/drivers/common/mlx5/linux/mlx5_glue.h\n@@ -344,9 +344,9 @@ struct mlx5_glue {\n \t\t\t(void *domain,\n \t\t\t size_t num_dest,\n \t\t\t struct mlx5dv_dr_action_dest_attr *dests[]);\n-\tvoid *(*dr_action_create_flow_hit)(struct mlx5dv_devx_obj *devx_obj,\n-\t\t\t\t\t uint32_t offset,\n-\t\t\t\t\t uint8_t reg_c_index);\n+\tvoid *(*dv_create_flow_action_aso)\n+\t\t\t(struct mlx5dv_dr_domain *domain, void *aso_obj,\n+\t\t\t uint32_t offset, uint32_t flags, uint8_t return_reg_c);\n };\n \n extern const struct mlx5_glue *mlx5_glue;\ndiff --git a/drivers/net/mlx5/linux/mlx5_os.c b/drivers/net/mlx5/linux/mlx5_os.c\nindex 468ef3356f..2dfed4b16f 100644\n--- a/drivers/net/mlx5/linux/mlx5_os.c\n+++ b/drivers/net/mlx5/linux/mlx5_os.c\n@@ -1200,7 +1200,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\t\t}\n \t\t}\n #endif\n-#ifdef HAVE_MLX5DV_DR_ACTION_FLOW_HIT\n+#ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO\n \t\tif (config->hca_attr.flow_hit_aso &&\n \t\t priv->mtr_color_reg == REG_C_3) {\n \t\t\tsh->flow_hit_aso_en = 1;\n@@ -1211,7 +1211,7 @@ mlx5_dev_spawn(struct rte_device *dpdk_dev,\n \t\t\t}\n \t\t\tDRV_LOG(DEBUG, \"Flow Hit ASO is supported.\");\n \t\t}\n-#endif /* HAVE_MLX5DV_DR_ACTION_FLOW_HIT */\n+#endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */\n #if defined(HAVE_MLX5DV_DR) && defined(HAVE_MLX5_DR_CREATE_ACTION_FLOW_SAMPLE)\n \t\tif (config->hca_attr.log_max_ft_sampler_num > 0 &&\n \t\t config->dv_flow_en) {\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex ae8967ec58..b3e71fc564 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -9491,10 +9491,13 @@ flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)\n \t\t\t\t\t \"for ASO flow hit\");\n \t\t\treturn 0; /* 0 is an error. */\n \t\t}\n-\t\tage_free->dr_action = mlx5_glue->dr_action_create_flow_hit\n-\t\t\t\t\t\t(pool->flow_hit_aso_obj->obj,\n-\t\t\t\t\t\t age_free->offset,\n-\t\t\t\t\t\t (reg_c - REG_C_0));\n+#ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO\n+\t\tage_free->dr_action = mlx5_glue->dv_create_flow_action_aso\n+\t\t\t\t(priv->sh->rx_domain,\n+\t\t\t\t pool->flow_hit_aso_obj->obj, age_free->offset,\n+\t\t\t\t MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,\n+\t\t\t\t (reg_c - REG_C_0));\n+#endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */\n \t\tif (!age_free->dr_action) {\n \t\t\trte_errno = errno;\n \t\t\trte_spinlock_lock(&mng->free_sl);\n", "prefixes": [ "3/3" ] }