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GET /api/patches/80943/?format=api
{ "id": 80943, "url": "https://patches.dpdk.org/api/patches/80943/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201015151017.8060-1-elibr@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201015151017.8060-1-elibr@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201015151017.8060-1-elibr@nvidia.com", "date": "2020-10-15T15:10:17", "name": "[V2,1/1] eal: fix build with conflicting libc variable memory_order", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "1b068241b503cbd8ec403d8b54e48e954383e005", "submitter": { "id": 2017, "url": "https://patches.dpdk.org/api/people/2017/?format=api", "name": "Eli Britstein", "email": "elibr@nvidia.com" }, "delegate": { "id": 24651, "url": "https://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201015151017.8060-1-elibr@nvidia.com/mbox/", "series": [ { "id": 13018, "url": "https://patches.dpdk.org/api/series/13018/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=13018", "date": "2020-10-15T15:10:17", "name": "[V2,1/1] eal: fix build with conflicting libc variable memory_order", "version": 2, "mbox": "https://patches.dpdk.org/series/13018/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/80943/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/80943/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4E9CEA04DB;\n\tThu, 15 Oct 2020 17:11:02 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 988EC1EA31;\n\tThu, 15 Oct 2020 17:10:35 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id F19DC1E9F2\n for <dev@dpdk.org>; Thu, 15 Oct 2020 17:10:33 +0200 (CEST)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n elibr@nvidia.com) with SMTP; 15 Oct 2020 18:10:31 +0300", "from nvidia.com (dev-r-vrt-214.mtr.labs.mlnx [10.212.214.1])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 09FFAVCn016003;\n Thu, 15 Oct 2020 18:10:31 +0300" ], "From": "Eli Britstein <elibr@nvidia.com>", "To": "dev@dpdk.org", "Cc": "Thomas Monjalon <thomas@monjalon.net>, Asaf Penso <asafp@nvidia.com>,\n David Marchand <david.marchand@redhat.com>,\n Eli Britstein <elibr@nvidia.com>", "Date": "Thu, 15 Oct 2020 15:10:17 +0000", "Message-Id": "<20201015151017.8060-1-elibr@nvidia.com>", "X-Mailer": "git-send-email 2.28.0.546.g385c171", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH V2 1/1] eal: fix build with conflicting libc\n\tvariable memory_order", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The cited commit introduced functions with 'int memory_order' argument.\nThe C11 standard section 7.17.1.4 defines 'memory_order' as the\n\"enumerated type whose enumerators identify memory ordering constraints\".\n\nA compilation error occurs:\nerror: declaration of 'memory_order' shadows a global declaration\n [-Werror=shadow]\n rte_atomic_thread_fence(int memory_order)\n\nThis issue was hit when trying to compile OVS with gcc 4.8.5. This\ncompiler version does not provide stdatomic.h, so enum memory_order is\nredefined in OVS code.\nIn another case, if the compiler does provide stdatomic.h header,\npassing -Wsystem-headers in the CFLAGS will also cause that failure.\n\nFix it by changing the argument name 'memory_order' to 'memorder'.\n\nFixes: 672a15056380 (\"eal: add wrapper for C11 atomic thread fence\")\n\nSigned-off-by: Eli Britstein <elibr@nvidia.com>\n---\n lib/librte_eal/arm/include/rte_atomic_32.h | 4 ++--\n lib/librte_eal/arm/include/rte_atomic_64.h | 4 ++--\n lib/librte_eal/include/generic/rte_atomic.h | 2 +-\n lib/librte_eal/ppc/include/rte_atomic.h | 4 ++--\n lib/librte_eal/x86/include/rte_atomic.h | 6 +++---\n 5 files changed, 10 insertions(+), 10 deletions(-)", "diff": "diff --git a/lib/librte_eal/arm/include/rte_atomic_32.h b/lib/librte_eal/arm/include/rte_atomic_32.h\nindex 9d0568d497..fe48ab428e 100644\n--- a/lib/librte_eal/arm/include/rte_atomic_32.h\n+++ b/lib/librte_eal/arm/include/rte_atomic_32.h\n@@ -34,9 +34,9 @@ extern \"C\" {\n #define rte_io_rmb() rte_rmb()\n \n static __rte_always_inline void\n-rte_atomic_thread_fence(int memory_order)\n+rte_atomic_thread_fence(int memorder)\n {\n-\t__atomic_thread_fence(memory_order);\n+\t__atomic_thread_fence(memorder);\n }\n \n #ifdef __cplusplus\ndiff --git a/lib/librte_eal/arm/include/rte_atomic_64.h b/lib/librte_eal/arm/include/rte_atomic_64.h\nindex c518559bc9..20dd6c75dd 100644\n--- a/lib/librte_eal/arm/include/rte_atomic_64.h\n+++ b/lib/librte_eal/arm/include/rte_atomic_64.h\n@@ -38,9 +38,9 @@ extern \"C\" {\n #define rte_io_rmb() rte_rmb()\n \n static __rte_always_inline void\n-rte_atomic_thread_fence(int memory_order)\n+rte_atomic_thread_fence(int memorder)\n {\n-\t__atomic_thread_fence(memory_order);\n+\t__atomic_thread_fence(memorder);\n }\n \n /*------------------------ 128 bit atomic operations -------------------------*/\ndiff --git a/lib/librte_eal/include/generic/rte_atomic.h b/lib/librte_eal/include/generic/rte_atomic.h\nindex d1255b2d8c..276272f40b 100644\n--- a/lib/librte_eal/include/generic/rte_atomic.h\n+++ b/lib/librte_eal/include/generic/rte_atomic.h\n@@ -122,7 +122,7 @@ static inline void rte_io_rmb(void);\n /**\n * Synchronization fence between threads based on the specified memory order.\n */\n-static inline void rte_atomic_thread_fence(int memory_order);\n+static inline void rte_atomic_thread_fence(int memorder);\n \n /*------------------------- 16 bit atomic operations -------------------------*/\n \ndiff --git a/lib/librte_eal/ppc/include/rte_atomic.h b/lib/librte_eal/ppc/include/rte_atomic.h\nindex a91989930b..6a7e65210c 100644\n--- a/lib/librte_eal/ppc/include/rte_atomic.h\n+++ b/lib/librte_eal/ppc/include/rte_atomic.h\n@@ -37,9 +37,9 @@ extern \"C\" {\n #define rte_io_rmb() rte_rmb()\n \n static __rte_always_inline void\n-rte_atomic_thread_fence(int memory_order)\n+rte_atomic_thread_fence(int memorder)\n {\n-\t__atomic_thread_fence(memory_order);\n+\t__atomic_thread_fence(memorder);\n }\n \n /*------------------------- 16 bit atomic operations -------------------------*/\ndiff --git a/lib/librte_eal/x86/include/rte_atomic.h b/lib/librte_eal/x86/include/rte_atomic.h\nindex b7d6b06ddf..915afd9d27 100644\n--- a/lib/librte_eal/x86/include/rte_atomic.h\n+++ b/lib/librte_eal/x86/include/rte_atomic.h\n@@ -87,12 +87,12 @@ rte_smp_mb(void)\n * used instead.\n */\n static __rte_always_inline void\n-rte_atomic_thread_fence(int memory_order)\n+rte_atomic_thread_fence(int memorder)\n {\n-\tif (memory_order == __ATOMIC_SEQ_CST)\n+\tif (memorder == __ATOMIC_SEQ_CST)\n \t\trte_smp_mb();\n \telse\n-\t\t__atomic_thread_fence(memory_order);\n+\t\t__atomic_thread_fence(memorder);\n }\n \n /*------------------------- 16 bit atomic operations -------------------------*/\n", "prefixes": [ "V2", "1/1" ] }