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GET /api/patches/8028/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 8028,
    "url": "https://patches.dpdk.org/api/patches/8028/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1445877458-31052-11-git-send-email-viktorin@rehivetech.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1445877458-31052-11-git-send-email-viktorin@rehivetech.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1445877458-31052-11-git-send-email-viktorin@rehivetech.com",
    "date": "2015-10-26T16:37:32",
    "name": "[dpdk-dev,v2,10/16] eal/arm: cpu flag checks for ARM",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "954dd52d5b84d10c282ffbc6368f0d7980301eab",
    "submitter": {
        "id": 292,
        "url": "https://patches.dpdk.org/api/people/292/?format=api",
        "name": "Jan Viktorin",
        "email": "viktorin@rehivetech.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1445877458-31052-11-git-send-email-viktorin@rehivetech.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/8028/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/8028/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id ABCB88E87;\n\tMon, 26 Oct 2015 17:39:43 +0100 (CET)",
            "from wes1-so1.wedos.net (wes1-so1.wedos.net [46.28.106.15])\n\tby dpdk.org (Postfix) with ESMTP id 799A58D3D\n\tfor <dev@dpdk.org>; Mon, 26 Oct 2015 17:39:31 +0100 (CET)",
            "from pcviktorin.fit.vutbr.cz (pcviktorin.fit.vutbr.cz\n\t[147.229.13.147])\n\tby wes1-so1.wedos.net (Postfix) with ESMTPSA id 3nl21v1dD1z5GQ;\n\tMon, 26 Oct 2015 17:39:31 +0100 (CET)"
        ],
        "From": "Jan Viktorin <viktorin@rehivetech.com>",
        "To": "Thomas Monjalon <thomas.monjalon@6wind.com>,\n\tDavid Hunt <david.hunt@intel.com>, dev@dpdk.org",
        "Date": "Mon, 26 Oct 2015 17:37:32 +0100",
        "Message-Id": "<1445877458-31052-11-git-send-email-viktorin@rehivetech.com>",
        "X-Mailer": "git-send-email 2.6.1",
        "In-Reply-To": "<1445877458-31052-1-git-send-email-viktorin@rehivetech.com>",
        "References": "<1445877458-31052-1-git-send-email-viktorin@rehivetech.com>",
        "Cc": "Vlastimil Kosar <kosar@rehivetech.com>",
        "Subject": "[dpdk-dev] [PATCH v2 10/16] eal/arm: cpu flag checks for ARM",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Vlastimil Kosar <kosar@rehivetech.com>\n\nThis implementation is based on IBM POWER version of\nrte_cpuflags. We use software emulation of HW capability\nregisters, because those are usually not directly accessible\nfrom userspace on ARM.\n\nSigned-off-by: Vlastimil Kosar <kosar@rehivetech.com>\nSigned-off-by: Jan Viktorin <viktorin@rehivetech.com>\n---\nv1 -> v2: check whether AT_HWCAP and AT_HWCAP2 exists\n---\n app/test/test_cpuflags.c                           |   5 +\n .../common/include/arch/arm/rte_cpuflags.h         | 177 +++++++++++++++++++++\n mk/rte.cpuflags.mk                                 |   6 +\n 3 files changed, 188 insertions(+)\n create mode 100644 lib/librte_eal/common/include/arch/arm/rte_cpuflags.h",
    "diff": "diff --git a/app/test/test_cpuflags.c b/app/test/test_cpuflags.c\nindex 5b92061..557458f 100644\n--- a/app/test/test_cpuflags.c\n+++ b/app/test/test_cpuflags.c\n@@ -115,6 +115,11 @@ test_cpuflags(void)\n \tCHECK_FOR_FLAG(RTE_CPUFLAG_ICACHE_SNOOP);\n #endif\n \n+#if defined(RTE_ARCH_ARM)\n+\tprintf(\"Check for NEON:\\t\\t\");\n+\tCHECK_FOR_FLAG(RTE_CPUFLAG_NEON);\n+#endif\n+\n #if defined(RTE_ARCH_X86_64) || defined(RTE_ARCH_I686)\n \tprintf(\"Check for SSE:\\t\\t\");\n \tCHECK_FOR_FLAG(RTE_CPUFLAG_SSE);\ndiff --git a/lib/librte_eal/common/include/arch/arm/rte_cpuflags.h b/lib/librte_eal/common/include/arch/arm/rte_cpuflags.h\nnew file mode 100644\nindex 0000000..1eadb33\n--- /dev/null\n+++ b/lib/librte_eal/common/include/arch/arm/rte_cpuflags.h\n@@ -0,0 +1,177 @@\n+/*\n+ *   BSD LICENSE\n+ *\n+ *   Copyright(c) 2015 RehiveTech. All rights reserved.\n+ *\n+ *   Redistribution and use in source and binary forms, with or without\n+ *   modification, are permitted provided that the following conditions\n+ *   are met:\n+ *\n+ *     * Redistributions of source code must retain the above copyright\n+ *       notice, this list of conditions and the following disclaimer.\n+ *     * Redistributions in binary form must reproduce the above copyright\n+ *       notice, this list of conditions and the following disclaimer in\n+ *       the documentation and/or other materials provided with the\n+ *       distribution.\n+ *     * Neither the name of RehiveTech nor the names of its\n+ *       contributors may be used to endorse or promote products derived\n+ *       from this software without specific prior written permission.\n+ *\n+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ *   \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef _RTE_CPUFLAGS_ARM_H_\n+#define _RTE_CPUFLAGS_ARM_H_\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include <elf.h>\n+#include <fcntl.h>\n+#include <assert.h>\n+#include <unistd.h>\n+\n+#include \"generic/rte_cpuflags.h\"\n+\n+#ifndef AT_HWCAP\n+#define AT_HWCAP 16\n+#endif\n+\n+#ifndef AT_HWCAP2\n+#define AT_HWCAP2 26\n+#endif\n+\n+/* software based registers */\n+enum cpu_register_t {\n+\tREG_HWCAP = 0,\n+\tREG_HWCAP2,\n+};\n+\n+/**\n+ * Enumeration of all CPU features supported\n+ */\n+enum rte_cpu_flag_t {\n+\tRTE_CPUFLAG_SWP = 0,\n+\tRTE_CPUFLAG_HALF,\n+\tRTE_CPUFLAG_THUMB,\n+\tRTE_CPUFLAG_A26BIT,\n+\tRTE_CPUFLAG_FAST_MULT,\n+\tRTE_CPUFLAG_FPA,\n+\tRTE_CPUFLAG_VFP,\n+\tRTE_CPUFLAG_EDSP,\n+\tRTE_CPUFLAG_JAVA,\n+\tRTE_CPUFLAG_IWMMXT,\n+\tRTE_CPUFLAG_CRUNCH,\n+\tRTE_CPUFLAG_THUMBEE,\n+\tRTE_CPUFLAG_NEON,\n+\tRTE_CPUFLAG_VFPv3,\n+\tRTE_CPUFLAG_VFPv3D16,\n+\tRTE_CPUFLAG_TLS,\n+\tRTE_CPUFLAG_VFPv4,\n+\tRTE_CPUFLAG_IDIVA,\n+\tRTE_CPUFLAG_IDIVT,\n+\tRTE_CPUFLAG_VFPD32,\n+\tRTE_CPUFLAG_LPAE,\n+\tRTE_CPUFLAG_EVTSTRM,\n+\tRTE_CPUFLAG_AES,\n+\tRTE_CPUFLAG_PMULL,\n+\tRTE_CPUFLAG_SHA1,\n+\tRTE_CPUFLAG_SHA2,\n+\tRTE_CPUFLAG_CRC32,\n+\t/* The last item */\n+\tRTE_CPUFLAG_NUMFLAGS,/**< This should always be the last! */\n+};\n+\n+static const struct feature_entry cpu_feature_table[] = {\n+\tFEAT_DEF(SWP,       0x00000001, 0, REG_HWCAP,  0)\n+\tFEAT_DEF(HALF,      0x00000001, 0, REG_HWCAP,  1)\n+\tFEAT_DEF(THUMB,     0x00000001, 0, REG_HWCAP,  2)\n+\tFEAT_DEF(A26BIT,    0x00000001, 0, REG_HWCAP,  3)\n+\tFEAT_DEF(FAST_MULT, 0x00000001, 0, REG_HWCAP,  4)\n+\tFEAT_DEF(FPA,       0x00000001, 0, REG_HWCAP,  5)\n+\tFEAT_DEF(VFP,       0x00000001, 0, REG_HWCAP,  6)\n+\tFEAT_DEF(EDSP,      0x00000001, 0, REG_HWCAP,  7)\n+\tFEAT_DEF(JAVA,      0x00000001, 0, REG_HWCAP,  8)\n+\tFEAT_DEF(IWMMXT,    0x00000001, 0, REG_HWCAP,  9)\n+\tFEAT_DEF(CRUNCH,    0x00000001, 0, REG_HWCAP,  10)\n+\tFEAT_DEF(THUMBEE,   0x00000001, 0, REG_HWCAP,  11)\n+\tFEAT_DEF(NEON,      0x00000001, 0, REG_HWCAP,  12)\n+\tFEAT_DEF(VFPv3,     0x00000001, 0, REG_HWCAP,  13)\n+\tFEAT_DEF(VFPv3D16,  0x00000001, 0, REG_HWCAP,  14)\n+\tFEAT_DEF(TLS,       0x00000001, 0, REG_HWCAP,  15)\n+\tFEAT_DEF(VFPv4,     0x00000001, 0, REG_HWCAP,  16)\n+\tFEAT_DEF(IDIVA,     0x00000001, 0, REG_HWCAP,  17)\n+\tFEAT_DEF(IDIVT,     0x00000001, 0, REG_HWCAP,  18)\n+\tFEAT_DEF(VFPD32,    0x00000001, 0, REG_HWCAP,  19)\n+\tFEAT_DEF(LPAE,      0x00000001, 0, REG_HWCAP,  20)\n+\tFEAT_DEF(EVTSTRM,   0x00000001, 0, REG_HWCAP,  21)\n+\tFEAT_DEF(AES,       0x00000001, 0, REG_HWCAP2,  0)\n+\tFEAT_DEF(PMULL,     0x00000001, 0, REG_HWCAP2,  1)\n+\tFEAT_DEF(SHA1,      0x00000001, 0, REG_HWCAP2,  2)\n+\tFEAT_DEF(SHA2,      0x00000001, 0, REG_HWCAP2,  3)\n+\tFEAT_DEF(CRC32,     0x00000001, 0, REG_HWCAP2,  4)\n+};\n+\n+/*\n+ * Read AUXV software register and get cpu features for ARM\n+ */\n+static inline void\n+rte_cpu_get_features(__attribute__((unused)) uint32_t leaf,\n+\t__attribute__((unused)) uint32_t subleaf, cpuid_registers_t out)\n+{\n+\tint auxv_fd;\n+\tElf32_auxv_t auxv;\n+\n+\tauxv_fd = open(\"/proc/self/auxv\", O_RDONLY);\n+\tassert(auxv_fd);\n+\twhile (read(auxv_fd, &auxv,\n+\t\tsizeof(Elf32_auxv_t)) == sizeof(Elf32_auxv_t)) {\n+\t\tif (auxv.a_type == AT_HWCAP)\n+\t\t\tout[REG_HWCAP] = auxv.a_un.a_val;\n+\t\telse if (auxv.a_type == AT_HWCAP2)\n+\t\t\tout[REG_HWCAP2] = auxv.a_un.a_val;\n+\t}\n+}\n+\n+/*\n+ * Checks if a particular flag is available on current machine.\n+ */\n+static inline int\n+rte_cpu_get_flag_enabled(enum rte_cpu_flag_t feature)\n+{\n+\tconst struct feature_entry *feat;\n+\tcpuid_registers_t regs = {0};\n+\n+\tif (feature >= RTE_CPUFLAG_NUMFLAGS)\n+\t\t/* Flag does not match anything in the feature tables */\n+\t\treturn -ENOENT;\n+\n+\tfeat = &cpu_feature_table[feature];\n+\n+\tif (!feat->leaf)\n+\t\t/* This entry in the table wasn't filled out! */\n+\t\treturn -EFAULT;\n+\n+\t/* get the cpuid leaf containing the desired feature */\n+\trte_cpu_get_features(feat->leaf, feat->subleaf, regs);\n+\n+\t/* check if the feature is enabled */\n+\treturn (regs[feat->reg] >> feat->bit) & 1;\n+}\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_CPUFLAGS_ARM_H_ */\ndiff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk\nindex f595cd0..bec7bdd 100644\n--- a/mk/rte.cpuflags.mk\n+++ b/mk/rte.cpuflags.mk\n@@ -106,6 +106,12 @@ ifneq ($(filter $(AUTO_CPUFLAGS),__builtin_vsx_xvnmaddadp),)\n CPUFLAGS += VSX\n endif\n \n+# ARM flags\n+ifneq ($(filter $(AUTO_CPUFLAGS),__ARM_NEON_FP),)\n+CPUFLAGS += NEON\n+endif\n+\n+\n MACHINE_CFLAGS += $(addprefix -DRTE_MACHINE_CPUFLAG_,$(CPUFLAGS))\n \n # To strip whitespace\n",
    "prefixes": [
        "dpdk-dev",
        "v2",
        "10/16"
    ]
}