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GET /api/patches/7999/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 7999,
    "url": "https://patches.dpdk.org/api/patches/7999/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1445831265-14256-3-git-send-email-shaopeng.he@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1445831265-14256-3-git-send-email-shaopeng.he@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1445831265-14256-3-git-send-email-shaopeng.he@intel.com",
    "date": "2015-10-26T03:47:40",
    "name": "[dpdk-dev,v2,2/7] fm10k: setup rx queue interrupts for PF and VF",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "527b80491aa7e2b4c3c9a9c688473bcebdb8fe9e",
    "submitter": {
        "id": 226,
        "url": "https://patches.dpdk.org/api/people/226/?format=api",
        "name": "He, Shaopeng",
        "email": "shaopeng.he@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1445831265-14256-3-git-send-email-shaopeng.he@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/7999/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/7999/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id EF6195A5D;\n\tMon, 26 Oct 2015 04:48:01 +0100 (CET)",
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 5C5DF5A5D\n\tfor <dev@dpdk.org>; Mon, 26 Oct 2015 04:48:00 +0100 (CET)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby orsmga102.jf.intel.com with ESMTP; 25 Oct 2015 20:47:59 -0700",
            "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby FMSMGA003.fm.intel.com with ESMTP; 25 Oct 2015 20:47:59 -0700",
            "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id t9Q3luXt007809;\n\tMon, 26 Oct 2015 11:47:56 +0800",
            "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid t9Q3lrA3014304; Mon, 26 Oct 2015 11:47:55 +0800",
            "(from heshaope@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t9Q3lreD014300; \n\tMon, 26 Oct 2015 11:47:53 +0800"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.20,199,1444719600\"; d=\"scan'208\";a=\"587905729\"",
        "From": "Shaopeng He <shaopeng.he@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Mon, 26 Oct 2015 11:47:40 +0800",
        "Message-Id": "<1445831265-14256-3-git-send-email-shaopeng.he@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1445831265-14256-1-git-send-email-shaopeng.he@intel.com>",
        "References": "<1443159425-32502-1-git-send-email-shaopeng.he@intel.com>\n\t<1445831265-14256-1-git-send-email-shaopeng.he@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2 2/7] fm10k: setup rx queue interrupts for PF\n\tand VF",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "In interrupt mode, each rx queue can have one interrupt to notify the up\nlayer application when packets are available in that queue. Some queues\nalso can share one interrupt.\nCurrently, fm10k needs one separate interrupt for mailbox. So, only those\ndrivers which support multiple interrupt vectors e.g. vfio-pci can work\nin fm10k interrupt mode.\nThis patch uses the RXINT/INT_MAP registers to map interrupt causes\n(rx queue and other events) to vectors, and enable these interrupts\nthrough kernel drivers like vfio-pci.\n\nSigned-off-by: Shaopeng He <shaopeng.he@intel.com>\n---\n drivers/net/fm10k/fm10k_ethdev.c | 93 +++++++++++++++++++++++++++++++++++++---\n 1 file changed, 86 insertions(+), 7 deletions(-)",
    "diff": "diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c\nindex a82cd59..68ae1ba 100644\n--- a/drivers/net/fm10k/fm10k_ethdev.c\n+++ b/drivers/net/fm10k/fm10k_ethdev.c\n@@ -52,6 +52,8 @@\n /* Number of chars per uint32 type */\n #define CHARS_PER_UINT32 (sizeof(uint32_t))\n #define BIT_MASK_PER_UINT32 ((1 << CHARS_PER_UINT32) - 1)\n+/* default 1:1 map from queue ID to interrupt vector ID */\n+#define Q2V(dev, queue_id) (dev->pci_dev->intr_handle.intr_vec[queue_id])\n \n static void fm10k_close_mbx_service(struct fm10k_hw *hw);\n static void fm10k_dev_promiscuous_enable(struct rte_eth_dev *dev);\n@@ -67,6 +69,8 @@ static void\n fm10k_MACVLAN_remove_all(struct rte_eth_dev *dev);\n static void fm10k_tx_queue_release(void *queue);\n static void fm10k_rx_queue_release(void *queue);\n+static int\n+fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev);\n \n static void\n fm10k_mbx_initlock(struct fm10k_hw *hw)\n@@ -406,6 +410,7 @@ static int\n fm10k_dev_rx_init(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n \tint i, ret;\n \tstruct fm10k_rx_queue *rxq;\n \tuint64_t base_addr;\n@@ -413,10 +418,23 @@ fm10k_dev_rx_init(struct rte_eth_dev *dev)\n \tuint32_t rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;\n \tuint16_t buf_size;\n \n-\t/* Disable RXINT to avoid possible interrupt */\n-\tfor (i = 0; i < hw->mac.max_queues; i++)\n+\t/* enable RXINT for interrupt mode */\n+\ti = 0;\n+\tif (rte_intr_dp_is_en(intr_handle)) {\n+\t\tfor (; i < dev->data->nb_rx_queues; i++) {\n+\t\t\tFM10K_WRITE_REG(hw, FM10K_RXINT(i), Q2V(dev, i));\n+\t\t\tif (hw->mac.type == fm10k_mac_pf)\n+\t\t\t\tFM10K_WRITE_REG(hw, FM10K_ITR(Q2V(dev, i)),\n+\t\t\t\t\tFM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR);\n+\t\t\telse\n+\t\t\t\tFM10K_WRITE_REG(hw, FM10K_VFITR(Q2V(dev, i)),\n+\t\t\t\t\tFM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR);\n+\t\t}\n+\t}\n+\t/* Disable other RXINT to avoid possible interrupt */\n+\tfor (; i < hw->mac.max_queues; i++)\n \t\tFM10K_WRITE_REG(hw, FM10K_RXINT(i),\n-\t\t\t\t3 << FM10K_RXINT_TIMER_SHIFT);\n+\t\t\t3 << FM10K_RXINT_TIMER_SHIFT);\n \n \t/* Setup RX queues */\n \tfor (i = 0; i < dev->data->nb_rx_queues; ++i) {\n@@ -741,6 +759,9 @@ fm10k_dev_start(struct rte_eth_dev *dev)\n \t\treturn diag;\n \t}\n \n+\tif (fm10k_dev_rxq_interrupt_setup(dev))\n+\t\treturn -EIO;\n+\n \tdiag = fm10k_dev_rx_init(dev);\n \tif (diag) {\n \t\tPMD_INIT_LOG(ERR, \"RX init failed: %d\", diag);\n@@ -1778,6 +1799,64 @@ fm10k_dev_disable_intr_vf(struct rte_eth_dev *dev)\n }\n \n static int\n+fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev)\n+{\n+\tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tuint32_t intr_vector, vec;\n+\tuint16_t queue_id;\n+\tint result = 0;\n+\n+\t/* fm10k needs one separate interrupt for mailbox,\n+\t * so only drivers which support multiple interrupt vectors\n+\t * e.g. vfio-pci can work for fm10k interrupt mode\n+\t */\n+\tif (!rte_intr_cap_multiple(intr_handle) ||\n+\t\t\tdev->data->dev_conf.intr_conf.rxq == 0)\n+\t\treturn result;\n+\n+\tintr_vector = dev->data->nb_rx_queues;\n+\n+\t/* disable interrupt first */\n+\trte_intr_disable(&dev->pci_dev->intr_handle);\n+\tif (hw->mac.type == fm10k_mac_pf)\n+\t\tfm10k_dev_disable_intr_pf(dev);\n+\telse\n+\t\tfm10k_dev_disable_intr_vf(dev);\n+\n+\tif (rte_intr_efd_enable(intr_handle, intr_vector)) {\n+\t\tPMD_INIT_LOG(ERR, \"Failed to init event fd\");\n+\t\tresult = -EIO;\n+\t}\n+\n+\tif (rte_intr_dp_is_en(intr_handle) && !result) {\n+\t\tintr_handle->intr_vec =\trte_zmalloc(\"intr_vec\",\n+\t\t\tdev->data->nb_rx_queues * sizeof(int), 0);\n+\t\tif (intr_handle->intr_vec) {\n+\t\t\tfor (queue_id = 0, vec = RX_VEC_START;\n+\t\t\t\t\tqueue_id < dev->data->nb_rx_queues;\n+\t\t\t\t\tqueue_id++) {\n+\t\t\t\tintr_handle->intr_vec[queue_id] = vec;\n+\t\t\t\tif (vec < intr_handle->nb_efd - 1 + RX_VEC_START)\n+\t\t\t\t\tvec++;\n+\t\t\t}\n+\t\t} else {\n+\t\t\tPMD_INIT_LOG(ERR, \"Failed to allocate %d rx_queues\"\n+\t\t\t\t\" intr_vec\", dev->data->nb_rx_queues);\n+\t\t\tresult = -ENOMEM;\n+\t\t}\n+\t}\n+\n+\tif (hw->mac.type == fm10k_mac_pf)\n+\t\tfm10k_dev_enable_intr_pf(dev);\n+\telse\n+\t\tfm10k_dev_enable_intr_vf(dev);\n+\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\thw->mac.ops.update_int_moderator(hw);\n+\treturn result;\n+}\n+\n+static int\n fm10k_dev_handle_fault(struct fm10k_hw *hw, uint32_t eicr)\n {\n \tstruct fm10k_fault fault;\n@@ -2060,7 +2139,7 @@ static int\n eth_fm10k_dev_init(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tint diag;\n+\tint diag, i;\n \tstruct fm10k_macvlan_filter_info *macvlan;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -2177,7 +2256,7 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev)\n \t\tfm10k_dev_enable_intr_vf(dev);\n \t}\n \n-\t/* Enable uio intr after callback registered */\n+\t/* Enable intr after callback registered */\n \trte_intr_enable(&(dev->pci_dev->intr_handle));\n \n \thw->mac.ops.update_int_moderator(hw);\n@@ -2185,7 +2264,6 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev)\n \t/* Make sure Switch Manager is ready before going forward. */\n \tif (hw->mac.type == fm10k_mac_pf) {\n \t\tint switch_ready = 0;\n-\t\tint i;\n \n \t\tfor (i = 0; i < MAX_QUERY_SWITCH_STATE_TIMES; i++) {\n \t\t\tfm10k_mbx_lock(hw);\n@@ -2291,7 +2369,8 @@ static struct eth_driver rte_pmd_fm10k = {\n \t.pci_drv = {\n \t\t.name = \"rte_pmd_fm10k\",\n \t\t.id_table = pci_id_fm10k_map,\n-\t\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_DETACHABLE,\n+\t\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC |\n+\t\t\tRTE_PCI_DRV_DETACHABLE,\n \t},\n \t.eth_dev_init = eth_fm10k_dev_init,\n \t.eth_dev_uninit = eth_fm10k_dev_uninit,\n",
    "prefixes": [
        "dpdk-dev",
        "v2",
        "2/7"
    ]
}