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GET /api/patches/79931/?format=api
{ "id": 79931, "url": "https://patches.dpdk.org/api/patches/79931/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20201007163023.2817-26-bruce.richardson@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20201007163023.2817-26-bruce.richardson@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20201007163023.2817-26-bruce.richardson@intel.com", "date": "2020-10-07T16:30:23", "name": "[v5,25/25] raw/ioat: add fill operation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "1a99bcb8dc684b735457215587b3eee2c2965f60", "submitter": { "id": 20, "url": "https://patches.dpdk.org/api/people/20/?format=api", "name": "Bruce Richardson", "email": "bruce.richardson@intel.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20201007163023.2817-26-bruce.richardson@intel.com/mbox/", "series": [ { "id": 12759, "url": "https://patches.dpdk.org/api/series/12759/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=12759", "date": "2020-10-07T16:30:01", "name": "raw/ioat: enhancements and new hardware support", "version": 5, "mbox": "https://patches.dpdk.org/series/12759/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/79931/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/79931/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 094DAA04BA;\n\tWed, 7 Oct 2020 18:39:25 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id B6ABE1B80B;\n\tWed, 7 Oct 2020 18:37:29 +0200 (CEST)", "from mga05.intel.com (mga05.intel.com [192.55.52.43])\n by dpdk.org (Postfix) with ESMTP id 248CD1B68A\n for <dev@dpdk.org>; Wed, 7 Oct 2020 18:37:10 +0200 (CEST)", "from orsmga007.jf.intel.com ([10.7.209.58])\n by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 07 Oct 2020 09:31:36 -0700", "from silpixa00399126.ir.intel.com ([10.237.222.4])\n by orsmga007.jf.intel.com with ESMTP; 07 Oct 2020 09:31:34 -0700" ], "IronPort-SDR": [ "\n AUW2srpk64ZyoIE6b8mBmsI7wd9LVk4OjUkPrTVUja+sQVb8qcb0yHFqQ9HGmw0kJ8Fvd/eYwF\n a0pRQyJR/DZg==", "\n i0rNvelbwUP8p5MLX5azkv9SmyCEs1vAi0gH0NAx4GRtXMM0xFXg2rLFc8grkBz1KOrNaFK3nc\n fOHwYxPCYwTA==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6000,8403,9767\"; a=\"249724610\"", "E=Sophos;i=\"5.77,347,1596524400\"; d=\"scan'208\";a=\"249724610\"", "E=Sophos;i=\"5.77,347,1596524400\"; d=\"scan'208\";a=\"354966103\"" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "From": "Bruce Richardson <bruce.richardson@intel.com>", "To": "dev@dpdk.org", "Cc": "patrick.fu@intel.com, thomas@monjalon.net,\n Kevin Laatz <kevin.laatz@intel.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Radu Nicolau <radu.nicolau@intel.com>", "Date": "Wed, 7 Oct 2020 17:30:23 +0100", "Message-Id": "<20201007163023.2817-26-bruce.richardson@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20201007163023.2817-1-bruce.richardson@intel.com>", "References": "<20200721095140.719297-1-bruce.richardson@intel.com>\n <20201007163023.2817-1-bruce.richardson@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v5 25/25] raw/ioat: add fill operation", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kevin Laatz <kevin.laatz@intel.com>\n\nAdd fill operation enqueue support for IOAT and IDXD. The fill enqueue is\nsimilar to the copy enqueue, but takes a 'pattern' rather than a source\naddress to transfer to the destination address. This patch also includes an\nadditional test case for the new operation type.\n\nSigned-off-by: Kevin Laatz <kevin.laatz@intel.com>\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\nAcked-by: Radu Nicolau <radu.nicolau@intel.com>\n---\n doc/guides/rawdevs/ioat.rst | 10 ++++\n doc/guides/rel_notes/release_20_11.rst | 2 +\n drivers/raw/ioat/ioat_rawdev_test.c | 62 ++++++++++++++++++++++++\n drivers/raw/ioat/rte_ioat_rawdev.h | 26 +++++++++++\n drivers/raw/ioat/rte_ioat_rawdev_fns.h | 65 ++++++++++++++++++++++++--\n 5 files changed, 160 insertions(+), 5 deletions(-)", "diff": "diff --git a/doc/guides/rawdevs/ioat.rst b/doc/guides/rawdevs/ioat.rst\nindex 7c2a2d457..250cfc48a 100644\n--- a/doc/guides/rawdevs/ioat.rst\n+++ b/doc/guides/rawdevs/ioat.rst\n@@ -285,6 +285,16 @@ is correct before freeing the data buffers using the returned handles:\n }\n \n \n+Filling an Area of Memory\n+~~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+The IOAT driver also has support for the ``fill`` operation, where an area\n+of memory is overwritten, or filled, with a short pattern of data.\n+Fill operations can be performed in much the same was as copy operations\n+described above, just using the ``rte_ioat_enqueue_fill()`` function rather\n+than the ``rte_ioat_enqueue_copy()`` function.\n+\n+\n Querying Device Statistics\n ~~~~~~~~~~~~~~~~~~~~~~~~~~~\n \ndiff --git a/doc/guides/rel_notes/release_20_11.rst b/doc/guides/rel_notes/release_20_11.rst\nindex e48e6ea75..943ec83fd 100644\n--- a/doc/guides/rel_notes/release_20_11.rst\n+++ b/doc/guides/rel_notes/release_20_11.rst\n@@ -122,6 +122,8 @@ New Features\n \n * Added support for Intel\\ |reg| Data Streaming Accelerator hardware.\n For more information, see https://01.org/blogs/2019/introducing-intel-data-streaming-accelerator\n+ * Added support for the fill operation via the API ``rte_ioat_enqueue_fill()``,\n+ where the hardware fills an area of memory with a repeating pattern.\n * Added a per-device configuration flag to disable management of user-provided completion handles\n * Renamed the ``rte_ioat_do_copies()`` API to ``rte_ioat_perform_ops()``,\n and renamed the ``rte_ioat_completed_copies()`` API to ``rte_ioat_completed_ops()``\ndiff --git a/drivers/raw/ioat/ioat_rawdev_test.c b/drivers/raw/ioat/ioat_rawdev_test.c\nindex 60d189b62..101f24a67 100644\n--- a/drivers/raw/ioat/ioat_rawdev_test.c\n+++ b/drivers/raw/ioat/ioat_rawdev_test.c\n@@ -155,6 +155,52 @@ test_enqueue_copies(int dev_id)\n \treturn 0;\n }\n \n+static int\n+test_enqueue_fill(int dev_id)\n+{\n+\tconst unsigned int length[] = {8, 64, 1024, 50, 100, 89};\n+\tstruct rte_mbuf *dst = rte_pktmbuf_alloc(pool);\n+\tchar *dst_data = rte_pktmbuf_mtod(dst, char *);\n+\tstruct rte_mbuf *completed[2] = {0};\n+\tuint64_t pattern = 0xfedcba9876543210;\n+\tunsigned int i, j;\n+\n+\tfor (i = 0; i < RTE_DIM(length); i++) {\n+\t\t/* reset dst_data */\n+\t\tmemset(dst_data, 0, length[i]);\n+\n+\t\t/* perform the fill operation */\n+\t\tif (rte_ioat_enqueue_fill(dev_id, pattern,\n+\t\t\t\tdst->buf_iova + dst->data_off, length[i],\n+\t\t\t\t(uintptr_t)dst) != 1) {\n+\t\t\tPRINT_ERR(\"Error with rte_ioat_enqueue_fill\\n\");\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\trte_ioat_perform_ops(dev_id);\n+\t\tusleep(100);\n+\n+\t\tif (rte_ioat_completed_ops(dev_id, 1, (void *)&completed[0],\n+\t\t\t(void *)&completed[1]) != 1) {\n+\t\t\tPRINT_ERR(\"Error with completed ops\\n\");\n+\t\t\treturn -1;\n+\t\t}\n+\t\t/* check the result */\n+\t\tfor (j = 0; j < length[i]; j++) {\n+\t\t\tchar pat_byte = ((char *)&pattern)[j % 8];\n+\t\t\tif (dst_data[j] != pat_byte) {\n+\t\t\t\tPRINT_ERR(\"Error with fill operation (length = %u): got (%x), not (%x)\\n\",\n+\t\t\t\t\t\tlength[i], dst_data[j],\n+\t\t\t\t\t\tpat_byte);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\trte_pktmbuf_free(dst);\n+\treturn 0;\n+}\n+\n int\n ioat_rawdev_test(uint16_t dev_id)\n {\n@@ -234,6 +280,7 @@ ioat_rawdev_test(uint16_t dev_id)\n \t}\n \n \t/* run the test cases */\n+\tprintf(\"Running Copy Tests\\n\");\n \tfor (i = 0; i < 100; i++) {\n \t\tunsigned int j;\n \n@@ -247,6 +294,21 @@ ioat_rawdev_test(uint16_t dev_id)\n \t}\n \tprintf(\"\\n\");\n \n+\t/* test enqueue fill operation */\n+\tprintf(\"Running Fill Tests\\n\");\n+\tfor (i = 0; i < 100; i++) {\n+\t\tunsigned int j;\n+\n+\t\tif (test_enqueue_fill(dev_id) != 0)\n+\t\t\tgoto err;\n+\n+\t\trte_rawdev_xstats_get(dev_id, ids, stats, nb_xstats);\n+\t\tfor (j = 0; j < nb_xstats; j++)\n+\t\t\tprintf(\"%s: %\"PRIu64\" \", snames[j].name, stats[j]);\n+\t\tprintf(\"\\r\");\n+\t}\n+\tprintf(\"\\n\");\n+\n \trte_rawdev_stop(dev_id);\n \tif (rte_rawdev_xstats_reset(dev_id, NULL, 0) != 0) {\n \t\tPRINT_ERR(\"Error resetting xstat values\\n\");\ndiff --git a/drivers/raw/ioat/rte_ioat_rawdev.h b/drivers/raw/ioat/rte_ioat_rawdev.h\nindex 6b891cd44..b7632ebf3 100644\n--- a/drivers/raw/ioat/rte_ioat_rawdev.h\n+++ b/drivers/raw/ioat/rte_ioat_rawdev.h\n@@ -37,6 +37,32 @@ struct rte_ioat_rawdev_config {\n \tbool hdls_disable; /**< if set, ignore user-supplied handle params */\n };\n \n+/**\n+ * Enqueue a fill operation onto the ioat device\n+ *\n+ * This queues up a fill operation to be performed by hardware, but does not\n+ * trigger hardware to begin that operation.\n+ *\n+ * @param dev_id\n+ * The rawdev device id of the ioat instance\n+ * @param pattern\n+ * The pattern to populate the destination buffer with\n+ * @param dst\n+ * The physical address of the destination buffer\n+ * @param length\n+ * The length of the destination buffer\n+ * @param dst_hdl\n+ * An opaque handle for the destination data, to be returned when this\n+ * operation has been completed and the user polls for the completion details.\n+ * NOTE: If hdls_disable configuration option for the device is set, this\n+ * parameter is ignored.\n+ * @return\n+ * Number of operations enqueued, either 0 or 1\n+ */\n+static inline int\n+rte_ioat_enqueue_fill(int dev_id, uint64_t pattern, phys_addr_t dst,\n+\t\tunsigned int length, uintptr_t dst_hdl);\n+\n /**\n * Enqueue a copy operation onto the ioat device\n *\ndiff --git a/drivers/raw/ioat/rte_ioat_rawdev_fns.h b/drivers/raw/ioat/rte_ioat_rawdev_fns.h\nindex d0045d8a4..c2c4601ca 100644\n--- a/drivers/raw/ioat/rte_ioat_rawdev_fns.h\n+++ b/drivers/raw/ioat/rte_ioat_rawdev_fns.h\n@@ -115,6 +115,13 @@ enum rte_idxd_ops {\n #define IDXD_FLAG_REQUEST_COMPLETION (1 << 3)\n #define IDXD_FLAG_CACHE_CONTROL (1 << 8)\n \n+#define IOAT_COMP_UPDATE_SHIFT\t3\n+#define IOAT_CMD_OP_SHIFT\t24\n+enum rte_ioat_ops {\n+\tioat_op_copy = 0,\t/* Standard DMA Operation */\n+\tioat_op_fill\t\t/* Block Fill */\n+};\n+\n /**\n * Hardware descriptor used by DSA hardware, for both bursts and\n * for individual operations.\n@@ -203,11 +210,8 @@ struct rte_idxd_rawdev {\n \tstruct rte_idxd_desc_batch *batch_ring;\n };\n \n-/*\n- * Enqueue a copy operation onto the ioat device\n- */\n static __rte_always_inline int\n-__ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst,\n+__ioat_write_desc(int dev_id, uint32_t op, uint64_t src, phys_addr_t dst,\n \t\tunsigned int length, uintptr_t src_hdl, uintptr_t dst_hdl)\n {\n \tstruct rte_ioat_rawdev *ioat =\n@@ -229,7 +233,8 @@ __ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst,\n \tdesc = &ioat->desc_ring[write];\n \tdesc->size = length;\n \t/* set descriptor write-back every 16th descriptor */\n-\tdesc->u.control_raw = (uint32_t)((!(write & 0xF)) << 3);\n+\tdesc->u.control_raw = (uint32_t)((op << IOAT_CMD_OP_SHIFT) |\n+\t\t\t(!(write & 0xF) << IOAT_COMP_UPDATE_SHIFT));\n \tdesc->src_addr = src;\n \tdesc->dest_addr = dst;\n \n@@ -242,6 +247,27 @@ __ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst,\n \treturn 1;\n }\n \n+static __rte_always_inline int\n+__ioat_enqueue_fill(int dev_id, uint64_t pattern, phys_addr_t dst,\n+\t\tunsigned int length, uintptr_t dst_hdl)\n+{\n+\tstatic const uintptr_t null_hdl;\n+\n+\treturn __ioat_write_desc(dev_id, ioat_op_fill, pattern, dst, length,\n+\t\t\tnull_hdl, dst_hdl);\n+}\n+\n+/*\n+ * Enqueue a copy operation onto the ioat device\n+ */\n+static __rte_always_inline int\n+__ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst,\n+\t\tunsigned int length, uintptr_t src_hdl, uintptr_t dst_hdl)\n+{\n+\treturn __ioat_write_desc(dev_id, ioat_op_copy, src, dst, length,\n+\t\t\tsrc_hdl, dst_hdl);\n+}\n+\n /* add fence to last written descriptor */\n static __rte_always_inline int\n __ioat_fence(int dev_id)\n@@ -380,6 +406,23 @@ __idxd_write_desc(int dev_id, const struct rte_idxd_hw_desc *desc,\n \treturn 0;\n }\n \n+static __rte_always_inline int\n+__idxd_enqueue_fill(int dev_id, uint64_t pattern, rte_iova_t dst,\n+\t\tunsigned int length, uintptr_t dst_hdl)\n+{\n+\tconst struct rte_idxd_hw_desc desc = {\n+\t\t\t.op_flags = (idxd_op_fill << IDXD_CMD_OP_SHIFT) |\n+\t\t\t\tIDXD_FLAG_CACHE_CONTROL,\n+\t\t\t.src = pattern,\n+\t\t\t.dst = dst,\n+\t\t\t.size = length\n+\t};\n+\tconst struct rte_idxd_user_hdl hdl = {\n+\t\t\t.dst = dst_hdl\n+\t};\n+\treturn __idxd_write_desc(dev_id, &desc, &hdl);\n+}\n+\n static __rte_always_inline int\n __idxd_enqueue_copy(int dev_id, rte_iova_t src, rte_iova_t dst,\n \t\tunsigned int length, uintptr_t src_hdl, uintptr_t dst_hdl)\n@@ -475,6 +518,18 @@ __idxd_completed_ops(int dev_id, uint8_t max_ops,\n \treturn n;\n }\n \n+static inline int\n+rte_ioat_enqueue_fill(int dev_id, uint64_t pattern, phys_addr_t dst,\n+\t\tunsigned int len, uintptr_t dst_hdl)\n+{\n+\tenum rte_ioat_dev_type *type =\n+\t\t\t(enum rte_ioat_dev_type *)rte_rawdevs[dev_id].dev_private;\n+\tif (*type == RTE_IDXD_DEV)\n+\t\treturn __idxd_enqueue_fill(dev_id, pattern, dst, len, dst_hdl);\n+\telse\n+\t\treturn __ioat_enqueue_fill(dev_id, pattern, dst, len, dst_hdl);\n+}\n+\n static inline int\n rte_ioat_enqueue_copy(int dev_id, phys_addr_t src, phys_addr_t dst,\n \t\tunsigned int length, uintptr_t src_hdl, uintptr_t dst_hdl)\n", "prefixes": [ "v5", "25/25" ] }