get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/75582/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 75582,
    "url": "https://patches.dpdk.org/api/patches/75582/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/MWHPR12MB136076E652230CEBD6EE6562DF5F0@MWHPR12MB1360.namprd12.prod.outlook.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<MWHPR12MB136076E652230CEBD6EE6562DF5F0@MWHPR12MB1360.namprd12.prod.outlook.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/MWHPR12MB136076E652230CEBD6EE6562DF5F0@MWHPR12MB1360.namprd12.prod.outlook.com",
    "date": "2020-08-17T17:49:38",
    "name": "[RFC] ethdev: introduce Rx buffer split",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "000ad3edb8db209ad8a12935fa5836afaa1ac8f9",
    "submitter": {
        "id": 1926,
        "url": "https://patches.dpdk.org/api/people/1926/?format=api",
        "name": "Slava Ovsiienko",
        "email": "viacheslavo@nvidia.com"
    },
    "delegate": {
        "id": 319,
        "url": "https://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/MWHPR12MB136076E652230CEBD6EE6562DF5F0@MWHPR12MB1360.namprd12.prod.outlook.com/mbox/",
    "series": [
        {
            "id": 11673,
            "url": "https://patches.dpdk.org/api/series/11673/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=11673",
            "date": "2020-08-17T17:49:38",
            "name": "[RFC] ethdev: introduce Rx buffer split",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/11673/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/75582/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/75582/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 43E33A034C;\n\tMon, 17 Aug 2020 19:49:45 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 4AA184CA7;\n\tMon, 17 Aug 2020 19:49:44 +0200 (CEST)",
            "from hqnvemgate26.nvidia.com (hqnvemgate26.nvidia.com\n [216.228.121.65]) by dpdk.org (Postfix) with ESMTP id 128EA4C99\n for <dev@dpdk.org>; Mon, 17 Aug 2020 19:49:41 +0200 (CEST)",
            "from hqpgpgate102.nvidia.com (Not Verified[216.228.121.13]) by\n hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA)\n id <B5f3ac3270000>; Mon, 17 Aug 2020 10:49:27 -0700",
            "from hqmail.nvidia.com ([172.20.161.6])\n by hqpgpgate102.nvidia.com (PGP Universal service);\n Mon, 17 Aug 2020 10:49:41 -0700",
            "from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL107.nvidia.com\n (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Mon, 17 Aug\n 2020 17:49:40 +0000",
            "from NAM10-DM6-obe.outbound.protection.outlook.com (104.47.58.106)\n by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id\n 15.0.1473.3 via Frontend Transport; Mon, 17 Aug 2020 17:49:40 +0000",
            "from MWHPR12MB1360.namprd12.prod.outlook.com (2603:10b6:300:12::7)\n by MWHPR12MB1694.namprd12.prod.outlook.com (2603:10b6:301:11::18) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3283.18; Mon, 17 Aug\n 2020 17:49:39 +0000",
            "from MWHPR12MB1360.namprd12.prod.outlook.com\n ([fe80::711e:ec6f:ba28:d3d0]) by MWHPR12MB1360.namprd12.prod.outlook.com\n ([fe80::711e:ec6f:ba28:d3d0%5]) with mapi id 15.20.3283.027; Mon, 17 Aug 2020\n 17:49:38 +0000"
        ],
        "X-PGP-Universal": "processed;\n by hqpgpgate102.nvidia.com on Mon, 17 Aug 2020 10:49:41 -0700",
        "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=K1IaxXfKS8FUsNb4RHes5783rsefmqHkmA0xQp2MlrXcBIGUynycslvnTHX13DI5aZDDpBoj7vaPA12Cy8x5EFyYP0XT8VDgUlOxet1h4J4EI5aPYS9wd3smFBss+pqaW0ZCeUsOpOVBFs1X0jEbPDK++7WCG5oSQobQOWl0oOK8Mq7r4AkFVTK8dyCEnVVnf1cdVt8oXp3muhon4HZ71sSTijzvtdlqO6JDrtZo48/wHCQVaTnc95Pz2YdX6cQAy6J5puUJIUXv44pPfoHAOrQ2qGw4Bvwucz4IdJDD3uly0Z796LdbfV+k4DDW7YRctd10VyTtqPI5q6Mcj6nUPg==",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=Wc32dHwSeIgRig19xjA79w4HpiOfGgxMtGlEOReOfG0=;\n b=XPbnXYcnNGtXKQEwXyhOXqH3fEiClwCB/UcZvt63WEXvYgZrPfJ1u7M2TiGvoOWwW418W1+UuC+LUH97TSoQtwhwQKj0b5KA8q59GFstUKBe+8MNML2NVTYb4zNQhmvTQvYwUGA91R7ewP7fb5VPA7NApf10Zy9FaKDYLBG70/OHTHo+61GzgzpCSvF6/xUlu00fgtBnBmmRMFma6+d+bOpLUej0MpqNJJR47ZuEKekWMYYP6yd97sJfV9+ccdLAPDYDVQGZB/uah+uYCS2+9lQNmmbOnrM+mA+tvtwsUAKciAPU27kXIRkUQlYbtNeS350L7naP56APjPRhzM7daw==",
        "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass\n smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com;\n dkim=pass header.d=nvidia.com; arc=none",
        "From": "Slava Ovsiienko <viacheslavo@nvidia.com>",
        "To": "\"dev@dpdk.org\" <dev@dpdk.org>",
        "CC": "Thomas Monjalon <thomasm@mellanox.com>, \"stephen@networkplumber.org\"\n <stephen@networkplumber.org>, \"ferruh.yigit@intel.com\"\n <ferruh.yigit@intel.com>, Shahaf Shuler <shahafs@nvidia.com>,\n \"olivier.matz@6wind.com\" <olivier.matz@6wind.com>, \"jerinjacobk@gmail.com\"\n <jerinjacobk@gmail.com>, \"maxime.coquelin@redhat.com\"\n <maxime.coquelin@redhat.com>, \"david.marchand@redhat.com\"\n <david.marchand@redhat.com>, \"arybchenko@solarflare.com\"\n <arybchenko@solarflare.com>, Asaf Penso <asafp@nvidia.com>",
        "Thread-Topic": "[RFC] ethdev: introduce Rx buffer split",
        "Thread-Index": "AdZ0vX26iflBD6P5QjC0iZ6rubHz2w==",
        "Date": "Mon, 17 Aug 2020 17:49:38 +0000",
        "Message-ID": "\n <MWHPR12MB136076E652230CEBD6EE6562DF5F0@MWHPR12MB1360.namprd12.prod.outlook.com>",
        "Accept-Language": "en-US",
        "Content-Language": "en-US",
        "X-MS-Has-Attach": "",
        "X-MS-TNEF-Correlator": "",
        "authentication-results": "dpdk.org; dkim=none (message not signed)\n header.d=none;dpdk.org; dmarc=none action=none header.from=nvidia.com;",
        "x-originating-ip": "[95.164.10.10]",
        "x-ms-publictraffictype": "Email",
        "x-ms-office365-filtering-correlation-id": "0d05c18c-33d6-4aaf-96a4-08d842d5e9bd",
        "x-ms-traffictypediagnostic": "MWHPR12MB1694:",
        "x-ld-processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr",
        "x-ms-exchange-transport-forked": "True",
        "x-microsoft-antispam-prvs": "\n <MWHPR12MB16949D35818322A5714A7100DF5F0@MWHPR12MB1694.namprd12.prod.outlook.com>",
        "x-ms-oob-tlc-oobclassifiers": "OLM:551;",
        "x-ms-exchange-senderadcheck": "1",
        "x-microsoft-antispam": "BCL:0;",
        "x-microsoft-antispam-message-info": "\n 9dFMMEFGaQOXlFXSMLjyNV/tAV5HBqXAEFqVsObOZh+Q5mqKbnLcS3iQdfceVsTlmF1bYvRd494rd71HMt6Sg6btPlb7wHHx7c3AyI95ygRYA0LoWqU52vok4HvuB4EsGUsvyCTZpf28b5JNPc0dz7F6zr/vhdRCVnuYMOfbSpEbGmdpGY3pKBXM5UkhLSu5uou15YQYZ7QSflZSbI8syW4srmMaddrtzMKnQCsP3PRienwP2HDHfvrslgnKhExLU2gJUaQ94XI8oXrs8pmlj2IzJjTK+plVj6dY3v1KNxb0kDNt0jUhx8Za3Lh1w1+Ym63Ma4IhwP4kWT3Y6fPJwQ==",
        "x-forefront-antispam-report": "CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:MWHPR12MB1360.namprd12.prod.outlook.com; PTR:; CAT:NONE;\n SFS:(4636009)(136003)(39860400002)(346002)(366004)(396003)(376002)(30864003)(66446008)(76116006)(66476007)(64756008)(66946007)(316002)(52536014)(5660300002)(66556008)(8676002)(55016002)(54906003)(71200400001)(33656002)(83380400001)(86362001)(4326008)(26005)(6916009)(6506007)(478600001)(107886003)(8936002)(53546011)(7696005)(2906002)(9686003)(186003);\n DIR:OUT; SFP:1101;",
        "x-ms-exchange-antispam-messagedata": "\n T9zllH/BO6gfNmZ5EXmQ5edHusHkGyZcfwYlBWSJsLPwDQ9p3T4MXTcUljRIXVOWDmiJMugJqjm49wSN7dwtZE/ctF0OS3+RyLURk7LTG34yEqbXh3W8yI5JYNj/tqq87DRj3c3ZQxw9tW8SSDEMQ3fuoGE3Ej4gqLZOAjOXv/ouxob2b/TBtgoqHNT9ZxpVn0aPQkAnWrpMV3XzergnNkZPG5nmahbvLAtRiTfSK0YgLU5MXmru7TH8nf2bHexjvjsle8BYnCoRCeATBurAkKR7Rw84lZvZhMBg4jaZE7M8Am+2eIT14AklfWwA29Y+szr2SHADBuKGva1BYz+Hu4i+aA/jNUEF611pcezE63owE4IQLZt833W7VFHBN1qS8MomUagJUWRW8e2IxC3qd6s0IdMQ8yE2wDH+GKPJIlUwExStbzz/Hc9QUF8r5dmwaOddlUBnh9+LXjF8NUTtkDgdbTAiINIFEvAFiRKobUDcHBVBGJ/6rCEwuHMyyjIwwnvLV+HnlT1nzDfiKbcqoDhB11bR4JW+w5yBm2DpKjZGSowr2XAxtQKjRdVPDFccDsMThqRQqnbm+vLzHwltKOsE2FePT9vACRSOeJ8g+6Y84MBWaIFoWDSuOxFruXLEiJliyFZg+vkPOdToc1QJ1Q==",
        "Content-Type": "text/plain; charset=\"us-ascii\"",
        "Content-Transfer-Encoding": "quoted-printable",
        "MIME-Version": "1.0",
        "X-MS-Exchange-CrossTenant-AuthAs": "Internal",
        "X-MS-Exchange-CrossTenant-AuthSource": "MWHPR12MB1360.namprd12.prod.outlook.com",
        "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 0d05c18c-33d6-4aaf-96a4-08d842d5e9bd",
        "X-MS-Exchange-CrossTenant-originalarrivaltime": "17 Aug 2020 17:49:38.7949 (UTC)",
        "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted",
        "X-MS-Exchange-CrossTenant-id": "43083d15-7273-40c1-b7db-39efd9ccc17a",
        "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED",
        "X-MS-Exchange-CrossTenant-userprincipalname": "\n lr1uQhatGPtAu2ODr+oIbVV7gco7f/XqCLpILuXF0CblIknDbELNyrNCL7gzpVuG+/RQwEy518oa7uER7aRjgg==",
        "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MWHPR12MB1694",
        "X-OriginatorOrg": "Nvidia.com",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1;\n t=1597686567; bh=Wc32dHwSeIgRig19xjA79w4HpiOfGgxMtGlEOReOfG0=;\n h=X-PGP-Universal:ARC-Seal:ARC-Message-Signature:\n ARC-Authentication-Results:From:To:CC:Subject:Thread-Topic:\n Thread-Index:Date:Message-ID:Accept-Language:Content-Language:\n X-MS-Has-Attach:X-MS-TNEF-Correlator:authentication-results:\n x-originating-ip:x-ms-publictraffictype:\n x-ms-office365-filtering-correlation-id:x-ms-traffictypediagnostic:\n x-ld-processed:x-ms-exchange-transport-forked:\n x-microsoft-antispam-prvs:x-ms-oob-tlc-oobclassifiers:\n x-ms-exchange-senderadcheck:x-microsoft-antispam:\n x-microsoft-antispam-message-info:x-forefront-antispam-report:\n x-ms-exchange-antispam-messagedata:Content-Type:\n Content-Transfer-Encoding:MIME-Version:\n X-MS-Exchange-CrossTenant-AuthAs:\n X-MS-Exchange-CrossTenant-AuthSource:\n X-MS-Exchange-CrossTenant-Network-Message-Id:\n X-MS-Exchange-CrossTenant-originalarrivaltime:\n X-MS-Exchange-CrossTenant-fromentityheader:\n X-MS-Exchange-CrossTenant-id:X-MS-Exchange-CrossTenant-mailboxtype:\n X-MS-Exchange-CrossTenant-userprincipalname:\n X-MS-Exchange-Transport-CrossTenantHeadersStamped:X-OriginatorOrg;\n b=fSlEbwwJH26qhd7vCXLI9kDiz6vbJSBiG9lj+5AkxrK7/QsMssromSC9q+rPB7mDZ\n ZS7T4ubcqnnQ6vnpzfWXgbQmVugogggai+HfUi9PTKiXDFuoJ6QzL3UHlSvtUMH5ju\n rKJXkZzs95atKBKcChTi55H+IOYRVzYfWQGl/nswaz4jtl//vWCI72vj/++w5NEPwX\n 7FCyovsKpdvpHMvdv2JVxd2QVGRurK1WcHWOEZNK5ReJe1RnS9zfVH8Zr87yPQFFEr\n SAbFyl/9+jwP/NgX0EizP23VzkhnXipdu/VrguMND9ctBh7AcBiyAVuCci4PjTZxrp\n VeSwnQS1sbGwA==",
        "Subject": "[dpdk-dev] [RFC] ethdev: introduce Rx buffer split",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From 7f7052d8b85ff3ff7011bd844b6d3169c6e51923 Mon Sep 17 00:00:00 2001\nFrom: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\nDate: Mon, 17 Aug 2020 16:57:43 +0000\nSubject: [RFC] ethdev: introduce Rx buffer split\n\nThe DPDK datapath in the transmit direction is very flexible.\nAn application can build the multisegment packet and manages\nalmost all data aspects - the memory pools where segments\nare allocated from, the segment lengths, the memory attributes\nlike external buffers, registered for DMA, etc.\n\nIn the receiving direction, the datapath is much less flexible,\nan application can only specify the memory pool to configure the\nreceiving queue and nothing more. In order to extend receiving\ndatapath capabilities it is proposed to add the way to provide\nextended infoirmation how to split the packets being received.\n\nThe following structure is introduced to specify the Rx packet\nsegment:\n\nstruct rte_eth_rxseg {\n    struct rte_mempool *mp; /* memory pools to allocate segment from */\n    uint16_t length; /* segment maximal data length */\n    uint16_t offset; /* data offset from beginning of mbuf data buffer */\n    uint32_t reserved; /* reserved field */\n};\n\nThe new routine rte_eth_rx_queue_setup_ex() is introduced to\nsetup the given Rx queue using the new extended Rx packet segment\ndescription:\n\nint\nrte_eth_rx_queue_setup_ex(uint16_t port_id, uint16_t rx_queue_id,\n                          uint16_t nb_rx_desc, unsigned int socket_id,\n                          const struct rte_eth_rxconf *rx_conf,\n\t\t          const struct rte_eth_rxseg *rx_seg,\n                          uint16_t n_seg)\n\nThis routine presents the two new parameters:\n    rx_seg - pointer the array of segment descriptions, each element\n             describes the memory pool, maximal data length, initial\n             data offset from the beginning of data buffer in mbuf\n    n_seg - number of elements in the array\n\nThe new offload flag DEV_RX_OFFLOAD_BUFFER_SPLIT in device\ncapabilities is introduced to present the way for PMD to report to\napplication about supporting Rx packet split to configurable\nsegments. Prior invoking the rte_eth_rx_queue_setup_ex() routine\napplication should check DEV_RX_OFFLOAD_BUFFER_SPLIT flag.\n\nIf the Rx queue is configured with new routine the packets being\nreceived will be split into multiple segments pushed to the mbufs\nwith specified attributes. The PMD will allocate the first mbuf\nfrom the pool specified in the first segment descriptor and puts\nthe data staring at specified offeset in the allocated mbuf data\nbuffer. If packet length exceeds the specified segment length\nthe next mbuf will be allocated according to the next segment\ndescriptor (if any) and data will be put in its data buffer at\nspecified offset and not exceeding specified length. If there is\nno next descriptor the next mbuf will be allocated and filled in the\nsame way (from the same pool and with the same buffer offset/length)\nas the current one.\n\nFor example, let's suppose we configured the Rx queue with the\nfollowing segments:\n    seg0 - pool0, len0=14B, off0=RTE_PKTMBUF_HEADROOM\n    seg1 - pool1, len1=20B, off1=0B\n    seg2 - pool2, len2=20B, off2=0B\n    seg3 - pool3, len3=512B, off3=0B\n\nThe packet 46 bytes long will look like the following:\n    seg0 - 14B long @ RTE_PKTMBUF_HEADROOM in mbuf from pool0\n    seg1 - 20B long @ 0 in mbuf from pool1\n    seg2 - 12B long @ 0 in mbuf from pool2\n\nThe packet 1500 bytes long will look like the following:\n    seg0 - 14B @ RTE_PKTMBUF_HEADROOM in mbuf from pool0\n    seg1 - 20B @ 0 in mbuf from pool1\n    seg2 - 20B @ 0 in mbuf from pool2\n    seg3 - 512B @ 0 in mbuf from pool3\n    seg4 - 512B @ 0 in mbuf from pool3\n    seg5 - 422B @ 0 in mbuf from pool3\n\nThe offload DEV_RX_OFFLOAD_SCATTER must be present and\nconfigured to support new buffer spllit feature (if n_seg\nis greater than one).\n\nThe new approach would allow splitting the ingress packets into\nmultiple parts pushed to the memory with different attributes.\nFor example, the packet headers can be pushed to the embedded\ndata buffers within mbufs and the application data into\nthe external buffers attached to mbufs allocated from the\ndifferent memory pools. The memory attributes for the split\nparts may differ either - for example the application data\nmay be pushed into the external memory located on the dedicated\nphysical device, say GPU or NVMe. This would improve the DPDK\nreceiving datapath flexibility with preserving compatibility\nwith existing API.\n\nAlso, the proposed segment description might be used to specify\nRx packet split for some other features. For example, provide\nthe way to specify the extra memory pool for the Header Split\nfeature of some Intel PMD.\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n lib/librte_ethdev/rte_ethdev.c      | 166 ++++++++++++++++++++++++++++++++++++\n lib/librte_ethdev/rte_ethdev.h      |  15 ++++\n lib/librte_ethdev/rte_ethdev_core.h |  10 +++\n 3 files changed, 191 insertions(+)",
    "diff": "diff --git a/lib/librte_ethdev/rte_ethdev.c b/lib/librte_ethdev/rte_ethdev.c\nindex 7858ad5..638e42d 100644\n--- a/lib/librte_ethdev/rte_ethdev.c\n+++ b/lib/librte_ethdev/rte_ethdev.c\n@@ -1933,6 +1933,172 @@ struct rte_eth_dev *\n }\n \n int\n+rte_eth_rx_queue_setup_ex(uint16_t port_id, uint16_t rx_queue_id,\n+\t\t\t  uint16_t nb_rx_desc, unsigned int socket_id,\n+\t\t\t  const struct rte_eth_rxconf *rx_conf,\n+\t\t\t  const struct rte_eth_rxseg *rx_seg, uint16_t n_seg)\n+{\n+\tint ret;\n+\tuint16_t seg_idx;\n+\tuint32_t mbp_buf_size;\n+\tstruct rte_eth_dev *dev;\n+\tstruct rte_eth_dev_info dev_info;\n+\tstruct rte_eth_rxconf local_conf;\n+\tvoid **rxq;\n+\n+\tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);\n+\n+\tdev = &rte_eth_devices[port_id];\n+\tif (rx_queue_id >= dev->data->nb_rx_queues) {\n+\t\tRTE_ETHDEV_LOG(ERR, \"Invalid RX queue_id=%u\\n\", rx_queue_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (rx_seg == NULL) {\n+\t\tRTE_ETHDEV_LOG(ERR, \"Invalid null description pointer\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (n_seg == 0) {\n+\t\tRTE_ETHDEV_LOG(ERR, \"Invalid zero description number\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tRTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup_ex, -ENOTSUP);\n+\n+\t/*\n+\t * Check the size of the mbuf data buffer.\n+\t * This value must be provided in the private data of the memory pool.\n+\t * First check that the memory pool has a valid private data.\n+\t */\n+\tret = rte_eth_dev_info_get(port_id, &dev_info);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\tfor (seg_idx = 0; seg_idx < n_seg; seg_idx++) {\n+\t\tstruct rte_mempool *mp = rx_seg[seg_idx].mp;\n+\n+\t\tif (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {\n+\t\t\tRTE_ETHDEV_LOG(ERR, \"%s private_data_size %d < %d\\n\",\n+\t\t\t\tmp->name, (int)mp->private_data_size,\n+\t\t\t\t(int)sizeof(struct rte_pktmbuf_pool_private));\n+\t\t\treturn -ENOSPC;\n+\t\t}\n+\n+\t\tmbp_buf_size = rte_pktmbuf_data_room_size(mp);\n+\t\tif (mbp_buf_size < rx_seg[seg_idx].length + rx_seg[seg_idx].offset) {\n+\t\t\tRTE_ETHDEV_LOG(ERR,\n+\t\t\t\t\"%s mbuf_data_room_size %d < %d\"\n+\t\t\t\t\" (segment length=%d + segment offset=%d)\\n\",\n+\t\t\t\tmp->name, (int)mbp_buf_size,\n+\t\t\t\t(int)(rx_seg[seg_idx].length + rx_seg[seg_idx].offset),\n+\t\t\t\t(int)rx_seg[seg_idx].length,\n+\t\t\t\t(int)rx_seg[seg_idx].offset);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n+\t/* Use default specified by driver, if nb_rx_desc is zero */\n+\tif (nb_rx_desc == 0) {\n+\t\tnb_rx_desc = dev_info.default_rxportconf.ring_size;\n+\t\t/* If driver default is also zero, fall back on EAL default */\n+\t\tif (nb_rx_desc == 0)\n+\t\t\tnb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;\n+\t}\n+\n+\tif (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||\n+\t\t\tnb_rx_desc < dev_info.rx_desc_lim.nb_min ||\n+\t\t\tnb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {\n+\n+\t\tRTE_ETHDEV_LOG(ERR,\n+\t\t\t\"Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\\n\",\n+\t\t\tnb_rx_desc, dev_info.rx_desc_lim.nb_max,\n+\t\t\tdev_info.rx_desc_lim.nb_min,\n+\t\t\tdev_info.rx_desc_lim.nb_align);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (dev->data->dev_started &&\n+\t\t!(dev_info.dev_capa &\n+\t\t\tRTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))\n+\t\treturn -EBUSY;\n+\n+\tif (dev->data->dev_started &&\n+\t\t(dev->data->rx_queue_state[rx_queue_id] !=\n+\t\t\tRTE_ETH_QUEUE_STATE_STOPPED))\n+\t\treturn -EBUSY;\n+\n+\trxq = dev->data->rx_queues;\n+\tif (rxq[rx_queue_id]) {\n+\t\tRTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,\n+\t\t\t\t\t-ENOTSUP);\n+\t\t(*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);\n+\t\trxq[rx_queue_id] = NULL;\n+\t}\n+\n+\tif (rx_conf == NULL)\n+\t\trx_conf = &dev_info.default_rxconf;\n+\n+\tlocal_conf = *rx_conf;\n+\n+\t/*\n+\t * If an offloading has already been enabled in\n+\t * rte_eth_dev_configure(), it has been enabled on all queues,\n+\t * so there is no need to enable it in this queue again.\n+\t * The local_conf.offloads input to underlying PMD only carries\n+\t * those offloadings which are only enabled on this queue and\n+\t * not enabled on all queues.\n+\t */\n+\tlocal_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;\n+\n+\t/*\n+\t * New added offloadings for this queue are those not enabled in\n+\t * rte_eth_dev_configure() and they must be per-queue type.\n+\t * A pure per-port offloading can't be enabled on a queue while\n+\t * disabled on another queue. A pure per-port offloading can't\n+\t * be enabled for any queue as new added one if it hasn't been\n+\t * enabled in rte_eth_dev_configure().\n+\t */\n+\tif ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=\n+\t     local_conf.offloads) {\n+\t\tRTE_ETHDEV_LOG(ERR,\n+\t\t\t\"Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%\"PRIx64\" must be \"\n+\t\t\t\"within per-queue offload capabilities 0x%\"PRIx64\" in %s()\\n\",\n+\t\t\tport_id, rx_queue_id, local_conf.offloads,\n+\t\t\tdev_info.rx_queue_offload_capa,\n+\t\t\t__func__);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/*\n+\t * If LRO is enabled, check that the maximum aggregated packet\n+\t * size is supported by the configured device.\n+\t */\n+\tif (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {\n+\t\tif (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)\n+\t\t\tdev->data->dev_conf.rxmode.max_lro_pkt_size =\n+\t\t\t\tdev->data->dev_conf.rxmode.max_rx_pkt_len;\n+\t\tint ret = check_lro_pkt_size(port_id,\n+\t\t\t\tdev->data->dev_conf.rxmode.max_lro_pkt_size,\n+\t\t\t\tdev->data->dev_conf.rxmode.max_rx_pkt_len,\n+\t\t\t\tdev_info.max_lro_pkt_size);\n+\t\tif (ret != 0)\n+\t\t\treturn ret;\n+\t}\n+\n+\tret = (*dev->dev_ops->rx_queue_setup_ex)(dev, rx_queue_id, nb_rx_desc,\n+\t\t\t\t\t\t socket_id, &local_conf,\n+\t\t\t\t\t\t rx_seg, n_seg);\n+\tif (!ret) {\n+\t\tif (!dev->data->min_rx_buf_size ||\n+\t\t    dev->data->min_rx_buf_size > mbp_buf_size)\n+\t\t\tdev->data->min_rx_buf_size = mbp_buf_size;\n+\t}\n+\n+\treturn eth_err(port_id, ret);\n+}\n+\n+int\n rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,\n \t\t\t       uint16_t nb_rx_desc,\n \t\t\t       const struct rte_eth_hairpin_conf *conf)\ndiff --git a/lib/librte_ethdev/rte_ethdev.h b/lib/librte_ethdev/rte_ethdev.h\nindex 70295d7..701264a 100644\n--- a/lib/librte_ethdev/rte_ethdev.h\n+++ b/lib/librte_ethdev/rte_ethdev.h\n@@ -938,6 +938,16 @@ struct rte_eth_txmode {\n };\n \n /**\n+ * A structure used to configure an RX packet segment to split.\n+ */\n+struct rte_eth_rxseg {\n+\tstruct rte_mempool *mp; /**< Memory pools to allocate segment from */\n+\tuint16_t length; /**< Segment maximal data length */\n+\tuint16_t offset; /**< Data offset from beggining of mbuf data buffer */\n+\tuint32_t reserved; /**< Reserved field */\n+};\n+\n+/**\n  * A structure used to configure an RX ring of an Ethernet port.\n  */\n struct rte_eth_rxconf {\n@@ -1988,6 +1998,11 @@ int rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,\n \t\tconst struct rte_eth_rxconf *rx_conf,\n \t\tstruct rte_mempool *mb_pool);\n \n+int rte_eth_rx_queue_setup_ex(uint16_t port_id, uint16_t rx_queue_id,\n+\t\tuint16_t nb_rx_desc, unsigned int socket_id,\n+\t\tconst struct rte_eth_rxconf *rx_conf,\n+\t\tconst struct rte_eth_rxseg *rx_seg, uint16_t n_seg);\n+\n /**\n  * @warning\n  * @b EXPERIMENTAL: this API may change, or be removed, without prior notice\ndiff --git a/lib/librte_ethdev/rte_ethdev_core.h b/lib/librte_ethdev/rte_ethdev_core.h\nindex 32407dd..27018de 100644\n--- a/lib/librte_ethdev/rte_ethdev_core.h\n+++ b/lib/librte_ethdev/rte_ethdev_core.h\n@@ -265,6 +265,15 @@ typedef int (*eth_rx_queue_setup_t)(struct rte_eth_dev *dev,\n \t\t\t\t    struct rte_mempool *mb_pool);\n /**< @internal Set up a receive queue of an Ethernet device. */\n \n+typedef int (*eth_rx_queue_setup_ex_t)(struct rte_eth_dev *dev,\n+\t\t\t\t       uint16_t rx_queue_id,\n+\t\t\t\t       uint16_t nb_rx_desc,\n+\t\t\t\t       unsigned int socket_id,\n+\t\t\t\t       const struct rte_eth_rxconf *rx_conf,\n+\t\t\t\t       const struct rte_eth_rxseg *rx_seg,\n+\t\t\t\t       uint16_t n_seg);\n+/**< @internal Set up a receive queue of an Ethernet device. */\n+\n typedef int (*eth_tx_queue_setup_t)(struct rte_eth_dev *dev,\n \t\t\t\t    uint16_t tx_queue_id,\n \t\t\t\t    uint16_t nb_tx_desc,\n@@ -659,6 +668,7 @@ struct eth_dev_ops {\n \teth_queue_start_t          tx_queue_start;/**< Start TX for a queue. */\n \teth_queue_stop_t           tx_queue_stop; /**< Stop TX for a queue. */\n \teth_rx_queue_setup_t       rx_queue_setup;/**< Set up device RX queue. */\n+\teth_rx_queue_setup_ex_t    rx_queue_setup_ex;/**< Set up device RX queue. */\n \teth_queue_release_t        rx_queue_release; /**< Release RX queue. */\n \teth_rx_queue_count_t       rx_queue_count;\n \t/**< Get the number of used RX descriptors. */\n",
    "prefixes": [
        "RFC"
    ]
}