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GET /api/patches/7433/?format=api
{ "id": 7433, "url": "https://patches.dpdk.org/api/patches/7433/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1444067589-29513-7-git-send-email-adrien.mazarguil@6wind.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1444067589-29513-7-git-send-email-adrien.mazarguil@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1444067589-29513-7-git-send-email-adrien.mazarguil@6wind.com", "date": "2015-10-05T17:53:02", "name": "[dpdk-dev,06/13] mlx5: add MTU configuration support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "8905a13812e5c78783621ad62be26b580a1b0d4d", "submitter": { "id": 165, "url": "https://patches.dpdk.org/api/people/165/?format=api", "name": "Adrien Mazarguil", "email": "adrien.mazarguil@6wind.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1444067589-29513-7-git-send-email-adrien.mazarguil@6wind.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/7433/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/7433/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id C5C309253;\n\tMon, 5 Oct 2015 19:53:51 +0200 (CEST)", "from mail-wi0-f169.google.com (mail-wi0-f169.google.com\n\t[209.85.212.169]) by dpdk.org (Postfix) with ESMTP id 32678924C\n\tfor <dev@dpdk.org>; Mon, 5 Oct 2015 19:53:49 +0200 (CEST)", "by wiclk2 with SMTP id lk2so132412133wic.0\n\tfor <dev@dpdk.org>; Mon, 05 Oct 2015 10:53:49 -0700 (PDT)", "from 6wind.com (guy78-3-82-239-227-177.fbx.proxad.net.\n\t[82.239.227.177]) by smtp.gmail.com with ESMTPSA id\n\tbk4sm28041554wjc.1.2015.10.05.10.53.48\n\t(version=TLSv1.2 cipher=RC4-SHA bits=128/128);\n\tMon, 05 Oct 2015 10:53:48 -0700 (PDT)" ], "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=0LTG/jPzgtqihovpjuVDJaD1iMuTJCu5tjm+EJvLz6A=;\n\tb=kUWQj3rdl3XKkvmTSBQIVgGU2sph1Dg4SiPYlELHRR7hDWt7GVT5GuIXRC5XvRNyBi\n\tCOoZeAWAvDxQXwo/tRd4n7lGkk+gcc90KhtnN8eZWjQC+XpK2pDr4t6FDz/vc4ODGSg0\n\tn24bFSTLazGcIPOo0Xe7NseiZ2hjxp8lo61BuH2ru2uxcOZsZSWjZclDthjUZ4miUYX/\n\tD7TD6W9X8xZQ4KjMwHRqfKatXGsJOLcOreSW+s6vuz5d955L1bZ2fW2OfDAIVZYyUpGO\n\t3zZa2AuyaZZPMZwSOJu8ZYkUOhCbR/WdxBkH0gHQxN2VmNMDIsrDewV9hSv6kaIJB8q8\n\tQAiw==", "X-Gm-Message-State": "ALoCoQlEHWm6zHTMjRVzkdqWveQWAl32A10fqSnWzcn4mKL1Howufcg3MnVpT62GCMGVJm+3eTYD", "X-Received": "by 10.180.104.65 with SMTP id gc1mr13482913wib.67.1444067629030; \n\tMon, 05 Oct 2015 10:53:49 -0700 (PDT)", "From": "Adrien Mazarguil <adrien.mazarguil@6wind.com>", "To": "dev@dpdk.org", "Date": "Mon, 5 Oct 2015 19:53:02 +0200", "Message-Id": "<1444067589-29513-7-git-send-email-adrien.mazarguil@6wind.com>", "X-Mailer": "git-send-email 2.1.0", "In-Reply-To": "<1444067589-29513-1-git-send-email-adrien.mazarguil@6wind.com>", "References": "<1444067589-29513-1-git-send-email-adrien.mazarguil@6wind.com>", "Subject": "[dpdk-dev] [PATCH 06/13] mlx5: add MTU configuration support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Depending on the MTU and whether jumbo frames are enabled, RX queues may\nswitch between SG and non-SG modes for better performance.\n\nSigned-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>\nSigned-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>\n---\n drivers/net/mlx5/mlx5.c | 1 +\n drivers/net/mlx5/mlx5.h | 1 +\n drivers/net/mlx5/mlx5_ethdev.c | 101 +++++++++++++++++++++++\n drivers/net/mlx5/mlx5_rxq.c | 181 +++++++++++++++++++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_rxtx.h | 1 +\n 5 files changed, 285 insertions(+)", "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex 56cea7c..5bef742 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -140,6 +140,7 @@ static const struct eth_dev_ops mlx5_dev_ops = {\n \t.tx_queue_release = mlx5_tx_queue_release,\n \t.mac_addr_remove = mlx5_mac_addr_remove,\n \t.mac_addr_add = mlx5_mac_addr_add,\n+\t.mtu_set = mlx5_dev_set_mtu,\n };\n \n static struct {\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 3f4f8fd..14f55ba 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -169,6 +169,7 @@ int priv_get_mtu(struct priv *, uint16_t *);\n int priv_set_flags(struct priv *, unsigned int, unsigned int);\n int mlx5_dev_configure(struct rte_eth_dev *);\n void mlx5_dev_infos_get(struct rte_eth_dev *, struct rte_eth_dev_info *);\n+int mlx5_dev_set_mtu(struct rte_eth_dev *, uint16_t);\n int mlx5_ibv_device_to_pci_addr(const struct ibv_device *,\n \t\t\t\tstruct rte_pci_addr *);\n \ndiff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c\nindex 6b13cec..4621282 100644\n--- a/drivers/net/mlx5/mlx5_ethdev.c\n+++ b/drivers/net/mlx5/mlx5_ethdev.c\n@@ -347,6 +347,23 @@ priv_get_mtu(struct priv *priv, uint16_t *mtu)\n }\n \n /**\n+ * Set device MTU.\n+ *\n+ * @param priv\n+ * Pointer to private structure.\n+ * @param mtu\n+ * MTU value to set.\n+ *\n+ * @return\n+ * 0 on success, -1 on failure and errno is set.\n+ */\n+static int\n+priv_set_mtu(struct priv *priv, uint16_t mtu)\n+{\n+\treturn priv_set_sysfs_ulong(priv, \"mtu\", mtu);\n+}\n+\n+/**\n * Set device flags.\n *\n * @param priv\n@@ -518,6 +535,90 @@ mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)\n }\n \n /**\n+ * DPDK callback to change the MTU.\n+ *\n+ * Setting the MTU affects hardware MRU (packets larger than the MTU cannot be\n+ * received). Use this as a hint to enable/disable scattered packets support\n+ * and improve performance when not needed.\n+ * Since failure is not an option, reconfiguring queues on the fly is not\n+ * recommended.\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device structure.\n+ * @param in_mtu\n+ * New MTU.\n+ *\n+ * @return\n+ * 0 on success, negative errno value on failure.\n+ */\n+int\n+mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)\n+{\n+\tstruct priv *priv = dev->data->dev_private;\n+\tint ret = 0;\n+\tunsigned int i;\n+\tuint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =\n+\t\tmlx5_rx_burst;\n+\n+\tpriv_lock(priv);\n+\t/* Set kernel interface MTU first. */\n+\tif (priv_set_mtu(priv, mtu)) {\n+\t\tret = errno;\n+\t\tWARN(\"cannot set port %u MTU to %u: %s\", priv->port, mtu,\n+\t\t strerror(ret));\n+\t\tgoto out;\n+\t} else\n+\t\tDEBUG(\"adapter port %u MTU set to %u\", priv->port, mtu);\n+\tpriv->mtu = mtu;\n+\t/* Temporarily replace RX handler with a fake one, assuming it has not\n+\t * been copied elsewhere. */\n+\tdev->rx_pkt_burst = removed_rx_burst;\n+\t/* Make sure everyone has left mlx5_rx_burst() and uses\n+\t * removed_rx_burst() instead. */\n+\trte_wmb();\n+\tusleep(1000);\n+\t/* Reconfigure each RX queue. */\n+\tfor (i = 0; (i != priv->rxqs_n); ++i) {\n+\t\tstruct rxq *rxq = (*priv->rxqs)[i];\n+\t\tunsigned int max_frame_len;\n+\t\tint sp;\n+\n+\t\tif (rxq == NULL)\n+\t\t\tcontinue;\n+\t\t/* Calculate new maximum frame length according to MTU and\n+\t\t * toggle scattered support (sp) if necessary. */\n+\t\tmax_frame_len = (priv->mtu + ETHER_HDR_LEN +\n+\t\t\t\t (ETHER_MAX_VLAN_FRAME_LEN - ETHER_MAX_LEN));\n+\t\tsp = (max_frame_len > (rxq->mb_len - RTE_PKTMBUF_HEADROOM));\n+\t\t/* Provide new values to rxq_setup(). */\n+\t\tdev->data->dev_conf.rxmode.jumbo_frame = sp;\n+\t\tdev->data->dev_conf.rxmode.max_rx_pkt_len = max_frame_len;\n+\t\tret = rxq_rehash(dev, rxq);\n+\t\tif (ret) {\n+\t\t\t/* Force SP RX if that queue requires it and abort. */\n+\t\t\tif (rxq->sp)\n+\t\t\t\trx_func = mlx5_rx_burst_sp;\n+\t\t\tbreak;\n+\t\t}\n+\t\t/* Reenable non-RSS queue attributes. No need to check\n+\t\t * for errors at this stage. */\n+\t\tif (!priv->rss) {\n+\t\t\trxq_mac_addrs_add(rxq);\n+\t\t}\n+\t\t/* Scattered burst function takes priority. */\n+\t\tif (rxq->sp)\n+\t\t\trx_func = mlx5_rx_burst_sp;\n+\t}\n+\t/* Burst functions can now be called again. */\n+\trte_wmb();\n+\tdev->rx_pkt_burst = rx_func;\n+out:\n+\tpriv_unlock(priv);\n+\tassert(ret >= 0);\n+\treturn -ret;\n+}\n+\n+/**\n * Get PCI information from struct ibv_device.\n *\n * @param device\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 1eddfc7..401b575 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -526,6 +526,187 @@ rxq_setup_qp_rss(struct priv *priv, struct ibv_cq *cq, uint16_t desc,\n #endif /* RSS_SUPPORT */\n \n /**\n+ * Reconfigure a RX queue with new parameters.\n+ *\n+ * rxq_rehash() does not allocate mbufs, which, if not done from the right\n+ * thread (such as a control thread), may corrupt the pool.\n+ * In case of failure, the queue is left untouched.\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device structure.\n+ * @param rxq\n+ * RX queue pointer.\n+ *\n+ * @return\n+ * 0 on success, errno value on failure.\n+ */\n+int\n+rxq_rehash(struct rte_eth_dev *dev, struct rxq *rxq)\n+{\n+\tstruct priv *priv = rxq->priv;\n+\tstruct rxq tmpl = *rxq;\n+\tunsigned int mbuf_n;\n+\tunsigned int desc_n;\n+\tstruct rte_mbuf **pool;\n+\tunsigned int i, k;\n+\tstruct ibv_exp_qp_attr mod;\n+\tstruct ibv_recv_wr *bad_wr;\n+\tint err;\n+\tint parent = (rxq == &priv->rxq_parent);\n+\n+\tif (parent) {\n+\t\tERROR(\"%p: cannot rehash parent queue %p\",\n+\t\t (void *)dev, (void *)rxq);\n+\t\treturn EINVAL;\n+\t}\n+\tDEBUG(\"%p: rehashing queue %p\", (void *)dev, (void *)rxq);\n+\t/* Number of descriptors and mbufs currently allocated. */\n+\tdesc_n = (tmpl.elts_n * (tmpl.sp ? MLX5_PMD_SGE_WR_N : 1));\n+\tmbuf_n = desc_n;\n+\t/* Enable scattered packets support for this queue if necessary. */\n+\tif ((dev->data->dev_conf.rxmode.jumbo_frame) &&\n+\t (dev->data->dev_conf.rxmode.max_rx_pkt_len >\n+\t (tmpl.mb_len - RTE_PKTMBUF_HEADROOM))) {\n+\t\ttmpl.sp = 1;\n+\t\tdesc_n /= MLX5_PMD_SGE_WR_N;\n+\t} else\n+\t\ttmpl.sp = 0;\n+\tDEBUG(\"%p: %s scattered packets support (%u WRs)\",\n+\t (void *)dev, (tmpl.sp ? \"enabling\" : \"disabling\"), desc_n);\n+\t/* If scatter mode is the same as before, nothing to do. */\n+\tif (tmpl.sp == rxq->sp) {\n+\t\tDEBUG(\"%p: nothing to do\", (void *)dev);\n+\t\treturn 0;\n+\t}\n+\t/* Remove attached flows if RSS is disabled (no parent queue). */\n+\tif (!priv->rss) {\n+\t\trxq_mac_addrs_del(&tmpl);\n+\t\t/* Update original queue in case of failure. */\n+\t\tmemcpy(rxq->mac_configured, tmpl.mac_configured,\n+\t\t sizeof(rxq->mac_configured));\n+\t\tmemcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));\n+\t}\n+\t/* From now on, any failure will render the queue unusable.\n+\t * Reinitialize QP. */\n+\tmod = (struct ibv_exp_qp_attr){ .qp_state = IBV_QPS_RESET };\n+\terr = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);\n+\tif (err) {\n+\t\tERROR(\"%p: cannot reset QP: %s\", (void *)dev, strerror(err));\n+\t\tassert(err > 0);\n+\t\treturn err;\n+\t}\n+\terr = ibv_resize_cq(tmpl.cq, desc_n);\n+\tif (err) {\n+\t\tERROR(\"%p: cannot resize CQ: %s\", (void *)dev, strerror(err));\n+\t\tassert(err > 0);\n+\t\treturn err;\n+\t}\n+\tmod = (struct ibv_exp_qp_attr){\n+\t\t/* Move the QP to this state. */\n+\t\t.qp_state = IBV_QPS_INIT,\n+\t\t/* Primary port number. */\n+\t\t.port_num = priv->port\n+\t};\n+\terr = ibv_exp_modify_qp(tmpl.qp, &mod,\n+\t\t\t\t(IBV_EXP_QP_STATE |\n+#ifdef RSS_SUPPORT\n+\t\t\t\t (parent ? IBV_EXP_QP_GROUP_RSS : 0) |\n+#endif /* RSS_SUPPORT */\n+\t\t\t\t IBV_EXP_QP_PORT));\n+\tif (err) {\n+\t\tERROR(\"%p: QP state to IBV_QPS_INIT failed: %s\",\n+\t\t (void *)dev, strerror(err));\n+\t\tassert(err > 0);\n+\t\treturn err;\n+\t};\n+\t/* Reconfigure flows. Do not care for errors. */\n+\tif (!priv->rss) {\n+\t\trxq_mac_addrs_add(&tmpl);\n+\t\t/* Update original queue in case of failure. */\n+\t\tmemcpy(rxq->mac_configured, tmpl.mac_configured,\n+\t\t sizeof(rxq->mac_configured));\n+\t\tmemcpy(rxq->mac_flow, tmpl.mac_flow, sizeof(rxq->mac_flow));\n+\t}\n+\t/* Allocate pool. */\n+\tpool = rte_malloc(__func__, (mbuf_n * sizeof(*pool)), 0);\n+\tif (pool == NULL) {\n+\t\tERROR(\"%p: cannot allocate memory\", (void *)dev);\n+\t\treturn ENOBUFS;\n+\t}\n+\t/* Snatch mbufs from original queue. */\n+\tk = 0;\n+\tif (rxq->sp) {\n+\t\tstruct rxq_elt_sp (*elts)[rxq->elts_n] = rxq->elts.sp;\n+\n+\t\tfor (i = 0; (i != RTE_DIM(*elts)); ++i) {\n+\t\t\tstruct rxq_elt_sp *elt = &(*elts)[i];\n+\t\t\tunsigned int j;\n+\n+\t\t\tfor (j = 0; (j != RTE_DIM(elt->bufs)); ++j) {\n+\t\t\t\tassert(elt->bufs[j] != NULL);\n+\t\t\t\tpool[k++] = elt->bufs[j];\n+\t\t\t}\n+\t\t}\n+\t} else {\n+\t\tstruct rxq_elt (*elts)[rxq->elts_n] = rxq->elts.no_sp;\n+\n+\t\tfor (i = 0; (i != RTE_DIM(*elts)); ++i) {\n+\t\t\tstruct rxq_elt *elt = &(*elts)[i];\n+\t\t\tstruct rte_mbuf *buf = (void *)\n+\t\t\t\t((uintptr_t)elt->sge.addr -\n+\t\t\t\t WR_ID(elt->wr.wr_id).offset);\n+\n+\t\t\tassert(WR_ID(elt->wr.wr_id).id == i);\n+\t\t\tpool[k++] = buf;\n+\t\t}\n+\t}\n+\tassert(k == mbuf_n);\n+\ttmpl.elts_n = 0;\n+\ttmpl.elts.sp = NULL;\n+\tassert((void *)&tmpl.elts.sp == (void *)&tmpl.elts.no_sp);\n+\terr = ((tmpl.sp) ?\n+\t rxq_alloc_elts_sp(&tmpl, desc_n, pool) :\n+\t rxq_alloc_elts(&tmpl, desc_n, pool));\n+\tif (err) {\n+\t\tERROR(\"%p: cannot reallocate WRs, aborting\", (void *)dev);\n+\t\trte_free(pool);\n+\t\tassert(err > 0);\n+\t\treturn err;\n+\t}\n+\tassert(tmpl.elts_n == desc_n);\n+\tassert(tmpl.elts.sp != NULL);\n+\trte_free(pool);\n+\t/* Clean up original data. */\n+\trxq->elts_n = 0;\n+\trte_free(rxq->elts.sp);\n+\trxq->elts.sp = NULL;\n+\t/* Post WRs. */\n+\terr = ibv_post_recv(tmpl.qp,\n+\t\t\t (tmpl.sp ?\n+\t\t\t &(*tmpl.elts.sp)[0].wr :\n+\t\t\t &(*tmpl.elts.no_sp)[0].wr),\n+\t\t\t &bad_wr);\n+\tif (err) {\n+\t\tERROR(\"%p: ibv_post_recv() failed for WR %p: %s\",\n+\t\t (void *)dev,\n+\t\t (void *)bad_wr,\n+\t\t strerror(err));\n+\t\tgoto skip_rtr;\n+\t}\n+\tmod = (struct ibv_exp_qp_attr){\n+\t\t.qp_state = IBV_QPS_RTR\n+\t};\n+\terr = ibv_exp_modify_qp(tmpl.qp, &mod, IBV_EXP_QP_STATE);\n+\tif (err)\n+\t\tERROR(\"%p: QP state to IBV_QPS_RTR failed: %s\",\n+\t\t (void *)dev, strerror(err));\n+skip_rtr:\n+\t*rxq = tmpl;\n+\tassert(err >= 0);\n+\treturn err;\n+}\n+\n+/**\n * Configure a RX queue.\n *\n * @param dev\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 44170d7..0a2e650 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -147,6 +147,7 @@ struct txq {\n /* mlx5_rxq.c */\n \n void rxq_cleanup(struct rxq *);\n+int rxq_rehash(struct rte_eth_dev *, struct rxq *);\n int rxq_setup(struct rte_eth_dev *, struct rxq *, uint16_t, unsigned int,\n \t const struct rte_eth_rxconf *, struct rte_mempool *);\n int mlx5_rx_queue_setup(struct rte_eth_dev *, uint16_t, uint16_t, unsigned int,\n", "prefixes": [ "dpdk-dev", "06/13" ] }