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GET /api/patches/73077/?format=api
{ "id": 73077, "url": "https://patches.dpdk.org/api/patches/73077/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200703210210.40568-28-ajit.khaparde@broadcom.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200703210210.40568-28-ajit.khaparde@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200703210210.40568-28-ajit.khaparde@broadcom.com", "date": "2020-07-03T21:01:46", "name": "[v5,27/51] net/bnxt: align CFA resources with RM", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "03f0310531a8927ac9a3baa2be0b060fe92885cf", "submitter": { "id": 501, "url": "https://patches.dpdk.org/api/people/501/?format=api", "name": "Ajit Khaparde", "email": "ajit.khaparde@broadcom.com" }, "delegate": { "id": 1766, "url": "https://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200703210210.40568-28-ajit.khaparde@broadcom.com/mbox/", "series": [ { "id": 10785, "url": "https://patches.dpdk.org/api/series/10785/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10785", "date": "2020-07-03T21:01:19", "name": "net/bnxt: add features for host-based flow management", "version": 5, "mbox": "https://patches.dpdk.org/series/10785/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/73077/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/73077/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0E52CA0524;\n\tFri, 3 Jul 2020 23:10:16 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E301A1DD4F;\n\tFri, 3 Jul 2020 23:05:48 +0200 (CEST)", "from rnd-relay.smtp.broadcom.com (rnd-relay.smtp.broadcom.com\n [192.19.229.170]) by dpdk.org (Postfix) with ESMTP id C9A8E1DC68\n for <dev@dpdk.org>; Fri, 3 Jul 2020 23:05:06 +0200 (CEST)", "from mail-irv-17.broadcom.com (mail-irv-17.lvn.broadcom.net\n [10.75.242.48])\n by rnd-relay.smtp.broadcom.com (Postfix) with ESMTP id C738230C093;\n Fri, 3 Jul 2020 14:05:05 -0700 (PDT)", "from localhost.localdomain (unknown [10.230.185.215])\n by mail-irv-17.broadcom.com (Postfix) with ESMTP id 2006F14053B;\n Fri, 3 Jul 2020 14:05:05 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.10.3 rnd-relay.smtp.broadcom.com C738230C093", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n s=dkimrelay; t=1593810305;\n bh=5CZcxlbcDmolP+03xKBxr3Pm98SwvcMAvVAV3RHF/Lo=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=hT1Ssmiqq+Fw+qyLkLdGl2LnuFLeQ0P9vFEetwGGj1iZ2SLzlrIWB+JNOUe/G3f4g\n xUoUixhne0dX0LeagW191/BohMI8N0b4ONROqMAXUYKYHd/tWvL31PosEodHDB/iWd\n f61ZdQuuWLEoM3J8IcJZ4BhKdduJ6Z1UKO52knis=", "From": "Ajit Khaparde <ajit.khaparde@broadcom.com>", "To": "dev@dpdk.org", "Cc": "Randy Schacher <stuart.schacher@broadcom.com>,\n Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>", "Date": "Fri, 3 Jul 2020 14:01:46 -0700", "Message-Id": "<20200703210210.40568-28-ajit.khaparde@broadcom.com>", "X-Mailer": "git-send-email 2.21.1 (Apple Git-122.3)", "In-Reply-To": "<20200703210210.40568-1-ajit.khaparde@broadcom.com>", "References": "<1f5421dc-0453-6dc8-09c2-ddfff6eb4888@intel.com>\n <20200703210210.40568-1-ajit.khaparde@broadcom.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH v5 27/51] net/bnxt: align CFA resources with RM", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Randy Schacher <stuart.schacher@broadcom.com>\n\n- HCAPI resources need to align for Resource Manager\n- Clean up unnecessary debug messages\n\nSigned-off-by: Randy Schacher <stuart.schacher@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/tf_core/cfa_resource_types.h | 250 +++++++++---------\n drivers/net/bnxt/tf_core/tf_identifier.c | 3 +-\n drivers/net/bnxt/tf_core/tf_msg.c | 37 ++-\n drivers/net/bnxt/tf_core/tf_rm.c | 21 +-\n drivers/net/bnxt/tf_core/tf_tbl.c | 3 +-\n drivers/net/bnxt/tf_core/tf_tcam.c | 28 +-\n 6 files changed, 197 insertions(+), 145 deletions(-)", "diff": "diff --git a/drivers/net/bnxt/tf_core/cfa_resource_types.h b/drivers/net/bnxt/tf_core/cfa_resource_types.h\nindex 6e79facec..6d6651fde 100644\n--- a/drivers/net/bnxt/tf_core/cfa_resource_types.h\n+++ b/drivers/net/bnxt/tf_core/cfa_resource_types.h\n@@ -48,232 +48,246 @@\n #define CFA_RESOURCE_TYPE_P59_TBL_SCOPE 0xdUL\n /* L2 Func */\n #define CFA_RESOURCE_TYPE_P59_L2_FUNC 0xeUL\n-/* EPOCH */\n-#define CFA_RESOURCE_TYPE_P59_EPOCH 0xfUL\n+/* EPOCH 0 */\n+#define CFA_RESOURCE_TYPE_P59_EPOCH0 0xfUL\n+/* EPOCH 1 */\n+#define CFA_RESOURCE_TYPE_P59_EPOCH1 0x10UL\n /* Metadata */\n-#define CFA_RESOURCE_TYPE_P59_METADATA 0x10UL\n+#define CFA_RESOURCE_TYPE_P59_METADATA 0x11UL\n /* Connection Tracking Rule TCAM */\n-#define CFA_RESOURCE_TYPE_P59_CT_RULE_TCAM 0x11UL\n+#define CFA_RESOURCE_TYPE_P59_CT_RULE_TCAM 0x12UL\n /* Range Profile */\n-#define CFA_RESOURCE_TYPE_P59_RANGE_PROF 0x12UL\n+#define CFA_RESOURCE_TYPE_P59_RANGE_PROF 0x13UL\n /* Range */\n-#define CFA_RESOURCE_TYPE_P59_RANGE 0x13UL\n+#define CFA_RESOURCE_TYPE_P59_RANGE 0x14UL\n /* Link Aggrigation */\n-#define CFA_RESOURCE_TYPE_P59_LAG 0x14UL\n+#define CFA_RESOURCE_TYPE_P59_LAG 0x15UL\n /* VEB TCAM */\n-#define CFA_RESOURCE_TYPE_P59_VEB_TCAM 0x15UL\n+#define CFA_RESOURCE_TYPE_P59_VEB_TCAM 0x16UL\n #define CFA_RESOURCE_TYPE_P59_LAST CFA_RESOURCE_TYPE_P59_VEB_TCAM\n \n \n /* Multicast Group */\n-#define CFA_RESOURCE_TYPE_P58_MCG 0x0UL\n+#define CFA_RESOURCE_TYPE_P58_MCG 0x0UL\n /* Encap 8 byte record */\n-#define CFA_RESOURCE_TYPE_P58_ENCAP_8B 0x1UL\n+#define CFA_RESOURCE_TYPE_P58_ENCAP_8B 0x1UL\n /* Encap 16 byte record */\n-#define CFA_RESOURCE_TYPE_P58_ENCAP_16B 0x2UL\n+#define CFA_RESOURCE_TYPE_P58_ENCAP_16B 0x2UL\n /* Encap 64 byte record */\n-#define CFA_RESOURCE_TYPE_P58_ENCAP_64B 0x3UL\n+#define CFA_RESOURCE_TYPE_P58_ENCAP_64B 0x3UL\n /* Source Property MAC */\n-#define CFA_RESOURCE_TYPE_P58_SP_MAC 0x4UL\n+#define CFA_RESOURCE_TYPE_P58_SP_MAC 0x4UL\n /* Source Property MAC and IPv4 */\n-#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV4 0x5UL\n+#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV4 0x5UL\n /* Source Property MAC and IPv6 */\n-#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV6 0x6UL\n+#define CFA_RESOURCE_TYPE_P58_SP_MAC_IPV6 0x6UL\n /* Network Address Translation Source Port */\n-#define CFA_RESOURCE_TYPE_P58_NAT_SPORT 0x7UL\n+#define CFA_RESOURCE_TYPE_P58_NAT_SPORT 0x7UL\n /* Network Address Translation Destination Port */\n-#define CFA_RESOURCE_TYPE_P58_NAT_DPORT 0x8UL\n+#define CFA_RESOURCE_TYPE_P58_NAT_DPORT 0x8UL\n /* Network Address Translation Source IPv4 address */\n-#define CFA_RESOURCE_TYPE_P58_NAT_S_IPV4 0x9UL\n+#define CFA_RESOURCE_TYPE_P58_NAT_S_IPV4 0x9UL\n /* Network Address Translation Destination IPv4 address */\n-#define CFA_RESOURCE_TYPE_P58_NAT_D_IPV4 0xaUL\n-/* Network Address Translation Source IPv4 address */\n-#define CFA_RESOURCE_TYPE_P58_NAT_S_IPV6 0xbUL\n-/* Network Address Translation Destination IPv4 address */\n-#define CFA_RESOURCE_TYPE_P58_NAT_D_IPV6 0xcUL\n+#define CFA_RESOURCE_TYPE_P58_NAT_D_IPV4 0xaUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P58_METER 0xdUL\n+#define CFA_RESOURCE_TYPE_P58_METER 0xbUL\n /* Flow State */\n-#define CFA_RESOURCE_TYPE_P58_FLOW_STATE 0xeUL\n+#define CFA_RESOURCE_TYPE_P58_FLOW_STATE 0xcUL\n /* Full Action Records */\n-#define CFA_RESOURCE_TYPE_P58_FULL_ACTION 0xfUL\n+#define CFA_RESOURCE_TYPE_P58_FULL_ACTION 0xdUL\n /* Action Record Format 0 */\n-#define CFA_RESOURCE_TYPE_P58_FORMAT_0_ACTION 0x10UL\n+#define CFA_RESOURCE_TYPE_P58_FORMAT_0_ACTION 0xeUL\n+/* Action Record Ext Format 0 */\n+#define CFA_RESOURCE_TYPE_P58_EXT_FORMAT_0_ACTION 0xfUL\n+/* Action Record Format 1 */\n+#define CFA_RESOURCE_TYPE_P58_FORMAT_1_ACTION 0x10UL\n /* Action Record Format 2 */\n-#define CFA_RESOURCE_TYPE_P58_FORMAT_2_ACTION 0x11UL\n+#define CFA_RESOURCE_TYPE_P58_FORMAT_2_ACTION 0x11UL\n /* Action Record Format 3 */\n-#define CFA_RESOURCE_TYPE_P58_FORMAT_3_ACTION 0x12UL\n+#define CFA_RESOURCE_TYPE_P58_FORMAT_3_ACTION 0x12UL\n /* Action Record Format 4 */\n-#define CFA_RESOURCE_TYPE_P58_FORMAT_4_ACTION 0x13UL\n+#define CFA_RESOURCE_TYPE_P58_FORMAT_4_ACTION 0x13UL\n+/* Action Record Format 5 */\n+#define CFA_RESOURCE_TYPE_P58_FORMAT_5_ACTION 0x14UL\n+/* Action Record Format 6 */\n+#define CFA_RESOURCE_TYPE_P58_FORMAT_6_ACTION 0x15UL\n /* L2 Context TCAM */\n-#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM 0x14UL\n+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_TCAM 0x16UL\n /* L2 Context REMAP */\n-#define CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP 0x15UL\n+#define CFA_RESOURCE_TYPE_P58_L2_CTXT_REMAP 0x17UL\n /* Profile Func */\n-#define CFA_RESOURCE_TYPE_P58_PROF_FUNC 0x16UL\n+#define CFA_RESOURCE_TYPE_P58_PROF_FUNC 0x18UL\n /* Profile TCAM */\n-#define CFA_RESOURCE_TYPE_P58_PROF_TCAM 0x17UL\n+#define CFA_RESOURCE_TYPE_P58_PROF_TCAM 0x19UL\n /* Exact Match Profile Id */\n-#define CFA_RESOURCE_TYPE_P58_EM_PROF_ID 0x18UL\n+#define CFA_RESOURCE_TYPE_P58_EM_PROF_ID 0x1aUL\n /* Wildcard Profile Id */\n-#define CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID 0x19UL\n+#define CFA_RESOURCE_TYPE_P58_WC_TCAM_PROF_ID 0x1bUL\n /* Exact Match Record */\n-#define CFA_RESOURCE_TYPE_P58_EM_REC 0x1aUL\n+#define CFA_RESOURCE_TYPE_P58_EM_REC 0x1cUL\n /* Wildcard TCAM */\n-#define CFA_RESOURCE_TYPE_P58_WC_TCAM 0x1bUL\n+#define CFA_RESOURCE_TYPE_P58_WC_TCAM 0x1dUL\n /* Meter profile */\n-#define CFA_RESOURCE_TYPE_P58_METER_PROF 0x1cUL\n+#define CFA_RESOURCE_TYPE_P58_METER_PROF 0x1eUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P58_MIRROR 0x1dUL\n+#define CFA_RESOURCE_TYPE_P58_MIRROR 0x1fUL\n /* Source Property TCAM */\n-#define CFA_RESOURCE_TYPE_P58_SP_TCAM 0x1eUL\n+#define CFA_RESOURCE_TYPE_P58_SP_TCAM 0x20UL\n /* Exact Match Flexible Key Builder */\n-#define CFA_RESOURCE_TYPE_P58_EM_FKB 0x1fUL\n+#define CFA_RESOURCE_TYPE_P58_EM_FKB 0x21UL\n /* Wildcard Flexible Key Builder */\n-#define CFA_RESOURCE_TYPE_P58_WC_FKB 0x20UL\n+#define CFA_RESOURCE_TYPE_P58_WC_FKB 0x22UL\n /* VEB TCAM */\n-#define CFA_RESOURCE_TYPE_P58_VEB_TCAM 0x21UL\n-#define CFA_RESOURCE_TYPE_P58_LAST CFA_RESOURCE_TYPE_P58_VEB_TCAM\n+#define CFA_RESOURCE_TYPE_P58_VEB_TCAM 0x23UL\n+#define CFA_RESOURCE_TYPE_P58_LAST CFA_RESOURCE_TYPE_P58_VEB_TCAM\n \n \n /* Multicast Group */\n-#define CFA_RESOURCE_TYPE_P45_MCG 0x0UL\n+#define CFA_RESOURCE_TYPE_P45_MCG 0x0UL\n /* Encap 8 byte record */\n-#define CFA_RESOURCE_TYPE_P45_ENCAP_8B 0x1UL\n+#define CFA_RESOURCE_TYPE_P45_ENCAP_8B 0x1UL\n /* Encap 16 byte record */\n-#define CFA_RESOURCE_TYPE_P45_ENCAP_16B 0x2UL\n+#define CFA_RESOURCE_TYPE_P45_ENCAP_16B 0x2UL\n /* Encap 64 byte record */\n-#define CFA_RESOURCE_TYPE_P45_ENCAP_64B 0x3UL\n+#define CFA_RESOURCE_TYPE_P45_ENCAP_64B 0x3UL\n /* Source Property MAC */\n-#define CFA_RESOURCE_TYPE_P45_SP_MAC 0x4UL\n+#define CFA_RESOURCE_TYPE_P45_SP_MAC 0x4UL\n /* Source Property MAC and IPv4 */\n-#define CFA_RESOURCE_TYPE_P45_SP_MAC_IPV4 0x5UL\n+#define CFA_RESOURCE_TYPE_P45_SP_MAC_IPV4 0x5UL\n /* Source Property MAC and IPv6 */\n-#define CFA_RESOURCE_TYPE_P45_SP_MAC_IPV6 0x6UL\n+#define CFA_RESOURCE_TYPE_P45_SP_MAC_IPV6 0x6UL\n /* 64B Counters */\n-#define CFA_RESOURCE_TYPE_P45_COUNTER_64B 0x7UL\n+#define CFA_RESOURCE_TYPE_P45_COUNTER_64B 0x7UL\n /* Network Address Translation Source Port */\n-#define CFA_RESOURCE_TYPE_P45_NAT_SPORT 0x8UL\n+#define CFA_RESOURCE_TYPE_P45_NAT_SPORT 0x8UL\n /* Network Address Translation Destination Port */\n-#define CFA_RESOURCE_TYPE_P45_NAT_DPORT 0x9UL\n+#define CFA_RESOURCE_TYPE_P45_NAT_DPORT 0x9UL\n /* Network Address Translation Source IPv4 address */\n-#define CFA_RESOURCE_TYPE_P45_NAT_S_IPV4 0xaUL\n+#define CFA_RESOURCE_TYPE_P45_NAT_S_IPV4 0xaUL\n /* Network Address Translation Destination IPv4 address */\n-#define CFA_RESOURCE_TYPE_P45_NAT_D_IPV4 0xbUL\n-/* Network Address Translation Source IPv6 address */\n-#define CFA_RESOURCE_TYPE_P45_NAT_S_IPV6 0xcUL\n-/* Network Address Translation Destination IPv6 address */\n-#define CFA_RESOURCE_TYPE_P45_NAT_D_IPV6 0xdUL\n+#define CFA_RESOURCE_TYPE_P45_NAT_D_IPV4 0xbUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P45_METER 0xeUL\n+#define CFA_RESOURCE_TYPE_P45_METER 0xcUL\n /* Flow State */\n-#define CFA_RESOURCE_TYPE_P45_FLOW_STATE 0xfUL\n+#define CFA_RESOURCE_TYPE_P45_FLOW_STATE 0xdUL\n /* Full Action Records */\n-#define CFA_RESOURCE_TYPE_P45_FULL_ACTION 0x10UL\n+#define CFA_RESOURCE_TYPE_P45_FULL_ACTION 0xeUL\n /* Action Record Format 0 */\n-#define CFA_RESOURCE_TYPE_P45_FORMAT_0_ACTION 0x11UL\n+#define CFA_RESOURCE_TYPE_P45_FORMAT_0_ACTION 0xfUL\n+/* Action Record Ext Format 0 */\n+#define CFA_RESOURCE_TYPE_P45_EXT_FORMAT_0_ACTION 0x10UL\n+/* Action Record Format 1 */\n+#define CFA_RESOURCE_TYPE_P45_FORMAT_1_ACTION 0x11UL\n /* Action Record Format 2 */\n-#define CFA_RESOURCE_TYPE_P45_FORMAT_2_ACTION 0x12UL\n+#define CFA_RESOURCE_TYPE_P45_FORMAT_2_ACTION 0x12UL\n /* Action Record Format 3 */\n-#define CFA_RESOURCE_TYPE_P45_FORMAT_3_ACTION 0x13UL\n+#define CFA_RESOURCE_TYPE_P45_FORMAT_3_ACTION 0x13UL\n /* Action Record Format 4 */\n-#define CFA_RESOURCE_TYPE_P45_FORMAT_4_ACTION 0x14UL\n+#define CFA_RESOURCE_TYPE_P45_FORMAT_4_ACTION 0x14UL\n+/* Action Record Format 5 */\n+#define CFA_RESOURCE_TYPE_P45_FORMAT_5_ACTION 0x15UL\n+/* Action Record Format 6 */\n+#define CFA_RESOURCE_TYPE_P45_FORMAT_6_ACTION 0x16UL\n /* L2 Context TCAM */\n-#define CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM 0x15UL\n+#define CFA_RESOURCE_TYPE_P45_L2_CTXT_TCAM 0x17UL\n /* L2 Context REMAP */\n-#define CFA_RESOURCE_TYPE_P45_L2_CTXT_REMAP 0x16UL\n+#define CFA_RESOURCE_TYPE_P45_L2_CTXT_REMAP 0x18UL\n /* Profile Func */\n-#define CFA_RESOURCE_TYPE_P45_PROF_FUNC 0x17UL\n+#define CFA_RESOURCE_TYPE_P45_PROF_FUNC 0x19UL\n /* Profile TCAM */\n-#define CFA_RESOURCE_TYPE_P45_PROF_TCAM 0x18UL\n+#define CFA_RESOURCE_TYPE_P45_PROF_TCAM 0x1aUL\n /* Exact Match Profile Id */\n-#define CFA_RESOURCE_TYPE_P45_EM_PROF_ID 0x19UL\n+#define CFA_RESOURCE_TYPE_P45_EM_PROF_ID 0x1bUL\n /* Exact Match Record */\n-#define CFA_RESOURCE_TYPE_P45_EM_REC 0x1aUL\n+#define CFA_RESOURCE_TYPE_P45_EM_REC 0x1cUL\n /* Wildcard Profile Id */\n-#define CFA_RESOURCE_TYPE_P45_WC_TCAM_PROF_ID 0x1bUL\n+#define CFA_RESOURCE_TYPE_P45_WC_TCAM_PROF_ID 0x1dUL\n /* Wildcard TCAM */\n-#define CFA_RESOURCE_TYPE_P45_WC_TCAM 0x1cUL\n+#define CFA_RESOURCE_TYPE_P45_WC_TCAM 0x1eUL\n /* Meter profile */\n-#define CFA_RESOURCE_TYPE_P45_METER_PROF 0x1dUL\n+#define CFA_RESOURCE_TYPE_P45_METER_PROF 0x1fUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P45_MIRROR 0x1eUL\n+#define CFA_RESOURCE_TYPE_P45_MIRROR 0x20UL\n /* Source Property TCAM */\n-#define CFA_RESOURCE_TYPE_P45_SP_TCAM 0x1fUL\n+#define CFA_RESOURCE_TYPE_P45_SP_TCAM 0x21UL\n /* VEB TCAM */\n-#define CFA_RESOURCE_TYPE_P45_VEB_TCAM 0x20UL\n+#define CFA_RESOURCE_TYPE_P45_VEB_TCAM 0x22UL\n /* Table Scope */\n-#define CFA_RESOURCE_TYPE_P45_TBL_SCOPE 0x21UL\n-#define CFA_RESOURCE_TYPE_P45_LAST CFA_RESOURCE_TYPE_P45_TBL_SCOPE\n+#define CFA_RESOURCE_TYPE_P45_TBL_SCOPE 0x23UL\n+#define CFA_RESOURCE_TYPE_P45_LAST CFA_RESOURCE_TYPE_P45_TBL_SCOPE\n \n \n /* Multicast Group */\n-#define CFA_RESOURCE_TYPE_P4_MCG 0x0UL\n+#define CFA_RESOURCE_TYPE_P4_MCG 0x0UL\n /* Encap 8 byte record */\n-#define CFA_RESOURCE_TYPE_P4_ENCAP_8B 0x1UL\n+#define CFA_RESOURCE_TYPE_P4_ENCAP_8B 0x1UL\n /* Encap 16 byte record */\n-#define CFA_RESOURCE_TYPE_P4_ENCAP_16B 0x2UL\n+#define CFA_RESOURCE_TYPE_P4_ENCAP_16B 0x2UL\n /* Encap 64 byte record */\n-#define CFA_RESOURCE_TYPE_P4_ENCAP_64B 0x3UL\n+#define CFA_RESOURCE_TYPE_P4_ENCAP_64B 0x3UL\n /* Source Property MAC */\n-#define CFA_RESOURCE_TYPE_P4_SP_MAC 0x4UL\n+#define CFA_RESOURCE_TYPE_P4_SP_MAC 0x4UL\n /* Source Property MAC and IPv4 */\n-#define CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 0x5UL\n+#define CFA_RESOURCE_TYPE_P4_SP_MAC_IPV4 0x5UL\n /* Source Property MAC and IPv6 */\n-#define CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 0x6UL\n+#define CFA_RESOURCE_TYPE_P4_SP_MAC_IPV6 0x6UL\n /* 64B Counters */\n-#define CFA_RESOURCE_TYPE_P4_COUNTER_64B 0x7UL\n+#define CFA_RESOURCE_TYPE_P4_COUNTER_64B 0x7UL\n /* Network Address Translation Source Port */\n-#define CFA_RESOURCE_TYPE_P4_NAT_SPORT 0x8UL\n+#define CFA_RESOURCE_TYPE_P4_NAT_SPORT 0x8UL\n /* Network Address Translation Destination Port */\n-#define CFA_RESOURCE_TYPE_P4_NAT_DPORT 0x9UL\n+#define CFA_RESOURCE_TYPE_P4_NAT_DPORT 0x9UL\n /* Network Address Translation Source IPv4 address */\n-#define CFA_RESOURCE_TYPE_P4_NAT_S_IPV4 0xaUL\n+#define CFA_RESOURCE_TYPE_P4_NAT_S_IPV4 0xaUL\n /* Network Address Translation Destination IPv4 address */\n-#define CFA_RESOURCE_TYPE_P4_NAT_D_IPV4 0xbUL\n-/* Network Address Translation Source IPv6 address */\n-#define CFA_RESOURCE_TYPE_P4_NAT_S_IPV6 0xcUL\n-/* Network Address Translation Destination IPv6 address */\n-#define CFA_RESOURCE_TYPE_P4_NAT_D_IPV6 0xdUL\n+#define CFA_RESOURCE_TYPE_P4_NAT_D_IPV4 0xbUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P4_METER 0xeUL\n+#define CFA_RESOURCE_TYPE_P4_METER 0xcUL\n /* Flow State */\n-#define CFA_RESOURCE_TYPE_P4_FLOW_STATE 0xfUL\n+#define CFA_RESOURCE_TYPE_P4_FLOW_STATE 0xdUL\n /* Full Action Records */\n-#define CFA_RESOURCE_TYPE_P4_FULL_ACTION 0x10UL\n+#define CFA_RESOURCE_TYPE_P4_FULL_ACTION 0xeUL\n /* Action Record Format 0 */\n-#define CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION 0x11UL\n+#define CFA_RESOURCE_TYPE_P4_FORMAT_0_ACTION 0xfUL\n+/* Action Record Ext Format 0 */\n+#define CFA_RESOURCE_TYPE_P4_EXT_FORMAT_0_ACTION 0x10UL\n+/* Action Record Format 1 */\n+#define CFA_RESOURCE_TYPE_P4_FORMAT_1_ACTION 0x11UL\n /* Action Record Format 2 */\n-#define CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION 0x12UL\n+#define CFA_RESOURCE_TYPE_P4_FORMAT_2_ACTION 0x12UL\n /* Action Record Format 3 */\n-#define CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION 0x13UL\n+#define CFA_RESOURCE_TYPE_P4_FORMAT_3_ACTION 0x13UL\n /* Action Record Format 4 */\n-#define CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION 0x14UL\n+#define CFA_RESOURCE_TYPE_P4_FORMAT_4_ACTION 0x14UL\n+/* Action Record Format 5 */\n+#define CFA_RESOURCE_TYPE_P4_FORMAT_5_ACTION 0x15UL\n+/* Action Record Format 6 */\n+#define CFA_RESOURCE_TYPE_P4_FORMAT_6_ACTION 0x16UL\n /* L2 Context TCAM */\n-#define CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM 0x15UL\n+#define CFA_RESOURCE_TYPE_P4_L2_CTXT_TCAM 0x17UL\n /* L2 Context REMAP */\n-#define CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP 0x16UL\n+#define CFA_RESOURCE_TYPE_P4_L2_CTXT_REMAP 0x18UL\n /* Profile Func */\n-#define CFA_RESOURCE_TYPE_P4_PROF_FUNC 0x17UL\n+#define CFA_RESOURCE_TYPE_P4_PROF_FUNC 0x19UL\n /* Profile TCAM */\n-#define CFA_RESOURCE_TYPE_P4_PROF_TCAM 0x18UL\n+#define CFA_RESOURCE_TYPE_P4_PROF_TCAM 0x1aUL\n /* Exact Match Profile Id */\n-#define CFA_RESOURCE_TYPE_P4_EM_PROF_ID 0x19UL\n+#define CFA_RESOURCE_TYPE_P4_EM_PROF_ID 0x1bUL\n /* Exact Match Record */\n-#define CFA_RESOURCE_TYPE_P4_EM_REC 0x1aUL\n+#define CFA_RESOURCE_TYPE_P4_EM_REC 0x1cUL\n /* Wildcard Profile Id */\n-#define CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID 0x1bUL\n+#define CFA_RESOURCE_TYPE_P4_WC_TCAM_PROF_ID 0x1dUL\n /* Wildcard TCAM */\n-#define CFA_RESOURCE_TYPE_P4_WC_TCAM 0x1cUL\n+#define CFA_RESOURCE_TYPE_P4_WC_TCAM 0x1eUL\n /* Meter profile */\n-#define CFA_RESOURCE_TYPE_P4_METER_PROF 0x1dUL\n+#define CFA_RESOURCE_TYPE_P4_METER_PROF 0x1fUL\n /* Meter */\n-#define CFA_RESOURCE_TYPE_P4_MIRROR 0x1eUL\n+#define CFA_RESOURCE_TYPE_P4_MIRROR 0x20UL\n /* Source Property TCAM */\n-#define CFA_RESOURCE_TYPE_P4_SP_TCAM 0x1fUL\n+#define CFA_RESOURCE_TYPE_P4_SP_TCAM 0x21UL\n /* Table Scope */\n-#define CFA_RESOURCE_TYPE_P4_TBL_SCOPE 0x20UL\n-#define CFA_RESOURCE_TYPE_P4_LAST CFA_RESOURCE_TYPE_P4_TBL_SCOPE\n+#define CFA_RESOURCE_TYPE_P4_TBL_SCOPE 0x22UL\n+#define CFA_RESOURCE_TYPE_P4_LAST CFA_RESOURCE_TYPE_P4_TBL_SCOPE\n \n \n #endif /* _CFA_RESOURCE_TYPES_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_identifier.c b/drivers/net/bnxt/tf_core/tf_identifier.c\nindex 219839272..2cc43b40f 100644\n--- a/drivers/net/bnxt/tf_core/tf_identifier.c\n+++ b/drivers/net/bnxt/tf_core/tf_identifier.c\n@@ -59,7 +59,8 @@ tf_ident_bind(struct tf *tfp,\n \n \tinit = 1;\n \n-\tprintf(\"Identifier - initialized\\n\");\n+\tTFP_DRV_LOG(INFO,\n+\t\t \"Identifier - initialized\\n\");\n \n \treturn 0;\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c\nindex 7fffb6baf..659065de3 100644\n--- a/drivers/net/bnxt/tf_core/tf_msg.c\n+++ b/drivers/net/bnxt/tf_core/tf_msg.c\n@@ -18,6 +18,9 @@\n #include \"hwrm_tf.h\"\n #include \"tf_em.h\"\n \n+/* Logging defines */\n+#define TF_RM_MSG_DEBUG 0\n+\n /**\n * This is the MAX data we can transport across regular HWRM\n */\n@@ -215,7 +218,7 @@ tf_msg_session_resc_qcaps(struct tf *tfp,\n \n \trc = tfp_send_msg_direct(tfp, &parms);\n \tif (rc)\n-\t\treturn rc;\n+\t\tgoto cleanup;\n \n \t/* Process the response\n \t * Should always get expected number of entries\n@@ -225,31 +228,39 @@ tf_msg_session_resc_qcaps(struct tf *tfp,\n \t\t\t \"%s: QCAPS message size error, rc:%s\\n\",\n \t\t\t tf_dir_2_str(dir),\n \t\t\t strerror(-EINVAL));\n-\t\treturn -EINVAL;\n+\t\trc = -EINVAL;\n+\t\tgoto cleanup;\n \t}\n \n+#if (TF_RM_MSG_DEBUG == 1)\n \tprintf(\"size: %d\\n\", tfp_le_to_cpu_32(resp.size));\n+#endif /* (TF_RM_MSG_DEBUG == 1) */\n \n \t/* Post process the response */\n \tdata = (struct tf_rm_resc_req_entry *)qcaps_buf.va_addr;\n \n+#if (TF_RM_MSG_DEBUG == 1)\n \tprintf(\"\\nQCAPS\\n\");\n+#endif /* (TF_RM_MSG_DEBUG == 1) */\n \tfor (i = 0; i < size; i++) {\n \t\tquery[i].type = tfp_le_to_cpu_32(data[i].type);\n \t\tquery[i].min = tfp_le_to_cpu_16(data[i].min);\n \t\tquery[i].max = tfp_le_to_cpu_16(data[i].max);\n \n+#if (TF_RM_MSG_DEBUG == 1)\n \t\tprintf(\"type: %d(0x%x) %d %d\\n\",\n \t\t query[i].type,\n \t\t query[i].type,\n \t\t query[i].min,\n \t\t query[i].max);\n+#endif /* (TF_RM_MSG_DEBUG == 1) */\n \n \t}\n \n \t*resv_strategy = resp.flags &\n \t HWRM_TF_SESSION_RESC_QCAPS_OUTPUT_FLAGS_SESS_RESV_STRATEGY_MASK;\n \n+cleanup:\n \ttf_msg_free_dma_buf(&qcaps_buf);\n \n \treturn rc;\n@@ -293,8 +304,10 @@ tf_msg_session_resc_alloc(struct tf *tfp,\n \n \tdma_size = size * sizeof(struct tf_rm_resc_entry);\n \trc = tf_msg_alloc_dma_buf(&resv_buf, dma_size);\n-\tif (rc)\n+\tif (rc) {\n+\t\ttf_msg_free_dma_buf(&req_buf);\n \t\treturn rc;\n+\t}\n \n \t/* Populate the request */\n \treq.fw_session_id = tfp_cpu_to_le_32(fw_session_id);\n@@ -320,7 +333,7 @@ tf_msg_session_resc_alloc(struct tf *tfp,\n \n \trc = tfp_send_msg_direct(tfp, &parms);\n \tif (rc)\n-\t\treturn rc;\n+\t\tgoto cleanup;\n \n \t/* Process the response\n \t * Should always get expected number of entries\n@@ -330,11 +343,14 @@ tf_msg_session_resc_alloc(struct tf *tfp,\n \t\t\t \"%s: Alloc message size error, rc:%s\\n\",\n \t\t\t tf_dir_2_str(dir),\n \t\t\t strerror(-EINVAL));\n-\t\treturn -EINVAL;\n+\t\trc = -EINVAL;\n+\t\tgoto cleanup;\n \t}\n \n+#if (TF_RM_MSG_DEBUG == 1)\n \tprintf(\"\\nRESV\\n\");\n \tprintf(\"size: %d\\n\", tfp_le_to_cpu_32(resp.size));\n+#endif /* (TF_RM_MSG_DEBUG == 1) */\n \n \t/* Post process the response */\n \tresv_data = (struct tf_rm_resc_entry *)resv_buf.va_addr;\n@@ -343,14 +359,17 @@ tf_msg_session_resc_alloc(struct tf *tfp,\n \t\tresv[i].start = tfp_le_to_cpu_16(resv_data[i].start);\n \t\tresv[i].stride = tfp_le_to_cpu_16(resv_data[i].stride);\n \n+#if (TF_RM_MSG_DEBUG == 1)\n \t\tprintf(\"%d type: %d(0x%x) %d %d\\n\",\n \t\t i,\n \t\t resv[i].type,\n \t\t resv[i].type,\n \t\t resv[i].start,\n \t\t resv[i].stride);\n+#endif /* (TF_RM_MSG_DEBUG == 1) */\n \t}\n \n+cleanup:\n \ttf_msg_free_dma_buf(&req_buf);\n \ttf_msg_free_dma_buf(&resv_buf);\n \n@@ -412,8 +431,6 @@ tf_msg_session_resc_flush(struct tf *tfp,\n \tparms.mailbox = TF_KONG_MB;\n \n \trc = tfp_send_msg_direct(tfp, &parms);\n-\tif (rc)\n-\t\treturn rc;\n \n \ttf_msg_free_dma_buf(&resv_buf);\n \n@@ -434,7 +451,7 @@ tf_msg_insert_em_internal_entry(struct tf *tfp,\n \tstruct tf_session *tfs = (struct tf_session *)(tfp->session->core_data);\n \tstruct tf_em_64b_entry *em_result =\n \t\t(struct tf_em_64b_entry *)em_parms->em_record;\n-\tuint32_t flags;\n+\tuint16_t flags;\n \n \treq.fw_session_id =\n \t\ttfp_cpu_to_le_32(tfs->session_id.internal.fw_session_id);\n@@ -480,7 +497,7 @@ tf_msg_delete_em_entry(struct tf *tfp,\n \tstruct tfp_send_msg_parms parms = { 0 };\n \tstruct hwrm_tf_em_delete_input req = { 0 };\n \tstruct hwrm_tf_em_delete_output resp = { 0 };\n-\tuint32_t flags;\n+\tuint16_t flags;\n \tstruct tf_session *tfs =\n \t\t(struct tf_session *)(tfp->session->core_data);\n \n@@ -726,8 +743,6 @@ tf_msg_tcam_entry_set(struct tf *tfp,\n \n \trc = tfp_send_msg_direct(tfp,\n \t\t\t\t &mparms);\n-\tif (rc)\n-\t\tgoto cleanup;\n \n cleanup:\n \ttf_msg_free_dma_buf(&buf);\ndiff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c\nindex e7af9eb84..30313e2ea 100644\n--- a/drivers/net/bnxt/tf_core/tf_rm.c\n+++ b/drivers/net/bnxt/tf_core/tf_rm.c\n@@ -17,6 +17,9 @@\n #include \"tfp.h\"\n #include \"tf_msg.h\"\n \n+/* Logging defines */\n+#define TF_RM_DEBUG 0\n+\n /**\n * Generic RM Element data type that an RM DB is build upon.\n */\n@@ -120,16 +123,11 @@ tf_rm_count_hcapi_reservations(enum tf_dir dir,\n \t\t cfg[i].cfg_type == TF_RM_ELEM_CFG_NULL &&\n \t\t reservations[i] > 0) {\n \t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t\"%s, %s, %s allocation not supported\\n\",\n-\t\t\t\ttf_device_module_type_2_str(type),\n-\t\t\t\ttf_dir_2_str(dir),\n-\t\t\t\ttf_device_module_type_subtype_2_str(type, i));\n-\t\t\tprintf(\"%s, %s, %s allocation of %d not supported\\n\",\n+\t\t\t\t\"%s, %s, %s allocation of %d not supported\\n\",\n \t\t\t\ttf_device_module_type_2_str(type),\n \t\t\t\ttf_dir_2_str(dir),\n-\t\t\t tf_device_module_type_subtype_2_str(type, i),\n-\t\t\t reservations[i]);\n-\n+\t\t\t\ttf_device_module_type_subtype_2_str(type, i),\n+\t\t\t\treservations[i]);\n \t\t}\n \t}\n \n@@ -549,11 +547,6 @@ tf_rm_create_db(struct tf *tfp,\n \t\t\tdb[i].alloc.entry.start = resv[j].start;\n \t\t\tdb[i].alloc.entry.stride = resv[j].stride;\n \n-\t\t\tprintf(\"Entry:%d Start:%d Stride:%d\\n\",\n-\t\t\t i,\n-\t\t\t resv[j].start,\n-\t\t\t resv[j].stride);\n-\n \t\t\t/* Only allocate BA pool if so requested */\n \t\t\tif (parms->cfg[i].cfg_type == TF_RM_ELEM_CFG_HCAPI_BA) {\n \t\t\t\t/* Create pool */\n@@ -603,10 +596,12 @@ tf_rm_create_db(struct tf *tfp,\n \trm_db->type = parms->type;\n \t*parms->rm_db = (void *)rm_db;\n \n+#if (TF_RM_DEBUG == 1)\n \tprintf(\"%s: type:%d num_entries:%d\\n\",\n \t tf_dir_2_str(parms->dir),\n \t parms->type,\n \t i);\n+#endif /* (TF_RM_DEBUG == 1) */\n \n \ttfp_free((void *)req);\n \ttfp_free((void *)resv);\ndiff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c\nindex 3a3277329..7d4daaf2d 100644\n--- a/drivers/net/bnxt/tf_core/tf_tbl.c\n+++ b/drivers/net/bnxt/tf_core/tf_tbl.c\n@@ -74,7 +74,8 @@ tf_tbl_bind(struct tf *tfp,\n \n \tinit = 1;\n \n-\tprintf(\"Table Type - initialized\\n\");\n+\tTFP_DRV_LOG(INFO,\n+\t\t \"Table Type - initialized\\n\");\n \n \treturn 0;\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_tcam.c b/drivers/net/bnxt/tf_core/tf_tcam.c\nindex b1092cd9d..1c48b5363 100644\n--- a/drivers/net/bnxt/tf_core/tf_tcam.c\n+++ b/drivers/net/bnxt/tf_core/tf_tcam.c\n@@ -81,7 +81,8 @@ tf_tcam_bind(struct tf *tfp,\n \n \tinit = 1;\n \n-\tprintf(\"TCAM - initialized\\n\");\n+\tTFP_DRV_LOG(INFO,\n+\t\t \"TCAM - initialized\\n\");\n \n \treturn 0;\n }\n@@ -275,6 +276,31 @@ tf_tcam_free(struct tf *tfp,\n \t\treturn rc;\n \t}\n \n+\tif (parms->type == TF_TCAM_TBL_TYPE_WC_TCAM) {\n+\t\tint i;\n+\n+\t\tfor (i = -1; i < 3; i += 3) {\n+\t\t\taparms.index += i;\n+\t\t\trc = tf_rm_is_allocated(&aparms);\n+\t\t\tif (rc)\n+\t\t\t\treturn rc;\n+\n+\t\t\tif (allocated == TF_RM_ALLOCATED_ENTRY_IN_USE) {\n+\t\t\t\t/* Free requested element */\n+\t\t\t\tfparms.index = aparms.index;\n+\t\t\t\trc = tf_rm_free(&fparms);\n+\t\t\t\tif (rc) {\n+\t\t\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t\t\t \"%s: Free failed, type:%d, index:%d\\n\",\n+\t\t\t\t\t\t tf_dir_2_str(parms->dir),\n+\t\t\t\t\t\t parms->type,\n+\t\t\t\t\t\t fparms.index);\n+\t\t\t\t\treturn rc;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\t}\n+\n \t/* Convert TF type to HCAPI RM type */\n \thparms.rm_db = tcam_db[parms->dir];\n \thparms.db_index = parms->type;\n", "prefixes": [ "v5", "27/51" ] }