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{
    "id": 73066,
    "url": "https://patches.dpdk.org/api/patches/73066/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200703210210.40568-17-ajit.khaparde@broadcom.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20200703210210.40568-17-ajit.khaparde@broadcom.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20200703210210.40568-17-ajit.khaparde@broadcom.com",
    "date": "2020-07-03T21:01:35",
    "name": "[v5,16/51] net/bnxt: add core changes for EM and EEM lookups",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "65753456a24aff47eb774b8b42ade633827f8609",
    "submitter": {
        "id": 501,
        "url": "https://patches.dpdk.org/api/people/501/?format=api",
        "name": "Ajit Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "delegate": {
        "id": 1766,
        "url": "https://patches.dpdk.org/api/users/1766/?format=api",
        "username": "ajitkhaparde",
        "first_name": "Ajit",
        "last_name": "Khaparde",
        "email": "ajit.khaparde@broadcom.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200703210210.40568-17-ajit.khaparde@broadcom.com/mbox/",
    "series": [
        {
            "id": 10785,
            "url": "https://patches.dpdk.org/api/series/10785/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=10785",
            "date": "2020-07-03T21:01:19",
            "name": "net/bnxt: add features for host-based flow management",
            "version": 5,
            "mbox": "https://patches.dpdk.org/series/10785/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/73066/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/73066/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 31C27A0524;\n\tFri,  3 Jul 2020 23:08:09 +0200 (CEST)",
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 826A71DD13;\n\tFri,  3 Jul 2020 23:05:34 +0200 (CEST)",
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        ],
        "DKIM-Filter": "OpenDKIM Filter v2.10.3 rnd-relay.smtp.broadcom.com 053B730C05D",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=broadcom.com;\n s=dkimrelay; t=1593810301;\n bh=h0dpirKe8CpMlw18VvvGD17LoeobdAu8swH0RPytqTw=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=QIpWOGoUKWfvZjadIeSjNndNBomQxgRxHL9FCD8JkdIxIuec6HFugJYICK1Y2X4h6\n ktwn68qLDaTxWAMMc0PqTf0K26g2AleF31anJG/mkI3qZ3MQV80CYq1QzmzLTd6x2h\n 8LrNulxoji//5uCSrEpWClvSmJPFlw354dUp+c8A=",
        "From": "Ajit Khaparde <ajit.khaparde@broadcom.com>",
        "To": "dev@dpdk.org",
        "Cc": "Randy Schacher <stuart.schacher@broadcom.com>,\n Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>,\n Shahaji Bhosle <shahaji.bhosle@broadcom.com>",
        "Date": "Fri,  3 Jul 2020 14:01:35 -0700",
        "Message-Id": "<20200703210210.40568-17-ajit.khaparde@broadcom.com>",
        "X-Mailer": "git-send-email 2.21.1 (Apple Git-122.3)",
        "In-Reply-To": "<20200703210210.40568-1-ajit.khaparde@broadcom.com>",
        "References": "<1f5421dc-0453-6dc8-09c2-ddfff6eb4888@intel.com>\n <20200703210210.40568-1-ajit.khaparde@broadcom.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Subject": "[dpdk-dev] [PATCH v5 16/51] net/bnxt: add core changes for EM and\n\tEEM lookups",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
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        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Randy Schacher <stuart.schacher@broadcom.com>\n\n- Move External Exact and Exact Match to device module using HCAPI\n  to add and delete entries\n- Make EM active through the device interface.\n\nSigned-off-by: Randy Schacher <stuart.schacher@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Shahaji Bhosle <shahaji.bhosle@broadcom.com>\nReviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/Makefile                 |   3 +-\n drivers/net/bnxt/hcapi/cfa_p40_hw.h       | 781 ++++++++++++++++++++++\n drivers/net/bnxt/hcapi/hcapi_cfa_common.c |  92 ---\n drivers/net/bnxt/hcapi/hcapi_cfa_p4.c     |   2 +-\n drivers/net/bnxt/tf_core/Makefile         |   8 +\n drivers/net/bnxt/tf_core/hwrm_tf.h        |  24 +-\n drivers/net/bnxt/tf_core/tf_core.c        | 441 ++++++------\n drivers/net/bnxt/tf_core/tf_core.h        | 141 ++--\n drivers/net/bnxt/tf_core/tf_device.h      |  32 +\n drivers/net/bnxt/tf_core/tf_device_p4.c   |   3 +\n drivers/net/bnxt/tf_core/tf_em.c          | 567 +++++-----------\n drivers/net/bnxt/tf_core/tf_em.h          |  72 +-\n drivers/net/bnxt/tf_core/tf_msg.c         |  23 +-\n drivers/net/bnxt/tf_core/tf_msg.h         |   4 +-\n drivers/net/bnxt/tf_core/tf_resources.h   |  25 +-\n drivers/net/bnxt/tf_core/tf_rm.c          | 156 +++--\n drivers/net/bnxt/tf_core/tf_tbl.c         | 437 +++++-------\n drivers/net/bnxt/tf_core/tf_tbl.h         |  49 +-\n 18 files changed, 1627 insertions(+), 1233 deletions(-)\n create mode 100644 drivers/net/bnxt/hcapi/cfa_p40_hw.h\n delete mode 100644 drivers/net/bnxt/hcapi/hcapi_cfa_common.c",
    "diff": "diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile\nindex 365627499..349b09c36 100644\n--- a/drivers/net/bnxt/Makefile\n+++ b/drivers/net/bnxt/Makefile\n@@ -46,9 +46,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += bnxt_rxtx_vec_sse.c\n endif\n \n ifeq ($(CONFIG_RTE_LIBRTE_BNXT_PMD), y)\n-CFLAGS += -I$(SRCDIR) -I$(SRCDIR)/tf_ulp -I$(SRCDIR)/tf_core\n+CFLAGS += -I$(SRCDIR) -I$(SRCDIR)/tf_ulp -I$(SRCDIR)/tf_core -I$(SRCDIR)/hcapi\n include $(SRCDIR)/tf_ulp/Makefile\n include $(SRCDIR)/tf_core/Makefile\n+include $(SRCDIR)/hcapi/Makefile\n endif\n \n #\ndiff --git a/drivers/net/bnxt/hcapi/cfa_p40_hw.h b/drivers/net/bnxt/hcapi/cfa_p40_hw.h\nnew file mode 100644\nindex 000000000..172706f12\n--- /dev/null\n+++ b/drivers/net/bnxt/hcapi/cfa_p40_hw.h\n@@ -0,0 +1,781 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2019-2020 Broadcom\n+ * All rights reserved.\n+ */\n+/*\n+ * Name:  cfa_p40_hw.h\n+ *\n+ * Description: header for SWE based on Truflow\n+ *\n+ * Date:  taken from 12/16/19 17:18:12\n+ *\n+ * Note:  This file was first generated using  tflib_decode.py.\n+ *\n+ *        Changes have been made due to lack of availability of xml for\n+ *        addtional tables at this time (EEM Record and union table fields)\n+ *        Changes not autogenerated are noted in comments.\n+ */\n+\n+#ifndef _CFA_P40_HW_H_\n+#define _CFA_P40_HW_H_\n+\n+/**\n+ * Valid TCAM entry. (for idx 5 ...)\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_VALID_BITPOS   166\n+#define CFA_P40_PROF_L2_CTXT_TCAM_VALID_NUM_BITS 1\n+/**\n+ * Key type (pass). (for idx 5 ...)\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_BITPOS 164\n+#define CFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_NUM_BITS 2\n+/**\n+ * Tunnel HDR type. (for idx 5 ...)\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_BITPOS 160\n+#define CFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_NUM_BITS 4\n+/**\n+ * Number of VLAN tags in tunnel l2 header. (for idx 4 ...)\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_BITPOS 158\n+#define CFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_NUM_BITS 2\n+/**\n+ * Number of VLAN tags in l2 header. (for idx 4 ...)\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_BITPOS 156\n+#define CFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_NUM_BITS 2\n+/**\n+ * Tunnel/Inner Source/Dest. MAC Address.\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_MAC1_BITPOS    108\n+#define CFA_P40_PROF_L2_CTXT_TCAM_MAC1_NUM_BITS  48\n+/**\n+ * Tunnel Outer VLAN Tag ID. (for idx 3 ...)\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_BITPOS  96\n+#define CFA_P40_PROF_L2_CTXT_TCAM_T_OVID_NUM_BITS 12\n+/**\n+ * Tunnel Inner VLAN Tag ID. (for idx 2 ...)\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_BITPOS  84\n+#define CFA_P40_PROF_L2_CTXT_TCAM_T_IVID_NUM_BITS 12\n+/**\n+ * Source Partition. (for idx 2 ...)\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_SPARIF_BITPOS  80\n+#define CFA_P40_PROF_L2_CTXT_TCAM_SPARIF_NUM_BITS 4\n+/**\n+ * Source Virtual I/F. (for idx 2 ...)\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_SVIF_BITPOS    72\n+#define CFA_P40_PROF_L2_CTXT_TCAM_SVIF_NUM_BITS  8\n+/**\n+ * Tunnel/Inner Source/Dest. MAC Address.\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_MAC0_BITPOS    24\n+#define CFA_P40_PROF_L2_CTXT_TCAM_MAC0_NUM_BITS  48\n+/**\n+ * Outer VLAN Tag ID.\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_OVID_BITPOS    12\n+#define CFA_P40_PROF_L2_CTXT_TCAM_OVID_NUM_BITS  12\n+/**\n+ * Inner VLAN Tag ID.\n+ */\n+#define CFA_P40_PROF_L2_CTXT_TCAM_IVID_BITPOS    0\n+#define CFA_P40_PROF_L2_CTXT_TCAM_IVID_NUM_BITS  12\n+\n+enum cfa_p40_prof_l2_ctxt_tcam_flds {\n+\tCFA_P40_PROF_L2_CTXT_TCAM_VALID_FLD = 0,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_KEY_TYPE_FLD = 1,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_FLD = 2,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_FLD = 3,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_L2_NUMTAGS_FLD = 4,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_MAC1_FLD = 5,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_T_OVID_FLD = 6,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_T_IVID_FLD = 7,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_SPARIF_FLD = 8,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_SVIF_FLD = 9,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_MAC0_FLD = 10,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_OVID_FLD = 11,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_IVID_FLD = 12,\n+\tCFA_P40_PROF_L2_CTXT_TCAM_MAX_FLD\n+};\n+\n+#define CFA_P40_PROF_L2_CTXT_TCAM_TOTAL_NUM_BITS 167\n+\n+/**\n+ * Valid entry. (for idx 2 ...)\n+ */\n+#define CFA_P40_ACT_VEB_TCAM_VALID_BITPOS        79\n+#define CFA_P40_ACT_VEB_TCAM_VALID_NUM_BITS      1\n+/**\n+ * reserved program to 0. (for idx 2 ...)\n+ */\n+#define CFA_P40_ACT_VEB_TCAM_RESERVED_BITPOS     78\n+#define CFA_P40_ACT_VEB_TCAM_RESERVED_NUM_BITS   1\n+/**\n+ * PF Parif Number. (for idx 2 ...)\n+ */\n+#define CFA_P40_ACT_VEB_TCAM_PARIF_IN_BITPOS     74\n+#define CFA_P40_ACT_VEB_TCAM_PARIF_IN_NUM_BITS   4\n+/**\n+ * Number of VLAN Tags. (for idx 2 ...)\n+ */\n+#define CFA_P40_ACT_VEB_TCAM_NUM_VTAGS_BITPOS    72\n+#define CFA_P40_ACT_VEB_TCAM_NUM_VTAGS_NUM_BITS  2\n+/**\n+ * Dest. MAC Address.\n+ */\n+#define CFA_P40_ACT_VEB_TCAM_MAC_BITPOS          24\n+#define CFA_P40_ACT_VEB_TCAM_MAC_NUM_BITS        48\n+/**\n+ * Outer VLAN Tag ID.\n+ */\n+#define CFA_P40_ACT_VEB_TCAM_OVID_BITPOS         12\n+#define CFA_P40_ACT_VEB_TCAM_OVID_NUM_BITS       12\n+/**\n+ * Inner VLAN Tag ID.\n+ */\n+#define CFA_P40_ACT_VEB_TCAM_IVID_BITPOS         0\n+#define CFA_P40_ACT_VEB_TCAM_IVID_NUM_BITS       12\n+\n+enum cfa_p40_act_veb_tcam_flds {\n+\tCFA_P40_ACT_VEB_TCAM_VALID_FLD = 0,\n+\tCFA_P40_ACT_VEB_TCAM_RESERVED_FLD = 1,\n+\tCFA_P40_ACT_VEB_TCAM_PARIF_IN_FLD = 2,\n+\tCFA_P40_ACT_VEB_TCAM_NUM_VTAGS_FLD = 3,\n+\tCFA_P40_ACT_VEB_TCAM_MAC_FLD = 4,\n+\tCFA_P40_ACT_VEB_TCAM_OVID_FLD = 5,\n+\tCFA_P40_ACT_VEB_TCAM_IVID_FLD = 6,\n+\tCFA_P40_ACT_VEB_TCAM_MAX_FLD\n+};\n+\n+#define CFA_P40_ACT_VEB_TCAM_TOTAL_NUM_BITS 80\n+\n+/**\n+ * Entry is valid.\n+ */\n+#define CFA_P40_LKUP_TCAM_RECORD_MEM_VALID_BITPOS 18\n+#define CFA_P40_LKUP_TCAM_RECORD_MEM_VALID_NUM_BITS 1\n+/**\n+ * Action Record Pointer\n+ */\n+#define CFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_BITPOS 2\n+#define CFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_NUM_BITS 16\n+/**\n+ * for resolving TCAM/EM conflicts\n+ */\n+#define CFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_BITPOS 0\n+#define CFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_NUM_BITS 2\n+\n+enum cfa_p40_lkup_tcam_record_mem_flds {\n+\tCFA_P40_LKUP_TCAM_RECORD_MEM_VALID_FLD = 0,\n+\tCFA_P40_LKUP_TCAM_RECORD_MEM_ACT_REC_PTR_FLD = 1,\n+\tCFA_P40_LKUP_TCAM_RECORD_MEM_STRENGTH_FLD = 2,\n+\tCFA_P40_LKUP_TCAM_RECORD_MEM_MAX_FLD\n+};\n+\n+#define CFA_P40_LKUP_TCAM_RECORD_MEM_TOTAL_NUM_BITS 19\n+\n+/**\n+ * (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_BITPOS 62\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_NUM_BITS 2\n+enum cfa_p40_prof_ctxt_remap_mem_tpid_anti_spoof_ctl {\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_TPID_IGNORE = 0x0UL,\n+\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_TPID_DROP = 0x1UL,\n+\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_TPID_DEFAULT = 0x2UL,\n+\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_TPID_SPIF = 0x3UL,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_TPID_MAX = 0x3UL\n+};\n+/**\n+ * (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_BITPOS 60\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_NUM_BITS 2\n+enum cfa_p40_prof_ctxt_remap_mem_pri_anti_spoof_ctl {\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_PRI_IGNORE = 0x0UL,\n+\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_PRI_DROP = 0x1UL,\n+\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_PRI_DEFAULT = 0x2UL,\n+\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_PRI_SPIF = 0x3UL,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_PRI_MAX = 0x3UL\n+};\n+/**\n+ * Bypass Source Properties Lookup. (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_BITPOS 59\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_NUM_BITS 1\n+/**\n+ * SP Record Pointer. (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_BITPOS 43\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_NUM_BITS 16\n+/**\n+ * BD Action pointer passing enable. (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_BITPOS 42\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_NUM_BITS 1\n+/**\n+ * Default VLAN TPID. (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_BITPOS 39\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_NUM_BITS 3\n+/**\n+ * Allowed VLAN TPIDs. (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_BITPOS 33\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_NUM_BITS 6\n+/**\n+ * Default VLAN PRI.\n+ */\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_BITPOS 30\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_NUM_BITS 3\n+/**\n+ * Allowed VLAN PRIs.\n+ */\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_BITPOS 22\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_NUM_BITS 8\n+/**\n+ * Partition.\n+ */\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_PARIF_BITPOS 18\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_PARIF_NUM_BITS 4\n+/**\n+ * Bypass Lookup.\n+ */\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_BITPOS 17\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_NUM_BITS 1\n+\n+/**\n+ * L2 Context Remap Data. Action bypass mode (1) {7'd0,prof_vnic[9:0]} Note:\n+ * should also set byp_lkup_en. Action bypass mode (0) byp_lkup_en(0) -\n+ * {prof_func[6:0],l2_context[9:0]} byp_lkup_en(1) - {1'b0,act_rec_ptr[15:0]}\n+ */\n+\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_BITPOS 0\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_NUM_BITS 12\n+\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_BITPOS 10\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_NUM_BITS 7\n+\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_BITPOS 0\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_NUM_BITS 10\n+\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_ARP_BITPOS 0\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_ARP_NUM_BITS 16\n+\n+enum cfa_p40_prof_ctxt_remap_mem_flds {\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_TPID_ANTI_SPOOF_CTL_FLD = 0,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_PRI_ANTI_SPOOF_CTL_FLD = 1,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_BYP_SP_LKUP_FLD = 2,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_SP_REC_PTR_FLD = 3,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_BD_ACT_EN_FLD = 4,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_TPID_FLD = 5,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_TPID_FLD = 6,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_DEFAULT_PRI_FLD = 7,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_ALLOWED_PRI_FLD = 8,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_PARIF_FLD = 9,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_BYP_LKUP_EN_FLD = 10,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_PROF_VNIC_FLD = 11,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_PROF_FUNC_FLD = 12,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_L2_CTXT_FLD = 13,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_ARP_FLD = 14,\n+\tCFA_P40_PROF_CTXT_REMAP_MEM_MAX_FLD\n+};\n+\n+#define CFA_P40_PROF_CTXT_REMAP_MEM_TOTAL_NUM_BITS 64\n+\n+/**\n+ * Bypass action pointer look up (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_BITPOS 37\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_NUM_BITS 1\n+/**\n+ * Exact match search enable (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_BITPOS 36\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_NUM_BITS 1\n+/**\n+ * Exact match profile\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_BITPOS 28\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_NUM_BITS 8\n+/**\n+ * Exact match key format\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_BITPOS 23\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_NUM_BITS 5\n+/**\n+ * Exact match key mask\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_BITPOS 13\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_NUM_BITS 10\n+/**\n+ * TCAM search enable\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_BITPOS 12\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_NUM_BITS 1\n+/**\n+ * TCAM profile\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_BITPOS 4\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_NUM_BITS 8\n+/**\n+ * TCAM key format\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_BITPOS 0\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_NUM_BITS 4\n+\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_BYPASS_OPT_BITPOS 16\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_BYPASS_OPT_NUM_BITS 2\n+\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_ACT_REC_PTR_BITPOS 0\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_ACT_REC_PTR_NUM_BITS 16\n+\n+enum cfa_p40_prof_profile_tcam_remap_mem_flds {\n+\tCFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_PL_BYP_LKUP_EN_FLD = 0,\n+\tCFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_SEARCH_ENB_FLD = 1,\n+\tCFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_PROFILE_ID_FLD = 2,\n+\tCFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_ID_FLD = 3,\n+\tCFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_EM_KEY_MASK_FLD = 4,\n+\tCFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_SEARCH_ENB_FLD = 5,\n+\tCFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_PROFILE_ID_FLD = 6,\n+\tCFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TCAM_KEY_ID_FLD = 7,\n+\tCFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_BYPASS_OPT_FLD = 8,\n+\tCFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_ACT_REC_PTR_FLD = 9,\n+\tCFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_MAX_FLD\n+};\n+\n+#define CFA_P40_PROF_PROFILE_TCAM_REMAP_MEM_TOTAL_NUM_BITS 38\n+\n+/**\n+ * Valid TCAM entry (for idx 2 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_VALID_BITPOS   80\n+#define CFA_P40_PROF_PROFILE_TCAM_VALID_NUM_BITS 1\n+/**\n+ * Packet type (for idx 2 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_BITPOS 76\n+#define CFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_NUM_BITS 4\n+/**\n+ * Pass through CFA (for idx 2 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_BITPOS 74\n+#define CFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_NUM_BITS 2\n+/**\n+ * Aggregate error (for idx 2 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_BITPOS 73\n+#define CFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_NUM_BITS 1\n+/**\n+ * Profile function (for idx 2 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_BITPOS 66\n+#define CFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_NUM_BITS 7\n+/**\n+ * Reserved for future use. Set to 0.\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_RESERVED_BITPOS 57\n+#define CFA_P40_PROF_PROFILE_TCAM_RESERVED_NUM_BITS 9\n+/**\n+ * non-tunnel(0)/tunneled(1) packet (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_BITPOS 56\n+#define CFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_NUM_BITS 1\n+/**\n+ * Tunnel L2 tunnel valid (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_BITPOS 55\n+#define CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_NUM_BITS 1\n+/**\n+ * Tunnel L2 header type (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_BITPOS 53\n+#define CFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_NUM_BITS 2\n+/**\n+ * Remapped tunnel L2 dest_type UC(0)/MC(2)/BC(3) (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_BITPOS 51\n+#define CFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_NUM_BITS 2\n+/**\n+ * Tunnel L2 1+ VLAN tags present (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_BITPOS 50\n+#define CFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_NUM_BITS 1\n+/**\n+ * Tunnel L2 2 VLAN tags present (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_BITPOS 49\n+#define CFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_NUM_BITS 1\n+/**\n+ * Tunnel L3 valid (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_VALID_BITPOS 48\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_VALID_NUM_BITS 1\n+/**\n+ * Tunnel L3 error (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_BITPOS 47\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_NUM_BITS 1\n+/**\n+ * Tunnel L3 header type (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_BITPOS 43\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_NUM_BITS 4\n+/**\n+ * Tunnel L3 header is IPV4 or IPV6. (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_BITPOS 42\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_NUM_BITS 1\n+/**\n+ * Tunnel L3 IPV6 src address is compressed (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_BITPOS 41\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_NUM_BITS 1\n+/**\n+ * Tunnel L3 IPV6 dest address is compressed (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_BITPOS 40\n+#define CFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_NUM_BITS 1\n+/**\n+ * Tunnel L4 valid (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_BITPOS 39\n+#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_NUM_BITS 1\n+/**\n+ * Tunnel L4 error (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_BITPOS 38\n+#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_NUM_BITS 1\n+/**\n+ * Tunnel L4 header type (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_BITPOS 34\n+#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_NUM_BITS 4\n+/**\n+ * Tunnel L4 header is UDP or TCP (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_BITPOS 33\n+#define CFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_NUM_BITS 1\n+/**\n+ * Tunnel valid (for idx 1 ...)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_BITPOS 32\n+#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_NUM_BITS 1\n+/**\n+ * Tunnel error\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_BITPOS 31\n+#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_NUM_BITS 1\n+/**\n+ * Tunnel header type\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_BITPOS 27\n+#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_NUM_BITS 4\n+/**\n+ * Tunnel header flags\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_BITPOS 24\n+#define CFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_NUM_BITS 3\n+/**\n+ * L2 header valid\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_BITPOS 23\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_NUM_BITS 1\n+/**\n+ * L2 header error\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_BITPOS 22\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_NUM_BITS 1\n+/**\n+ * L2 header type\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_BITPOS 20\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_NUM_BITS 2\n+/**\n+ * Remapped L2 dest_type UC(0)/MC(2)/BC(3)\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_BITPOS 18\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_NUM_BITS 2\n+/**\n+ * L2 header 1+ VLAN tags present\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_BITPOS 17\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_NUM_BITS 1\n+/**\n+ * L2 header 2 VLAN tags present\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_BITPOS 16\n+#define CFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_NUM_BITS 1\n+/**\n+ * L3 header valid\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_VALID_BITPOS 15\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_VALID_NUM_BITS 1\n+/**\n+ * L3 header error\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_ERROR_BITPOS 14\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_ERROR_NUM_BITS 1\n+/**\n+ * L3 header type\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_BITPOS 10\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_NUM_BITS 4\n+/**\n+ * L3 header is IPV4 or IPV6.\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_BITPOS 9\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_NUM_BITS 1\n+/**\n+ * L3 header IPV6 src address is compressed\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_BITPOS 8\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_NUM_BITS 1\n+/**\n+ * L3 header IPV6 dest address is compressed\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_BITPOS 7\n+#define CFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_NUM_BITS 1\n+/**\n+ * L4 header valid\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_BITPOS 6\n+#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_NUM_BITS 1\n+/**\n+ * L4 header error\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_BITPOS 5\n+#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_NUM_BITS 1\n+/**\n+ * L4 header type\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_BITPOS 1\n+#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_NUM_BITS 4\n+/**\n+ * L4 header is UDP or TCP\n+ */\n+#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_BITPOS 0\n+#define CFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_NUM_BITS 1\n+\n+enum cfa_p40_prof_profile_tcam_flds {\n+\tCFA_P40_PROF_PROFILE_TCAM_VALID_FLD = 0,\n+\tCFA_P40_PROF_PROFILE_TCAM_PKT_TYPE_FLD = 1,\n+\tCFA_P40_PROF_PROFILE_TCAM_RECYCLE_CNT_FLD = 2,\n+\tCFA_P40_PROF_PROFILE_TCAM_AGG_ERROR_FLD = 3,\n+\tCFA_P40_PROF_PROFILE_TCAM_PROF_FUNC_FLD = 4,\n+\tCFA_P40_PROF_PROFILE_TCAM_RESERVED_FLD = 5,\n+\tCFA_P40_PROF_PROFILE_TCAM_HREC_NEXT_FLD = 6,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL2_HDR_VALID_FLD = 7,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL2_HDR_TYPE_FLD = 8,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL2_UC_MC_BC_FLD = 9,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL2_VTAG_PRESENT_FLD = 10,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL2_TWO_VTAGS_FLD = 11,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL3_VALID_FLD = 12,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL3_ERROR_FLD = 13,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL3_HDR_TYPE_FLD = 14,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL3_HDR_ISIP_FLD = 15,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_SRC_FLD = 16,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL3_IPV6_CMP_DEST_FLD = 17,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL4_HDR_VALID_FLD = 18,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL4_HDR_ERROR_FLD = 19,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL4_HDR_TYPE_FLD = 20,\n+\tCFA_P40_PROF_PROFILE_TCAM_TL4_HDR_IS_UDP_TCP_FLD = 21,\n+\tCFA_P40_PROF_PROFILE_TCAM_TUN_HDR_VALID_FLD = 22,\n+\tCFA_P40_PROF_PROFILE_TCAM_TUN_HDR_ERR_FLD = 23,\n+\tCFA_P40_PROF_PROFILE_TCAM_TUN_HDR_TYPE_FLD = 24,\n+\tCFA_P40_PROF_PROFILE_TCAM_TUN_HDR_FLAGS_FLD = 25,\n+\tCFA_P40_PROF_PROFILE_TCAM_L2_HDR_VALID_FLD = 26,\n+\tCFA_P40_PROF_PROFILE_TCAM_L2_HDR_ERROR_FLD = 27,\n+\tCFA_P40_PROF_PROFILE_TCAM_L2_HDR_TYPE_FLD = 28,\n+\tCFA_P40_PROF_PROFILE_TCAM_L2_UC_MC_BC_FLD = 29,\n+\tCFA_P40_PROF_PROFILE_TCAM_L2_VTAG_PRESENT_FLD = 30,\n+\tCFA_P40_PROF_PROFILE_TCAM_L2_TWO_VTAGS_FLD = 31,\n+\tCFA_P40_PROF_PROFILE_TCAM_L3_VALID_FLD = 32,\n+\tCFA_P40_PROF_PROFILE_TCAM_L3_ERROR_FLD = 33,\n+\tCFA_P40_PROF_PROFILE_TCAM_L3_HDR_TYPE_FLD = 34,\n+\tCFA_P40_PROF_PROFILE_TCAM_L3_HDR_ISIP_FLD = 35,\n+\tCFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_SRC_FLD = 36,\n+\tCFA_P40_PROF_PROFILE_TCAM_L3_IPV6_CMP_DEST_FLD = 37,\n+\tCFA_P40_PROF_PROFILE_TCAM_L4_HDR_VALID_FLD = 38,\n+\tCFA_P40_PROF_PROFILE_TCAM_L4_HDR_ERROR_FLD = 39,\n+\tCFA_P40_PROF_PROFILE_TCAM_L4_HDR_TYPE_FLD = 40,\n+\tCFA_P40_PROF_PROFILE_TCAM_L4_HDR_IS_UDP_TCP_FLD = 41,\n+\tCFA_P40_PROF_PROFILE_TCAM_MAX_FLD\n+};\n+\n+#define CFA_P40_PROF_PROFILE_TCAM_TOTAL_NUM_BITS 81\n+\n+/**\n+ * CFA flexible key layout definition\n+ */\n+enum cfa_p40_key_fld_id {\n+\tCFA_P40_KEY_FLD_ID_MAX\n+};\n+\n+/**************************************************************************/\n+/**\n+ * Non-autogenerated fields\n+ */\n+\n+/**\n+ * Valid\n+ */\n+#define CFA_P40_EEM_KEY_TBL_VALID_BITPOS 0\n+#define CFA_P40_EEM_KEY_TBL_VALID_NUM_BITS 1\n+\n+/**\n+ * L1 Cacheable\n+ */\n+#define CFA_P40_EEM_KEY_TBL_L1_CACHEABLE_BITPOS 1\n+#define CFA_P40_EEM_KEY_TBL_L1_CACHEABLE_NUM_BITS 1\n+\n+/**\n+ * Strength\n+ */\n+#define CFA_P40_EEM_KEY_TBL_STRENGTH_BITPOS 2\n+#define CFA_P40_EEM_KEY_TBL_STRENGTH_NUM_BITS 2\n+\n+/**\n+ * Key Size\n+ */\n+#define CFA_P40_EEM_KEY_TBL_KEY_SZ_BITPOS 15\n+#define CFA_P40_EEM_KEY_TBL_KEY_SZ_NUM_BITS 9\n+\n+/**\n+ * Record Size\n+ */\n+#define CFA_P40_EEM_KEY_TBL_REC_SZ_BITPOS 24\n+#define CFA_P40_EEM_KEY_TBL_REC_SZ_NUM_BITS 5\n+\n+/**\n+ * Action Record Internal\n+ */\n+#define CFA_P40_EEM_KEY_TBL_ACT_REC_INT_BITPOS 29\n+#define CFA_P40_EEM_KEY_TBL_ACT_REC_INT_NUM_BITS 1\n+\n+/**\n+ * External Flow Counter\n+ */\n+#define CFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_BITPOS 30\n+#define CFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_NUM_BITS 1\n+\n+/**\n+ * Action Record Pointer\n+ */\n+#define CFA_P40_EEM_KEY_TBL_AR_PTR_BITPOS 31\n+#define CFA_P40_EEM_KEY_TBL_AR_PTR_NUM_BITS 33\n+\n+/**\n+ * EEM Key omitted - create using keybuilder\n+ * Fields here cannot be larger than a uint64_t\n+ */\n+\n+#define CFA_P40_EEM_KEY_TBL_TOTAL_NUM_BITS 64\n+\n+enum cfa_p40_eem_key_tbl_flds {\n+\tCFA_P40_EEM_KEY_TBL_VALID_FLD = 0,\n+\tCFA_P40_EEM_KEY_TBL_L1_CACHEABLE_FLD = 1,\n+\tCFA_P40_EEM_KEY_TBL_STRENGTH_FLD = 2,\n+\tCFA_P40_EEM_KEY_TBL_KEY_SZ_FLD = 3,\n+\tCFA_P40_EEM_KEY_TBL_REC_SZ_FLD = 4,\n+\tCFA_P40_EEM_KEY_TBL_ACT_REC_INT_FLD = 5,\n+\tCFA_P40_EEM_KEY_TBL_EXT_FLOW_CTR_FLD = 6,\n+\tCFA_P40_EEM_KEY_TBL_AR_PTR_FLD = 7,\n+\tCFA_P40_EEM_KEY_TBL_MAX_FLD\n+};\n+\n+/**\n+ * Mirror Destination 0 Source Property Record Pointer\n+ */\n+#define CFA_P40_MIRROR_TBL_SP_PTR_BITPOS 0\n+#define CFA_P40_MIRROR_TBL_SP_PTR_NUM_BITS 11\n+\n+/**\n+ * igonore or honor drop\n+ */\n+#define CFA_P40_MIRROR_TBL_IGN_DROP_BITPOS 13\n+#define CFA_P40_MIRROR_TBL_IGN_DROP_NUM_BITS 1\n+\n+/**\n+ * ingress or egress copy\n+ */\n+#define CFA_P40_MIRROR_TBL_COPY_BITPOS 14\n+#define CFA_P40_MIRROR_TBL_COPY_NUM_BITS 1\n+\n+/**\n+ * Mirror Destination enable.\n+ */\n+#define CFA_P40_MIRROR_TBL_EN_BITPOS 15\n+#define CFA_P40_MIRROR_TBL_EN_NUM_BITS 1\n+\n+/**\n+ * Action Record Pointer\n+ */\n+#define CFA_P40_MIRROR_TBL_AR_PTR_BITPOS 16\n+#define CFA_P40_MIRROR_TBL_AR_PTR_NUM_BITS 16\n+\n+#define CFA_P40_MIRROR_TBL_TOTAL_NUM_BITS 32\n+\n+enum cfa_p40_mirror_tbl_flds {\n+\tCFA_P40_MIRROR_TBL_SP_PTR_FLD = 0,\n+\tCFA_P40_MIRROR_TBL_IGN_DROP_FLD = 1,\n+\tCFA_P40_MIRROR_TBL_COPY_FLD = 2,\n+\tCFA_P40_MIRROR_TBL_EN_FLD = 3,\n+\tCFA_P40_MIRROR_TBL_AR_PTR_FLD = 4,\n+\tCFA_P40_MIRROR_TBL_MAX_FLD\n+};\n+\n+/**\n+ * P45 Specific Updates (SR) - Non-autogenerated\n+ */\n+/**\n+ * Valid TCAM entry.\n+ */\n+#define CFA_P45_PROF_L2_CTXT_TCAM_VALID_BITPOS   166\n+#define CFA_P45_PROF_L2_CTXT_TCAM_VALID_NUM_BITS 1\n+/**\n+ * Source Partition.\n+ */\n+#define CFA_P45_PROF_L2_CTXT_TCAM_SPARIF_BITPOS  166\n+#define CFA_P45_PROF_L2_CTXT_TCAM_SPARIF_NUM_BITS 4\n+\n+/**\n+ * Source Virtual I/F.\n+ */\n+#define CFA_P45_PROF_L2_CTXT_TCAM_SVIF_BITPOS    72\n+#define CFA_P45_PROF_L2_CTXT_TCAM_SVIF_NUM_BITS  12\n+\n+\n+/* The SR layout of the l2 ctxt key is different from the Wh+.  Switch to\n+ * cfa_p45_hw.h definition when available.\n+ */\n+enum cfa_p45_prof_l2_ctxt_tcam_flds {\n+\tCFA_P45_PROF_L2_CTXT_TCAM_VALID_FLD = 0,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_SPARIF_FLD = 1,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_KEY_TYPE_FLD = 2,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_TUN_HDR_TYPE_FLD = 3,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_T_L2_NUMTAGS_FLD = 4,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_L2_NUMTAGS_FLD = 5,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_MAC1_FLD = 6,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_T_OVID_FLD = 7,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_T_IVID_FLD = 8,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_SVIF_FLD = 9,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_MAC0_FLD = 10,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_OVID_FLD = 11,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_IVID_FLD = 12,\n+\tCFA_P45_PROF_L2_CTXT_TCAM_MAX_FLD\n+};\n+\n+#define CFA_P45_PROF_L2_CTXT_TCAM_TOTAL_NUM_BITS 171\n+\n+#endif /* _CFA_P40_HW_H_ */\ndiff --git a/drivers/net/bnxt/hcapi/hcapi_cfa_common.c b/drivers/net/bnxt/hcapi/hcapi_cfa_common.c\ndeleted file mode 100644\nindex 39afd4dbc..000000000\n--- a/drivers/net/bnxt/hcapi/hcapi_cfa_common.c\n+++ /dev/null\n@@ -1,92 +0,0 @@\n-/*\n- *   Copyright(c) 2019-2020 Broadcom Limited.\n- *   All rights reserved.\n- */\n-\n-#include \"bitstring.h\"\n-#include \"hcapi_cfa_defs.h\"\n-#include <errno.h>\n-#include \"assert.h\"\n-\n-/* HCAPI CFA common PUT APIs */\n-int hcapi_cfa_put_field(uint64_t *data_buf,\n-\t\t\tconst struct hcapi_cfa_layout *layout,\n-\t\t\tuint16_t field_id, uint64_t val)\n-{\n-\tassert(layout);\n-\n-\tif (field_id > layout->array_sz)\n-\t\t/* Invalid field_id */\n-\t\treturn -EINVAL;\n-\n-\tif (layout->is_msb_order)\n-\t\tbs_put_msb(data_buf,\n-\t\t\t   layout->field_array[field_id].bitpos,\n-\t\t\t   layout->field_array[field_id].bitlen, val);\n-\telse\n-\t\tbs_put_lsb(data_buf,\n-\t\t\t   layout->field_array[field_id].bitpos,\n-\t\t\t   layout->field_array[field_id].bitlen, val);\n-\treturn 0;\n-}\n-\n-int hcapi_cfa_put_fields(uint64_t *obj_data,\n-\t\t\t const struct hcapi_cfa_layout *layout,\n-\t\t\t struct hcapi_cfa_data_obj *field_tbl,\n-\t\t\t uint16_t field_tbl_sz)\n-{\n-\tint i;\n-\tuint16_t bitpos;\n-\tuint8_t bitlen;\n-\tuint16_t field_id;\n-\n-\tassert(layout);\n-\tassert(field_tbl);\n-\n-\tif (layout->is_msb_order) {\n-\t\tfor (i = 0; i < field_tbl_sz; i++) {\n-\t\t\tfield_id = field_tbl[i].field_id;\n-\t\t\tif (field_id > layout->array_sz)\n-\t\t\t\treturn -EINVAL;\n-\t\t\tbitpos = layout->field_array[field_id].bitpos;\n-\t\t\tbitlen = layout->field_array[field_id].bitlen;\n-\t\t\tbs_put_msb(obj_data, bitpos, bitlen,\n-\t\t\t\t   field_tbl[i].val);\n-\t\t}\n-\t} else {\n-\t\tfor (i = 0; i < field_tbl_sz; i++) {\n-\t\t\tfield_id = field_tbl[i].field_id;\n-\t\t\tif (field_id > layout->array_sz)\n-\t\t\t\treturn -EINVAL;\n-\t\t\tbitpos = layout->field_array[field_id].bitpos;\n-\t\t\tbitlen = layout->field_array[field_id].bitlen;\n-\t\t\tbs_put_lsb(obj_data, bitpos, bitlen,\n-\t\t\t\t   field_tbl[i].val);\n-\t\t}\n-\t}\n-\treturn 0;\n-}\n-\n-/* HCAPI CFA common GET APIs */\n-int hcapi_cfa_get_field(uint64_t *obj_data,\n-\t\t\tconst struct hcapi_cfa_layout *layout,\n-\t\t\tuint16_t field_id,\n-\t\t\tuint64_t *val)\n-{\n-\tassert(layout);\n-\tassert(val);\n-\n-\tif (field_id > layout->array_sz)\n-\t\t/* Invalid field_id */\n-\t\treturn -EINVAL;\n-\n-\tif (layout->is_msb_order)\n-\t\t*val = bs_get_msb(obj_data,\n-\t\t\t\t  layout->field_array[field_id].bitpos,\n-\t\t\t\t  layout->field_array[field_id].bitlen);\n-\telse\n-\t\t*val = bs_get_lsb(obj_data,\n-\t\t\t\t  layout->field_array[field_id].bitpos,\n-\t\t\t\t  layout->field_array[field_id].bitlen);\n-\treturn 0;\n-}\ndiff --git a/drivers/net/bnxt/hcapi/hcapi_cfa_p4.c b/drivers/net/bnxt/hcapi/hcapi_cfa_p4.c\nindex ca0b1c923..42b37da0f 100644\n--- a/drivers/net/bnxt/hcapi/hcapi_cfa_p4.c\n+++ b/drivers/net/bnxt/hcapi/hcapi_cfa_p4.c\n@@ -2,7 +2,7 @@\n  * Copyright(c) 2019-2020 Broadcom\n  * All rights reserved.\n  */\n-\n+#include <inttypes.h>\n #include <stdint.h>\n #include <stdlib.h>\n #include <stdbool.h>\ndiff --git a/drivers/net/bnxt/tf_core/Makefile b/drivers/net/bnxt/tf_core/Makefile\nindex 2c02e29e7..5ed32f12a 100644\n--- a/drivers/net/bnxt/tf_core/Makefile\n+++ b/drivers/net/bnxt/tf_core/Makefile\n@@ -24,3 +24,11 @@ SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_tbl_type.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_tcam.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_util.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_core/tf_rm_new.c\n+\n+SYMLINK-$(CONFIG_RTE_LIBRTE_BNXT_PMD)-include += tf_core/tf_core.h\n+SYMLINK-$(CONFIG_RTE_LIBRTE_BNXT_PMD)-include += tf_core/tf_project.h\n+SYMLINK-$(CONFIG_RTE_LIBRTE_BNXT_PMD)-include += tf_core/tf_device.h\n+SYMLINK-$(CONFIG_RTE_LIBRTE_BNXT_PMD)-include += tf_core/tf_identifier.h\n+SYMLINK-$(CONFIG_RTE_LIBRTE_BNXT_PMD)-include += tf_core/tf_tbl.h\n+SYMLINK-$(CONFIG_RTE_LIBRTE_BNXT_PMD)-include += tf_core/stack.h\n+SYMLINK-$(CONFIG_RTE_LIBRTE_BNXT_PMD)-include += tf_core/tf_tcam.h\ndiff --git a/drivers/net/bnxt/tf_core/hwrm_tf.h b/drivers/net/bnxt/tf_core/hwrm_tf.h\nindex c04d1034a..1e78296c6 100644\n--- a/drivers/net/bnxt/tf_core/hwrm_tf.h\n+++ b/drivers/net/bnxt/tf_core/hwrm_tf.h\n@@ -27,8 +27,8 @@ typedef enum tf_subtype {\n \tHWRM_TFT_REG_SET = 822,\n \tHWRM_TFT_TBL_TYPE_SET = 823,\n \tHWRM_TFT_TBL_TYPE_GET = 824,\n-\tHWRM_TFT_TBL_TYPE_GET_BULK = 825,\n-\tTF_SUBTYPE_LAST = HWRM_TFT_TBL_TYPE_GET_BULK,\n+\tHWRM_TFT_TBL_TYPE_BULK_GET = 825,\n+\tTF_SUBTYPE_LAST = HWRM_TFT_TBL_TYPE_BULK_GET,\n } tf_subtype_t;\n \n /* Request and Response compile time checking */\n@@ -82,8 +82,8 @@ struct tf_session_sram_resc_flush_input;\n struct tf_tbl_type_set_input;\n struct tf_tbl_type_get_input;\n struct tf_tbl_type_get_output;\n-struct tf_tbl_type_get_bulk_input;\n-struct tf_tbl_type_get_bulk_output;\n+struct tf_tbl_type_bulk_get_input;\n+struct tf_tbl_type_bulk_get_output;\n /* Input params for session attach */\n typedef struct tf_session_attach_input {\n \t/* Firmware session id returned when HWRM_TF_SESSION_OPEN is sent */\n@@ -905,8 +905,6 @@ typedef struct tf_tbl_type_get_input {\n #define TF_TBL_TYPE_GET_INPUT_FLAGS_DIR_RX\t\t\t(0x0)\n \t/* When set to 1, indicates the get apply to TX */\n #define TF_TBL_TYPE_GET_INPUT_FLAGS_DIR_TX\t\t\t(0x1)\n-\t/* When set to 1, indicates the clear entry on read */\n-#define TF_TBL_TYPE_GET_INPUT_FLAGS_CLEAR_ON_READ\t  (0x2)\n \t/* Type of the object to set */\n \tuint32_t\t\t\t type;\n \t/* Index to get */\n@@ -922,17 +920,17 @@ typedef struct tf_tbl_type_get_output {\n } tf_tbl_type_get_output_t, *ptf_tbl_type_get_output_t;\n \n /* Input params for table type get */\n-typedef struct tf_tbl_type_get_bulk_input {\n+typedef struct tf_tbl_type_bulk_get_input {\n \t/* Session Id */\n \tuint32_t\t\t\t fw_session_id;\n \t/* flags */\n \tuint16_t\t\t\t flags;\n \t/* When set to 0, indicates the get apply to RX */\n-#define TF_TBL_TYPE_GET_BULK_INPUT_FLAGS_DIR_RX\t   (0x0)\n+#define TF_TBL_TYPE_BULK_GET_INPUT_FLAGS_DIR_RX\t   (0x0)\n \t/* When set to 1, indicates the get apply to TX */\n-#define TF_TBL_TYPE_GET_BULK_INPUT_FLAGS_DIR_TX\t   (0x1)\n+#define TF_TBL_TYPE_BULK_GET_INPUT_FLAGS_DIR_TX\t   (0x1)\n \t/* When set to 1, indicates the clear entry on read */\n-#define TF_TBL_TYPE_GET_BULK_INPUT_FLAGS_CLEAR_ON_READ\t  (0x2)\n+#define TF_TBL_TYPE_BULK_GET_INPUT_FLAGS_CLEAR_ON_READ\t  (0x2)\n \t/* Type of the object to set */\n \tuint32_t\t\t\t type;\n \t/* Starting index to get from */\n@@ -941,12 +939,12 @@ typedef struct tf_tbl_type_get_bulk_input {\n \tuint32_t\t\t\t num_entries;\n \t/* Host memory where data will be stored */\n \tuint64_t\t\t\t host_addr;\n-} tf_tbl_type_get_bulk_input_t, *ptf_tbl_type_get_bulk_input_t;\n+} tf_tbl_type_bulk_get_input_t, *ptf_tbl_type_bulk_get_input_t;\n \n /* Output params for table type get */\n-typedef struct tf_tbl_type_get_bulk_output {\n+typedef struct tf_tbl_type_bulk_get_output {\n \t/* Size of the total data read in bytes */\n \tuint16_t\t\t\t size;\n-} tf_tbl_type_get_bulk_output_t, *ptf_tbl_type_get_bulk_output_t;\n+} tf_tbl_type_bulk_get_output_t, *ptf_tbl_type_bulk_get_output_t;\n \n #endif /* _HWRM_TF_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_core.c b/drivers/net/bnxt/tf_core/tf_core.c\nindex eac57e7bd..648d0d1bd 100644\n--- a/drivers/net/bnxt/tf_core/tf_core.c\n+++ b/drivers/net/bnxt/tf_core/tf_core.c\n@@ -19,33 +19,41 @@\n #include \"tf_common.h\"\n #include \"hwrm_tf.h\"\n \n-static inline uint32_t SWAP_WORDS32(uint32_t val32)\n+static int tf_check_tcam_entry(enum tf_tcam_tbl_type tcam_tbl_type,\n+\t\t\t       enum tf_device_type device,\n+\t\t\t       uint16_t key_sz_in_bits,\n+\t\t\t       uint16_t *num_slice_per_row)\n {\n-\treturn (((val32 & 0x0000ffff) << 16) |\n-\t\t((val32 & 0xffff0000) >> 16));\n-}\n+\tuint16_t key_bytes;\n+\tuint16_t slice_sz = 0;\n+\n+#define CFA_P4_WC_TCAM_SLICES_PER_ROW 2\n+#define CFA_P4_WC_TCAM_SLICE_SIZE     12\n+\n+\tif (tcam_tbl_type == TF_TCAM_TBL_TYPE_WC_TCAM) {\n+\t\tkey_bytes = TF_BITS2BYTES_WORD_ALIGN(key_sz_in_bits);\n+\t\tif (device == TF_DEVICE_TYPE_WH) {\n+\t\t\tslice_sz = CFA_P4_WC_TCAM_SLICE_SIZE;\n+\t\t\t*num_slice_per_row = CFA_P4_WC_TCAM_SLICES_PER_ROW;\n+\t\t} else {\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"Unsupported device type %d\\n\",\n+\t\t\t\t    device);\n+\t\t\treturn -ENOTSUP;\n+\t\t}\n \n-static void tf_seeds_init(struct tf_session *session)\n-{\n-\tint i;\n-\tuint32_t r;\n-\n-\t/* Initialize the lfsr */\n-\trand_init();\n-\n-\t/* RX and TX use the same seed values */\n-\tsession->lkup_lkup3_init_cfg[TF_DIR_RX] =\n-\t\tsession->lkup_lkup3_init_cfg[TF_DIR_TX] =\n-\t\t\t\t\t\tSWAP_WORDS32(rand32());\n-\n-\tfor (i = 0; i < TF_LKUP_SEED_MEM_SIZE / 2; i++) {\n-\t\tr = SWAP_WORDS32(rand32());\n-\t\tsession->lkup_em_seed_mem[TF_DIR_RX][i * 2] = r;\n-\t\tsession->lkup_em_seed_mem[TF_DIR_TX][i * 2] = r;\n-\t\tr = SWAP_WORDS32(rand32());\n-\t\tsession->lkup_em_seed_mem[TF_DIR_RX][i * 2 + 1] = (r & 0x1);\n-\t\tsession->lkup_em_seed_mem[TF_DIR_TX][i * 2 + 1] = (r & 0x1);\n+\t\tif (key_bytes > *num_slice_per_row * slice_sz) {\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s: Key size %d is not supported\\n\",\n+\t\t\t\t    tf_tcam_tbl_2_str(tcam_tbl_type),\n+\t\t\t\t    key_bytes);\n+\t\t\treturn -ENOTSUP;\n+\t\t}\n+\t} else { /* for other type of tcam */\n+\t\t*num_slice_per_row = 1;\n \t}\n+\n+\treturn 0;\n }\n \n /**\n@@ -153,15 +161,18 @@ tf_open_session(struct tf                    *tfp,\n \tuint8_t fw_session_id;\n \tint dir;\n \n-\tif (tfp == NULL || parms == NULL)\n-\t\treturn -EINVAL;\n+\tTF_CHECK_PARMS(tfp, parms);\n \n \t/* Filter out any non-supported device types on the Core\n \t * side. It is assumed that the Firmware will be supported if\n \t * firmware open session succeeds.\n \t */\n-\tif (parms->device_type != TF_DEVICE_TYPE_WH)\n+\tif (parms->device_type != TF_DEVICE_TYPE_WH) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Unsupported device type %d\\n\",\n+\t\t\t    parms->device_type);\n \t\treturn -ENOTSUP;\n+\t}\n \n \t/* Build the beginning of session_id */\n \trc = sscanf(parms->ctrl_chan_name,\n@@ -171,7 +182,7 @@ tf_open_session(struct tf                    *tfp,\n \t\t    &slot,\n \t\t    &device);\n \tif (rc != 4) {\n-\t\tPMD_DRV_LOG(ERR,\n+\t\tTFP_DRV_LOG(ERR,\n \t\t\t    \"Failed to scan device ctrl_chan_name\\n\");\n \t\treturn -EINVAL;\n \t}\n@@ -183,13 +194,13 @@ tf_open_session(struct tf                    *tfp,\n \tif (rc) {\n \t\t/* Log error */\n \t\tif (rc == -EEXIST)\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"Session is already open, rc:%d\\n\",\n-\t\t\t\t    rc);\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"Session is already open, rc:%s\\n\",\n+\t\t\t\t    strerror(-rc));\n \t\telse\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"Open message send failed, rc:%d\\n\",\n-\t\t\t\t    rc);\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"Open message send failed, rc:%s\\n\",\n+\t\t\t\t    strerror(-rc));\n \n \t\tparms->session_id.id = TF_FW_SESSION_ID_INVALID;\n \t\treturn rc;\n@@ -202,13 +213,13 @@ tf_open_session(struct tf                    *tfp,\n \trc = tfp_calloc(&alloc_parms);\n \tif (rc) {\n \t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"Failed to allocate session info, rc:%d\\n\",\n-\t\t\t    rc);\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to allocate session info, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n \t\tgoto cleanup;\n \t}\n \n-\ttfp->session = alloc_parms.mem_va;\n+\ttfp->session = (struct tf_session_info *)alloc_parms.mem_va;\n \n \t/* Allocate core data for the session */\n \talloc_parms.nitems = 1;\n@@ -217,9 +228,9 @@ tf_open_session(struct tf                    *tfp,\n \trc = tfp_calloc(&alloc_parms);\n \tif (rc) {\n \t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"Failed to allocate session data, rc:%d\\n\",\n-\t\t\t    rc);\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Failed to allocate session data, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n \t\tgoto cleanup;\n \t}\n \n@@ -240,12 +251,13 @@ tf_open_session(struct tf                    *tfp,\n \tsession->session_id.internal.device = device;\n \tsession->session_id.internal.fw_session_id = fw_session_id;\n \n+\t/* Query for Session Config\n+\t */\n \trc = tf_msg_session_qcfg(tfp);\n \tif (rc) {\n-\t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"Query config message send failed, rc:%d\\n\",\n-\t\t\t    rc);\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Query config message send failed, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n \t\tgoto cleanup_close;\n \t}\n \n@@ -256,9 +268,9 @@ tf_open_session(struct tf                    *tfp,\n #if (TF_SHADOW == 1)\n \t\trc = tf_rm_shadow_db_init(tfs);\n \t\tif (rc)\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"Shadow DB Initialization failed\\n, rc:%d\",\n-\t\t\t\t    rc);\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"Shadow DB Initialization failed\\n, rc:%s\",\n+\t\t\t\t    strerror(-rc));\n \t\t/* Add additional processing */\n #endif /* TF_SHADOW */\n \t}\n@@ -266,13 +278,12 @@ tf_open_session(struct tf                    *tfp,\n \t/* Adjust the Session with what firmware allowed us to get */\n \trc = tf_rm_allocate_validate(tfp);\n \tif (rc) {\n-\t\t/* Log error */\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"Rm allocate validate failed, rc:%s\\n\",\n+\t\t\t    strerror(-rc));\n \t\tgoto cleanup_close;\n \t}\n \n-\t/* Setup hash seeds */\n-\ttf_seeds_init(session);\n-\n \t/* Initialize EM pool */\n \tfor (dir = 0; dir < TF_DIR_MAX; dir++) {\n \t\trc = tf_create_em_pool(session,\n@@ -290,11 +301,11 @@ tf_open_session(struct tf                    *tfp,\n \t/* Return session ID */\n \tparms->session_id = session->session_id;\n \n-\tPMD_DRV_LOG(INFO,\n+\tTFP_DRV_LOG(INFO,\n \t\t    \"Session created, session_id:%d\\n\",\n \t\t    parms->session_id.id);\n \n-\tPMD_DRV_LOG(INFO,\n+\tTFP_DRV_LOG(INFO,\n \t\t    \"domain:%d, bus:%d, device:%d, fw_session_id:%d\\n\",\n \t\t    parms->session_id.internal.domain,\n \t\t    parms->session_id.internal.bus,\n@@ -379,8 +390,7 @@ tf_attach_session(struct tf *tfp __rte_unused,\n #if (TF_SHARED == 1)\n \tint rc;\n \n-\tif (tfp == NULL)\n-\t\treturn -EINVAL;\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n \t/* - Open the shared memory for the attach_chan_name\n \t * - Point to the shared session for this Device instance\n@@ -389,12 +399,10 @@ tf_attach_session(struct tf *tfp __rte_unused,\n \t *   than one client of the session.\n \t */\n \n-\tif (tfp->session) {\n-\t\tif (tfp->session->session_id.id != TF_SESSION_ID_INVALID) {\n-\t\t\trc = tf_msg_session_attach(tfp,\n-\t\t\t\t\t\t   parms->ctrl_chan_name,\n-\t\t\t\t\t\t   parms->session_id);\n-\t\t}\n+\tif (tfp->session->session_id.id != TF_SESSION_ID_INVALID) {\n+\t\trc = tf_msg_session_attach(tfp,\n+\t\t\t\t\t   parms->ctrl_chan_name,\n+\t\t\t\t\t   parms->session_id);\n \t}\n #endif /* TF_SHARED */\n \treturn -1;\n@@ -472,8 +480,7 @@ tf_close_session(struct tf *tfp)\n \tunion tf_session_id session_id;\n \tint dir;\n \n-\tif (tfp == NULL || tfp->session == NULL)\n-\t\treturn -EINVAL;\n+\tTF_CHECK_TFP_SESSION(tfp);\n \n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n@@ -487,9 +494,9 @@ tf_close_session(struct tf *tfp)\n \t\trc = tf_msg_session_close(tfp);\n \t\tif (rc) {\n \t\t\t/* Log error */\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"Message send failed, rc:%d\\n\",\n-\t\t\t\t    rc);\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"Message send failed, rc:%s\\n\",\n+\t\t\t\t    strerror(-rc));\n \t\t}\n \n \t\t/* Update the ref_count */\n@@ -509,11 +516,11 @@ tf_close_session(struct tf *tfp)\n \t\ttfp->session = NULL;\n \t}\n \n-\tPMD_DRV_LOG(INFO,\n+\tTFP_DRV_LOG(INFO,\n \t\t    \"Session closed, session_id:%d\\n\",\n \t\t    session_id.id);\n \n-\tPMD_DRV_LOG(INFO,\n+\tTFP_DRV_LOG(INFO,\n \t\t    \"domain:%d, bus:%d, device:%d, fw_session_id:%d\\n\",\n \t\t    session_id.internal.domain,\n \t\t    session_id.internal.bus,\n@@ -565,27 +572,39 @@ tf_close_session_new(struct tf *tfp)\n int tf_insert_em_entry(struct tf *tfp,\n \t\t       struct tf_insert_em_entry_parms *parms)\n {\n-\tstruct tf_tbl_scope_cb     *tbl_scope_cb;\n+\tstruct tf_session      *tfs;\n+\tstruct tf_dev_info     *dev;\n+\tint rc;\n \n-\tif (tfp == NULL || parms == NULL)\n-\t\treturn -EINVAL;\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n-\ttbl_scope_cb = tbl_scope_cb_find((struct tf_session *)\n-\t\t\t\t\t (tfp->session->core_data),\n-\t\t\t\t\t parms->tbl_scope_id);\n-\tif (tbl_scope_cb == NULL)\n-\t\treturn -EINVAL;\n+\t/* Retrieve the session information */\n+\trc = tf_session_get_session(tfp, &tfs);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Failed to lookup session, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n \n-\t/* Process the EM entry per Table Scope type */\n-\tif (parms->mem == TF_MEM_EXTERNAL) {\n-\t\t/* External EEM */\n-\t\treturn tf_insert_eem_entry((struct tf_session *)\n-\t\t\t\t\t   (tfp->session->core_data),\n-\t\t\t\t\t   tbl_scope_cb,\n-\t\t\t\t\t   parms);\n-\t} else if (parms->mem == TF_MEM_INTERNAL) {\n-\t\t/* Internal EM */\n-\t\treturn tf_insert_em_internal_entry(tfp,\tparms);\n+\t/* Retrieve the device information */\n+\trc = tf_session_get_device(tfs, &dev);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Failed to lookup device, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\trc = dev->ops->tf_dev_insert_em_entry(tfp, parms);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: EM insert failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n \t}\n \n \treturn -EINVAL;\n@@ -600,27 +619,44 @@ int tf_insert_em_entry(struct tf *tfp,\n int tf_delete_em_entry(struct tf *tfp,\n \t\t       struct tf_delete_em_entry_parms *parms)\n {\n-\tstruct tf_tbl_scope_cb     *tbl_scope_cb;\n+\tstruct tf_session      *tfs;\n+\tstruct tf_dev_info     *dev;\n+\tint rc;\n \n-\tif (tfp == NULL || parms == NULL)\n-\t\treturn -EINVAL;\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n-\ttbl_scope_cb = tbl_scope_cb_find((struct tf_session *)\n-\t\t\t\t\t (tfp->session->core_data),\n-\t\t\t\t\t parms->tbl_scope_id);\n-\tif (tbl_scope_cb == NULL)\n-\t\treturn -EINVAL;\n+\t/* Retrieve the session information */\n+\trc = tf_session_get_session(tfp, &tfs);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Failed to lookup session, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n \n-\tif (parms->mem == TF_MEM_EXTERNAL)\n-\t\treturn tf_delete_eem_entry(tfp, parms);\n-\telse\n-\t\treturn tf_delete_em_internal_entry(tfp, parms);\n+\t/* Retrieve the device information */\n+\trc = tf_session_get_device(tfs, &dev);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: Failed to lookup device, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\trc = dev->ops->tf_dev_delete_em_entry(tfp, parms);\n+\tif (rc) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: EM delete failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n+\t\treturn rc;\n+\t}\n+\n+\treturn rc;\n }\n \n-/** allocate identifier resource\n- *\n- * Returns success or failure code.\n- */\n int tf_alloc_identifier(struct tf *tfp,\n \t\t\tstruct tf_alloc_identifier_parms *parms)\n {\n@@ -629,14 +665,7 @@ int tf_alloc_identifier(struct tf *tfp,\n \tint id;\n \tint rc;\n \n-\tif (parms == NULL || tfp == NULL)\n-\t\treturn -EINVAL;\n-\n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"%s: session error\\n\",\n-\t\t\t    tf_dir_2_str(parms->dir));\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n@@ -662,30 +691,31 @@ int tf_alloc_identifier(struct tf *tfp,\n \t\t\t\trc);\n \t\tbreak;\n \tcase TF_IDENT_TYPE_L2_FUNC:\n-\t\tPMD_DRV_LOG(ERR, \"%s: unsupported %s\\n\",\n+\t\tTFP_DRV_LOG(ERR, \"%s: unsupported %s\\n\",\n \t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    tf_ident_2_str(parms->ident_type));\n \t\trc = -EOPNOTSUPP;\n \t\tbreak;\n \tdefault:\n-\t\tPMD_DRV_LOG(ERR, \"%s: %s\\n\",\n+\t\tTFP_DRV_LOG(ERR, \"%s: %s\\n\",\n \t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    tf_ident_2_str(parms->ident_type));\n-\t\trc = -EINVAL;\n+\t\trc = -EOPNOTSUPP;\n \t\tbreak;\n \t}\n \n \tif (rc) {\n-\t\tPMD_DRV_LOG(ERR, \"%s: identifier pool %s failure\\n\",\n+\t\tTFP_DRV_LOG(ERR, \"%s: identifier pool %s failure, rc:%s\\n\",\n \t\t\t    tf_dir_2_str(parms->dir),\n-\t\t\t    tf_ident_2_str(parms->ident_type));\n+\t\t\t    tf_ident_2_str(parms->ident_type),\n+\t\t\t    strerror(-rc));\n \t\treturn rc;\n \t}\n \n \tid = ba_alloc(session_pool);\n \n \tif (id == BA_FAIL) {\n-\t\tPMD_DRV_LOG(ERR, \"%s: %s: No resource available\\n\",\n+\t\tTFP_DRV_LOG(ERR, \"%s: %s: No resource available\\n\",\n \t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    tf_ident_2_str(parms->ident_type));\n \t\treturn -ENOMEM;\n@@ -763,14 +793,7 @@ int tf_free_identifier(struct tf *tfp,\n \tint ba_rc;\n \tstruct tf_session *tfs;\n \n-\tif (parms == NULL || tfp == NULL)\n-\t\treturn -EINVAL;\n-\n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"%s: Session error\\n\",\n-\t\t\t    tf_dir_2_str(parms->dir));\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n@@ -796,29 +819,31 @@ int tf_free_identifier(struct tf *tfp,\n \t\t\t\trc);\n \t\tbreak;\n \tcase TF_IDENT_TYPE_L2_FUNC:\n-\t\tPMD_DRV_LOG(ERR, \"%s: unsupported %s\\n\",\n+\t\tTFP_DRV_LOG(ERR, \"%s: unsupported %s\\n\",\n \t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    tf_ident_2_str(parms->ident_type));\n \t\trc = -EOPNOTSUPP;\n \t\tbreak;\n \tdefault:\n-\t\tPMD_DRV_LOG(ERR, \"%s: invalid %s\\n\",\n+\t\tTFP_DRV_LOG(ERR, \"%s: invalid %s\\n\",\n \t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    tf_ident_2_str(parms->ident_type));\n-\t\trc = -EINVAL;\n+\t\trc = -EOPNOTSUPP;\n \t\tbreak;\n \t}\n \tif (rc) {\n-\t\tPMD_DRV_LOG(ERR, \"%s: %s Identifier pool access failed\\n\",\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s: %s Identifier pool access failed, rc:%s\\n\",\n \t\t\t    tf_dir_2_str(parms->dir),\n-\t\t\t    tf_ident_2_str(parms->ident_type));\n+\t\t\t    tf_ident_2_str(parms->ident_type),\n+\t\t\t    strerror(-rc));\n \t\treturn rc;\n \t}\n \n \tba_rc = ba_inuse(session_pool, (int)parms->id);\n \n \tif (ba_rc == BA_FAIL || ba_rc == BA_ENTRY_FREE) {\n-\t\tPMD_DRV_LOG(ERR, \"%s: %s: Entry %d already free\",\n+\t\tTFP_DRV_LOG(ERR, \"%s: %s: Entry %d already free\",\n \t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    tf_ident_2_str(parms->ident_type),\n \t\t\t    parms->id);\n@@ -893,21 +918,30 @@ tf_alloc_tcam_entry(struct tf *tfp,\n \t\t    struct tf_alloc_tcam_entry_parms *parms)\n {\n \tint rc;\n-\tint index = 0;\n+\tint index;\n \tstruct tf_session *tfs;\n \tstruct bitalloc *session_pool;\n+\tuint16_t num_slice_per_row;\n \n-\tif (parms == NULL || tfp == NULL)\n-\t\treturn -EINVAL;\n+\t/* TEMP, due to device design. When tcam is modularized device\n+\t * should be retrieved from the session\n+\t */\n+\tenum tf_device_type device_type;\n+\t/* TEMP */\n+\tdevice_type = TF_DEVICE_TYPE_WH;\n \n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"%s: session error\\n\",\n-\t\t\t    tf_dir_2_str(parms->dir));\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n+\trc = tf_check_tcam_entry(parms->tcam_tbl_type,\n+\t\t\t\t device_type,\n+\t\t\t\t parms->key_sz_in_bits,\n+\t\t\t\t &num_slice_per_row);\n+\t/* Error logging handled by tf_check_tcam_entry */\n+\tif (rc)\n+\t\treturn rc;\n+\n \trc = tf_rm_lookup_tcam_type_pool(tfs,\n \t\t\t\t\t parms->dir,\n \t\t\t\t\t parms->tcam_tbl_type,\n@@ -916,36 +950,16 @@ tf_alloc_tcam_entry(struct tf *tfp,\n \tif (rc)\n \t\treturn rc;\n \n-\t/*\n-\t * priority  0: allocate from top of the tcam i.e. high\n-\t * priority !0: allocate index from bottom i.e lowest\n-\t */\n-\tif (parms->priority) {\n-\t\tfor (index = session_pool->size - 1; index >= 0; index--) {\n-\t\t\tif (ba_inuse(session_pool,\n-\t\t\t\t\t  index) == BA_ENTRY_FREE) {\n-\t\t\t\tbreak;\n-\t\t\t}\n-\t\t}\n-\t\tif (ba_alloc_index(session_pool,\n-\t\t\t\t   index) == BA_FAIL) {\n-\t\t\tTFP_DRV_LOG(ERR,\n-\t\t\t\t    \"%s: %s: ba_alloc index %d failed\\n\",\n-\t\t\t\t    tf_dir_2_str(parms->dir),\n-\t\t\t\t    tf_tcam_tbl_2_str(parms->tcam_tbl_type),\n-\t\t\t\t    index);\n-\t\t\treturn -ENOMEM;\n-\t\t}\n-\t} else {\n-\t\tindex = ba_alloc(session_pool);\n-\t\tif (index == BA_FAIL) {\n-\t\t\tTFP_DRV_LOG(ERR, \"%s: %s: Out of resource\\n\",\n-\t\t\t\t    tf_dir_2_str(parms->dir),\n-\t\t\t\t    tf_tcam_tbl_2_str(parms->tcam_tbl_type));\n-\t\t\treturn -ENOMEM;\n-\t\t}\n+\tindex = ba_alloc(session_pool);\n+\tif (index == BA_FAIL) {\n+\t\tTFP_DRV_LOG(ERR, \"%s: %s: No resource available\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    tf_tcam_tbl_2_str(parms->tcam_tbl_type));\n+\t\treturn -ENOMEM;\n \t}\n \n+\tindex *= num_slice_per_row;\n+\n \tparms->idx = index;\n \treturn 0;\n }\n@@ -956,26 +970,29 @@ tf_set_tcam_entry(struct tf *tfp,\n {\n \tint rc;\n \tint id;\n+\tint index;\n \tstruct tf_session *tfs;\n \tstruct bitalloc *session_pool;\n+\tuint16_t num_slice_per_row;\n \n-\tif (tfp == NULL || parms == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"Invalid parameters\\n\");\n-\t\treturn -EINVAL;\n-\t}\n+\t/* TEMP, due to device design. When tcam is modularized device\n+\t * should be retrieved from the session\n+\t */\n+\tenum tf_device_type device_type;\n+\t/* TEMP */\n+\tdevice_type = TF_DEVICE_TYPE_WH;\n \n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"%s, Session info invalid\\n\",\n-\t\t\t    tf_dir_2_str(parms->dir));\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n-\t/*\n-\t * Each tcam send msg function should check for key sizes range\n-\t */\n+\trc = tf_check_tcam_entry(parms->tcam_tbl_type,\n+\t\t\t\t device_type,\n+\t\t\t\t parms->key_sz_in_bits,\n+\t\t\t\t &num_slice_per_row);\n+\t/* Error logging handled by tf_check_tcam_entry */\n+\tif (rc)\n+\t\treturn rc;\n \n \trc = tf_rm_lookup_tcam_type_pool(tfs,\n \t\t\t\t\t parms->dir,\n@@ -985,11 +1002,12 @@ tf_set_tcam_entry(struct tf *tfp,\n \tif (rc)\n \t\treturn rc;\n \n-\n \t/* Verify that the entry has been previously allocated */\n-\tid = ba_inuse(session_pool, parms->idx);\n+\tindex = parms->idx / num_slice_per_row;\n+\n+\tid = ba_inuse(session_pool, index);\n \tif (id != 1) {\n-\t\tPMD_DRV_LOG(ERR,\n+\t\tTFP_DRV_LOG(ERR,\n \t\t   \"%s: %s: Invalid or not allocated index, idx:%d\\n\",\n \t\t   tf_dir_2_str(parms->dir),\n \t\t   tf_tcam_tbl_2_str(parms->tcam_tbl_type),\n@@ -1006,21 +1024,8 @@ int\n tf_get_tcam_entry(struct tf *tfp __rte_unused,\n \t\t  struct tf_get_tcam_entry_parms *parms __rte_unused)\n {\n-\tint rc = -EOPNOTSUPP;\n-\n-\tif (tfp == NULL || parms == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"Invalid parameters\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"%s, Session info invalid\\n\",\n-\t\t\t    tf_dir_2_str(parms->dir));\n-\t\treturn -EINVAL;\n-\t}\n-\n-\treturn rc;\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n+\treturn -EOPNOTSUPP;\n }\n \n int\n@@ -1028,20 +1033,29 @@ tf_free_tcam_entry(struct tf *tfp,\n \t\t   struct tf_free_tcam_entry_parms *parms)\n {\n \tint rc;\n+\tint index;\n \tstruct tf_session *tfs;\n \tstruct bitalloc *session_pool;\n+\tuint16_t num_slice_per_row = 1;\n \n-\tif (parms == NULL || tfp == NULL)\n-\t\treturn -EINVAL;\n-\n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"%s: Session error\\n\",\n-\t\t\t    tf_dir_2_str(parms->dir));\n-\t\treturn -EINVAL;\n-\t}\n+\t/* TEMP, due to device design. When tcam is modularized device\n+\t * should be retrieved from the session\n+\t */\n+\tenum tf_device_type device_type;\n+\t/* TEMP */\n+\tdevice_type = TF_DEVICE_TYPE_WH;\n \n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n+\trc = tf_check_tcam_entry(parms->tcam_tbl_type,\n+\t\t\t\t device_type,\n+\t\t\t\t 0,\n+\t\t\t\t &num_slice_per_row);\n+\t/* Error logging handled by tf_check_tcam_entry */\n+\tif (rc)\n+\t\treturn rc;\n+\n \trc = tf_rm_lookup_tcam_type_pool(tfs,\n \t\t\t\t\t parms->dir,\n \t\t\t\t\t parms->tcam_tbl_type,\n@@ -1050,24 +1064,27 @@ tf_free_tcam_entry(struct tf *tfp,\n \tif (rc)\n \t\treturn rc;\n \n-\trc = ba_inuse(session_pool, (int)parms->idx);\n+\tindex = parms->idx / num_slice_per_row;\n+\n+\trc = ba_inuse(session_pool, index);\n \tif (rc == BA_FAIL || rc == BA_ENTRY_FREE) {\n-\t\tPMD_DRV_LOG(ERR, \"%s: %s: Entry %d already free\",\n+\t\tTFP_DRV_LOG(ERR, \"%s: %s: Entry %d already free\",\n \t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    tf_tcam_tbl_2_str(parms->tcam_tbl_type),\n-\t\t\t    parms->idx);\n+\t\t\t    index);\n \t\treturn -EINVAL;\n \t}\n \n-\tba_free(session_pool, (int)parms->idx);\n+\tba_free(session_pool, index);\n \n \trc = tf_msg_tcam_entry_free(tfp, parms);\n \tif (rc) {\n \t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR, \"%s: %s: Entry %d free failed\",\n+\t\tTFP_DRV_LOG(ERR, \"%s: %s: Entry %d free failed with err %s\",\n \t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    tf_tcam_tbl_2_str(parms->tcam_tbl_type),\n-\t\t\t    parms->idx);\n+\t\t\t    parms->idx,\n+\t\t\t    strerror(-rc));\n \t}\n \n \treturn rc;\ndiff --git a/drivers/net/bnxt/tf_core/tf_core.h b/drivers/net/bnxt/tf_core/tf_core.h\nindex f1ef00b30..bb456bba7 100644\n--- a/drivers/net/bnxt/tf_core/tf_core.h\n+++ b/drivers/net/bnxt/tf_core/tf_core.h\n@@ -10,7 +10,7 @@\n #include <stdlib.h>\n #include <stdbool.h>\n #include <stdio.h>\n-\n+#include \"hcapi/hcapi_cfa.h\"\n #include \"tf_project.h\"\n \n /**\n@@ -54,6 +54,7 @@ enum tf_mem {\n #define TF_ACT_REC_OFFSET_2_PTR(offset) ((offset) >> 4)\n #define TF_ACT_REC_PTR_2_OFFSET(offset) ((offset) << 4)\n \n+\n /*\n  * Helper Macros\n  */\n@@ -132,34 +133,40 @@ struct tf_session_version {\n  */\n enum tf_device_type {\n \tTF_DEVICE_TYPE_WH = 0, /**< Whitney+  */\n-\tTF_DEVICE_TYPE_BRD2,   /**< TBD       */\n-\tTF_DEVICE_TYPE_BRD3,   /**< TBD       */\n-\tTF_DEVICE_TYPE_BRD4,   /**< TBD       */\n+\tTF_DEVICE_TYPE_SR,     /**< Stingray  */\n+\tTF_DEVICE_TYPE_THOR,   /**< Thor      */\n+\tTF_DEVICE_TYPE_SR2,    /**< Stingray2 */\n \tTF_DEVICE_TYPE_MAX     /**< Maximum   */\n };\n \n-/** Identifier resource types\n+/**\n+ * Identifier resource types\n  */\n enum tf_identifier_type {\n-\t/** The L2 Context is returned from the L2 Ctxt TCAM lookup\n+\t/**\n+\t *  The L2 Context is returned from the L2 Ctxt TCAM lookup\n \t *  and can be used in WC TCAM or EM keys to virtualize further\n \t *  lookups.\n \t */\n \tTF_IDENT_TYPE_L2_CTXT,\n-\t/** The WC profile func is returned from the L2 Ctxt TCAM lookup\n+\t/**\n+\t *  The WC profile func is returned from the L2 Ctxt TCAM lookup\n \t *  to enable virtualization of the profile TCAM.\n \t */\n \tTF_IDENT_TYPE_PROF_FUNC,\n-\t/** The WC profile ID is included in the WC lookup key\n+\t/**\n+\t *  The WC profile ID is included in the WC lookup key\n \t *  to enable virtualization of the WC TCAM hardware.\n \t */\n \tTF_IDENT_TYPE_WC_PROF,\n-\t/** The EM profile ID is included in the EM lookup key\n+\t/**\n+\t *  The EM profile ID is included in the EM lookup key\n \t *  to enable virtualization of the EM hardware. (not required for SR2\n \t *  as it has table scope)\n \t */\n \tTF_IDENT_TYPE_EM_PROF,\n-\t/** The L2 func is included in the ILT result and from recycling to\n+\t/**\n+\t *  The L2 func is included in the ILT result and from recycling to\n \t *  enable virtualization of further lookups.\n \t */\n \tTF_IDENT_TYPE_L2_FUNC,\n@@ -239,7 +246,8 @@ enum tf_tbl_type {\n \n \t/* External */\n \n-\t/** External table type - initially 1 poolsize entries.\n+\t/**\n+\t * External table type - initially 1 poolsize entries.\n \t * All External table types are associated with a table\n \t * scope. Internal types are not.\n \t */\n@@ -279,13 +287,17 @@ enum tf_em_tbl_type {\n \tTF_EM_TBL_TYPE_MAX\n };\n \n-/** TruFlow Session Information\n+/**\n+ * TruFlow Session Information\n  *\n  * Structure defining a TruFlow Session, also known as a Management\n  * session. This structure is initialized at time of\n  * tf_open_session(). It is passed to all of the TruFlow APIs as way\n  * to prescribe and isolate resources between different TruFlow ULP\n  * Applications.\n+ *\n+ * Ownership of the elements is split between ULP and TruFlow. Please\n+ * see the individual elements.\n  */\n struct tf_session_info {\n \t/**\n@@ -355,7 +367,8 @@ struct tf_session_info {\n \tuint32_t              core_data_sz_bytes;\n };\n \n-/** TruFlow handle\n+/**\n+ * TruFlow handle\n  *\n  * Contains a pointer to the session info. Allocated by ULP and passed\n  * to TruFlow using tf_open_session(). TruFlow will populate the\n@@ -405,7 +418,8 @@ struct tf_session_resources {\n  * tf_open_session parameters definition.\n  */\n struct tf_open_session_parms {\n-\t/** [in] ctrl_chan_name\n+\t/**\n+\t * [in] ctrl_chan_name\n \t *\n \t * String containing name of control channel interface to be\n \t * used for this session to communicate with firmware.\n@@ -417,7 +431,8 @@ struct tf_open_session_parms {\n \t * shared memory allocation.\n \t */\n \tchar ctrl_chan_name[TF_SESSION_NAME_MAX];\n-\t/** [in] shadow_copy\n+\t/**\n+\t * [in] shadow_copy\n \t *\n \t * Boolean controlling the use and availability of shadow\n \t * copy. Shadow copy will allow the TruFlow to keep track of\n@@ -430,7 +445,8 @@ struct tf_open_session_parms {\n \t * control channel.\n \t */\n \tbool shadow_copy;\n-\t/** [in/out] session_id\n+\t/**\n+\t * [in/out] session_id\n \t *\n \t * Session_id is unique per session.\n \t *\n@@ -441,7 +457,8 @@ struct tf_open_session_parms {\n \t * The session_id allows a session to be shared between devices.\n \t */\n \tunion tf_session_id session_id;\n-\t/** [in] device type\n+\t/**\n+\t * [in] device type\n \t *\n \t * Device type is passed, one of Wh+, SR, Thor, SR2\n \t */\n@@ -484,7 +501,8 @@ int tf_open_session_new(struct tf *tfp,\n \t\t\tstruct tf_open_session_parms *parms);\n \n struct tf_attach_session_parms {\n-\t/** [in] ctrl_chan_name\n+\t/**\n+\t * [in] ctrl_chan_name\n \t *\n \t * String containing name of control channel interface to be\n \t * used for this session to communicate with firmware.\n@@ -497,7 +515,8 @@ struct tf_attach_session_parms {\n \t */\n \tchar ctrl_chan_name[TF_SESSION_NAME_MAX];\n \n-\t/** [in] attach_chan_name\n+\t/**\n+\t * [in] attach_chan_name\n \t *\n \t * String containing name of attach channel interface to be\n \t * used for this session.\n@@ -510,7 +529,8 @@ struct tf_attach_session_parms {\n \t */\n \tchar attach_chan_name[TF_SESSION_NAME_MAX];\n \n-\t/** [in] session_id\n+\t/**\n+\t * [in] session_id\n \t *\n \t * Session_id is unique per session. For Attach the session_id\n \t * should be the session_id that was returned on the first\n@@ -565,7 +585,8 @@ int tf_close_session_new(struct tf *tfp);\n  *\n  * @ref tf_free_identifier\n  */\n-/** tf_alloc_identifier parameter definition\n+/**\n+ * tf_alloc_identifier parameter definition\n  */\n struct tf_alloc_identifier_parms {\n \t/**\n@@ -582,7 +603,8 @@ struct tf_alloc_identifier_parms {\n \tuint16_t id;\n };\n \n-/** tf_free_identifier parameter definition\n+/**\n+ * tf_free_identifier parameter definition\n  */\n struct tf_free_identifier_parms {\n \t/**\n@@ -599,7 +621,8 @@ struct tf_free_identifier_parms {\n \tuint16_t id;\n };\n \n-/** allocate identifier resource\n+/**\n+ * allocate identifier resource\n  *\n  * TruFlow core will allocate a free id from the per identifier resource type\n  * pool reserved for the session during tf_open().  No firmware is involved.\n@@ -611,7 +634,8 @@ int tf_alloc_identifier(struct tf *tfp,\n int tf_alloc_identifier_new(struct tf *tfp,\n \t\t\t    struct tf_alloc_identifier_parms *parms);\n \n-/** free identifier resource\n+/**\n+ * free identifier resource\n  *\n  * TruFlow core will return an id back to the per identifier resource type pool\n  * reserved for the session.  No firmware is involved.  During tf_close, the\n@@ -639,7 +663,8 @@ int tf_free_identifier_new(struct tf *tfp,\n  */\n \n \n-/** tf_alloc_tbl_scope_parms definition\n+/**\n+ * tf_alloc_tbl_scope_parms definition\n  */\n struct tf_alloc_tbl_scope_parms {\n \t/**\n@@ -662,7 +687,7 @@ struct tf_alloc_tbl_scope_parms {\n \t */\n \tuint32_t rx_num_flows_in_k;\n \t/**\n-\t * [in] Brd4 only receive table access interface id\n+\t * [in] SR2 only receive table access interface id\n \t */\n \tuint32_t rx_tbl_if_id;\n \t/**\n@@ -684,7 +709,7 @@ struct tf_alloc_tbl_scope_parms {\n \t */\n \tuint32_t tx_num_flows_in_k;\n \t/**\n-\t * [in] Brd4 only receive table access interface id\n+\t * [in] SR2 only receive table access interface id\n \t */\n \tuint32_t tx_tbl_if_id;\n \t/**\n@@ -709,7 +734,7 @@ struct tf_free_tbl_scope_parms {\n /**\n  * allocate a table scope\n  *\n- * On Brd4 Firmware will allocate a scope ID.  On other devices, the scope\n+ * On SR2 Firmware will allocate a scope ID.  On other devices, the scope\n  * is a software construct to identify an EEM table.  This function will\n  * divide the hash memory/buckets and records according to the device\n  * device constraints based upon calculations using either the number of flows\n@@ -719,7 +744,7 @@ struct tf_free_tbl_scope_parms {\n  *\n  * This API will allocate the table region in\n  * DRAM, program the PTU page table entries, and program the number of static\n- * buckets (if Brd4) in the RX and TX CFAs.  Buckets are assumed to start at\n+ * buckets (if SR2) in the RX and TX CFAs.  Buckets are assumed to start at\n  * 0 in the EM memory for the scope.  Upon successful completion of this API,\n  * hash tables are fully initialized and ready for entries to be inserted.\n  *\n@@ -750,7 +775,7 @@ int tf_alloc_tbl_scope(struct tf *tfp,\n  *\n  * Firmware checks that the table scope ID is owned by the TruFlow\n  * session, verifies that no references to this table scope remains\n- * (Brd4 ILT) or Profile TCAM entries for either CFA (RX/TX) direction,\n+ * (SR2 ILT) or Profile TCAM entries for either CFA (RX/TX) direction,\n  * then frees the table scope ID.\n  *\n  * Returns success or failure code.\n@@ -758,7 +783,6 @@ int tf_alloc_tbl_scope(struct tf *tfp,\n int tf_free_tbl_scope(struct tf *tfp,\n \t\t      struct tf_free_tbl_scope_parms *parms);\n \n-\n /**\n  * @page tcam TCAM Access\n  *\n@@ -771,7 +795,9 @@ int tf_free_tbl_scope(struct tf *tfp,\n  * @ref tf_free_tcam_entry\n  */\n \n-/** tf_alloc_tcam_entry parameter definition\n+\n+/**\n+ * tf_alloc_tcam_entry parameter definition\n  */\n struct tf_alloc_tcam_entry_parms {\n \t/**\n@@ -799,9 +825,7 @@ struct tf_alloc_tcam_entry_parms {\n \t */\n \tuint8_t *mask;\n \t/**\n-\t * [in] Priority of entry requested\n-\t * 0: index from top i.e. highest priority first\n-\t * !0: index from bottom i.e lowest priority first\n+\t * [in] Priority of entry requested (definition TBD)\n \t */\n \tuint32_t priority;\n \t/**\n@@ -819,7 +843,8 @@ struct tf_alloc_tcam_entry_parms {\n \tuint16_t idx;\n };\n \n-/** allocate TCAM entry\n+/**\n+ * allocate TCAM entry\n  *\n  * Allocate a TCAM entry - one of these types:\n  *\n@@ -844,7 +869,8 @@ struct tf_alloc_tcam_entry_parms {\n int tf_alloc_tcam_entry(struct tf *tfp,\n \t\t\tstruct tf_alloc_tcam_entry_parms *parms);\n \n-/** tf_set_tcam_entry parameter definition\n+/**\n+ * tf_set_tcam_entry parameter definition\n  */\n struct\ttf_set_tcam_entry_parms {\n \t/**\n@@ -881,7 +907,8 @@ struct\ttf_set_tcam_entry_parms {\n \tuint16_t result_sz_in_bits;\n };\n \n-/** set TCAM entry\n+/**\n+ * set TCAM entry\n  *\n  * Program a TCAM table entry for a TruFlow session.\n  *\n@@ -892,7 +919,8 @@ struct\ttf_set_tcam_entry_parms {\n int tf_set_tcam_entry(struct tf\t*tfp,\n \t\t      struct tf_set_tcam_entry_parms *parms);\n \n-/** tf_get_tcam_entry parameter definition\n+/**\n+ * tf_get_tcam_entry parameter definition\n  */\n struct tf_get_tcam_entry_parms {\n \t/**\n@@ -929,7 +957,7 @@ struct tf_get_tcam_entry_parms {\n \tuint16_t result_sz_in_bits;\n };\n \n-/*\n+/**\n  * get TCAM entry\n  *\n  * Program a TCAM table entry for a TruFlow session.\n@@ -941,7 +969,7 @@ struct tf_get_tcam_entry_parms {\n int tf_get_tcam_entry(struct tf *tfp,\n \t\t      struct tf_get_tcam_entry_parms *parms);\n \n-/*\n+/**\n  * tf_free_tcam_entry parameter definition\n  */\n struct tf_free_tcam_entry_parms {\n@@ -963,7 +991,9 @@ struct tf_free_tcam_entry_parms {\n \tuint16_t ref_cnt;\n };\n \n-/*\n+/**\n+ * free TCAM entry\n+ *\n  * Free TCAM entry.\n  *\n  * Firmware checks to ensure the TCAM entries are owned by the TruFlow\n@@ -989,6 +1019,7 @@ int tf_free_tcam_entry(struct tf *tfp,\n  * @ref tf_get_tbl_entry\n  */\n \n+\n /**\n  * tf_alloc_tbl_entry parameter definition\n  */\n@@ -1201,9 +1232,9 @@ int tf_get_tbl_entry(struct tf *tfp,\n \t\t     struct tf_get_tbl_entry_parms *parms);\n \n /**\n- * tf_get_bulk_tbl_entry parameter definition\n+ * tf_bulk_get_tbl_entry parameter definition\n  */\n-struct tf_get_bulk_tbl_entry_parms {\n+struct tf_bulk_get_tbl_entry_parms {\n \t/**\n \t * [in] Receive or transmit direction\n \t */\n@@ -1212,11 +1243,6 @@ struct tf_get_bulk_tbl_entry_parms {\n \t * [in] Type of object to get\n \t */\n \tenum tf_tbl_type type;\n-\t/**\n-\t * [in] Clear hardware entries on reads only\n-\t * supported for TF_TBL_TYPE_ACT_STATS_64\n-\t */\n-\tbool clear_on_read;\n \t/**\n \t * [in] Starting index to read from\n \t */\n@@ -1250,8 +1276,8 @@ struct tf_get_bulk_tbl_entry_parms {\n  * Returns success or failure code. Failure will be returned if the\n  * provided data buffer is too small for the data type requested.\n  */\n-int tf_get_bulk_tbl_entry(struct tf *tfp,\n-\t\t     struct tf_get_bulk_tbl_entry_parms *parms);\n+int tf_bulk_get_tbl_entry(struct tf *tfp,\n+\t\t     struct tf_bulk_get_tbl_entry_parms *parms);\n \n /**\n  * @page exact_match Exact Match Table\n@@ -1280,7 +1306,7 @@ struct tf_insert_em_entry_parms {\n \t */\n \tuint32_t tbl_scope_id;\n \t/**\n-\t * [in] ID of table interface to use (Brd4 only)\n+\t * [in] ID of table interface to use (SR2 only)\n \t */\n \tuint32_t tbl_if_id;\n \t/**\n@@ -1332,12 +1358,12 @@ struct tf_delete_em_entry_parms {\n \t */\n \tuint32_t tbl_scope_id;\n \t/**\n-\t * [in] ID of table interface to use (Brd4 only)\n+\t * [in] ID of table interface to use (SR2 only)\n \t */\n \tuint32_t tbl_if_id;\n \t/**\n \t * [in] epoch group IDs of entry to delete\n-\t * 2 element array with 2 ids. (Brd4 only)\n+\t * 2 element array with 2 ids. (SR2 only)\n \t */\n \tuint16_t *epochs;\n \t/**\n@@ -1366,7 +1392,7 @@ struct tf_search_em_entry_parms {\n \t */\n \tuint32_t tbl_scope_id;\n \t/**\n-\t * [in] ID of table interface to use (Brd4 only)\n+\t * [in] ID of table interface to use (SR2 only)\n \t */\n \tuint32_t tbl_if_id;\n \t/**\n@@ -1387,7 +1413,7 @@ struct tf_search_em_entry_parms {\n \tuint16_t em_record_sz_in_bits;\n \t/**\n \t * [in] epoch group IDs of entry to lookup\n-\t * 2 element array with 2 ids. (Brd4 only)\n+\t * 2 element array with 2 ids. (SR2 only)\n \t */\n \tuint16_t *epochs;\n \t/**\n@@ -1415,7 +1441,7 @@ struct tf_search_em_entry_parms {\n  * specified direction and table scope.\n  *\n  * When inserting an entry into an exact match table, the TruFlow library may\n- * need to allocate a dynamic bucket for the entry (Brd4 only).\n+ * need to allocate a dynamic bucket for the entry (SR2 only).\n  *\n  * The insertion of duplicate entries in an EM table is not permitted.\tIf a\n  * TruFlow application can guarantee that it will never insert duplicates, it\n@@ -1490,4 +1516,5 @@ int tf_delete_em_entry(struct tf *tfp,\n  */\n int tf_search_em_entry(struct tf *tfp,\n \t\t       struct tf_search_em_entry_parms *parms);\n+\n #endif /* _TF_CORE_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_device.h b/drivers/net/bnxt/tf_core/tf_device.h\nindex 6aeb6fedb..1501b20d9 100644\n--- a/drivers/net/bnxt/tf_core/tf_device.h\n+++ b/drivers/net/bnxt/tf_core/tf_device.h\n@@ -366,6 +366,38 @@ struct tf_dev_ops {\n \t */\n \tint (*tf_dev_get_tcam)(struct tf *tfp,\n \t\t\t       struct tf_tcam_get_parms *parms);\n+\n+\t/**\n+\t * Insert EM hash entry API\n+\t *\n+\t * [in] tfp\n+\t *   Pointer to TF handle\n+\t *\n+\t * [in] parms\n+\t *   Pointer to E/EM insert parameters\n+\t *\n+\t *  Returns:\n+\t *    0       - Success\n+\t *    -EINVAL - Error\n+\t */\n+\tint (*tf_dev_insert_em_entry)(struct tf *tfp,\n+\t\t\t\t      struct tf_insert_em_entry_parms *parms);\n+\n+\t/**\n+\t * Delete EM hash entry API\n+\t *\n+\t * [in] tfp\n+\t *   Pointer to TF handle\n+\t *\n+\t * [in] parms\n+\t *   Pointer to E/EM delete parameters\n+\t *\n+\t *    returns:\n+\t *    0       - Success\n+\t *    -EINVAL - Error\n+\t */\n+\tint (*tf_dev_delete_em_entry)(struct tf *tfp,\n+\t\t\t\t      struct tf_delete_em_entry_parms *parms);\n };\n \n /**\ndiff --git a/drivers/net/bnxt/tf_core/tf_device_p4.c b/drivers/net/bnxt/tf_core/tf_device_p4.c\nindex c235976fe..f4bd95f1c 100644\n--- a/drivers/net/bnxt/tf_core/tf_device_p4.c\n+++ b/drivers/net/bnxt/tf_core/tf_device_p4.c\n@@ -10,6 +10,7 @@\n #include \"tf_identifier.h\"\n #include \"tf_tbl_type.h\"\n #include \"tf_tcam.h\"\n+#include \"tf_em.h\"\n \n /**\n  * Device specific function that retrieves the MAX number of HCAPI\n@@ -89,4 +90,6 @@ const struct tf_dev_ops tf_dev_ops_p4 = {\n \t.tf_dev_alloc_search_tcam = tf_tcam_alloc_search,\n \t.tf_dev_set_tcam = tf_tcam_set,\n \t.tf_dev_get_tcam = tf_tcam_get,\n+\t.tf_dev_insert_em_entry = tf_em_insert_entry,\n+\t.tf_dev_delete_em_entry = tf_em_delete_entry,\n };\ndiff --git a/drivers/net/bnxt/tf_core/tf_em.c b/drivers/net/bnxt/tf_core/tf_em.c\nindex 38f7fe419..fcbbd7eca 100644\n--- a/drivers/net/bnxt/tf_core/tf_em.c\n+++ b/drivers/net/bnxt/tf_core/tf_em.c\n@@ -17,11 +17,6 @@\n \n #include \"bnxt.h\"\n \n-/* Enable EEM table dump\n- */\n-#define TF_EEM_DUMP\n-\n-static struct tf_eem_64b_entry zero_key_entry;\n \n static uint32_t tf_em_get_key_mask(int num_entries)\n {\n@@ -36,326 +31,22 @@ static uint32_t tf_em_get_key_mask(int num_entries)\n \treturn mask;\n }\n \n-/* CRC32i support for Key0 hash */\n-#define ucrc32(ch, crc) (crc32tbl[((crc) ^ (ch)) & 0xff] ^ ((crc) >> 8))\n-#define crc32(x, y) crc32i(~0, x, y)\n-\n-static const uint32_t crc32tbl[] = {\t/* CRC polynomial 0xedb88320 */\n-0x00000000, 0x77073096, 0xee0e612c, 0x990951ba,\n-0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3,\n-0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988,\n-0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91,\n-0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de,\n-0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7,\n-0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec,\n-0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5,\n-0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172,\n-0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b,\n-0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940,\n-0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59,\n-0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116,\n-0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f,\n-0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924,\n-0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d,\n-0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a,\n-0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433,\n-0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818,\n-0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01,\n-0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e,\n-0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457,\n-0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c,\n-0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65,\n-0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2,\n-0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb,\n-0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0,\n-0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9,\n-0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086,\n-0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f,\n-0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4,\n-0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad,\n-0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a,\n-0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683,\n-0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8,\n-0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1,\n-0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe,\n-0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7,\n-0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc,\n-0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5,\n-0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252,\n-0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b,\n-0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60,\n-0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79,\n-0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236,\n-0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f,\n-0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04,\n-0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d,\n-0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a,\n-0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713,\n-0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38,\n-0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21,\n-0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e,\n-0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777,\n-0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c,\n-0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45,\n-0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2,\n-0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db,\n-0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0,\n-0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9,\n-0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6,\n-0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf,\n-0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94,\n-0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d\n-};\n-\n-static uint32_t crc32i(uint32_t crc, const uint8_t *buf, size_t len)\n-{\n-\tint l;\n-\n-\tfor (l = (len - 1); l >= 0; l--)\n-\t\tcrc = ucrc32(buf[l], crc);\n-\n-\treturn ~crc;\n-}\n-\n-static uint32_t tf_em_lkup_get_crc32_hash(struct tf_session *session,\n-\t\t\t\t\t  uint8_t *key,\n-\t\t\t\t\t  enum tf_dir dir)\n-{\n-\tint i;\n-\tuint32_t index;\n-\tuint32_t val1, val2;\n-\tuint8_t temp[4];\n-\tuint8_t *kptr = key;\n-\n-\t/* Do byte-wise XOR of the 52-byte HASH key first. */\n-\tindex = *key;\n-\tkptr--;\n-\n-\tfor (i = TF_HW_EM_KEY_MAX_SIZE - 2; i >= 0; i--) {\n-\t\tindex = index ^ *kptr;\n-\t\tkptr--;\n-\t}\n-\n-\t/* Get seeds */\n-\tval1 = session->lkup_em_seed_mem[dir][index * 2];\n-\tval2 = session->lkup_em_seed_mem[dir][index * 2 + 1];\n-\n-\ttemp[3] = (uint8_t)(val1 >> 24);\n-\ttemp[2] = (uint8_t)(val1 >> 16);\n-\ttemp[1] = (uint8_t)(val1 >> 8);\n-\ttemp[0] = (uint8_t)(val1 & 0xff);\n-\tval1 = 0;\n-\n-\t/* Start with seed */\n-\tif (!(val2 & 0x1))\n-\t\tval1 = crc32i(~val1, temp, 4);\n-\n-\tval1 = crc32i(~val1,\n-\t\t      (key - (TF_HW_EM_KEY_MAX_SIZE - 1)),\n-\t\t      TF_HW_EM_KEY_MAX_SIZE);\n-\n-\t/* End with seed */\n-\tif (val2 & 0x1)\n-\t\tval1 = crc32i(~val1, temp, 4);\n-\n-\treturn val1;\n-}\n-\n-static uint32_t tf_em_lkup_get_lookup3_hash(uint32_t lookup3_init_value,\n-\t\t\t\t\t    uint8_t *in_key)\n-{\n-\tuint32_t val1;\n-\n-\tval1 = hashword(((uint32_t *)in_key) + 1,\n-\t\t\t TF_HW_EM_KEY_MAX_SIZE / (sizeof(uint32_t)),\n-\t\t\t lookup3_init_value);\n-\n-\treturn val1;\n-}\n-\n-void *tf_em_get_table_page(struct tf_tbl_scope_cb *tbl_scope_cb,\n-\t\t\t   enum tf_dir dir,\n-\t\t\t   uint32_t offset,\n-\t\t\t   enum tf_em_table_type table_type)\n-{\n-\tint level = 0;\n-\tint page = offset / TF_EM_PAGE_SIZE;\n-\tvoid *addr = NULL;\n-\tstruct tf_em_ctx_mem_info *ctx = &tbl_scope_cb->em_ctx_info[dir];\n-\n-\tif (ctx == NULL)\n-\t\treturn NULL;\n-\n-\tif (dir != TF_DIR_RX && dir != TF_DIR_TX)\n-\t\treturn NULL;\n-\n-\tif (table_type < TF_KEY0_TABLE || table_type > TF_EFC_TABLE)\n-\t\treturn NULL;\n-\n-\t/*\n-\t * Use the level according to the num_level of page table\n-\t */\n-\tlevel = ctx->em_tables[table_type].num_lvl - 1;\n-\n-\taddr = (void *)ctx->em_tables[table_type].pg_tbl[level].pg_va_tbl[page];\n-\n-\treturn addr;\n-}\n-\n-/** Read Key table entry\n- *\n- * Entry is read in to entry\n- */\n-static int tf_em_read_entry(struct tf_tbl_scope_cb *tbl_scope_cb,\n-\t\t\t\t struct tf_eem_64b_entry *entry,\n-\t\t\t\t uint32_t entry_size,\n-\t\t\t\t uint32_t index,\n-\t\t\t\t enum tf_em_table_type table_type,\n-\t\t\t\t enum tf_dir dir)\n-{\n-\tvoid *page;\n-\tuint32_t entry_offset = (index * entry_size) % TF_EM_PAGE_SIZE;\n-\n-\tpage = tf_em_get_table_page(tbl_scope_cb,\n-\t\t\t\t    dir,\n-\t\t\t\t    (index * entry_size),\n-\t\t\t\t    table_type);\n-\n-\tif (page == NULL)\n-\t\treturn -EINVAL;\n-\n-\tmemcpy((uint8_t *)entry, (uint8_t *)page + entry_offset, entry_size);\n-\treturn 0;\n-}\n-\n-static int tf_em_write_entry(struct tf_tbl_scope_cb *tbl_scope_cb,\n-\t\t\t\t struct tf_eem_64b_entry *entry,\n-\t\t\t\t uint32_t entry_size,\n-\t\t\t\t uint32_t index,\n-\t\t\t\t enum tf_em_table_type table_type,\n-\t\t\t\t enum tf_dir dir)\n-{\n-\tvoid *page;\n-\tuint32_t entry_offset = (index * entry_size) % TF_EM_PAGE_SIZE;\n-\n-\tpage = tf_em_get_table_page(tbl_scope_cb,\n-\t\t\t\t    dir,\n-\t\t\t\t    (index * entry_size),\n-\t\t\t\t    table_type);\n-\n-\tif (page == NULL)\n-\t\treturn -EINVAL;\n-\n-\tmemcpy((uint8_t *)page + entry_offset, entry, entry_size);\n-\n-\treturn 0;\n-}\n-\n-static int tf_em_entry_exists(struct tf_tbl_scope_cb *tbl_scope_cb,\n-\t\t\t       struct tf_eem_64b_entry *entry,\n-\t\t\t       uint32_t index,\n-\t\t\t       enum tf_em_table_type table_type,\n-\t\t\t       enum tf_dir dir)\n-{\n-\tint rc;\n-\tstruct tf_eem_64b_entry table_entry;\n-\n-\trc = tf_em_read_entry(tbl_scope_cb,\n-\t\t\t      &table_entry,\n-\t\t\t      TF_EM_KEY_RECORD_SIZE,\n-\t\t\t      index,\n-\t\t\t      table_type,\n-\t\t\t      dir);\n-\n-\tif (rc != 0)\n-\t\treturn -EINVAL;\n-\n-\tif (table_entry.hdr.word1 & (1 << TF_LKUP_RECORD_VALID_SHIFT)) {\n-\t\tif (entry != NULL) {\n-\t\t\tif (memcmp(&table_entry,\n-\t\t\t\t   entry,\n-\t\t\t\t   TF_EM_KEY_RECORD_SIZE) == 0)\n-\t\t\t\treturn -EEXIST;\n-\t\t} else {\n-\t\t\treturn -EEXIST;\n-\t\t}\n-\n-\t\treturn -EBUSY;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-static void tf_em_create_key_entry(struct tf_eem_entry_hdr *result,\n-\t\t\t\t    uint8_t *in_key,\n-\t\t\t\t    struct tf_eem_64b_entry *key_entry)\n+static void tf_em_create_key_entry(struct cfa_p4_eem_entry_hdr *result,\n+\t\t\t\t   uint8_t\t       *in_key,\n+\t\t\t\t   struct cfa_p4_eem_64b_entry *key_entry)\n {\n \tkey_entry->hdr.word1 = result->word1;\n \n-\tif (result->word1 & TF_LKUP_RECORD_ACT_REC_INT_MASK)\n+\tif (result->word1 & CFA_P4_EEM_ENTRY_ACT_REC_INT_MASK)\n \t\tkey_entry->hdr.pointer = result->pointer;\n \telse\n \t\tkey_entry->hdr.pointer = result->pointer;\n \n \tmemcpy(key_entry->key, in_key, TF_HW_EM_KEY_MAX_SIZE + 4);\n-}\n-\n-/* tf_em_select_inject_table\n- *\n- * Returns:\n- * 0 - Key does not exist in either table and can be inserted\n- *\t\tat \"index\" in table \"table\".\n- * EEXIST  - Key does exist in table at \"index\" in table \"table\".\n- * TF_ERR     - Something went horribly wrong.\n- */\n-static int tf_em_select_inject_table(struct tf_tbl_scope_cb *tbl_scope_cb,\n-\t\t\t\t\t  enum tf_dir dir,\n-\t\t\t\t\t  struct tf_eem_64b_entry *entry,\n-\t\t\t\t\t  uint32_t key0_hash,\n-\t\t\t\t\t  uint32_t key1_hash,\n-\t\t\t\t\t  uint32_t *index,\n-\t\t\t\t\t  enum tf_em_table_type *table)\n-{\n-\tint key0_entry;\n-\tint key1_entry;\n-\n-\t/*\n-\t * Check KEY0 table.\n-\t */\n-\tkey0_entry = tf_em_entry_exists(tbl_scope_cb,\n-\t\t\t\t\t entry,\n-\t\t\t\t\t key0_hash,\n-\t\t\t\t\t TF_KEY0_TABLE,\n-\t\t\t\t\t dir);\n \n-\t/*\n-\t * Check KEY1 table.\n-\t */\n-\tkey1_entry = tf_em_entry_exists(tbl_scope_cb,\n-\t\t\t\t\t entry,\n-\t\t\t\t\t key1_hash,\n-\t\t\t\t\t TF_KEY1_TABLE,\n-\t\t\t\t\t dir);\n-\n-\tif (key0_entry == -EEXIST) {\n-\t\t*table = TF_KEY0_TABLE;\n-\t\t*index = key0_hash;\n-\t\treturn -EEXIST;\n-\t} else if (key1_entry == -EEXIST) {\n-\t\t*table = TF_KEY1_TABLE;\n-\t\t*index = key1_hash;\n-\t\treturn -EEXIST;\n-\t} else if (key0_entry == 0) {\n-\t\t*table = TF_KEY0_TABLE;\n-\t\t*index = key0_hash;\n-\t\treturn 0;\n-\t} else if (key1_entry == 0) {\n-\t\t*table = TF_KEY1_TABLE;\n-\t\t*index = key1_hash;\n-\t\treturn 0;\n-\t}\n-\n-\treturn -EINVAL;\n+#ifdef TF_EEM_DEBUG\n+\tdump_raw((uint8_t *)key_entry, TF_EM_KEY_RECORD_SIZE, \"Create raw:\");\n+#endif\n }\n \n /** insert EEM entry API\n@@ -368,20 +59,24 @@ static int tf_em_select_inject_table(struct tf_tbl_scope_cb *tbl_scope_cb,\n  *   0\n  *   TF_ERR_EM_DUP  - key is already in table\n  */\n-int tf_insert_eem_entry(struct tf_session *session,\n-\t\t\tstruct tf_tbl_scope_cb *tbl_scope_cb,\n-\t\t\tstruct tf_insert_em_entry_parms *parms)\n+static int tf_insert_eem_entry(struct tf_tbl_scope_cb\t   *tbl_scope_cb,\n+\t\t\t       struct tf_insert_em_entry_parms *parms)\n {\n \tuint32_t\t   mask;\n \tuint32_t\t   key0_hash;\n \tuint32_t\t   key1_hash;\n \tuint32_t\t   key0_index;\n \tuint32_t\t   key1_index;\n-\tstruct tf_eem_64b_entry key_entry;\n+\tstruct cfa_p4_eem_64b_entry key_entry;\n \tuint32_t\t   index;\n-\tenum tf_em_table_type table_type;\n+\tenum hcapi_cfa_em_table_type table_type;\n \tuint32_t\t   gfid;\n-\tint\t\t   num_of_entry;\n+\tstruct hcapi_cfa_hwop op;\n+\tstruct hcapi_cfa_key_tbl key_tbl;\n+\tstruct hcapi_cfa_key_data key_obj;\n+\tstruct hcapi_cfa_key_loc key_loc;\n+\tuint64_t big_hash;\n+\tint rc;\n \n \t/* Get mask to use on hash */\n \tmask = tf_em_get_key_mask(tbl_scope_cb->em_ctx_info[parms->dir].em_tables[TF_KEY0_TABLE].num_entries);\n@@ -389,72 +84,84 @@ int tf_insert_eem_entry(struct tf_session *session,\n \tif (!mask)\n \t\treturn -EINVAL;\n \n-\tnum_of_entry = TF_HW_EM_KEY_MAX_SIZE + 4;\n+#ifdef TF_EEM_DEBUG\n+\tdump_raw((uint8_t *)parms->key, TF_HW_EM_KEY_MAX_SIZE + 4, \"In Key\");\n+#endif\n \n-\tkey0_hash = tf_em_lkup_get_crc32_hash(session,\n-\t\t\t\t\t      &parms->key[num_of_entry] - 1,\n-\t\t\t\t\t      parms->dir);\n-\tkey0_index = key0_hash & mask;\n+\tbig_hash = hcapi_cfa_key_hash((uint64_t *)parms->key,\n+\t\t\t\t      (TF_HW_EM_KEY_MAX_SIZE + 4) * 8);\n+\tkey0_hash = (uint32_t)(big_hash >> 32);\n+\tkey1_hash = (uint32_t)(big_hash & 0xFFFFFFFF);\n \n-\tkey1_hash =\n-\t   tf_em_lkup_get_lookup3_hash(session->lkup_lkup3_init_cfg[parms->dir],\n-\t\t\t\t       parms->key);\n+\tkey0_index = key0_hash & mask;\n \tkey1_index = key1_hash & mask;\n \n+#ifdef TF_EEM_DEBUG\n+\tTFP_DRV_LOG(DEBUG, \"Key0 hash:0x%08x\\n\", key0_hash);\n+\tTFP_DRV_LOG(DEBUG, \"Key1 hash:0x%08x\\n\", key1_hash);\n+#endif\n \t/*\n \t * Use the \"result\" arg to populate all of the key entry then\n \t * store the byte swapped \"raw\" entry in a local copy ready\n \t * for insertion in to the table.\n \t */\n-\ttf_em_create_key_entry((struct tf_eem_entry_hdr *)parms->em_record,\n+\ttf_em_create_key_entry((struct cfa_p4_eem_entry_hdr *)parms->em_record,\n \t\t\t\t((uint8_t *)parms->key),\n \t\t\t\t&key_entry);\n \n \t/*\n-\t * Find which table to use\n+\t * Try to add to Key0 table, if that does not work then\n+\t * try the key1 table.\n \t */\n-\tif (tf_em_select_inject_table(tbl_scope_cb,\n-\t\t\t\t      parms->dir,\n-\t\t\t\t      &key_entry,\n-\t\t\t\t      key0_index,\n-\t\t\t\t      key1_index,\n-\t\t\t\t      &index,\n-\t\t\t\t      &table_type) == 0) {\n-\t\tif (table_type == TF_KEY0_TABLE) {\n-\t\t\tTF_SET_GFID(gfid,\n-\t\t\t\t    key0_index,\n-\t\t\t\t    TF_KEY0_TABLE);\n-\t\t} else {\n-\t\t\tTF_SET_GFID(gfid,\n-\t\t\t\t    key1_index,\n-\t\t\t\t    TF_KEY1_TABLE);\n-\t\t}\n-\n-\t\t/*\n-\t\t * Inject\n-\t\t */\n-\t\tif (tf_em_write_entry(tbl_scope_cb,\n-\t\t\t\t      &key_entry,\n-\t\t\t\t      TF_EM_KEY_RECORD_SIZE,\n-\t\t\t\t      index,\n-\t\t\t\t      table_type,\n-\t\t\t\t      parms->dir) == 0) {\n-\t\t\tTF_SET_FLOW_ID(parms->flow_id,\n-\t\t\t\t       gfid,\n-\t\t\t\t       TF_GFID_TABLE_EXTERNAL,\n-\t\t\t\t       parms->dir);\n-\t\t\tTF_SET_FIELDS_IN_FLOW_HANDLE(parms->flow_handle,\n-\t\t\t\t\t\t     0,\n-\t\t\t\t\t\t     0,\n-\t\t\t\t\t\t     0,\n-\t\t\t\t\t\t     index,\n-\t\t\t\t\t\t     0,\n-\t\t\t\t\t\t     table_type);\n-\t\t\treturn 0;\n-\t\t}\n+\tindex = key0_index;\n+\top.opcode = HCAPI_CFA_HWOPS_ADD;\n+\tkey_tbl.base0 = (uint8_t *)\n+\t&tbl_scope_cb->em_ctx_info[parms->dir].em_tables[TF_KEY0_TABLE];\n+\tkey_obj.offset = (index * TF_EM_KEY_RECORD_SIZE) % TF_EM_PAGE_SIZE;\n+\tkey_obj.data = (uint8_t *)&key_entry;\n+\tkey_obj.size = TF_EM_KEY_RECORD_SIZE;\n+\n+\trc = hcapi_cfa_key_hw_op(&op,\n+\t\t\t\t &key_tbl,\n+\t\t\t\t &key_obj,\n+\t\t\t\t &key_loc);\n+\n+\tif (rc == 0) {\n+\t\ttable_type = TF_KEY0_TABLE;\n+\t} else {\n+\t\tindex = key1_index;\n+\n+\t\tkey_tbl.base0 = (uint8_t *)\n+\t\t&tbl_scope_cb->em_ctx_info[parms->dir].em_tables[TF_KEY1_TABLE];\n+\t\tkey_obj.offset =\n+\t\t\t(index * TF_EM_KEY_RECORD_SIZE) % TF_EM_PAGE_SIZE;\n+\n+\t\trc = hcapi_cfa_key_hw_op(&op,\n+\t\t\t\t\t &key_tbl,\n+\t\t\t\t\t &key_obj,\n+\t\t\t\t\t &key_loc);\n+\t\tif (rc != 0)\n+\t\t\treturn rc;\n+\n+\t\ttable_type = TF_KEY1_TABLE;\n \t}\n \n-\treturn -EINVAL;\n+\tTF_SET_GFID(gfid,\n+\t\t    index,\n+\t\t    table_type);\n+\tTF_SET_FLOW_ID(parms->flow_id,\n+\t\t       gfid,\n+\t\t       TF_GFID_TABLE_EXTERNAL,\n+\t\t       parms->dir);\n+\tTF_SET_FIELDS_IN_FLOW_HANDLE(parms->flow_handle,\n+\t\t\t\t     0,\n+\t\t\t\t     0,\n+\t\t\t\t     0,\n+\t\t\t\t     index,\n+\t\t\t\t     0,\n+\t\t\t\t     table_type);\n+\n+\treturn 0;\n }\n \n /**\n@@ -463,8 +170,8 @@ int tf_insert_eem_entry(struct tf_session *session,\n  *  returns:\n  *     0 - Success\n  */\n-int tf_insert_em_internal_entry(struct tf *tfp,\n-\t\t\t\tstruct tf_insert_em_entry_parms *parms)\n+static int tf_insert_em_internal_entry(struct tf                       *tfp,\n+\t\t\t\t       struct tf_insert_em_entry_parms *parms)\n {\n \tint       rc;\n \tuint32_t  gfid;\n@@ -494,7 +201,7 @@ int tf_insert_em_internal_entry(struct tf *tfp,\n \tif (rc != 0)\n \t\treturn -1;\n \n-\tTFP_DRV_LOG(INFO,\n+\tPMD_DRV_LOG(ERR,\n \t\t   \"Internal entry @ Index:%d rptr_index:0x%x rptr_entry:0x%x num_of_entries:%d\\n\",\n \t\t   index * TF_SESSION_EM_ENTRY_SIZE,\n \t\t   rptr_index,\n@@ -527,8 +234,8 @@ int tf_insert_em_internal_entry(struct tf *tfp,\n  * 0\n  * -EINVAL\n  */\n-int tf_delete_em_internal_entry(struct tf *tfp,\n-\t\t\t\tstruct tf_delete_em_entry_parms *parms)\n+static int tf_delete_em_internal_entry(struct tf                       *tfp,\n+\t\t\t\t       struct tf_delete_em_entry_parms *parms)\n {\n \tint rc;\n \tstruct tf_session *session =\n@@ -558,46 +265,96 @@ int tf_delete_em_internal_entry(struct tf *tfp,\n  *   0\n  *   TF_NO_EM_MATCH - entry not found\n  */\n-int tf_delete_eem_entry(struct tf *tfp,\n-\t\t\tstruct tf_delete_em_entry_parms *parms)\n+static int tf_delete_eem_entry(struct tf_tbl_scope_cb *tbl_scope_cb,\n+\t\t\t       struct tf_delete_em_entry_parms *parms)\n {\n-\tstruct tf_session\t   *session;\n-\tstruct tf_tbl_scope_cb\t   *tbl_scope_cb;\n-\tenum tf_em_table_type hash_type;\n+\tenum hcapi_cfa_em_table_type hash_type;\n \tuint32_t index;\n+\tstruct hcapi_cfa_hwop op;\n+\tstruct hcapi_cfa_key_tbl key_tbl;\n+\tstruct hcapi_cfa_key_data key_obj;\n+\tstruct hcapi_cfa_key_loc key_loc;\n+\tint rc;\n \n-\tif (parms == NULL)\n+\tif (parms->flow_handle == 0)\n \t\treturn -EINVAL;\n \n-\tsession = (struct tf_session *)tfp->session->core_data;\n-\tif (session == NULL)\n-\t\treturn -EINVAL;\n+\tTF_GET_HASH_TYPE_FROM_FLOW_HANDLE(parms->flow_handle, hash_type);\n+\tTF_GET_INDEX_FROM_FLOW_HANDLE(parms->flow_handle, index);\n \n-\ttbl_scope_cb = tbl_scope_cb_find(session,\n-\t\t\t\t\t parms->tbl_scope_id);\n-\tif (tbl_scope_cb == NULL)\n-\t\treturn -EINVAL;\n+\top.opcode = HCAPI_CFA_HWOPS_DEL;\n+\tkey_tbl.base0 = (uint8_t *)\n+\t&tbl_scope_cb->em_ctx_info[parms->dir].em_tables[(hash_type == 0 ?\n+\t\t\t\t\t\t\t  TF_KEY0_TABLE :\n+\t\t\t\t\t\t\t  TF_KEY1_TABLE)];\n+\tkey_obj.offset = (index * TF_EM_KEY_RECORD_SIZE) % TF_EM_PAGE_SIZE;\n+\tkey_obj.data = NULL;\n+\tkey_obj.size = TF_EM_KEY_RECORD_SIZE;\n+\n+\trc = hcapi_cfa_key_hw_op(&op,\n+\t\t\t\t &key_tbl,\n+\t\t\t\t &key_obj,\n+\t\t\t\t &key_loc);\n+\n+\tif (!rc)\n+\t\treturn rc;\n \n-\tif (parms->flow_handle == 0)\n+\treturn 0;\n+}\n+\n+/** insert EM hash entry API\n+ *\n+ *    returns:\n+ *    0       - Success\n+ *    -EINVAL - Error\n+ */\n+int tf_em_insert_entry(struct tf *tfp,\n+\t\t       struct tf_insert_em_entry_parms *parms)\n+{\n+\tstruct tf_tbl_scope_cb *tbl_scope_cb;\n+\n+\ttbl_scope_cb = tbl_scope_cb_find\n+\t\t((struct tf_session *)(tfp->session->core_data),\n+\t\tparms->tbl_scope_id);\n+\tif (tbl_scope_cb == NULL) {\n+\t\tTFP_DRV_LOG(ERR, \"Invalid tbl_scope_cb\\n\");\n \t\treturn -EINVAL;\n+\t}\n \n-\tTF_GET_HASH_TYPE_FROM_FLOW_HANDLE(parms->flow_handle, hash_type);\n-\tTF_GET_INDEX_FROM_FLOW_HANDLE(parms->flow_handle, index);\n+\t/* Process the EM entry per Table Scope type */\n+\tif (parms->mem == TF_MEM_EXTERNAL)\n+\t\t/* External EEM */\n+\t\treturn tf_insert_eem_entry\n+\t\t\t(tbl_scope_cb, parms);\n+\telse if (parms->mem == TF_MEM_INTERNAL)\n+\t\t/* Internal EM */\n+\t\treturn tf_insert_em_internal_entry(tfp,\tparms);\n \n-\tif (tf_em_entry_exists(tbl_scope_cb,\n-\t\t\t       NULL,\n-\t\t\t       index,\n-\t\t\t       hash_type,\n-\t\t\t       parms->dir) == -EEXIST) {\n-\t\ttf_em_write_entry(tbl_scope_cb,\n-\t\t\t\t  &zero_key_entry,\n-\t\t\t\t  TF_EM_KEY_RECORD_SIZE,\n-\t\t\t\t  index,\n-\t\t\t\t  hash_type,\n-\t\t\t\t  parms->dir);\n+\treturn -EINVAL;\n+}\n \n-\t\treturn 0;\n+/** Delete EM hash entry API\n+ *\n+ *    returns:\n+ *    0       - Success\n+ *    -EINVAL - Error\n+ */\n+int tf_em_delete_entry(struct tf *tfp,\n+\t\t       struct tf_delete_em_entry_parms *parms)\n+{\n+\tstruct tf_tbl_scope_cb *tbl_scope_cb;\n+\n+\ttbl_scope_cb = tbl_scope_cb_find\n+\t\t((struct tf_session *)(tfp->session->core_data),\n+\t\tparms->tbl_scope_id);\n+\tif (tbl_scope_cb == NULL) {\n+\t\tTFP_DRV_LOG(ERR, \"Invalid tbl_scope_cb\\n\");\n+\t\treturn -EINVAL;\n \t}\n+\tif (parms->mem == TF_MEM_EXTERNAL)\n+\t\treturn tf_delete_eem_entry(tbl_scope_cb, parms);\n+\telse if (parms->mem == TF_MEM_INTERNAL)\n+\t\treturn tf_delete_em_internal_entry(tfp, parms);\n \n \treturn -EINVAL;\n }\ndiff --git a/drivers/net/bnxt/tf_core/tf_em.h b/drivers/net/bnxt/tf_core/tf_em.h\nindex c1805df73..2262ae7cc 100644\n--- a/drivers/net/bnxt/tf_core/tf_em.h\n+++ b/drivers/net/bnxt/tf_core/tf_em.h\n@@ -9,6 +9,13 @@\n #include \"tf_core.h\"\n #include \"tf_session.h\"\n \n+#define SUPPORT_CFA_HW_P4 1\n+#define SUPPORT_CFA_HW_P58 0\n+#define SUPPORT_CFA_HW_P59 0\n+#define SUPPORT_CFA_HW_ALL 0\n+\n+#include \"hcapi/hcapi_cfa_defs.h\"\n+\n #define TF_HW_EM_KEY_MAX_SIZE 52\n #define TF_EM_KEY_RECORD_SIZE 64\n \n@@ -26,56 +33,15 @@\n #define TF_EM_INTERNAL_INDEX_MASK 0xFFFC\n #define TF_EM_INTERNAL_ENTRY_MASK  0x3\n \n-/** EEM Entry header\n- *\n- */\n-struct tf_eem_entry_hdr {\n-\tuint32_t pointer;\n-\tuint32_t word1;  /*\n-\t\t\t  * The header is made up of two words,\n-\t\t\t  * this is the first word. This field has multiple\n-\t\t\t  * subfields, there is no suitable single name for\n-\t\t\t  * it so just going with word1.\n-\t\t\t  */\n-#define TF_LKUP_RECORD_VALID_SHIFT 31\n-#define TF_LKUP_RECORD_VALID_MASK 0x80000000\n-#define TF_LKUP_RECORD_L1_CACHEABLE_SHIFT 30\n-#define TF_LKUP_RECORD_L1_CACHEABLE_MASK 0x40000000\n-#define TF_LKUP_RECORD_STRENGTH_SHIFT 28\n-#define TF_LKUP_RECORD_STRENGTH_MASK 0x30000000\n-#define TF_LKUP_RECORD_RESERVED_SHIFT 17\n-#define TF_LKUP_RECORD_RESERVED_MASK 0x0FFE0000\n-#define TF_LKUP_RECORD_KEY_SIZE_SHIFT 8\n-#define TF_LKUP_RECORD_KEY_SIZE_MASK 0x0001FF00\n-#define TF_LKUP_RECORD_ACT_REC_SIZE_SHIFT 3\n-#define TF_LKUP_RECORD_ACT_REC_SIZE_MASK 0x000000F8\n-#define TF_LKUP_RECORD_ACT_REC_INT_SHIFT 2\n-#define TF_LKUP_RECORD_ACT_REC_INT_MASK 0x00000004\n-#define TF_LKUP_RECORD_EXT_FLOW_CTR_SHIFT 1\n-#define TF_LKUP_RECORD_EXT_FLOW_CTR_MASK 0x00000002\n-#define TF_LKUP_RECORD_ACT_PTR_MSB_SHIFT 0\n-#define TF_LKUP_RECORD_ACT_PTR_MSB_MASK 0x00000001\n-};\n-\n-/** EEM Entry\n- *  Each EEM entry is 512-bit (64-bytes)\n- */\n-struct tf_eem_64b_entry {\n-\t/** Key is 448 bits - 56 bytes */\n-\tuint8_t key[TF_EM_KEY_RECORD_SIZE - sizeof(struct tf_eem_entry_hdr)];\n-\t/** Header is 8 bytes long */\n-\tstruct tf_eem_entry_hdr hdr;\n-};\n-\n /** EM Entry\n  *  Each EM entry is 512-bit (64-bytes) but ordered differently to\n  *  EEM.\n  */\n struct tf_em_64b_entry {\n \t/** Header is 8 bytes long */\n-\tstruct tf_eem_entry_hdr hdr;\n+\tstruct cfa_p4_eem_entry_hdr hdr;\n \t/** Key is 448 bits - 56 bytes */\n-\tuint8_t key[TF_EM_KEY_RECORD_SIZE - sizeof(struct tf_eem_entry_hdr)];\n+\tuint8_t key[TF_EM_KEY_RECORD_SIZE - sizeof(struct cfa_p4_eem_entry_hdr)];\n };\n \n /**\n@@ -127,22 +93,14 @@ int tf_free_eem_tbl_scope_cb(struct tf *tfp,\n struct tf_tbl_scope_cb *tbl_scope_cb_find(struct tf_session *session,\n \t\t\t\t\t  uint32_t tbl_scope_id);\n \n-int tf_insert_eem_entry(struct tf_session *session,\n-\t\t\tstruct tf_tbl_scope_cb *tbl_scope_cb,\n-\t\t\tstruct tf_insert_em_entry_parms *parms);\n-\n-int tf_insert_em_internal_entry(struct tf *tfp,\n-\t\t\t\tstruct tf_insert_em_entry_parms *parms);\n-\n-int tf_delete_eem_entry(struct tf *tfp,\n-\t\t\tstruct tf_delete_em_entry_parms *parms);\n-\n-int tf_delete_em_internal_entry(struct tf                       *tfp,\n-\t\t\t\tstruct tf_delete_em_entry_parms *parms);\n-\n void *tf_em_get_table_page(struct tf_tbl_scope_cb *tbl_scope_cb,\n \t\t\t   enum tf_dir dir,\n \t\t\t   uint32_t offset,\n-\t\t\t   enum tf_em_table_type table_type);\n+\t\t\t   enum hcapi_cfa_em_table_type table_type);\n+\n+int tf_em_insert_entry(struct tf *tfp,\n+\t\t       struct tf_insert_em_entry_parms *parms);\n \n+int tf_em_delete_entry(struct tf *tfp,\n+\t\t       struct tf_delete_em_entry_parms *parms);\n #endif /* _TF_EM_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.c b/drivers/net/bnxt/tf_core/tf_msg.c\nindex e08a96f23..60274eb35 100644\n--- a/drivers/net/bnxt/tf_core/tf_msg.c\n+++ b/drivers/net/bnxt/tf_core/tf_msg.c\n@@ -183,6 +183,10 @@ tf_msg_free_dma_buf(struct tf_msg_dma_buf *buf)\n \ttfp_free(buf->va_addr);\n }\n \n+/**\n+ * NEW HWRM direct messages\n+ */\n+\n /**\n  * Sends session open request to TF Firmware\n  */\n@@ -1259,8 +1263,9 @@ int tf_msg_insert_em_internal_entry(struct tf *tfp,\n \t\t HWRM_TF_EM_INSERT_INPUT_FLAGS_DIR_TX :\n \t\t HWRM_TF_EM_INSERT_INPUT_FLAGS_DIR_RX);\n \treq.flags = tfp_cpu_to_le_16(flags);\n-\treq.strength = (em_result->hdr.word1 & TF_LKUP_RECORD_STRENGTH_MASK) >>\n-\t\tTF_LKUP_RECORD_STRENGTH_SHIFT;\n+\treq.strength =\n+\t\t(em_result->hdr.word1 & CFA_P4_EEM_ENTRY_STRENGTH_MASK) >>\n+\t\tCFA_P4_EEM_ENTRY_STRENGTH_SHIFT;\n \treq.em_key_bitlen = em_parms->key_sz_in_bits;\n \treq.action_ptr = em_result->hdr.pointer;\n \treq.em_record_idx = *rptr_index;\n@@ -1436,22 +1441,20 @@ tf_msg_get_tbl_entry(struct tf *tfp,\n }\n \n int\n-tf_msg_get_bulk_tbl_entry(struct tf *tfp,\n-\t\t\t  struct tf_get_bulk_tbl_entry_parms *params)\n+tf_msg_bulk_get_tbl_entry(struct tf *tfp,\n+\t\t\t  struct tf_bulk_get_tbl_entry_parms *params)\n {\n \tint rc;\n \tstruct tfp_send_msg_parms parms = { 0 };\n-\tstruct tf_tbl_type_get_bulk_input req = { 0 };\n-\tstruct tf_tbl_type_get_bulk_output resp = { 0 };\n+\tstruct tf_tbl_type_bulk_get_input req = { 0 };\n+\tstruct tf_tbl_type_bulk_get_output resp = { 0 };\n \tstruct tf_session *tfs = (struct tf_session *)(tfp->session->core_data);\n \tint data_size = 0;\n \n \t/* Populate the request */\n \treq.fw_session_id =\n \t\ttfp_cpu_to_le_32(tfs->session_id.internal.fw_session_id);\n-\treq.flags = tfp_cpu_to_le_16((params->dir) |\n-\t\t((params->clear_on_read) ?\n-\t\t TF_TBL_TYPE_GET_BULK_INPUT_FLAGS_CLEAR_ON_READ : 0x0));\n+\treq.flags = tfp_cpu_to_le_16(params->dir);\n \treq.type = tfp_cpu_to_le_32(params->type);\n \treq.start_index = tfp_cpu_to_le_32(params->starting_idx);\n \treq.num_entries = tfp_cpu_to_le_32(params->num_entries);\n@@ -1462,7 +1465,7 @@ tf_msg_get_bulk_tbl_entry(struct tf *tfp,\n \tMSG_PREP(parms,\n \t\t TF_KONG_MB,\n \t\t HWRM_TF,\n-\t\t HWRM_TFT_TBL_TYPE_GET_BULK,\n+\t\t HWRM_TFT_TBL_TYPE_BULK_GET,\n \t\t req,\n \t\t resp);\n \ndiff --git a/drivers/net/bnxt/tf_core/tf_msg.h b/drivers/net/bnxt/tf_core/tf_msg.h\nindex 06f52ef00..1dad2b9fb 100644\n--- a/drivers/net/bnxt/tf_core/tf_msg.h\n+++ b/drivers/net/bnxt/tf_core/tf_msg.h\n@@ -338,7 +338,7 @@ int tf_msg_get_tbl_entry(struct tf *tfp,\n  * Returns:\n  *  0 on Success else internal Truflow error\n  */\n-int tf_msg_get_bulk_tbl_entry(struct tf *tfp,\n-\t\t\t  struct tf_get_bulk_tbl_entry_parms *parms);\n+int tf_msg_bulk_get_tbl_entry(struct tf *tfp,\n+\t\t\t  struct tf_bulk_get_tbl_entry_parms *parms);\n \n #endif  /* _TF_MSG_H_ */\ndiff --git a/drivers/net/bnxt/tf_core/tf_resources.h b/drivers/net/bnxt/tf_core/tf_resources.h\nindex 9b7f5a069..b7b445102 100644\n--- a/drivers/net/bnxt/tf_core/tf_resources.h\n+++ b/drivers/net/bnxt/tf_core/tf_resources.h\n@@ -23,29 +23,27 @@\n \t\t\t\t\t    * IDs\n \t\t\t\t\t    */\n #define TF_NUM_WC_PROF_ID         256      /* < Number WC profile IDs */\n-#define TF_NUM_WC_TCAM_ROW        256      /*  Number slices per row in WC\n-\t\t\t\t\t    * TCAM. A slices is a WC TCAM entry.\n-\t\t\t\t\t    */\n+#define TF_NUM_WC_TCAM_ROW        512      /* < Number of rows in WC TCAM */\n #define TF_NUM_METER_PROF         256      /* < Number of meter profiles */\n #define TF_NUM_METER             1024      /* < Number of meter instances */\n #define TF_NUM_MIRROR               2      /* < Number of mirror instances */\n #define TF_NUM_UPAR                 2      /* < Number of UPAR instances */\n \n-/* Wh+/Brd2 specific HW resources */\n+/* Wh+/SR specific HW resources */\n #define TF_NUM_SP_TCAM            512      /* < Number of Source Property TCAM\n \t\t\t\t\t    * entries\n \t\t\t\t\t    */\n \n-/* Brd2/Brd4 specific HW resources */\n+/* SR/SR2 specific HW resources */\n #define TF_NUM_L2_FUNC            256      /* < Number of L2 Func */\n \n \n-/* Brd3, Brd4 common HW resources */\n+/* Thor, SR2 common HW resources */\n #define TF_NUM_FKB                  1      /* < Number of Flexible Key Builder\n \t\t\t\t\t    * templates\n \t\t\t\t\t    */\n \n-/* Brd4 specific HW resources */\n+/* SR2 specific HW resources */\n #define TF_NUM_TBL_SCOPE           16      /* < Number of TBL scopes */\n #define TF_NUM_EPOCH0               1      /* < Number of Epoch0 */\n #define TF_NUM_EPOCH1               1      /* < Number of Epoch1 */\n@@ -149,10 +147,11 @@\n #define TF_RSVD_METER_INST_END_IDX_TX             0\n \n /* Mirror */\n-#define TF_RSVD_MIRROR_RX                         1\n+/* Not yet supported fully in the infra */\n+#define TF_RSVD_MIRROR_RX                         0\n #define TF_RSVD_MIRROR_BEGIN_IDX_RX               0\n #define TF_RSVD_MIRROR_END_IDX_RX                 0\n-#define TF_RSVD_MIRROR_TX                         1\n+#define TF_RSVD_MIRROR_TX                         0\n #define TF_RSVD_MIRROR_BEGIN_IDX_TX               0\n #define TF_RSVD_MIRROR_END_IDX_TX                 0\n \n@@ -501,13 +500,13 @@ enum tf_resource_type_hw {\n \tTF_RESC_TYPE_HW_METER_INST,\n \tTF_RESC_TYPE_HW_MIRROR,\n \tTF_RESC_TYPE_HW_UPAR,\n-\t/* Wh+/Brd2 specific HW resources */\n+\t/* Wh+/SR specific HW resources */\n \tTF_RESC_TYPE_HW_SP_TCAM,\n-\t/* Brd2/Brd4 specific HW resources */\n+\t/* SR/SR2 specific HW resources */\n \tTF_RESC_TYPE_HW_L2_FUNC,\n-\t/* Brd3, Brd4 common HW resources */\n+\t/* Thor, SR2 common HW resources */\n \tTF_RESC_TYPE_HW_FKB,\n-\t/* Brd4 specific HW resources */\n+\t/* SR2 specific HW resources */\n \tTF_RESC_TYPE_HW_TBL_SCOPE,\n \tTF_RESC_TYPE_HW_EPOCH0,\n \tTF_RESC_TYPE_HW_EPOCH1,\ndiff --git a/drivers/net/bnxt/tf_core/tf_rm.c b/drivers/net/bnxt/tf_core/tf_rm.c\nindex 2264704d2..b6fe2f1ad 100644\n--- a/drivers/net/bnxt/tf_core/tf_rm.c\n+++ b/drivers/net/bnxt/tf_core/tf_rm.c\n@@ -14,6 +14,7 @@\n #include \"tf_resources.h\"\n #include \"tf_msg.h\"\n #include \"bnxt.h\"\n+#include \"tfp.h\"\n \n /**\n  * Internal macro to perform HW resource allocation check between what\n@@ -329,13 +330,13 @@ tf_rm_print_hw_qcaps_error(enum tf_dir dir,\n {\n \tint i;\n \n-\tPMD_DRV_LOG(ERR, \"QCAPS errors HW\\n\");\n-\tPMD_DRV_LOG(ERR, \"  Direction: %s\\n\", tf_dir_2_str(dir));\n-\tPMD_DRV_LOG(ERR, \"  Elements:\\n\");\n+\tTFP_DRV_LOG(ERR, \"QCAPS errors HW\\n\");\n+\tTFP_DRV_LOG(ERR, \"  Direction: %s\\n\", tf_dir_2_str(dir));\n+\tTFP_DRV_LOG(ERR, \"  Elements:\\n\");\n \n \tfor (i = 0; i < TF_RESC_TYPE_HW_MAX; i++) {\n \t\tif (*error_flag & 1 << i)\n-\t\t\tPMD_DRV_LOG(ERR, \"    %s, %d elem available, req:%d\\n\",\n+\t\t\tTFP_DRV_LOG(ERR, \"    %s, %d elem available, req:%d\\n\",\n \t\t\t\t    tf_hcapi_hw_2_str(i),\n \t\t\t\t    hw_query->hw_query[i].max,\n \t\t\t\t    tf_rm_rsvd_hw_value(dir, i));\n@@ -359,13 +360,13 @@ tf_rm_print_sram_qcaps_error(enum tf_dir dir,\n {\n \tint i;\n \n-\tPMD_DRV_LOG(ERR, \"QCAPS errors SRAM\\n\");\n-\tPMD_DRV_LOG(ERR, \"  Direction: %s\\n\", tf_dir_2_str(dir));\n-\tPMD_DRV_LOG(ERR, \"  Elements:\\n\");\n+\tTFP_DRV_LOG(ERR, \"QCAPS errors SRAM\\n\");\n+\tTFP_DRV_LOG(ERR, \"  Direction: %s\\n\", tf_dir_2_str(dir));\n+\tTFP_DRV_LOG(ERR, \"  Elements:\\n\");\n \n \tfor (i = 0; i < TF_RESC_TYPE_SRAM_MAX; i++) {\n \t\tif (*error_flag & 1 << i)\n-\t\t\tPMD_DRV_LOG(ERR, \"    %s, %d elem available, req:%d\\n\",\n+\t\t\tTFP_DRV_LOG(ERR, \"    %s, %d elem available, req:%d\\n\",\n \t\t\t\t    tf_hcapi_sram_2_str(i),\n \t\t\t\t    sram_query->sram_query[i].max,\n \t\t\t\t    tf_rm_rsvd_sram_value(dir, i));\n@@ -1700,7 +1701,7 @@ tf_rm_hw_alloc_validate(enum tf_dir dir,\n \n \tfor (i = 0; i < TF_RESC_TYPE_HW_MAX; i++) {\n \t\tif (hw_entry[i].stride != hw_alloc->hw_num[i]) {\n-\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t\"%s, Alloc failed id:%d expect:%d got:%d\\n\",\n \t\t\t\ttf_dir_2_str(dir),\n \t\t\t\ti,\n@@ -1727,7 +1728,7 @@ tf_rm_sram_alloc_validate(enum tf_dir dir __rte_unused,\n \n \tfor (i = 0; i < TF_RESC_TYPE_SRAM_MAX; i++) {\n \t\tif (sram_entry[i].stride != sram_alloc->sram_num[i]) {\n-\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t\"%s, Alloc failed idx:%d expect:%d got:%d\\n\",\n \t\t\t\ttf_dir_2_str(dir),\n \t\t\t\ti,\n@@ -1820,19 +1821,22 @@ tf_rm_allocate_validate_hw(struct tf *tfp,\n \trc = tf_msg_session_hw_resc_qcaps(tfp, dir, &hw_query);\n \tif (rc) {\n \t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"%s, HW qcaps message send failed\\n\",\n-\t\t\t    tf_dir_2_str(dir));\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, HW qcaps message send failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-rc));\n \t\tgoto cleanup;\n \t}\n \n \trc = tf_rm_check_hw_qcaps_static(&hw_query, dir, &error_flag);\n \tif (rc) {\n \t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\"%s, HW QCAPS validation failed, error_flag:0x%x\\n\",\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\"%s, HW QCAPS validation failed,\"\n+\t\t\t\"error_flag:0x%x, rc:%s\\n\",\n \t\t\ttf_dir_2_str(dir),\n-\t\t\terror_flag);\n+\t\t\terror_flag,\n+\t\t\tstrerror(-rc));\n \t\ttf_rm_print_hw_qcaps_error(dir, &hw_query, &error_flag);\n \t\tgoto cleanup;\n \t}\n@@ -1845,9 +1849,10 @@ tf_rm_allocate_validate_hw(struct tf *tfp,\n \trc = tf_msg_session_hw_resc_alloc(tfp, dir, &hw_alloc, hw_entries);\n \tif (rc) {\n \t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"%s, HW alloc message send failed\\n\",\n-\t\t\t    tf_dir_2_str(dir));\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, HW alloc message send failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-rc));\n \t\tgoto cleanup;\n \t}\n \n@@ -1857,15 +1862,17 @@ tf_rm_allocate_validate_hw(struct tf *tfp,\n \trc = tf_rm_hw_alloc_validate(dir, &hw_alloc, hw_entries);\n \tif (rc) {\n \t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"%s, HW Resource validation failed\\n\",\n-\t\t\t    tf_dir_2_str(dir));\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, HW Resource validation failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-rc));\n \t\tgoto cleanup;\n \t}\n \n \treturn 0;\n \n  cleanup:\n+\n \treturn -1;\n }\n \n@@ -1903,19 +1910,22 @@ tf_rm_allocate_validate_sram(struct tf *tfp,\n \trc = tf_msg_session_sram_resc_qcaps(tfp, dir, &sram_query);\n \tif (rc) {\n \t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"%s, SRAM qcaps message send failed\\n\",\n-\t\t\t    tf_dir_2_str(dir));\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, SRAM qcaps message send failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-rc));\n \t\tgoto cleanup;\n \t}\n \n \trc = tf_rm_check_sram_qcaps_static(&sram_query, dir, &error_flag);\n \tif (rc) {\n \t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\"%s, SRAM QCAPS validation failed, error_flag:%x\\n\",\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\"%s, SRAM QCAPS validation failed,\"\n+\t\t\t\"error_flag:%x, rc:%s\\n\",\n \t\t\ttf_dir_2_str(dir),\n-\t\t\terror_flag);\n+\t\t\terror_flag,\n+\t\t\tstrerror(-rc));\n \t\ttf_rm_print_sram_qcaps_error(dir, &sram_query, &error_flag);\n \t\tgoto cleanup;\n \t}\n@@ -1931,9 +1941,10 @@ tf_rm_allocate_validate_sram(struct tf *tfp,\n \t\t\t\t\t    sram_entries);\n \tif (rc) {\n \t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"%s, SRAM alloc message send failed\\n\",\n-\t\t\t    tf_dir_2_str(dir));\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, SRAM alloc message send failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-rc));\n \t\tgoto cleanup;\n \t}\n \n@@ -1943,15 +1954,18 @@ tf_rm_allocate_validate_sram(struct tf *tfp,\n \trc = tf_rm_sram_alloc_validate(dir, &sram_alloc, sram_entries);\n \tif (rc) {\n \t\t/* Log error */\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"%s, SRAM Resource allocation validation failed\\n\",\n-\t\t\t    tf_dir_2_str(dir));\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, SRAM Resource allocation validation failed,\"\n+\t\t\t    \" rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n+\t\t\t    strerror(-rc));\n \t\tgoto cleanup;\n \t}\n \n \treturn 0;\n \n  cleanup:\n+\n \treturn -1;\n }\n \n@@ -2177,7 +2191,7 @@ tf_rm_hw_to_flush(struct tf_session *tfs,\n \t\tflush_entries[TF_RESC_TYPE_HW_TBL_SCOPE].start = 0;\n \t\tflush_entries[TF_RESC_TYPE_HW_TBL_SCOPE].stride = 0;\n \t} else {\n-\t\tPMD_DRV_LOG(ERR, \"%s: TBL_SCOPE free_cnt:%d, entries:%d\\n\",\n+\t\tTFP_DRV_LOG(ERR, \"%s, TBL_SCOPE free_cnt:%d, entries:%d\\n\",\n \t\t\t    tf_dir_2_str(dir),\n \t\t\t    free_cnt,\n \t\t\t    hw_entries[TF_RESC_TYPE_HW_TBL_SCOPE].stride);\n@@ -2538,8 +2552,8 @@ tf_rm_log_hw_flush(enum tf_dir dir,\n \t */\n \tfor (i = 0; i < TF_RESC_TYPE_HW_MAX; i++) {\n \t\tif (hw_entries[i].stride != 0)\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"%s: %s was not cleaned up\\n\",\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s, %s was not cleaned up\\n\",\n \t\t\t\t    tf_dir_2_str(dir),\n \t\t\t\t    tf_hcapi_hw_2_str(i));\n \t}\n@@ -2564,8 +2578,8 @@ tf_rm_log_sram_flush(enum tf_dir dir,\n \t */\n \tfor (i = 0; i < TF_RESC_TYPE_SRAM_MAX; i++) {\n \t\tif (sram_entries[i].stride != 0)\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"%s: %s was not cleaned up\\n\",\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s, %s was not cleaned up\\n\",\n \t\t\t\t    tf_dir_2_str(dir),\n \t\t\t\t    tf_hcapi_sram_2_str(i));\n \t}\n@@ -2777,9 +2791,10 @@ tf_rm_close(struct tf *tfp)\n \t\tif (rc) {\n \t\t\trc_close = -ENOTEMPTY;\n \t\t\t/* Log error */\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"%s, lingering HW resources\\n\",\n-\t\t\t\t    tf_dir_2_str(i));\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s, lingering HW resources, rc:%s\\n\",\n+\t\t\t\t    tf_dir_2_str(i),\n+\t\t\t\t    strerror(-rc));\n \n \t\t\t/* Log the entries to be flushed */\n \t\t\ttf_rm_log_hw_flush(i, hw_flush_entries);\n@@ -2789,9 +2804,10 @@ tf_rm_close(struct tf *tfp)\n \t\t\tif (rc) {\n \t\t\t\trc_close = rc;\n \t\t\t\t/* Log error */\n-\t\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t\t    \"%s, HW flush failed\\n\",\n-\t\t\t\t\t    tf_dir_2_str(i));\n+\t\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t\t    \"%s, HW flush failed, rc:%s\\n\",\n+\t\t\t\t\t    tf_dir_2_str(i),\n+\t\t\t\t\t    strerror(-rc));\n \t\t\t}\n \t\t}\n \n@@ -2805,9 +2821,10 @@ tf_rm_close(struct tf *tfp)\n \t\tif (rc) {\n \t\t\trc_close = -ENOTEMPTY;\n \t\t\t/* Log error */\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"%s, lingering SRAM resources\\n\",\n-\t\t\t\t    tf_dir_2_str(i));\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s, lingering SRAM resources, rc:%s\\n\",\n+\t\t\t\t    tf_dir_2_str(i),\n+\t\t\t\t    strerror(-rc));\n \n \t\t\t/* Log the entries to be flushed */\n \t\t\ttf_rm_log_sram_flush(i, sram_flush_entries);\n@@ -2818,9 +2835,10 @@ tf_rm_close(struct tf *tfp)\n \t\t\tif (rc) {\n \t\t\t\trc_close = rc;\n \t\t\t\t/* Log error */\n-\t\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t\t    \"%s, HW flush failed\\n\",\n-\t\t\t\t\t    tf_dir_2_str(i));\n+\t\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t\t    \"%s, HW flush failed, rc:%s\\n\",\n+\t\t\t\t\t    tf_dir_2_str(i),\n+\t\t\t\t\t    strerror(-rc));\n \t\t\t}\n \t\t}\n \n@@ -2828,18 +2846,20 @@ tf_rm_close(struct tf *tfp)\n \t\tif (rc) {\n \t\t\trc_close = rc;\n \t\t\t/* Log error */\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"%s, HW free failed\\n\",\n-\t\t\t\t    tf_dir_2_str(i));\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s, HW free failed, rc:%s\\n\",\n+\t\t\t\t    tf_dir_2_str(i),\n+\t\t\t\t    strerror(-rc));\n \t\t}\n \n \t\trc = tf_msg_session_sram_resc_free(tfp, i, sram_entries);\n \t\tif (rc) {\n \t\t\trc_close = rc;\n \t\t\t/* Log error */\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"%s, SRAM free failed\\n\",\n-\t\t\t\t    tf_dir_2_str(i));\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s, SRAM free failed, rc:%s\\n\",\n+\t\t\t\t    tf_dir_2_str(i),\n+\t\t\t\t    strerror(-rc));\n \t\t}\n \t}\n \n@@ -2890,14 +2910,14 @@ tf_rm_lookup_tcam_type_pool(struct tf_session *tfs,\n \t}\n \n \tif (rc == -EOPNOTSUPP) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Tcam type not supported, type:%d\\n\",\n-\t\t\t    dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, Tcam type not supported, type:%d\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n \t\t\t    type);\n \t\treturn rc;\n \t} else if (rc == -1) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"%s:, Tcam type lookup failed, type:%d\\n\",\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, Tcam type lookup failed, type:%d\\n\",\n \t\t\t    tf_dir_2_str(dir),\n \t\t\t    type);\n \t\treturn rc;\n@@ -3057,15 +3077,15 @@ tf_rm_lookup_tbl_type_pool(struct tf_session *tfs,\n \t}\n \n \tif (rc == -EOPNOTSUPP) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Table type not supported, type:%d\\n\",\n-\t\t\t    dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, Table type not supported, type:%d\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n \t\t\t    type);\n \t\treturn rc;\n \t} else if (rc == -1) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Table type lookup failed, type:%d\\n\",\n-\t\t\t    dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, Table type lookup failed, type:%d\\n\",\n+\t\t\t    tf_dir_2_str(dir),\n \t\t\t    type);\n \t\treturn rc;\n \t}\ndiff --git a/drivers/net/bnxt/tf_core/tf_tbl.c b/drivers/net/bnxt/tf_core/tf_tbl.c\nindex 35a7cfab5..a68335304 100644\n--- a/drivers/net/bnxt/tf_core/tf_tbl.c\n+++ b/drivers/net/bnxt/tf_core/tf_tbl.c\n@@ -23,6 +23,7 @@\n #include \"bnxt.h\"\n #include \"tf_resources.h\"\n #include \"tf_rm.h\"\n+#include \"stack.h\"\n #include \"tf_common.h\"\n \n #define PTU_PTE_VALID          0x1UL\n@@ -53,14 +54,14 @@\n  *   Pointer to the page table to free\n  */\n static void\n-tf_em_free_pg_tbl(struct tf_em_page_tbl *tp)\n+tf_em_free_pg_tbl(struct hcapi_cfa_em_page_tbl *tp)\n {\n \tuint32_t i;\n \n \tfor (i = 0; i < tp->pg_count; i++) {\n \t\tif (!tp->pg_va_tbl[i]) {\n-\t\t\tPMD_DRV_LOG(WARNING,\n-\t\t\t\t    \"No map for page %d table %016\" PRIu64 \"\\n\",\n+\t\t\tTFP_DRV_LOG(WARNING,\n+\t\t\t\t    \"No mapping for page: %d table: %016\" PRIu64 \"\\n\",\n \t\t\t\t    i,\n \t\t\t\t    (uint64_t)(uintptr_t)tp);\n \t\t\tcontinue;\n@@ -84,15 +85,14 @@ tf_em_free_pg_tbl(struct tf_em_page_tbl *tp)\n  *   Pointer to the EM table to free\n  */\n static void\n-tf_em_free_page_table(struct tf_em_table *tbl)\n+tf_em_free_page_table(struct hcapi_cfa_em_table *tbl)\n {\n-\tstruct tf_em_page_tbl *tp;\n+\tstruct hcapi_cfa_em_page_tbl *tp;\n \tint i;\n \n \tfor (i = 0; i < tbl->num_lvl; i++) {\n \t\ttp = &tbl->pg_tbl[i];\n-\n-\t\tPMD_DRV_LOG(INFO,\n+\t\tTFP_DRV_LOG(INFO,\n \t\t\t   \"EEM: Freeing page table: size %u lvl %d cnt %u\\n\",\n \t\t\t   TF_EM_PAGE_SIZE,\n \t\t\t    i,\n@@ -124,7 +124,7 @@ tf_em_free_page_table(struct tf_em_table *tbl)\n  *   -ENOMEM - Out of memory\n  */\n static int\n-tf_em_alloc_pg_tbl(struct tf_em_page_tbl *tp,\n+tf_em_alloc_pg_tbl(struct hcapi_cfa_em_page_tbl *tp,\n \t\t   uint32_t pg_count,\n \t\t   uint32_t pg_size)\n {\n@@ -183,9 +183,9 @@ tf_em_alloc_pg_tbl(struct tf_em_page_tbl *tp,\n  *   -ENOMEM - Out of memory\n  */\n static int\n-tf_em_alloc_page_table(struct tf_em_table *tbl)\n+tf_em_alloc_page_table(struct hcapi_cfa_em_table *tbl)\n {\n-\tstruct tf_em_page_tbl *tp;\n+\tstruct hcapi_cfa_em_page_tbl *tp;\n \tint rc = 0;\n \tint i;\n \tuint32_t j;\n@@ -197,14 +197,15 @@ tf_em_alloc_page_table(struct tf_em_table *tbl)\n \t\t\t\t\ttbl->page_cnt[i],\n \t\t\t\t\tTF_EM_PAGE_SIZE);\n \t\tif (rc) {\n-\t\t\tPMD_DRV_LOG(WARNING,\n-\t\t\t\t\"Failed to allocate page table: lvl: %d\\n\",\n-\t\t\t\ti);\n+\t\t\tTFP_DRV_LOG(WARNING,\n+\t\t\t\t\"Failed to allocate page table: lvl: %d, rc:%s\\n\",\n+\t\t\t\ti,\n+\t\t\t\tstrerror(-rc));\n \t\t\tgoto cleanup;\n \t\t}\n \n \t\tfor (j = 0; j < tp->pg_count; j++) {\n-\t\t\tPMD_DRV_LOG(INFO,\n+\t\t\tTFP_DRV_LOG(INFO,\n \t\t\t\t\"EEM: Allocated page table: size %u lvl %d cnt\"\n \t\t\t\t\" %u VA:%p PA:%p\\n\",\n \t\t\t\tTF_EM_PAGE_SIZE,\n@@ -234,8 +235,8 @@ tf_em_alloc_page_table(struct tf_em_table *tbl)\n  *   Flag controlling if the page table is last\n  */\n static void\n-tf_em_link_page_table(struct tf_em_page_tbl *tp,\n-\t\t      struct tf_em_page_tbl *tp_next,\n+tf_em_link_page_table(struct hcapi_cfa_em_page_tbl *tp,\n+\t\t      struct hcapi_cfa_em_page_tbl *tp_next,\n \t\t      bool set_pte_last)\n {\n \tuint64_t *pg_pa = tp_next->pg_pa_tbl;\n@@ -270,10 +271,10 @@ tf_em_link_page_table(struct tf_em_page_tbl *tp,\n  *   Pointer to EM page table\n  */\n static void\n-tf_em_setup_page_table(struct tf_em_table *tbl)\n+tf_em_setup_page_table(struct hcapi_cfa_em_table *tbl)\n {\n-\tstruct tf_em_page_tbl *tp_next;\n-\tstruct tf_em_page_tbl *tp;\n+\tstruct hcapi_cfa_em_page_tbl *tp_next;\n+\tstruct hcapi_cfa_em_page_tbl *tp;\n \tbool set_pte_last = 0;\n \tint i;\n \n@@ -415,7 +416,7 @@ tf_em_size_page_tbls(int max_lvl,\n  *   - ENOMEM - Out of memory\n  */\n static int\n-tf_em_size_table(struct tf_em_table *tbl)\n+tf_em_size_table(struct hcapi_cfa_em_table *tbl)\n {\n \tuint64_t num_data_pages;\n \tuint32_t *page_cnt;\n@@ -456,11 +457,10 @@ tf_em_size_table(struct tf_em_table *tbl)\n \t\t\t\t\t  tbl->num_entries,\n \t\t\t\t\t  &num_data_pages);\n \tif (max_lvl < 0) {\n-\t\tPMD_DRV_LOG(WARNING, \"EEM: Failed to size page table levels\\n\");\n-\t\tPMD_DRV_LOG(WARNING,\n+\t\tTFP_DRV_LOG(WARNING, \"EEM: Failed to size page table levels\\n\");\n+\t\tTFP_DRV_LOG(WARNING,\n \t\t\t    \"table: %d data-sz: %016\" PRIu64 \" page-sz: %u\\n\",\n-\t\t\t    tbl->type,\n-\t\t\t    (uint64_t)num_entries * tbl->entry_size,\n+\t\t\t    tbl->type, (uint64_t)num_entries * tbl->entry_size,\n \t\t\t    TF_EM_PAGE_SIZE);\n \t\treturn -ENOMEM;\n \t}\n@@ -474,8 +474,8 @@ tf_em_size_table(struct tf_em_table *tbl)\n \ttf_em_size_page_tbls(max_lvl, num_data_pages, TF_EM_PAGE_SIZE,\n \t\t\t\tpage_cnt);\n \n-\tPMD_DRV_LOG(INFO, \"EEM: Sized page table: %d\\n\", tbl->type);\n-\tPMD_DRV_LOG(INFO,\n+\tTFP_DRV_LOG(INFO, \"EEM: Sized page table: %d\\n\", tbl->type);\n+\tTFP_DRV_LOG(INFO,\n \t\t    \"EEM: lvls: %d sz: %016\" PRIu64 \" pgs: %016\" PRIu64 \" l0: %u l1: %u l2: %u\\n\",\n \t\t    max_lvl + 1,\n \t\t    (uint64_t)num_data_pages * TF_EM_PAGE_SIZE,\n@@ -504,8 +504,9 @@ tf_em_ctx_unreg(struct tf *tfp,\n \t\tstruct tf_tbl_scope_cb *tbl_scope_cb,\n \t\tint dir)\n {\n-\tstruct tf_em_ctx_mem_info *ctxp = &tbl_scope_cb->em_ctx_info[dir];\n-\tstruct tf_em_table *tbl;\n+\tstruct hcapi_cfa_em_ctx_mem_info *ctxp =\n+\t\t&tbl_scope_cb->em_ctx_info[dir];\n+\tstruct hcapi_cfa_em_table *tbl;\n \tint i;\n \n \tfor (i = TF_KEY0_TABLE; i < TF_MAX_TABLE; i++) {\n@@ -539,8 +540,9 @@ tf_em_ctx_reg(struct tf *tfp,\n \t      struct tf_tbl_scope_cb *tbl_scope_cb,\n \t      int dir)\n {\n-\tstruct tf_em_ctx_mem_info *ctxp = &tbl_scope_cb->em_ctx_info[dir];\n-\tstruct tf_em_table *tbl;\n+\tstruct hcapi_cfa_em_ctx_mem_info *ctxp =\n+\t\t&tbl_scope_cb->em_ctx_info[dir];\n+\tstruct hcapi_cfa_em_table *tbl;\n \tint rc = 0;\n \tint i;\n \n@@ -601,7 +603,7 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \t\t\t\t\tTF_MEGABYTE) / (key_b + action_b);\n \n \t\tif (num_entries < TF_EM_MIN_ENTRIES) {\n-\t\t\tPMD_DRV_LOG(ERR, \"EEM: Insufficient memory requested:\"\n+\t\t\tTFP_DRV_LOG(ERR, \"EEM: Insufficient memory requested:\"\n \t\t\t\t    \"%uMB\\n\",\n \t\t\t\t    parms->rx_mem_size_in_mb);\n \t\t\treturn -EINVAL;\n@@ -613,7 +615,7 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \t\t\tcnt *= 2;\n \n \t\tif (cnt > TF_EM_MAX_ENTRIES) {\n-\t\t\tPMD_DRV_LOG(ERR, \"EEM: Invalid number of Tx requested: \"\n+\t\t\tTFP_DRV_LOG(ERR, \"EEM: Invalid number of Tx requested: \"\n \t\t\t\t    \"%u\\n\",\n \t\t       (parms->tx_num_flows_in_k * TF_KILOBYTE));\n \t\t\treturn -EINVAL;\n@@ -625,7 +627,7 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \t\t    TF_EM_MIN_ENTRIES ||\n \t\t    (parms->rx_num_flows_in_k * TF_KILOBYTE) >\n \t\t    tbl_scope_cb->em_caps[TF_DIR_RX].max_entries_supported) {\n-\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t    \"EEM: Invalid number of Rx flows \"\n \t\t\t\t    \"requested:%u max:%u\\n\",\n \t\t\t\t    parms->rx_num_flows_in_k * TF_KILOBYTE,\n@@ -642,7 +644,7 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \t\t\tcnt *= 2;\n \n \t\tif (cnt > TF_EM_MAX_ENTRIES) {\n-\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t    \"EEM: Invalid number of Rx requested: %u\\n\",\n \t\t\t\t    (parms->rx_num_flows_in_k * TF_KILOBYTE));\n \t\t\treturn -EINVAL;\n@@ -658,7 +660,7 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \t\t\t(key_b + action_b);\n \n \t\tif (num_entries < TF_EM_MIN_ENTRIES) {\n-\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t    \"EEM: Insufficient memory requested:%uMB\\n\",\n \t\t\t\t    parms->rx_mem_size_in_mb);\n \t\t\treturn -EINVAL;\n@@ -670,7 +672,7 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \t\t\tcnt *= 2;\n \n \t\tif (cnt > TF_EM_MAX_ENTRIES) {\n-\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t    \"EEM: Invalid number of Tx requested: %u\\n\",\n \t\t       (parms->tx_num_flows_in_k * TF_KILOBYTE));\n \t\t\treturn -EINVAL;\n@@ -682,7 +684,7 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \t\t    TF_EM_MIN_ENTRIES ||\n \t\t    (parms->tx_num_flows_in_k * TF_KILOBYTE) >\n \t\t    tbl_scope_cb->em_caps[TF_DIR_TX].max_entries_supported) {\n-\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t    \"EEM: Invalid number of Tx flows \"\n \t\t\t\t    \"requested:%u max:%u\\n\",\n \t\t\t\t    (parms->tx_num_flows_in_k * TF_KILOBYTE),\n@@ -696,7 +698,7 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \t\t\tcnt *= 2;\n \n \t\tif (cnt > TF_EM_MAX_ENTRIES) {\n-\t\t\tPMD_DRV_LOG(ERR,\n+\t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t    \"EEM: Invalid number of Tx requested: %u\\n\",\n \t\t       (parms->tx_num_flows_in_k * TF_KILOBYTE));\n \t\t\treturn -EINVAL;\n@@ -705,7 +707,7 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \n \tif (parms->rx_num_flows_in_k != 0 &&\n \t    (parms->rx_max_key_sz_in_bits / 8 == 0)) {\n-\t\tPMD_DRV_LOG(ERR,\n+\t\tTFP_DRV_LOG(ERR,\n \t\t\t    \"EEM: Rx key size required: %u\\n\",\n \t\t\t    (parms->rx_max_key_sz_in_bits));\n \t\treturn -EINVAL;\n@@ -713,7 +715,7 @@ tf_em_validate_num_entries(struct tf_tbl_scope_cb *tbl_scope_cb,\n \n \tif (parms->tx_num_flows_in_k != 0 &&\n \t    (parms->tx_max_key_sz_in_bits / 8 == 0)) {\n-\t\tPMD_DRV_LOG(ERR,\n+\t\tTFP_DRV_LOG(ERR,\n \t\t\t    \"EEM: Tx key size required: %u\\n\",\n \t\t\t    (parms->tx_max_key_sz_in_bits));\n \t\treturn -EINVAL;\n@@ -795,11 +797,10 @@ tf_set_tbl_entry_internal(struct tf *tfp,\n \n \tif (parms->type != TF_TBL_TYPE_FULL_ACT_RECORD &&\n \t    parms->type != TF_TBL_TYPE_ACT_SP_SMAC_IPV4 &&\n-\t    parms->type != TF_TBL_TYPE_MIRROR_CONFIG &&\n \t    parms->type != TF_TBL_TYPE_ACT_STATS_64) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Type not supported, type:%d\\n\",\n-\t\t\t    parms->dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, Type not supported, type:%d\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    parms->type);\n \t\treturn -EOPNOTSUPP;\n \t}\n@@ -817,9 +818,9 @@ tf_set_tbl_entry_internal(struct tf *tfp,\n \t/* Verify that the entry has been previously allocated */\n \tid = ba_inuse(session_pool, index);\n \tif (id != 1) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t   \"dir:%d, Invalid or not allocated index, type:%d, idx:%d\\n\",\n-\t\t   parms->dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t   \"%s, Invalid or not allocated index, type:%d, idx:%d\\n\",\n+\t\t   tf_dir_2_str(parms->dir),\n \t\t   parms->type,\n \t\t   index);\n \t\treturn -EINVAL;\n@@ -833,11 +834,11 @@ tf_set_tbl_entry_internal(struct tf *tfp,\n \t\t\t\t  parms->data,\n \t\t\t\t  parms->idx);\n \tif (rc) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Set failed, type:%d, rc:%d\\n\",\n-\t\t\t    parms->dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, Set failed, type:%d, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    parms->type,\n-\t\t\t    rc);\n+\t\t\t    strerror(-rc));\n \t}\n \n \treturn rc;\n@@ -891,9 +892,9 @@ tf_get_tbl_entry_internal(struct tf *tfp,\n \t/* Verify that the entry has been previously allocated */\n \tid = ba_inuse(session_pool, index);\n \tif (id != 1) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t   \"dir:%d, Invalid or not allocated index, type:%d, idx:%d\\n\",\n-\t\t   parms->dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t   \"%s, Invalid or not allocated index, type:%d, idx:%d\\n\",\n+\t\t   tf_dir_2_str(parms->dir),\n \t\t   parms->type,\n \t\t   index);\n \t\treturn -EINVAL;\n@@ -907,11 +908,11 @@ tf_get_tbl_entry_internal(struct tf *tfp,\n \t\t\t\t  parms->data,\n \t\t\t\t  parms->idx);\n \tif (rc) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Get failed, type:%d, rc:%d\\n\",\n-\t\t\t    parms->dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, Get failed, type:%d, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    parms->type,\n-\t\t\t    rc);\n+\t\t\t    strerror(-rc));\n \t}\n \n \treturn rc;\n@@ -932,8 +933,8 @@ tf_get_tbl_entry_internal(struct tf *tfp,\n  *   -EINVAL - Parameter error\n  */\n static int\n-tf_get_bulk_tbl_entry_internal(struct tf *tfp,\n-\t\t\t  struct tf_get_bulk_tbl_entry_parms *parms)\n+tf_bulk_get_tbl_entry_internal(struct tf *tfp,\n+\t\t\t  struct tf_bulk_get_tbl_entry_parms *parms)\n {\n \tint rc;\n \tint id;\n@@ -975,7 +976,7 @@ tf_get_bulk_tbl_entry_internal(struct tf *tfp,\n \t}\n \n \t/* Get the entry */\n-\trc = tf_msg_get_bulk_tbl_entry(tfp, parms);\n+\trc = tf_msg_bulk_get_tbl_entry(tfp, parms);\n \tif (rc) {\n \t\tTFP_DRV_LOG(ERR,\n \t\t\t    \"%s, Bulk get failed, type:%d, rc:%s\\n\",\n@@ -1006,10 +1007,9 @@ static int\n tf_alloc_tbl_entry_shadow(struct tf_session *tfs __rte_unused,\n \t\t\t  struct tf_alloc_tbl_entry_parms *parms __rte_unused)\n {\n-\tPMD_DRV_LOG(ERR,\n-\t\t    \"dir:%d, Entry Alloc with search not supported\\n\",\n-\t\t    parms->dir);\n-\n+\tTFP_DRV_LOG(ERR,\n+\t\t    \"%s, Entry Alloc with search not supported\\n\",\n+\t\t    tf_dir_2_str(parms->dir));\n \n \treturn -EOPNOTSUPP;\n }\n@@ -1032,9 +1032,9 @@ static int\n tf_free_tbl_entry_shadow(struct tf_session *tfs,\n \t\t\t struct tf_free_tbl_entry_parms *parms)\n {\n-\tPMD_DRV_LOG(ERR,\n-\t\t    \"dir:%d, Entry Free with search not supported\\n\",\n-\t\t    parms->dir);\n+\tTFP_DRV_LOG(ERR,\n+\t\t    \"%s, Entry Free with search not supported\\n\",\n+\t\t    tf_dir_2_str(parms->dir));\n \n \treturn -EOPNOTSUPP;\n }\n@@ -1074,8 +1074,8 @@ tf_create_tbl_pool_external(enum tf_dir dir,\n \tparms.alignment = 0;\n \n \tif (tfp_calloc(&parms) != 0) {\n-\t\tPMD_DRV_LOG(ERR, \"%d: TBL: external pool failure %s\\n\",\n-\t\t\t    dir, strerror(-ENOMEM));\n+\t\tTFP_DRV_LOG(ERR, \"%s: TBL: external pool failure %s\\n\",\n+\t\t\t    tf_dir_2_str(dir), strerror(ENOMEM));\n \t\treturn -ENOMEM;\n \t}\n \n@@ -1084,8 +1084,8 @@ tf_create_tbl_pool_external(enum tf_dir dir,\n \trc = stack_init(num_entries, parms.mem_va, pool);\n \n \tif (rc != 0) {\n-\t\tPMD_DRV_LOG(ERR, \"%d: TBL: stack init failure %s\\n\",\n-\t\t\t    dir, strerror(-rc));\n+\t\tTFP_DRV_LOG(ERR, \"%s: TBL: stack init failure %s\\n\",\n+\t\t\t    tf_dir_2_str(dir), strerror(-rc));\n \t\tgoto cleanup;\n \t}\n \n@@ -1101,13 +1101,13 @@ tf_create_tbl_pool_external(enum tf_dir dir,\n \tfor (i = 0; i < num_entries; i++) {\n \t\trc = stack_push(pool, j);\n \t\tif (rc != 0) {\n-\t\t\tPMD_DRV_LOG(ERR, \"%s TBL: stack failure %s\\n\",\n+\t\t\tTFP_DRV_LOG(ERR, \"%s TBL: stack failure %s\\n\",\n \t\t\t\t    tf_dir_2_str(dir), strerror(-rc));\n \t\t\tgoto cleanup;\n \t\t}\n \n \t\tif (j < 0) {\n-\t\t\tPMD_DRV_LOG(ERR, \"%d TBL: invalid offset (%d)\\n\",\n+\t\t\tTFP_DRV_LOG(ERR, \"%d TBL: invalid offset (%d)\\n\",\n \t\t\t\t    dir, j);\n \t\t\tgoto cleanup;\n \t\t}\n@@ -1116,8 +1116,8 @@ tf_create_tbl_pool_external(enum tf_dir dir,\n \n \tif (!stack_is_full(pool)) {\n \t\trc = -EINVAL;\n-\t\tPMD_DRV_LOG(ERR, \"%d TBL: stack failure %s\\n\",\n-\t\t\t    dir, strerror(-rc));\n+\t\tTFP_DRV_LOG(ERR, \"%s TBL: stack failure %s\\n\",\n+\t\t\t    tf_dir_2_str(dir), strerror(-rc));\n \t\tgoto cleanup;\n \t}\n \treturn 0;\n@@ -1168,18 +1168,7 @@ tf_alloc_tbl_entry_pool_external(struct tf *tfp,\n \tstruct tf_tbl_scope_cb *tbl_scope_cb;\n \tstruct stack *pool;\n \n-\t/* Check parameters */\n-\tif (tfp == NULL || parms == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"Invalid parameters\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Session info invalid\\n\",\n-\t\t\t    parms->dir);\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n@@ -1188,9 +1177,9 @@ tf_alloc_tbl_entry_pool_external(struct tf *tfp,\n \ttbl_scope_cb = tbl_scope_cb_find(tfs, parms->tbl_scope_id);\n \n \tif (tbl_scope_cb == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t\t\"%s, table scope not allocated\\n\",\n-\t\t\t\t\ttf_dir_2_str(parms->dir));\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, table scope not allocated\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir));\n \t\treturn -EINVAL;\n \t}\n \tpool = &tbl_scope_cb->ext_act_pool[parms->dir];\n@@ -1200,9 +1189,9 @@ tf_alloc_tbl_entry_pool_external(struct tf *tfp,\n \trc = stack_pop(pool, &index);\n \n \tif (rc != 0) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t   \"dir:%d, Allocation failed, type:%d\\n\",\n-\t\t   parms->dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t   \"%s, Allocation failed, type:%d\\n\",\n+\t\t   tf_dir_2_str(parms->dir),\n \t\t   parms->type);\n \t\treturn rc;\n \t}\n@@ -1233,18 +1222,7 @@ tf_alloc_tbl_entry_pool_internal(struct tf *tfp,\n \tstruct bitalloc *session_pool;\n \tstruct tf_session *tfs;\n \n-\t/* Check parameters */\n-\tif (tfp == NULL || parms == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"Invalid parameters\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Session info invalid\\n\",\n-\t\t\t    parms->dir);\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n@@ -1254,11 +1232,10 @@ tf_alloc_tbl_entry_pool_internal(struct tf *tfp,\n \t    parms->type != TF_TBL_TYPE_ACT_ENCAP_8B &&\n \t    parms->type != TF_TBL_TYPE_ACT_ENCAP_16B &&\n \t    parms->type != TF_TBL_TYPE_ACT_ENCAP_64B &&\n-\t    parms->type != TF_TBL_TYPE_MIRROR_CONFIG &&\n \t    parms->type != TF_TBL_TYPE_ACT_STATS_64) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Type not supported, type:%d\\n\",\n-\t\t\t    parms->dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, Type not supported, type:%d\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    parms->type);\n \t\treturn -EOPNOTSUPP;\n \t}\n@@ -1276,9 +1253,9 @@ tf_alloc_tbl_entry_pool_internal(struct tf *tfp,\n \tif (id == -1) {\n \t\tfree_cnt = ba_free_count(session_pool);\n \n-\t\tPMD_DRV_LOG(ERR,\n-\t\t   \"dir:%d, Allocation failed, type:%d, free:%d\\n\",\n-\t\t   parms->dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t   \"%s, Allocation failed, type:%d, free:%d\\n\",\n+\t\t   tf_dir_2_str(parms->dir),\n \t\t   parms->type,\n \t\t   free_cnt);\n \t\treturn -ENOMEM;\n@@ -1323,18 +1300,7 @@ tf_free_tbl_entry_pool_external(struct tf *tfp,\n \tstruct tf_tbl_scope_cb *tbl_scope_cb;\n \tstruct stack *pool;\n \n-\t/* Check parameters */\n-\tif (tfp == NULL || parms == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"Invalid parameters\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Session info invalid\\n\",\n-\t\t\t    parms->dir);\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n@@ -1343,9 +1309,9 @@ tf_free_tbl_entry_pool_external(struct tf *tfp,\n \ttbl_scope_cb = tbl_scope_cb_find(tfs, parms->tbl_scope_id);\n \n \tif (tbl_scope_cb == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Session info invalid\\n\",\n-\t\t\t    parms->dir);\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, table scope error\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir));\n \t\treturn -EINVAL;\n \t}\n \tpool = &tbl_scope_cb->ext_act_pool[parms->dir];\n@@ -1355,9 +1321,9 @@ tf_free_tbl_entry_pool_external(struct tf *tfp,\n \trc = stack_push(pool, index);\n \n \tif (rc != 0) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t   \"dir:%d, consistency error, stack full, type:%d, idx:%d\\n\",\n-\t\t   parms->dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t   \"%s, consistency error, stack full, type:%d, idx:%d\\n\",\n+\t\t   tf_dir_2_str(parms->dir),\n \t\t   parms->type,\n \t\t   index);\n \t}\n@@ -1386,18 +1352,7 @@ tf_free_tbl_entry_pool_internal(struct tf *tfp,\n \tstruct tf_session *tfs;\n \tuint32_t index;\n \n-\t/* Check parameters */\n-\tif (tfp == NULL || parms == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"Invalid parameters\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Session info invalid\\n\",\n-\t\t\t    parms->dir);\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n@@ -1408,9 +1363,9 @@ tf_free_tbl_entry_pool_internal(struct tf *tfp,\n \t    parms->type != TF_TBL_TYPE_ACT_ENCAP_16B &&\n \t    parms->type != TF_TBL_TYPE_ACT_ENCAP_64B &&\n \t    parms->type != TF_TBL_TYPE_ACT_STATS_64) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Type not supported, type:%d\\n\",\n-\t\t\t    parms->dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, Type not supported, type:%d\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t    parms->type);\n \t\treturn -EOPNOTSUPP;\n \t}\n@@ -1439,9 +1394,9 @@ tf_free_tbl_entry_pool_internal(struct tf *tfp,\n \t/* Check if element was indeed allocated */\n \tid = ba_inuse_free(session_pool, index);\n \tif (id == -1) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t   \"dir:%d, Element not previously alloc'ed, type:%d, idx:%d\\n\",\n-\t\t   parms->dir,\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t   \"%s, Element not previously alloc'ed, type:%d, idx:%d\\n\",\n+\t\t   tf_dir_2_str(parms->dir),\n \t\t   parms->type,\n \t\t   index);\n \t\treturn -ENOMEM;\n@@ -1485,8 +1440,10 @@ tf_free_eem_tbl_scope_cb(struct tf *tfp,\n \ttbl_scope_cb = tbl_scope_cb_find(session,\n \t\t\t\t\t parms->tbl_scope_id);\n \n-\tif (tbl_scope_cb == NULL)\n+\tif (tbl_scope_cb == NULL) {\n+\t\tTFP_DRV_LOG(ERR, \"Table scope error\\n\");\n \t\treturn -EINVAL;\n+\t}\n \n \t/* Free Table control block */\n \tba_free(session->tbl_scope_pool_rx, tbl_scope_cb->index);\n@@ -1516,23 +1473,17 @@ tf_alloc_eem_tbl_scope(struct tf *tfp,\n \tint rc;\n \tenum tf_dir dir;\n \tstruct tf_tbl_scope_cb *tbl_scope_cb;\n-\tstruct tf_em_table *em_tables;\n+\tstruct hcapi_cfa_em_table *em_tables;\n \tint index;\n \tstruct tf_session *session;\n \tstruct tf_free_tbl_scope_parms free_parms;\n \n-\t/* check parameters */\n-\tif (parms == NULL || tfp->session == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"TBL: Invalid parameters\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n \tsession = (struct tf_session *)tfp->session->core_data;\n \n \t/* Get Table Scope control block from the session pool */\n \tindex = ba_alloc(session->tbl_scope_pool_rx);\n \tif (index == -1) {\n-\t\tPMD_DRV_LOG(ERR, \"EEM: Unable to allocate table scope \"\n+\t\tTFP_DRV_LOG(ERR, \"EEM: Unable to allocate table scope \"\n \t\t\t    \"Control Block\\n\");\n \t\treturn -ENOMEM;\n \t}\n@@ -1547,8 +1498,10 @@ tf_alloc_eem_tbl_scope(struct tf *tfp,\n \t\t\t\t     dir,\n \t\t\t\t     &tbl_scope_cb->em_caps[dir]);\n \t\tif (rc) {\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t\"EEM: Unable to query for EEM capability\\n\");\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"EEM: Unable to query for EEM capability,\"\n+\t\t\t\t    \" rc:%s\\n\",\n+\t\t\t\t    strerror(-rc));\n \t\t\tgoto cleanup;\n \t\t}\n \t}\n@@ -1565,8 +1518,10 @@ tf_alloc_eem_tbl_scope(struct tf *tfp,\n \t\t */\n \t\trc = tf_em_ctx_reg(tfp, tbl_scope_cb, dir);\n \t\tif (rc) {\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"EEM: Unable to register for EEM ctx\\n\");\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"EEM: Unable to register for EEM ctx,\"\n+\t\t\t\t    \" rc:%s\\n\",\n+\t\t\t\t    strerror(-rc));\n \t\t\tgoto cleanup;\n \t\t}\n \n@@ -1580,8 +1535,10 @@ tf_alloc_eem_tbl_scope(struct tf *tfp,\n \t\t\t\t   parms->hw_flow_cache_flush_timer,\n \t\t\t\t   dir);\n \t\tif (rc) {\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t\"TBL: Unable to configure EEM in firmware\\n\");\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"TBL: Unable to configure EEM in firmware\"\n+\t\t\t\t    \" rc:%s\\n\",\n+\t\t\t\t    strerror(-rc));\n \t\t\tgoto cleanup_full;\n \t\t}\n \n@@ -1590,8 +1547,10 @@ tf_alloc_eem_tbl_scope(struct tf *tfp,\n \t\t\t\t  HWRM_TF_EXT_EM_OP_INPUT_OP_EXT_EM_ENABLE);\n \n \t\tif (rc) {\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"EEM: Unable to enable EEM in firmware\\n\");\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"EEM: Unable to enable EEM in firmware\"\n+\t\t\t\t    \" rc:%s\\n\",\n+\t\t\t\t    strerror(-rc));\n \t\t\tgoto cleanup_full;\n \t\t}\n \n@@ -1604,9 +1563,9 @@ tf_alloc_eem_tbl_scope(struct tf *tfp,\n \t\t\t\t    em_tables[TF_RECORD_TABLE].num_entries,\n \t\t\t\t    em_tables[TF_RECORD_TABLE].entry_size);\n \t\tif (rc) {\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"%d TBL: Unable to allocate idx pools %s\\n\",\n-\t\t\t\t    dir,\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s TBL: Unable to allocate idx pools %s\\n\",\n+\t\t\t\t    tf_dir_2_str(dir),\n \t\t\t\t    strerror(-rc));\n \t\t\tgoto cleanup_full;\n \t\t}\n@@ -1634,13 +1593,12 @@ tf_set_tbl_entry(struct tf *tfp,\n \tstruct tf_tbl_scope_cb *tbl_scope_cb;\n \tstruct tf_session *session;\n \n-\tif (tfp == NULL || parms == NULL || parms->data == NULL)\n-\t\treturn -EINVAL;\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Session info invalid\\n\",\n-\t\t\t    parms->dir);\n+\tif (parms->data == NULL) {\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, invalid parms->data\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir));\n \t\treturn -EINVAL;\n \t}\n \n@@ -1654,9 +1612,9 @@ tf_set_tbl_entry(struct tf *tfp,\n \t\ttbl_scope_id = parms->tbl_scope_id;\n \n \t\tif (tbl_scope_id == TF_TBL_SCOPE_INVALID)  {\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"dir:%d, Table scope not allocated\\n\",\n-\t\t\t\t    parms->dir);\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s, Table scope not allocated\\n\",\n+\t\t\t\t    tf_dir_2_str(parms->dir));\n \t\t\treturn -EINVAL;\n \t\t}\n \n@@ -1665,18 +1623,21 @@ tf_set_tbl_entry(struct tf *tfp,\n \t\t */\n \t\ttbl_scope_cb = tbl_scope_cb_find(session, tbl_scope_id);\n \n-\t\tif (tbl_scope_cb == NULL)\n-\t\t\treturn -EINVAL;\n+\t\tif (tbl_scope_cb == NULL) {\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s, table scope error\\n\",\n+\t\t\t\t    tf_dir_2_str(parms->dir));\n+\t\t\t\treturn -EINVAL;\n+\t\t}\n \n \t\t/* External table, implicitly the Action table */\n-\t\tbase_addr = tf_em_get_table_page(tbl_scope_cb,\n-\t\t\t\t\t\t parms->dir,\n-\t\t\t\t\t\t offset,\n-\t\t\t\t\t\t TF_RECORD_TABLE);\n+\t\tbase_addr = (void *)(uintptr_t)\n+\t\thcapi_get_table_page(&tbl_scope_cb->em_ctx_info[parms->dir].em_tables[TF_RECORD_TABLE], offset);\n+\n \t\tif (base_addr == NULL) {\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"dir:%d, Base address lookup failed\\n\",\n-\t\t\t\t    parms->dir);\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s, Base address lookup failed\\n\",\n+\t\t\t\t    tf_dir_2_str(parms->dir));\n \t\t\treturn -EINVAL;\n \t\t}\n \n@@ -1688,11 +1649,11 @@ tf_set_tbl_entry(struct tf *tfp,\n \t\t/* Internal table type processing */\n \t\trc = tf_set_tbl_entry_internal(tfp, parms);\n \t\tif (rc) {\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"dir:%d, Set failed, type:%d, rc:%d\\n\",\n-\t\t\t\t    parms->dir,\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s, Set failed, type:%d, rc:%s\\n\",\n+\t\t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t\t    parms->type,\n-\t\t\t\t    rc);\n+\t\t\t\t    strerror(-rc));\n \t\t}\n \t}\n \n@@ -1706,31 +1667,24 @@ tf_get_tbl_entry(struct tf *tfp,\n {\n \tint rc = 0;\n \n-\tif (tfp == NULL || parms == NULL)\n-\t\treturn -EINVAL;\n-\n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Session info invalid\\n\",\n-\t\t\t    parms->dir);\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \n \tif (parms->type == TF_TBL_TYPE_EXT) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, External table type not supported\\n\",\n-\t\t\t    parms->dir);\n+\t\t/* Not supported, yet */\n+\t\tTFP_DRV_LOG(ERR,\n+\t\t\t    \"%s, External table type not supported\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir));\n \n \t\trc = -EOPNOTSUPP;\n \t} else {\n \t\t/* Internal table type processing */\n \t\trc = tf_get_tbl_entry_internal(tfp, parms);\n \t\tif (rc)\n-\t\t\tPMD_DRV_LOG(ERR,\n-\t\t\t\t    \"dir:%d, Get failed, type:%d, rc:%d\\n\",\n-\t\t\t\t    parms->dir,\n+\t\t\tTFP_DRV_LOG(ERR,\n+\t\t\t\t    \"%s, Get failed, type:%d, rc:%s\\n\",\n+\t\t\t\t    tf_dir_2_str(parms->dir),\n \t\t\t\t    parms->type,\n-\t\t\t\t    rc);\n+\t\t\t\t    strerror(-rc));\n \t}\n \n \treturn rc;\n@@ -1738,8 +1692,8 @@ tf_get_tbl_entry(struct tf *tfp,\n \n /* API defined in tf_core.h */\n int\n-tf_get_bulk_tbl_entry(struct tf *tfp,\n-\t\t struct tf_get_bulk_tbl_entry_parms *parms)\n+tf_bulk_get_tbl_entry(struct tf *tfp,\n+\t\t struct tf_bulk_get_tbl_entry_parms *parms)\n {\n \tint rc = 0;\n \n@@ -1754,7 +1708,7 @@ tf_get_bulk_tbl_entry(struct tf *tfp,\n \t\trc = -EOPNOTSUPP;\n \t} else {\n \t\t/* Internal table type processing */\n-\t\trc = tf_get_bulk_tbl_entry_internal(tfp, parms);\n+\t\trc = tf_bulk_get_tbl_entry_internal(tfp, parms);\n \t\tif (rc)\n \t\t\tTFP_DRV_LOG(ERR,\n \t\t\t\t    \"%s, Bulk get failed, type:%d, rc:%s\\n\",\n@@ -1773,11 +1727,7 @@ tf_alloc_tbl_scope(struct tf *tfp,\n {\n \tint rc;\n \n-\t/* check parameters */\n-\tif (parms == NULL || tfp == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"TBL: Invalid parameters\\n\");\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION_NO_DIR(tfp, parms);\n \n \trc = tf_alloc_eem_tbl_scope(tfp, parms);\n \n@@ -1791,11 +1741,7 @@ tf_free_tbl_scope(struct tf *tfp,\n {\n \tint rc;\n \n-\t/* check parameters */\n-\tif (parms == NULL || tfp == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"TBL: Invalid parameters\\n\");\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION_NO_DIR(tfp, parms);\n \n \t/* free table scope and all associated resources */\n \trc = tf_free_eem_tbl_scope_cb(tfp, parms);\n@@ -1813,11 +1759,7 @@ tf_alloc_tbl_entry(struct tf *tfp,\n \tstruct tf_session *tfs;\n #endif /* TF_SHADOW */\n \n-\t/* Check parameters */\n-\tif (parms == NULL || tfp == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"TBL: Invalid parameters\\n\");\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n \t/*\n \t * No shadow copy support for external tables, allocate and return\n \t */\n@@ -1827,13 +1769,6 @@ tf_alloc_tbl_entry(struct tf *tfp,\n \t}\n \n #if (TF_SHADOW == 1)\n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Session info invalid\\n\",\n-\t\t\t    parms->dir);\n-\t\treturn -EINVAL;\n-\t}\n-\n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n \t/* Search the Shadow DB for requested element. If not found go\n@@ -1849,9 +1784,9 @@ tf_alloc_tbl_entry(struct tf *tfp,\n \n \trc = tf_alloc_tbl_entry_pool_internal(tfp, parms);\n \tif (rc)\n-\t\tPMD_DRV_LOG(ERR, \"dir%d, Alloc failed, rc:%d\\n\",\n-\t\t\t    parms->dir,\n-\t\t\t    rc);\n+\t\tTFP_DRV_LOG(ERR, \"%s, Alloc failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n \n \treturn rc;\n }\n@@ -1866,11 +1801,8 @@ tf_free_tbl_entry(struct tf *tfp,\n \tstruct tf_session *tfs;\n #endif /* TF_SHADOW */\n \n-\t/* Check parameters */\n-\tif (parms == NULL || tfp == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"TBL: Invalid parameters\\n\");\n-\t\treturn -EINVAL;\n-\t}\n+\tTF_CHECK_PARMS_SESSION(tfp, parms);\n+\n \t/*\n \t * No shadow of external tables so just free the entry\n \t */\n@@ -1880,13 +1812,6 @@ tf_free_tbl_entry(struct tf *tfp,\n \t}\n \n #if (TF_SHADOW == 1)\n-\tif (tfp->session == NULL || tfp->session->core_data == NULL) {\n-\t\tPMD_DRV_LOG(ERR,\n-\t\t\t    \"dir:%d, Session info invalid\\n\",\n-\t\t\t    parms->dir);\n-\t\treturn -EINVAL;\n-\t}\n-\n \ttfs = (struct tf_session *)(tfp->session->core_data);\n \n \t/* Search the Shadow DB for requested element. If not found go\n@@ -1903,16 +1828,16 @@ tf_free_tbl_entry(struct tf *tfp,\n \trc = tf_free_tbl_entry_pool_internal(tfp, parms);\n \n \tif (rc)\n-\t\tPMD_DRV_LOG(ERR, \"dir:%d, Alloc failed, rc:%d\\n\",\n-\t\t\t    parms->dir,\n-\t\t\t    rc);\n+\t\tTFP_DRV_LOG(ERR, \"%s, Alloc failed, rc:%s\\n\",\n+\t\t\t    tf_dir_2_str(parms->dir),\n+\t\t\t    strerror(-rc));\n \treturn rc;\n }\n \n \n static void\n-tf_dump_link_page_table(struct tf_em_page_tbl *tp,\n-\t\t\tstruct tf_em_page_tbl *tp_next)\n+tf_dump_link_page_table(struct hcapi_cfa_em_page_tbl *tp,\n+\t\t\tstruct hcapi_cfa_em_page_tbl *tp_next)\n {\n \tuint64_t *pg_va;\n \tuint32_t i;\n@@ -1951,9 +1876,9 @@ void tf_dump_dma(struct tf *tfp, uint32_t tbl_scope_id)\n {\n \tstruct tf_session      *session;\n \tstruct tf_tbl_scope_cb *tbl_scope_cb;\n-\tstruct tf_em_page_tbl *tp;\n-\tstruct tf_em_page_tbl *tp_next;\n-\tstruct tf_em_table *tbl;\n+\tstruct hcapi_cfa_em_page_tbl *tp;\n+\tstruct hcapi_cfa_em_page_tbl *tp_next;\n+\tstruct hcapi_cfa_em_table *tbl;\n \tint i;\n \tint j;\n \tint dir;\n@@ -1967,7 +1892,7 @@ void tf_dump_dma(struct tf *tfp, uint32_t tbl_scope_id)\n \ttbl_scope_cb = tbl_scope_cb_find(session,\n \t\t\t\t\t tbl_scope_id);\n \tif (tbl_scope_cb == NULL)\n-\t\tTFP_DRV_LOG(ERR, \"No table scope\\n\");\n+\t\tPMD_DRV_LOG(ERR, \"No table scope\\n\");\n \n \tfor (dir = 0; dir < TF_DIR_MAX; dir++) {\n \t\tprintf(\"Direction %s:\\n\", (dir == TF_DIR_RX ? \"Rx\" : \"Tx\"));\ndiff --git a/drivers/net/bnxt/tf_core/tf_tbl.h b/drivers/net/bnxt/tf_core/tf_tbl.h\nindex ee8a14665..b17557345 100644\n--- a/drivers/net/bnxt/tf_core/tf_tbl.h\n+++ b/drivers/net/bnxt/tf_core/tf_tbl.h\n@@ -13,45 +13,6 @@\n \n struct tf_session;\n \n-enum tf_pg_tbl_lvl {\n-\tTF_PT_LVL_0,\n-\tTF_PT_LVL_1,\n-\tTF_PT_LVL_2,\n-\tTF_PT_LVL_MAX\n-};\n-\n-enum tf_em_table_type {\n-\tTF_KEY0_TABLE,\n-\tTF_KEY1_TABLE,\n-\tTF_RECORD_TABLE,\n-\tTF_EFC_TABLE,\n-\tTF_MAX_TABLE\n-};\n-\n-struct tf_em_page_tbl {\n-\tuint32_t\tpg_count;\n-\tuint32_t\tpg_size;\n-\tvoid\t\t**pg_va_tbl;\n-\tuint64_t\t*pg_pa_tbl;\n-};\n-\n-struct tf_em_table {\n-\tint\t\t\t\ttype;\n-\tuint32_t\t\t\tnum_entries;\n-\tuint16_t\t\t\tctx_id;\n-\tuint32_t\t\t\tentry_size;\n-\tint\t\t\t\tnum_lvl;\n-\tuint32_t\t\t\tpage_cnt[TF_PT_LVL_MAX];\n-\tuint64_t\t\t\tnum_data_pages;\n-\tvoid\t\t\t\t*l0_addr;\n-\tuint64_t\t\t\tl0_dma_addr;\n-\tstruct tf_em_page_tbl pg_tbl[TF_PT_LVL_MAX];\n-};\n-\n-struct tf_em_ctx_mem_info {\n-\tstruct tf_em_table\t\tem_tables[TF_MAX_TABLE];\n-};\n-\n /** table scope control block content */\n struct tf_em_caps {\n \tuint32_t flags;\n@@ -74,18 +35,14 @@ struct tf_em_caps {\n struct tf_tbl_scope_cb {\n \tuint32_t tbl_scope_id;\n \tint index;\n-\tstruct tf_em_ctx_mem_info  em_ctx_info[TF_DIR_MAX];\n+\tstruct hcapi_cfa_em_ctx_mem_info  em_ctx_info[TF_DIR_MAX];\n \tstruct tf_em_caps          em_caps[TF_DIR_MAX];\n \tstruct stack               ext_act_pool[TF_DIR_MAX];\n \tuint32_t                  *ext_act_pool_mem[TF_DIR_MAX];\n };\n \n-/**\n- * Hardware Page sizes supported for EEM:\n- *   4K, 8K, 64K, 256K, 1M, 2M, 4M, 1G.\n- *\n- * Round-down other page sizes to the lower hardware page\n- * size supported.\n+/** Hardware Page sizes supported for EEM: 4K, 8K, 64K, 256K, 1M, 2M, 4M, 1G.\n+ * Round-down other page sizes to the lower hardware page size supported.\n  */\n #define TF_EM_PAGE_SIZE_4K 12\n #define TF_EM_PAGE_SIZE_8K 13\n",
    "prefixes": [
        "v5",
        "16/51"
    ]
}