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GET /api/patches/69675/?format=api
{ "id": 69675, "url": "https://patches.dpdk.org/api/patches/69675/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20200503104755.19545-3-elibr@mellanox.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20200503104755.19545-3-elibr@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20200503104755.19545-3-elibr@mellanox.com", "date": "2020-05-03T10:47:55", "name": "[V2,2/2] net/mlx5: optimize performance for IPv4/IPv6 ethertype", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "d7fb3030fe485d16434930efc4ba8d55fee26a90", "submitter": { "id": 1383, "url": "https://patches.dpdk.org/api/people/1383/?format=api", "name": "Eli Britstein", "email": "elibr@mellanox.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20200503104755.19545-3-elibr@mellanox.com/mbox/", "series": [ { "id": 9795, "url": "https://patches.dpdk.org/api/series/9795/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=9795", "date": "2020-05-03T10:47:55", "name": "net/mlx5: optimize performance for IPv4/IPv6", "version": 2, "mbox": "https://patches.dpdk.org/series/9795/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/69675/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/69675/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 496CFA04AF;\n\tSun, 3 May 2020 12:48:04 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 985DC1D53B;\n\tSun, 3 May 2020 12:48:03 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 6AE7A1D53B\n for <dev@dpdk.org>; Sun, 3 May 2020 12:48:02 +0200 (CEST)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n elibr@mellanox.com)\n with ESMTPS (AES256-SHA encrypted); 3 May 2020 13:48:01 +0300", "from dev-r-vrt-215.mtr.labs.mlnx. (dev-r-vrt-215.mtr.labs.mlnx\n [10.212.215.1])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 043Am1OA024289;\n Sun, 3 May 2020 13:48:01 +0300" ], "From": "Eli Britstein <elibr@mellanox.com>", "To": "dev@dpdk.org", "Cc": "matan@mellanox.com, rasland@mellanox.com, orika@mellanox.com,\n viacheslavo@mellanox.com, Eli Britstein <elibr@mellanox.com>", "Date": "Sun, 3 May 2020 10:47:55 +0000", "Message-Id": "<20200503104755.19545-3-elibr@mellanox.com>", "X-Mailer": "git-send-email 2.14.5", "In-Reply-To": "<20200503104755.19545-1-elibr@mellanox.com>", "References": "<20200503104755.19545-1-elibr@mellanox.com>", "Subject": "[dpdk-dev] [PATCH V2 2/2] net/mlx5: optimize performance for\n\tIPv4/IPv6 ethertype", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The HW is optimized for IPv4/IPv6. For such cases avoid matching on\nethertype, and use ip_version field instead.\n\nSigned-off-by: Eli Britstein <elibr@mellanox.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\n---\n drivers/net/mlx5/mlx5_flow_dv.c | 53 +++++++++++++++++++++++++++++++----------\n 1 file changed, 41 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 174d86103b..1d9ed221c7 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -5473,6 +5473,8 @@ flow_dv_set_match_ip_version(uint32_t group,\n \t\tMLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,\n \t\t\t ip_version);\n \tMLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);\n+\tMLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);\n+\tMLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);\n }\n \n /**\n@@ -5489,7 +5491,8 @@ flow_dv_set_match_ip_version(uint32_t group,\n */\n static void\n flow_dv_translate_item_eth(void *matcher, void *key,\n-\t\t\t const struct rte_flow_item *item, int inner)\n+\t\t\t const struct rte_flow_item *item, int inner,\n+\t\t\t uint32_t group)\n {\n \tconst struct rte_flow_item_eth *eth_m = item->mask;\n \tconst struct rte_flow_item_eth *eth_v = item->spec;\n@@ -5544,11 +5547,22 @@ flow_dv_translate_item_eth(void *matcher, void *key,\n \t * HW supports match on one Ethertype, the Ethertype following the last\n \t * VLAN tag of the packet (see PRM).\n \t * Set match on ethertype only if ETH header is not followed by VLAN.\n+\t * HW is optimized for IPv4/IPv6. In such cases, avoid setting\n+\t * ethertype, and use ip_version field instead.\n \t */\n-\tMLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,\n-\t\t rte_be_to_cpu_16(eth_m->type));\n-\tl24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);\n-\t*(uint16_t *)(l24_v) = eth_m->type & eth_v->type;\n+\tif (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_IPV4) &&\n+\t eth_m->type == 0xFFFF) {\n+\t\tflow_dv_set_match_ip_version(group, headers_v, headers_m, 4);\n+\t} else if (eth_v->type == RTE_BE16(RTE_ETHER_TYPE_IPV6) &&\n+\t\t eth_m->type == 0xFFFF) {\n+\t\tflow_dv_set_match_ip_version(group, headers_v, headers_m, 6);\n+\t} else {\n+\t\tMLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,\n+\t\t\t rte_be_to_cpu_16(eth_m->type));\n+\t\tl24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,\n+\t\t\t\t ethertype);\n+\t\t*(uint16_t *)(l24_v) = eth_m->type & eth_v->type;\n+\t}\n }\n \n /**\n@@ -5569,7 +5583,7 @@ static void\n flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,\n \t\t\t void *matcher, void *key,\n \t\t\t const struct rte_flow_item *item,\n-\t\t\t int inner)\n+\t\t\t int inner, uint32_t group)\n {\n \tconst struct rte_flow_item_vlan *vlan_m = item->mask;\n \tconst struct rte_flow_item_vlan *vlan_v = item->spec;\n@@ -5607,10 +5621,23 @@ flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,\n \tMLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);\n \tMLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);\n \tMLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);\n-\tMLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,\n-\t\t rte_be_to_cpu_16(vlan_m->inner_type));\n-\tMLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,\n-\t\t rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));\n+\t/*\n+\t * HW is optimized for IPv4/IPv6. In such cases, avoid setting\n+\t * ethertype, and use ip_version field instead.\n+\t */\n+\tif (vlan_v->inner_type == RTE_BE16(RTE_ETHER_TYPE_IPV4) &&\n+\t vlan_m->inner_type == 0xFFFF) {\n+\t\tflow_dv_set_match_ip_version(group, headers_v, headers_m, 4);\n+\t} else if (vlan_v->inner_type == RTE_BE16(RTE_ETHER_TYPE_IPV6) &&\n+\t\t vlan_m->inner_type == 0xFFFF) {\n+\t\tflow_dv_set_match_ip_version(group, headers_v, headers_m, 6);\n+\t} else {\n+\t\tMLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,\n+\t\t\t rte_be_to_cpu_16(vlan_m->inner_type));\n+\t\tMLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,\n+\t\t\t rte_be_to_cpu_16(vlan_m->inner_type &\n+\t\t\t\t\t vlan_v->inner_type));\n+\t}\n }\n \n /**\n@@ -7944,7 +7971,8 @@ __flow_dv_translate(struct rte_eth_dev *dev,\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ITEM_TYPE_ETH:\n \t\t\tflow_dv_translate_item_eth(match_mask, match_value,\n-\t\t\t\t\t\t items, tunnel);\n+\t\t\t\t\t\t items, tunnel,\n+\t\t\t\t\t\t dev_flow->dv.group);\n \t\t\tmatcher.priority = MLX5_PRIORITY_MAP_L2;\n \t\t\tlast_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :\n \t\t\t\t\t MLX5_FLOW_LAYER_OUTER_L2;\n@@ -7952,7 +7980,8 @@ __flow_dv_translate(struct rte_eth_dev *dev,\n \t\tcase RTE_FLOW_ITEM_TYPE_VLAN:\n \t\t\tflow_dv_translate_item_vlan(dev_flow,\n \t\t\t\t\t\t match_mask, match_value,\n-\t\t\t\t\t\t items, tunnel);\n+\t\t\t\t\t\t items, tunnel,\n+\t\t\t\t\t\t dev_flow->dv.group);\n \t\t\tmatcher.priority = MLX5_PRIORITY_MAP_L2;\n \t\t\tlast_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |\n \t\t\t\t\t MLX5_FLOW_LAYER_INNER_VLAN) :\n", "prefixes": [ "V2", "2/2" ] }