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GET /api/patches/68511/?format=api
{ "id": 68511, "url": "https://patches.dpdk.org/api/patches/68511/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1586938751-32808-26-git-send-email-venkatkumar.duvvuru@broadcom.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1586938751-32808-26-git-send-email-venkatkumar.duvvuru@broadcom.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1586938751-32808-26-git-send-email-venkatkumar.duvvuru@broadcom.com", "date": "2020-04-15T08:19:02", "name": "[v4,25/34] net/bnxt: add support for rte flow item parsing", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "0dd29af0166676c8f35c68d36ff9a54b542786df", "submitter": { "id": 1635, "url": "https://patches.dpdk.org/api/people/1635/?format=api", "name": "Venkat Duvvuru", "email": "venkatkumar.duvvuru@broadcom.com" }, "delegate": { "id": 1766, "url": "https://patches.dpdk.org/api/users/1766/?format=api", "username": "ajitkhaparde", "first_name": "Ajit", "last_name": "Khaparde", "email": "ajit.khaparde@broadcom.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1586938751-32808-26-git-send-email-venkatkumar.duvvuru@broadcom.com/mbox/", "series": [ { "id": 9386, "url": "https://patches.dpdk.org/api/series/9386/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=9386", "date": "2020-04-15T08:18:37", "name": "add support for host based flow table management", "version": 4, "mbox": "https://patches.dpdk.org/series/9386/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/68511/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/68511/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2DBABA0563;\n\tWed, 15 Apr 2020 10:25:33 +0200 (CEST)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id F3D7D1D589;\n\tWed, 15 Apr 2020 10:20:34 +0200 (CEST)", "from mail-pj1-f65.google.com (mail-pj1-f65.google.com\n [209.85.216.65]) by dpdk.org (Postfix) with ESMTP id 92A3D1D5BF\n for <dev@dpdk.org>; Wed, 15 Apr 2020 10:20:31 +0200 (CEST)", "by mail-pj1-f65.google.com with SMTP id t40so6371668pjb.3\n for <dev@dpdk.org>; Wed, 15 Apr 2020 01:20:31 -0700 (PDT)", "from S60.dhcp.broadcom.net ([192.19.234.250])\n by smtp.gmail.com with ESMTPSA id fy21sm3819019pjb.25.2020.04.15.01.20.27\n (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128);\n Wed, 15 Apr 2020 01:20:29 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com;\n s=google;\n h=from:to:cc:subject:date:message-id:in-reply-to:references;\n bh=nCdCY/zYCS+Gdek3FIlBIRR4u8k6D8HnAYUsi+co274=;\n b=Cx5Qnn+0DHAe8oR+a07Agvn/+PbsufndUwhy/Kx9A18zD1kO3VPJdKbijTTt/DMGhe\n +gReZw7rG1qKW+tYsFxOXsneOb0LatEA//ko2ATT1TT9Mwj89on/nzIa4oOEaIi8zpDc\n qCWzKqwzxecn1yMERB+kf8Fjty2xXqZNMKjBs=", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20161025;\n h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n :references;\n bh=nCdCY/zYCS+Gdek3FIlBIRR4u8k6D8HnAYUsi+co274=;\n b=sAp1isD+JQLcYnNPPWcDMzaylVFBp472mx1grK9XQo/sv89Rlp3n9KtRC0fUbW/zHW\n QLYWqOwedqV3P2Kuvjuktg0qU7r+uXMQKX92U5KxxXTFTwyJ5xWOLuAcaDAoMHiU2UpB\n x8Ywoowhw+jvMxaSHehScu1oHL1Tk4Y1JolwDbVSZQNOovONxBtrrowaBK9C8e4CNbMT\n Ok1nTWMM1l/sO0QgTAg9HkvkXO9UPz997y9+uP4FQsS7Dmx9uGcNXO1rMjZnRf7F+6Rj\n HMI8ubR/CMJJ1L02n/jsl+yQOHdjVcpPpeCjHfqzxGectP907TAtkJLfxL2nxrl1ysM0\n nP/g==", "X-Gm-Message-State": "AGi0PuaK+MiV4nFRSWo/GLl8blpZWbAOOgG+Tm1tP3lJdpwDiAyWpFhC\n 9RMUkztbAtc2kEkxg6+0dmYln6027jDb4LVrM0BFbjA1GsSABzGQy7o0mWfj5E8MZc0vLYbX2ol\n 9i2c7gUw8yO0baKYD9HtFgVNdb70WmptrpZP5HH1EdyEoMmxkcmhSIF01pejZYx8UaDV/", "X-Google-Smtp-Source": "\n APiQypKBIltLINSgYBk0KxQ7WIJ1hBN1ueOWStSZp8RWC70byUdyGV8iLU/OuIgYn4uOhIYoD5mEtA==", "X-Received": "by 2002:a17:90a:d901:: with SMTP id\n c1mr5203973pjv.120.1586938829635;\n Wed, 15 Apr 2020 01:20:29 -0700 (PDT)", "From": "Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>", "To": "dev@dpdk.org", "Cc": "Kishore Padmanabha <kishore.padmanabha@broadcom.com>,\n Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>", "Date": "Wed, 15 Apr 2020 13:49:02 +0530", "Message-Id": "\n <1586938751-32808-26-git-send-email-venkatkumar.duvvuru@broadcom.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "\n <1586938751-32808-1-git-send-email-venkatkumar.duvvuru@broadcom.com>", "References": "\n <1586852011-37536-1-git-send-email-venkatkumar.duvvuru@broadcom.com>\n <1586938751-32808-1-git-send-email-venkatkumar.duvvuru@broadcom.com>", "Subject": "[dpdk-dev] [PATCH v4 25/34] net/bnxt: add support for rte flow item\n\tparsing", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\n\n1. Registers a callback handler for each rte_flow_item type, if it\n is supported\n2. Iterates through each rte_flow_item till RTE_FLOW_ITEM_TYPE_END\n3. Invokes the header call back handler\n4. Each header call back handler will populate the respective fields\n in hdr_field & hdr_bitmap\n\nSigned-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>\nSigned-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>\nReviewed-by: Lance Richardson <lance.richardson@broadcom.com>\nReviewed-by: Ajit Kumar Khaparde <ajit.khaparde@broadcom.com>\n---\n drivers/net/bnxt/Makefile | 1 +\n drivers/net/bnxt/tf_ulp/ulp_rte_parser.c | 767 ++++++++++++++++++++++++++\n drivers/net/bnxt/tf_ulp/ulp_rte_parser.h | 120 ++++\n drivers/net/bnxt/tf_ulp/ulp_template_db.c | 196 +++++++\n drivers/net/bnxt/tf_ulp/ulp_template_db.h | 7 +\n drivers/net/bnxt/tf_ulp/ulp_template_struct.h | 26 +\n 6 files changed, 1117 insertions(+)\n create mode 100644 drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\n create mode 100644 drivers/net/bnxt/tf_ulp/ulp_rte_parser.h", "diff": "diff --git a/drivers/net/bnxt/Makefile b/drivers/net/bnxt/Makefile\nindex 455fd5c..5e2d751 100644\n--- a/drivers/net/bnxt/Makefile\n+++ b/drivers/net/bnxt/Makefile\n@@ -64,6 +64,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_ulp/ulp_template_db.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_ulp/ulp_utils.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_ulp/ulp_mapper.c\n SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_ulp/ulp_matcher.c\n+SRCS-$(CONFIG_RTE_LIBRTE_BNXT_PMD) += tf_ulp/ulp_rte_parser.c\n \n #\n # Export include files\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\nnew file mode 100644\nindex 0000000..3ffdcbd\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.c\n@@ -0,0 +1,767 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2014-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#include \"bnxt.h\"\n+#include \"ulp_template_db.h\"\n+#include \"ulp_template_struct.h\"\n+#include \"bnxt_tf_common.h\"\n+#include \"ulp_rte_parser.h\"\n+#include \"ulp_utils.h\"\n+#include \"tfp.h\"\n+\n+/* Inline Func to read integer that is stored in big endian format */\n+static inline void ulp_util_field_int_read(uint8_t *buffer,\n+\t\t\t\t\t uint32_t *val)\n+{\n+\tuint32_t temp_val;\n+\n+\tmemcpy(&temp_val, buffer, sizeof(uint32_t));\n+\t*val = rte_be_to_cpu_32(temp_val);\n+}\n+\n+/* Inline Func to write integer that is stored in big endian format */\n+static inline void ulp_util_field_int_write(uint8_t *buffer,\n+\t\t\t\t\t uint32_t val)\n+{\n+\tuint32_t temp_val = rte_cpu_to_be_32(val);\n+\n+\tmemcpy(buffer, &temp_val, sizeof(uint32_t));\n+}\n+\n+/*\n+ * Function to handle the parsing of RTE Flows and placing\n+ * the RTE flow items into the ulp structures.\n+ */\n+int32_t\n+bnxt_ulp_rte_parser_hdr_parse(const struct rte_flow_item pattern[],\n+\t\t\t struct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field *hdr_field)\n+{\n+\tconst struct rte_flow_item *item = pattern;\n+\tuint32_t field_idx = BNXT_ULP_HDR_FIELD_LAST;\n+\tuint32_t vlan_idx = 0;\n+\tstruct bnxt_ulp_rte_hdr_info *hdr_info;\n+\n+\t/* Parse all the items in the pattern */\n+\twhile (item && item->type != RTE_FLOW_ITEM_TYPE_END) {\n+\t\t/* get the header information from the flow_hdr_info table */\n+\t\thdr_info = &ulp_hdr_info[item->type];\n+\t\tif (hdr_info->hdr_type ==\n+\t\t BNXT_ULP_HDR_TYPE_NOT_SUPPORTED) {\n+\t\t\tBNXT_TF_DBG(ERR,\n+\t\t\t\t \"Truflow parser does not support type %d\\n\",\n+\t\t\t\t item->type);\n+\t\t\treturn BNXT_TF_RC_PARSE_ERR;\n+\t\t} else if (hdr_info->hdr_type ==\n+\t\t\t BNXT_ULP_HDR_TYPE_SUPPORTED) {\n+\t\t\t/* call the registered callback handler */\n+\t\t\tif (hdr_info->proto_hdr_func) {\n+\t\t\t\tif (hdr_info->proto_hdr_func(item,\n+\t\t\t\t\t\t\t hdr_bitmap,\n+\t\t\t\t\t\t\t hdr_field,\n+\t\t\t\t\t\t\t &field_idx,\n+\t\t\t\t\t\t\t &vlan_idx) !=\n+\t\t\t\t BNXT_TF_RC_SUCCESS) {\n+\t\t\t\t\treturn BNXT_TF_RC_ERROR;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\t\titem++;\n+\t}\n+\treturn BNXT_TF_RC_SUCCESS;\n+}\n+\n+/* Function to handle the parsing of RTE Flow item PF Header. */\n+static int32_t\n+ulp_rte_parser_svif_set(struct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t\tstruct ulp_rte_hdr_field *hdr_field,\n+\t\t\tenum rte_flow_item_type proto,\n+\t\t\tuint32_t svif,\n+\t\t\tuint32_t mask)\n+{\n+\tif (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_SVIF)) {\n+\t\tBNXT_TF_DBG(ERR,\n+\t\t\t \"SVIF already set,\"\n+\t\t\t \" multiple sources not supported\\n\");\n+\t\treturn BNXT_TF_RC_ERROR;\n+\t}\n+\n+\t/* TBD: Check for any mapping errors for svif */\n+\t/* Update the hdr_bitmap with BNXT_ULP_HDR_PROTO_SVIF. */\n+\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_SVIF);\n+\n+\tif (proto != RTE_FLOW_ITEM_TYPE_PF) {\n+\t\tmemcpy(hdr_field[BNXT_ULP_HDR_FIELD_SVIF_INDEX].spec,\n+\t\t &svif, sizeof(svif));\n+\t\tmemcpy(hdr_field[BNXT_ULP_HDR_FIELD_SVIF_INDEX].mask,\n+\t\t &mask, sizeof(mask));\n+\t\thdr_field[BNXT_ULP_HDR_FIELD_SVIF_INDEX].size = sizeof(svif);\n+\t}\n+\n+\treturn BNXT_TF_RC_SUCCESS;\n+}\n+\n+/* Function to handle the parsing of RTE Flow item PF Header. */\n+int32_t\n+ulp_rte_pf_hdr_handler(const struct rte_flow_item *item,\n+\t\t struct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t struct ulp_rte_hdr_field *hdr_field,\n+\t\t uint32_t *field_idx __rte_unused,\n+\t\t uint32_t *vlan_idx __rte_unused)\n+{\n+\treturn ulp_rte_parser_svif_set(hdr_bitmap, hdr_field,\n+\t\t\t\t item->type, 0, 0);\n+}\n+\n+/* Function to handle the parsing of RTE Flow item VF Header. */\n+int32_t\n+ulp_rte_vf_hdr_handler(const struct rte_flow_item *item,\n+\t\t struct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t struct ulp_rte_hdr_field\t *hdr_field,\n+\t\t uint32_t *field_idx __rte_unused,\n+\t\t uint32_t *vlan_idx __rte_unused)\n+{\n+\tconst struct rte_flow_item_vf *vf_spec, *vf_mask;\n+\tuint32_t svif = 0, mask = 0;\n+\n+\tvf_spec = item->spec;\n+\tvf_mask = item->mask;\n+\n+\t/*\n+\t * Copy the rte_flow_item for eth into hdr_field using ethernet\n+\t * header fields.\n+\t */\n+\tif (vf_spec)\n+\t\tsvif = vf_spec->id;\n+\tif (vf_mask)\n+\t\tmask = vf_mask->id;\n+\n+\treturn ulp_rte_parser_svif_set(hdr_bitmap, hdr_field,\n+\t\t\t\t item->type, svif, mask);\n+}\n+\n+/* Function to handle the parsing of RTE Flow item port id Header. */\n+int32_t\n+ulp_rte_port_id_hdr_handler(const struct rte_flow_item *item,\n+\t\t\t struct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field *hdr_field,\n+\t\t\t uint32_t *field_idx __rte_unused,\n+\t\t\t uint32_t *vlan_idx __rte_unused)\n+{\n+\tconst struct rte_flow_item_port_id *port_spec, *port_mask;\n+\tuint32_t svif = 0, mask = 0;\n+\n+\tport_spec = item->spec;\n+\tport_mask = item->mask;\n+\n+\t/*\n+\t * Copy the rte_flow_item for Port into hdr_field using port id\n+\t * header fields.\n+\t */\n+\tif (port_spec)\n+\t\tsvif = port_spec->id;\n+\tif (port_mask)\n+\t\tmask = port_mask->id;\n+\n+\treturn ulp_rte_parser_svif_set(hdr_bitmap, hdr_field,\n+\t\t\t\t item->type, svif, mask);\n+}\n+\n+/* Function to handle the parsing of RTE Flow item phy port Header. */\n+int32_t\n+ulp_rte_phy_port_hdr_handler(const struct rte_flow_item *item,\n+\t\t\t struct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field *hdr_field,\n+\t\t\t uint32_t *field_idx __rte_unused,\n+\t\t\t uint32_t *vlan_idx __rte_unused)\n+{\n+\tconst struct rte_flow_item_phy_port *port_spec, *port_mask;\n+\tuint32_t svif = 0, mask = 0;\n+\n+\tport_spec = item->spec;\n+\tport_mask = item->mask;\n+\n+\t/* Copy the rte_flow_item for phy port into hdr_field */\n+\tif (port_spec)\n+\t\tsvif = port_spec->index;\n+\tif (port_mask)\n+\t\tmask = port_mask->index;\n+\n+\treturn ulp_rte_parser_svif_set(hdr_bitmap, hdr_field,\n+\t\t\t\t item->type, svif, mask);\n+}\n+\n+/* Function to handle the parsing of RTE Flow item Ethernet Header. */\n+int32_t\n+ulp_rte_eth_hdr_handler(const struct rte_flow_item *item,\n+\t\t\tstruct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t\tstruct ulp_rte_hdr_field *hdr_field,\n+\t\t\tuint32_t *field_idx,\n+\t\t\tuint32_t *vlan_idx)\n+{\n+\tconst struct rte_flow_item_eth *eth_spec, *eth_mask;\n+\tuint32_t idx = *field_idx;\n+\tuint32_t mdx = *field_idx;\n+\tuint64_t set_flag = 0;\n+\n+\teth_spec = item->spec;\n+\teth_mask = item->mask;\n+\n+\t/*\n+\t * Copy the rte_flow_item for eth into hdr_field using ethernet\n+\t * header fields\n+\t */\n+\tif (eth_spec) {\n+\t\thdr_field[idx].size = sizeof(eth_spec->dst.addr_bytes);\n+\t\tmemcpy(hdr_field[idx++].spec, eth_spec->dst.addr_bytes,\n+\t\t sizeof(eth_spec->dst.addr_bytes));\n+\t\thdr_field[idx].size = sizeof(eth_spec->src.addr_bytes);\n+\t\tmemcpy(hdr_field[idx++].spec, eth_spec->src.addr_bytes,\n+\t\t sizeof(eth_spec->src.addr_bytes));\n+\t\thdr_field[idx].size = sizeof(eth_spec->type);\n+\t\tmemcpy(hdr_field[idx++].spec, ð_spec->type,\n+\t\t sizeof(eth_spec->type));\n+\t} else {\n+\t\tidx += BNXT_ULP_PROTO_HDR_ETH_NUM;\n+\t}\n+\n+\tif (eth_mask) {\n+\t\tmemcpy(hdr_field[mdx++].mask, eth_mask->dst.addr_bytes,\n+\t\t sizeof(eth_mask->dst.addr_bytes));\n+\t\tmemcpy(hdr_field[mdx++].mask, eth_mask->src.addr_bytes,\n+\t\t sizeof(eth_mask->src.addr_bytes));\n+\t\tmemcpy(hdr_field[mdx++].mask, ð_mask->type,\n+\t\t sizeof(eth_mask->type));\n+\t}\n+\t/* Add number of vlan header elements */\n+\t*field_idx = idx + BNXT_ULP_PROTO_HDR_VLAN_NUM;\n+\t*vlan_idx = idx;\n+\n+\t/* Update the hdr_bitmap with BNXT_ULP_HDR_PROTO_I_ETH */\n+\tset_flag = ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_ETH);\n+\tif (set_flag)\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_ETH);\n+\telse\n+\t\tULP_BITMAP_RESET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_ETH);\n+\n+\t/* update the hdr_bitmap with BNXT_ULP_HDR_PROTO_O_ETH */\n+\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_ETH);\n+\n+\treturn BNXT_TF_RC_SUCCESS;\n+}\n+\n+/* Function to handle the parsing of RTE Flow item Vlan Header. */\n+int32_t\n+ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,\n+\t\t\t struct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field *hdr_field,\n+\t\t\t uint32_t *field_idx __rte_unused,\n+\t\t\t uint32_t *vlan_idx)\n+{\n+\tconst struct rte_flow_item_vlan *vlan_spec, *vlan_mask;\n+\tuint32_t idx = *vlan_idx;\n+\tuint32_t mdx = *vlan_idx;\n+\tuint16_t vlan_tag, priority;\n+\tuint32_t outer_vtag_num = 0, inner_vtag_num = 0;\n+\tuint8_t *outer_tag_buffer;\n+\tuint8_t *inner_tag_buffer;\n+\n+\tvlan_spec = item->spec;\n+\tvlan_mask = item->mask;\n+\touter_tag_buffer = hdr_field[BNXT_ULP_HDR_FIELD_O_VTAG_NUM].spec;\n+\tinner_tag_buffer = hdr_field[BNXT_ULP_HDR_FIELD_I_VTAG_NUM].spec;\n+\n+\t/*\n+\t * Copy the rte_flow_item for vlan into hdr_field using Vlan\n+\t * header fields\n+\t */\n+\tif (vlan_spec) {\n+\t\tvlan_tag = ntohs(vlan_spec->tci);\n+\t\tpriority = htons(vlan_tag >> 13);\n+\t\tvlan_tag &= 0xfff;\n+\t\tvlan_tag = htons(vlan_tag);\n+\n+\t\thdr_field[idx].size = sizeof(priority);\n+\t\tmemcpy(hdr_field[idx++].spec, &priority, sizeof(priority));\n+\t\thdr_field[idx].size = sizeof(vlan_tag);\n+\t\tmemcpy(hdr_field[idx++].spec, &vlan_tag, sizeof(vlan_tag));\n+\t\thdr_field[idx].size = sizeof(vlan_spec->inner_type);\n+\t\tmemcpy(hdr_field[idx++].spec, &vlan_spec->inner_type,\n+\t\t sizeof(vlan_spec->inner_type));\n+\t} else {\n+\t\tidx += BNXT_ULP_PROTO_HDR_S_VLAN_NUM;\n+\t}\n+\n+\tif (vlan_mask) {\n+\t\tvlan_tag = ntohs(vlan_mask->tci);\n+\t\tpriority = htons(vlan_tag >> 13);\n+\t\tvlan_tag &= 0xfff;\n+\t\tvlan_tag = htons(vlan_tag);\n+\n+\t\tmemcpy(hdr_field[mdx++].mask, &priority, sizeof(priority));\n+\t\tmemcpy(hdr_field[mdx++].mask, &vlan_tag, sizeof(vlan_tag));\n+\t\tmemcpy(hdr_field[mdx++].mask, &vlan_mask->inner_type,\n+\t\t sizeof(vlan_mask->inner_type));\n+\t}\n+\t/* Set the vlan index to new incremented value */\n+\t*vlan_idx = idx;\n+\n+\t/* Get the outer tag and inner tag counts */\n+\tulp_util_field_int_read(outer_tag_buffer, &outer_vtag_num);\n+\tulp_util_field_int_read(inner_tag_buffer, &inner_vtag_num);\n+\n+\t/* Update the hdr_bitmap of the vlans */\n+\tif (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_ETH) &&\n+\t !ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_OO_VLAN)) {\n+\t\t/* Set the outer vlan bit and update the vlan tag num */\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_OO_VLAN);\n+\t\touter_vtag_num++;\n+\t\tulp_util_field_int_write(outer_tag_buffer, outer_vtag_num);\n+\t\thdr_field[BNXT_ULP_HDR_FIELD_O_VTAG_NUM].size =\n+\t\t\t\t\t\t\tsizeof(uint32_t);\n+\t} else if (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_ETH) &&\n+\t\t ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_OO_VLAN) &&\n+\t\t !ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_OI_VLAN)) {\n+\t\t/* Set the outer vlan bit and update the vlan tag num */\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_OI_VLAN);\n+\t\touter_vtag_num++;\n+\t\tulp_util_field_int_write(outer_tag_buffer, outer_vtag_num);\n+\t\thdr_field[BNXT_ULP_HDR_FIELD_O_VTAG_NUM].size =\n+\t\t\t\t\t\t\t sizeof(uint32_t);\n+\t} else if (ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_O_ETH) &&\n+\t\t ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_OO_VLAN) &&\n+\t\t ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_OI_VLAN) &&\n+\t\t ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_I_ETH) &&\n+\t\t !ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_IO_VLAN)) {\n+\t\t/* Set the inner vlan bit and update the vlan tag num */\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_IO_VLAN);\n+\t\tinner_vtag_num++;\n+\t\tulp_util_field_int_write(inner_tag_buffer, inner_vtag_num);\n+\t\thdr_field[BNXT_ULP_HDR_FIELD_I_VTAG_NUM].size =\n+\t\t\t\t\t\t\t sizeof(uint32_t);\n+\t} else if (ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_O_ETH) &&\n+\t\t ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_OO_VLAN) &&\n+\t\t ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_OI_VLAN) &&\n+\t\t ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_I_ETH) &&\n+\t\t ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_IO_VLAN) &&\n+\t\t !ULP_BITMAP_ISSET(hdr_bitmap->bits,\n+\t\t\t\t BNXT_ULP_HDR_BIT_II_VLAN)) {\n+\t\t/* Set the inner vlan bit and update the vlan tag num */\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_II_VLAN);\n+\t\tinner_vtag_num++;\n+\t\tulp_util_field_int_write(inner_tag_buffer, inner_vtag_num);\n+\t\thdr_field[BNXT_ULP_HDR_FIELD_I_VTAG_NUM].size =\n+\t\t\t\t\t\t\t sizeof(uint32_t);\n+\t} else {\n+\t\tBNXT_TF_DBG(ERR, \"Error Parsing:Vlan hdr found withtout eth\\n\");\n+\t\treturn BNXT_TF_RC_ERROR;\n+\t}\n+\treturn BNXT_TF_RC_SUCCESS;\n+}\n+\n+/* Function to handle the parsing of RTE Flow item IPV4 Header. */\n+int32_t\n+ulp_rte_ipv4_hdr_handler(const struct rte_flow_item *item,\n+\t\t\t struct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field *hdr_field,\n+\t\t\t uint32_t *field_idx,\n+\t\t\t uint32_t *vlan_idx __rte_unused)\n+{\n+\tconst struct rte_flow_item_ipv4 *ipv4_spec, *ipv4_mask;\n+\tuint32_t idx = *field_idx;\n+\tuint32_t mdx = *field_idx;\n+\n+\tipv4_spec = item->spec;\n+\tipv4_mask = item->mask;\n+\n+\tif (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_L3)) {\n+\t\tBNXT_TF_DBG(ERR, \"Parse Error:Third L3 header not supported\\n\");\n+\t\treturn BNXT_TF_RC_ERROR;\n+\t}\n+\n+\t/*\n+\t * Copy the rte_flow_item for ipv4 into hdr_field using ipv4\n+\t * header fields\n+\t */\n+\tif (ipv4_spec) {\n+\t\thdr_field[idx].size = sizeof(ipv4_spec->hdr.version_ihl);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv4_spec->hdr.version_ihl,\n+\t\t sizeof(ipv4_spec->hdr.version_ihl));\n+\t\thdr_field[idx].size = sizeof(ipv4_spec->hdr.type_of_service);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv4_spec->hdr.type_of_service,\n+\t\t sizeof(ipv4_spec->hdr.type_of_service));\n+\t\thdr_field[idx].size = sizeof(ipv4_spec->hdr.total_length);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv4_spec->hdr.total_length,\n+\t\t sizeof(ipv4_spec->hdr.total_length));\n+\t\thdr_field[idx].size = sizeof(ipv4_spec->hdr.packet_id);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv4_spec->hdr.packet_id,\n+\t\t sizeof(ipv4_spec->hdr.packet_id));\n+\t\thdr_field[idx].size = sizeof(ipv4_spec->hdr.fragment_offset);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv4_spec->hdr.fragment_offset,\n+\t\t sizeof(ipv4_spec->hdr.fragment_offset));\n+\t\thdr_field[idx].size = sizeof(ipv4_spec->hdr.time_to_live);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv4_spec->hdr.time_to_live,\n+\t\t sizeof(ipv4_spec->hdr.time_to_live));\n+\t\thdr_field[idx].size = sizeof(ipv4_spec->hdr.next_proto_id);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv4_spec->hdr.next_proto_id,\n+\t\t sizeof(ipv4_spec->hdr.next_proto_id));\n+\t\thdr_field[idx].size = sizeof(ipv4_spec->hdr.hdr_checksum);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv4_spec->hdr.hdr_checksum,\n+\t\t sizeof(ipv4_spec->hdr.hdr_checksum));\n+\t\thdr_field[idx].size = sizeof(ipv4_spec->hdr.src_addr);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv4_spec->hdr.src_addr,\n+\t\t sizeof(ipv4_spec->hdr.src_addr));\n+\t\thdr_field[idx].size = sizeof(ipv4_spec->hdr.dst_addr);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv4_spec->hdr.dst_addr,\n+\t\t sizeof(ipv4_spec->hdr.dst_addr));\n+\t} else {\n+\t\tidx += BNXT_ULP_PROTO_HDR_IPV4_NUM;\n+\t}\n+\n+\tif (ipv4_mask) {\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv4_mask->hdr.version_ihl,\n+\t\t sizeof(ipv4_mask->hdr.version_ihl));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv4_mask->hdr.type_of_service,\n+\t\t sizeof(ipv4_mask->hdr.type_of_service));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv4_mask->hdr.total_length,\n+\t\t sizeof(ipv4_mask->hdr.total_length));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv4_mask->hdr.packet_id,\n+\t\t sizeof(ipv4_mask->hdr.packet_id));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv4_mask->hdr.fragment_offset,\n+\t\t sizeof(ipv4_mask->hdr.fragment_offset));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv4_mask->hdr.time_to_live,\n+\t\t sizeof(ipv4_mask->hdr.time_to_live));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv4_mask->hdr.next_proto_id,\n+\t\t sizeof(ipv4_mask->hdr.next_proto_id));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv4_mask->hdr.hdr_checksum,\n+\t\t sizeof(ipv4_mask->hdr.hdr_checksum));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv4_mask->hdr.src_addr,\n+\t\t sizeof(ipv4_mask->hdr.src_addr));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv4_mask->hdr.dst_addr,\n+\t\t sizeof(ipv4_mask->hdr.dst_addr));\n+\t}\n+\t*field_idx = idx; /* Number of ipv4 header elements */\n+\n+\t/* Set the ipv4 header bitmap and computed l3 header bitmaps */\n+\tif (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_L3) ||\n+\t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV4) ||\n+\t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV6)) {\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_IPV4);\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_L3);\n+\t} else {\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV4);\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_L3);\n+\t}\n+\treturn BNXT_TF_RC_SUCCESS;\n+}\n+\n+/* Function to handle the parsing of RTE Flow item IPV6 Header */\n+int32_t\n+ulp_rte_ipv6_hdr_handler(const struct rte_flow_item *item,\n+\t\t\t struct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field *hdr_field,\n+\t\t\t uint32_t *field_idx,\n+\t\t\t uint32_t *vlan_idx __rte_unused)\n+{\n+\tconst struct rte_flow_item_ipv6 *ipv6_spec, *ipv6_mask;\n+\tuint32_t idx = *field_idx;\n+\tuint32_t mdx = *field_idx;\n+\n+\tipv6_spec = item->spec;\n+\tipv6_mask = item->mask;\n+\n+\tif (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_L3)) {\n+\t\tBNXT_TF_DBG(ERR, \"Parse Error: 3'rd L3 header not supported\\n\");\n+\t\treturn BNXT_TF_RC_ERROR;\n+\t}\n+\n+\t/*\n+\t * Copy the rte_flow_item for ipv4 into hdr_field using ipv4\n+\t * header fields\n+\t */\n+\tif (ipv6_spec) {\n+\t\thdr_field[idx].size = sizeof(ipv6_spec->hdr.vtc_flow);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv6_spec->hdr.vtc_flow,\n+\t\t sizeof(ipv6_spec->hdr.vtc_flow));\n+\t\thdr_field[idx].size = sizeof(ipv6_spec->hdr.payload_len);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv6_spec->hdr.payload_len,\n+\t\t sizeof(ipv6_spec->hdr.payload_len));\n+\t\thdr_field[idx].size = sizeof(ipv6_spec->hdr.proto);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv6_spec->hdr.proto,\n+\t\t sizeof(ipv6_spec->hdr.proto));\n+\t\thdr_field[idx].size = sizeof(ipv6_spec->hdr.hop_limits);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv6_spec->hdr.hop_limits,\n+\t\t sizeof(ipv6_spec->hdr.hop_limits));\n+\t\thdr_field[idx].size = sizeof(ipv6_spec->hdr.src_addr);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv6_spec->hdr.src_addr,\n+\t\t sizeof(ipv6_spec->hdr.src_addr));\n+\t\thdr_field[idx].size = sizeof(ipv6_spec->hdr.dst_addr);\n+\t\tmemcpy(hdr_field[idx++].spec, &ipv6_spec->hdr.dst_addr,\n+\t\t sizeof(ipv6_spec->hdr.dst_addr));\n+\t} else {\n+\t\tidx += BNXT_ULP_PROTO_HDR_IPV6_NUM;\n+\t}\n+\n+\tif (ipv6_mask) {\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv6_mask->hdr.vtc_flow,\n+\t\t sizeof(ipv6_mask->hdr.vtc_flow));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv6_mask->hdr.payload_len,\n+\t\t sizeof(ipv6_mask->hdr.payload_len));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv6_mask->hdr.proto,\n+\t\t sizeof(ipv6_mask->hdr.proto));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv6_mask->hdr.hop_limits,\n+\t\t sizeof(ipv6_mask->hdr.hop_limits));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv6_mask->hdr.src_addr,\n+\t\t sizeof(ipv6_mask->hdr.src_addr));\n+\t\tmemcpy(hdr_field[mdx++].mask, &ipv6_mask->hdr.dst_addr,\n+\t\t sizeof(ipv6_mask->hdr.dst_addr));\n+\t}\n+\t*field_idx = idx; /* add number of ipv6 header elements */\n+\n+\t/* Set the ipv6 header bitmap and computed l3 header bitmaps */\n+\tif (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_L3) ||\n+\t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV4) ||\n+\t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV6)) {\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_IPV6);\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_L3);\n+\t} else {\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_IPV6);\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_L3);\n+\t}\n+\treturn BNXT_TF_RC_SUCCESS;\n+}\n+\n+/* Function to handle the parsing of RTE Flow item UDP Header. */\n+int32_t\n+ulp_rte_udp_hdr_handler(const struct rte_flow_item *item,\n+\t\t\tstruct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t\tstruct ulp_rte_hdr_field *hdr_field,\n+\t\t\tuint32_t *field_idx,\n+\t\t\tuint32_t *vlan_idx __rte_unused)\n+{\n+\tconst struct rte_flow_item_udp *udp_spec, *udp_mask;\n+\tuint32_t idx = *field_idx;\n+\tuint32_t mdx = *field_idx;\n+\n+\tudp_spec = item->spec;\n+\tudp_mask = item->mask;\n+\n+\tif (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_L4)) {\n+\t\tBNXT_TF_DBG(ERR, \"Parse Err:Third L4 header not supported\\n\");\n+\t\treturn BNXT_TF_RC_ERROR;\n+\t}\n+\n+\t/*\n+\t * Copy the rte_flow_item for ipv4 into hdr_field using ipv4\n+\t * header fields\n+\t */\n+\tif (udp_spec) {\n+\t\thdr_field[idx].size = sizeof(udp_spec->hdr.src_port);\n+\t\tmemcpy(hdr_field[idx++].spec, &udp_spec->hdr.src_port,\n+\t\t sizeof(udp_spec->hdr.src_port));\n+\t\thdr_field[idx].size = sizeof(udp_spec->hdr.dst_port);\n+\t\tmemcpy(hdr_field[idx++].spec, &udp_spec->hdr.dst_port,\n+\t\t sizeof(udp_spec->hdr.dst_port));\n+\t\thdr_field[idx].size = sizeof(udp_spec->hdr.dgram_len);\n+\t\tmemcpy(hdr_field[idx++].spec, &udp_spec->hdr.dgram_len,\n+\t\t sizeof(udp_spec->hdr.dgram_len));\n+\t\thdr_field[idx].size = sizeof(udp_spec->hdr.dgram_cksum);\n+\t\tmemcpy(hdr_field[idx++].spec, &udp_spec->hdr.dgram_cksum,\n+\t\t sizeof(udp_spec->hdr.dgram_cksum));\n+\t} else {\n+\t\tidx += BNXT_ULP_PROTO_HDR_UDP_NUM;\n+\t}\n+\n+\tif (udp_mask) {\n+\t\tmemcpy(hdr_field[mdx++].mask, &udp_mask->hdr.src_port,\n+\t\t sizeof(udp_mask->hdr.src_port));\n+\t\tmemcpy(hdr_field[mdx++].mask, &udp_mask->hdr.dst_port,\n+\t\t sizeof(udp_mask->hdr.dst_port));\n+\t\tmemcpy(hdr_field[mdx++].mask, &udp_mask->hdr.dgram_len,\n+\t\t sizeof(udp_mask->hdr.dgram_len));\n+\t\tmemcpy(hdr_field[mdx++].mask, &udp_mask->hdr.dgram_cksum,\n+\t\t sizeof(udp_mask->hdr.dgram_cksum));\n+\t}\n+\t*field_idx = idx; /* Add number of UDP header elements */\n+\n+\t/* Set the udp header bitmap and computed l4 header bitmaps */\n+\tif (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_L4) ||\n+\t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP) ||\n+\t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP)) {\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_UDP);\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_L4);\n+\t} else {\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP);\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_L4);\n+\t}\n+\treturn BNXT_TF_RC_SUCCESS;\n+}\n+\n+/* Function to handle the parsing of RTE Flow item TCP Header. */\n+int32_t\n+ulp_rte_tcp_hdr_handler(const struct rte_flow_item *item,\n+\t\t\tstruct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t\tstruct ulp_rte_hdr_field *hdr_field,\n+\t\t\tuint32_t *field_idx,\n+\t\t\tuint32_t *vlan_idx __rte_unused)\n+{\n+\tconst struct rte_flow_item_tcp *tcp_spec, *tcp_mask;\n+\tuint32_t idx = *field_idx;\n+\tuint32_t mdx = *field_idx;\n+\n+\ttcp_spec = item->spec;\n+\ttcp_mask = item->mask;\n+\n+\tif (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_L4)) {\n+\t\tBNXT_TF_DBG(ERR, \"Parse Error:Third L4 header not supported\\n\");\n+\t\treturn BNXT_TF_RC_ERROR;\n+\t}\n+\n+\t/*\n+\t * Copy the rte_flow_item for ipv4 into hdr_field using ipv4\n+\t * header fields\n+\t */\n+\tif (tcp_spec) {\n+\t\thdr_field[idx].size = sizeof(tcp_spec->hdr.src_port);\n+\t\tmemcpy(hdr_field[idx++].spec, &tcp_spec->hdr.src_port,\n+\t\t sizeof(tcp_spec->hdr.src_port));\n+\t\thdr_field[idx].size = sizeof(tcp_spec->hdr.dst_port);\n+\t\tmemcpy(hdr_field[idx++].spec, &tcp_spec->hdr.dst_port,\n+\t\t sizeof(tcp_spec->hdr.dst_port));\n+\t\thdr_field[idx].size = sizeof(tcp_spec->hdr.sent_seq);\n+\t\tmemcpy(hdr_field[idx++].spec, &tcp_spec->hdr.sent_seq,\n+\t\t sizeof(tcp_spec->hdr.sent_seq));\n+\t\thdr_field[idx].size = sizeof(tcp_spec->hdr.recv_ack);\n+\t\tmemcpy(hdr_field[idx++].spec, &tcp_spec->hdr.recv_ack,\n+\t\t sizeof(tcp_spec->hdr.recv_ack));\n+\t\thdr_field[idx].size = sizeof(tcp_spec->hdr.data_off);\n+\t\tmemcpy(hdr_field[idx++].spec, &tcp_spec->hdr.data_off,\n+\t\t sizeof(tcp_spec->hdr.data_off));\n+\t\thdr_field[idx].size = sizeof(tcp_spec->hdr.tcp_flags);\n+\t\tmemcpy(hdr_field[idx++].spec, &tcp_spec->hdr.tcp_flags,\n+\t\t sizeof(tcp_spec->hdr.tcp_flags));\n+\t\thdr_field[idx].size = sizeof(tcp_spec->hdr.rx_win);\n+\t\tmemcpy(hdr_field[idx++].spec, &tcp_spec->hdr.rx_win,\n+\t\t sizeof(tcp_spec->hdr.rx_win));\n+\t\thdr_field[idx].size = sizeof(tcp_spec->hdr.cksum);\n+\t\tmemcpy(hdr_field[idx++].spec, &tcp_spec->hdr.cksum,\n+\t\t sizeof(tcp_spec->hdr.cksum));\n+\t\thdr_field[idx].size = sizeof(tcp_spec->hdr.tcp_urp);\n+\t\tmemcpy(hdr_field[idx++].spec, &tcp_spec->hdr.tcp_urp,\n+\t\t sizeof(tcp_spec->hdr.tcp_urp));\n+\t} else {\n+\t\tidx += BNXT_ULP_PROTO_HDR_TCP_NUM;\n+\t}\n+\n+\tif (tcp_mask) {\n+\t\tmemcpy(hdr_field[mdx++].mask, &tcp_mask->hdr.src_port,\n+\t\t sizeof(tcp_mask->hdr.src_port));\n+\t\tmemcpy(hdr_field[mdx++].mask, &tcp_mask->hdr.dst_port,\n+\t\t sizeof(tcp_mask->hdr.dst_port));\n+\t\tmemcpy(hdr_field[mdx++].mask, &tcp_mask->hdr.sent_seq,\n+\t\t sizeof(tcp_mask->hdr.sent_seq));\n+\t\tmemcpy(hdr_field[mdx++].mask, &tcp_mask->hdr.recv_ack,\n+\t\t sizeof(tcp_mask->hdr.recv_ack));\n+\t\tmemcpy(hdr_field[mdx++].mask, &tcp_mask->hdr.data_off,\n+\t\t sizeof(tcp_mask->hdr.data_off));\n+\t\tmemcpy(hdr_field[mdx++].mask, &tcp_mask->hdr.tcp_flags,\n+\t\t sizeof(tcp_mask->hdr.tcp_flags));\n+\t\tmemcpy(hdr_field[mdx++].mask, &tcp_mask->hdr.rx_win,\n+\t\t sizeof(tcp_mask->hdr.rx_win));\n+\t\tmemcpy(hdr_field[mdx++].mask, &tcp_mask->hdr.cksum,\n+\t\t sizeof(tcp_mask->hdr.cksum));\n+\t\tmemcpy(hdr_field[mdx++].mask, &tcp_mask->hdr.tcp_urp,\n+\t\t sizeof(tcp_mask->hdr.tcp_urp));\n+\t}\n+\t*field_idx = idx; /* add number of TCP header elements */\n+\n+\t/* Set the udp header bitmap and computed l4 header bitmaps */\n+\tif (ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_L4) ||\n+\t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_UDP) ||\n+\t ULP_BITMAP_ISSET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP)) {\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_TCP);\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_I_L4);\n+\t} else {\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_TCP);\n+\t\tULP_BITMAP_SET(hdr_bitmap->bits, BNXT_ULP_HDR_BIT_O_L4);\n+\t}\n+\treturn BNXT_TF_RC_SUCCESS;\n+}\n+\n+/* Function to handle the parsing of RTE Flow item Vxlan Header. */\n+int32_t\n+ulp_rte_vxlan_hdr_handler(const struct rte_flow_item *item,\n+\t\t\t struct ulp_rte_hdr_bitmap *hdrbitmap,\n+\t\t\t struct ulp_rte_hdr_field *hdr_field,\n+\t\t\t uint32_t *field_idx,\n+\t\t\t uint32_t *vlan_idx __rte_unused)\n+{\n+\tconst struct rte_flow_item_vxlan *vxlan_spec, *vxlan_mask;\n+\tuint32_t idx = *field_idx;\n+\tuint32_t mdx = *field_idx;\n+\n+\tvxlan_spec = item->spec;\n+\tvxlan_mask = item->mask;\n+\n+\t/*\n+\t * Copy the rte_flow_item for vxlan into hdr_field using vxlan\n+\t * header fields\n+\t */\n+\tif (vxlan_spec) {\n+\t\thdr_field[idx].size = sizeof(vxlan_spec->flags);\n+\t\tmemcpy(hdr_field[idx++].spec, &vxlan_spec->flags,\n+\t\t sizeof(vxlan_spec->flags));\n+\t\thdr_field[idx].size = sizeof(vxlan_spec->rsvd0);\n+\t\tmemcpy(hdr_field[idx++].spec, &vxlan_spec->rsvd0,\n+\t\t sizeof(vxlan_spec->rsvd0));\n+\t\thdr_field[idx].size = sizeof(vxlan_spec->vni);\n+\t\tmemcpy(hdr_field[idx++].spec, &vxlan_spec->vni,\n+\t\t sizeof(vxlan_spec->vni));\n+\t\thdr_field[idx].size = sizeof(vxlan_spec->rsvd1);\n+\t\tmemcpy(hdr_field[idx++].spec, &vxlan_spec->rsvd1,\n+\t\t sizeof(vxlan_spec->rsvd1));\n+\t} else {\n+\t\tidx += BNXT_ULP_PROTO_HDR_VXLAN_NUM;\n+\t}\n+\n+\tif (vxlan_mask) {\n+\t\tmemcpy(hdr_field[mdx++].mask, &vxlan_mask->flags,\n+\t\t sizeof(vxlan_mask->flags));\n+\t\tmemcpy(hdr_field[mdx++].mask, &vxlan_mask->rsvd0,\n+\t\t sizeof(vxlan_mask->rsvd0));\n+\t\tmemcpy(hdr_field[mdx++].mask, &vxlan_mask->vni,\n+\t\t sizeof(vxlan_mask->vni));\n+\t\tmemcpy(hdr_field[mdx++].mask, &vxlan_mask->rsvd1,\n+\t\t sizeof(vxlan_mask->rsvd1));\n+\t}\n+\t*field_idx = idx; /* Add number of vxlan header elements */\n+\n+\t/* Update the hdr_bitmap with vxlan */\n+\tULP_BITMAP_SET(hdrbitmap->bits, BNXT_ULP_HDR_BIT_T_VXLAN);\n+\treturn BNXT_TF_RC_SUCCESS;\n+}\n+\n+/* Function to handle the parsing of RTE Flow item void Header */\n+int32_t\n+ulp_rte_void_hdr_handler(const struct rte_flow_item *item __rte_unused,\n+\t\t\t struct ulp_rte_hdr_bitmap *hdr_bit __rte_unused,\n+\t\t\t struct ulp_rte_hdr_field *hdr_field __rte_unused,\n+\t\t\t uint32_t *field_idx __rte_unused,\n+\t\t\t uint32_t *vlan_idx __rte_unused)\n+{\n+\treturn BNXT_TF_RC_SUCCESS;\n+}\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h\nnew file mode 100644\nindex 0000000..3a7845d\n--- /dev/null\n+++ b/drivers/net/bnxt/tf_ulp/ulp_rte_parser.h\n@@ -0,0 +1,120 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2014-2020 Broadcom\n+ * All rights reserved.\n+ */\n+\n+#ifndef _ULP_RTE_PARSER_H_\n+#define _ULP_RTE_PARSER_H_\n+\n+#include <rte_log.h>\n+#include <rte_flow.h>\n+#include <rte_flow_driver.h>\n+#include \"ulp_template_db.h\"\n+#include \"ulp_template_struct.h\"\n+\n+/*\n+ * Function to handle the parsing of RTE Flows and placing\n+ * the RTE flow items into the ulp structures.\n+ */\n+int32_t\n+bnxt_ulp_rte_parser_hdr_parse(const struct rte_flow_item pattern[],\n+\t\t\t struct ulp_rte_hdr_bitmap *hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field *hdr_field);\n+\n+/* Function to handle the parsing of RTE Flow item PF Header. */\n+int32_t\n+ulp_rte_pf_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t struct ulp_rte_hdr_bitmap\t*hdr_bitmap,\n+\t\t struct ulp_rte_hdr_field\t\t*hdr_field,\n+\t\t uint32_t\t\t\t\t*field_idx,\n+\t\t uint32_t\t\t\t\t*vlan_idx);\n+\n+/* Function to handle the parsing of RTE Flow item VF Header. */\n+int32_t\n+ulp_rte_vf_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t struct ulp_rte_hdr_bitmap\t*hdr_bitmap,\n+\t\t struct ulp_rte_hdr_field\t\t*hdr_field,\n+\t\t uint32_t\t\t\t\t*field_idx,\n+\t\t uint32_t\t\t\t\t*vlan_idx);\n+\n+/* Function to handle the parsing of RTE Flow item port id Header. */\n+int32_t\n+ulp_rte_port_id_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t\t struct ulp_rte_hdr_bitmap\t*hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field\t*hdr_field,\n+\t\t\t uint32_t\t\t\t*field_idx,\n+\t\t\t uint32_t\t\t\t*vlan_idx);\n+\n+/* Function to handle the parsing of RTE Flow item port id Header. */\n+int32_t\n+ulp_rte_phy_port_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t\t struct ulp_rte_hdr_bitmap\t*hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field\t*hdr_field,\n+\t\t\t uint32_t\t\t\t*field_idx,\n+\t\t\t uint32_t\t\t\t*vlan_idx);\n+\n+/* Function to handle the RTE item Ethernet Header. */\n+int32_t\n+ulp_rte_eth_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t\tstruct ulp_rte_hdr_bitmap\t*hdr_bitmap,\n+\t\t\tstruct ulp_rte_hdr_field\t*hdr_field,\n+\t\t\tuint32_t\t\t\t*field_idx,\n+\t\t\tuint32_t\t\t\t*vlan_idx);\n+\n+/* Function to handle the parsing of RTE Flow item Vlan Header. */\n+int32_t\n+ulp_rte_vlan_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t\t struct ulp_rte_hdr_bitmap\t*hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field\t*hdr_field,\n+\t\t\t uint32_t\t\t\t*field_idx,\n+\t\t\t uint32_t\t\t\t*vlan_idx);\n+\n+/* Function to handle the parsing of RTE Flow item IPV4 Header. */\n+int32_t\n+ulp_rte_ipv4_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t\t struct ulp_rte_hdr_bitmap\t*hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field\t*hdr_field,\n+\t\t\t uint32_t\t\t\t*field_idx,\n+\t\t\t uint32_t\t\t\t*vlan_idx);\n+\n+/* Function to handle the parsing of RTE Flow item IPV6 Header. */\n+int32_t\n+ulp_rte_ipv6_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t\t struct ulp_rte_hdr_bitmap\t*hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field\t*hdr_field,\n+\t\t\t uint32_t\t\t\t*field_idx,\n+\t\t\t uint32_t\t\t\t*vlan_idx);\n+\n+/* Function to handle the parsing of RTE Flow item UDP Header. */\n+int32_t\n+ulp_rte_udp_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t\tstruct ulp_rte_hdr_bitmap\t*hdr_bitmap,\n+\t\t\tstruct ulp_rte_hdr_field\t*hdr_field,\n+\t\t\tuint32_t\t\t\t*field_idx,\n+\t\t\tuint32_t\t\t\t*vlan_idx);\n+\n+/* Function to handle the parsing of RTE Flow item TCP Header. */\n+int32_t\n+ulp_rte_tcp_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t\tstruct ulp_rte_hdr_bitmap\t*hdr_bitmap,\n+\t\t\tstruct ulp_rte_hdr_field\t*hdr_field,\n+\t\t\tuint32_t\t\t\t*field_idx,\n+\t\t\tuint32_t\t\t\t*vlan_idx);\n+\n+/* Function to handle the parsing of RTE Flow item Vxlan Header. */\n+int32_t\n+ulp_rte_vxlan_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t\t struct ulp_rte_hdr_bitmap\t*hdrbitmap,\n+\t\t\t struct ulp_rte_hdr_field\t*hdr_field,\n+\t\t\t uint32_t\t\t\t*field_idx,\n+\t\t\t uint32_t\t\t\t*vlan_idx);\n+\n+/* Function to handle the parsing of RTE Flow item void Header. */\n+int32_t\n+ulp_rte_void_hdr_handler(const struct rte_flow_item\t*item,\n+\t\t\t struct ulp_rte_hdr_bitmap\t*hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field\t*hdr_field,\n+\t\t\t uint32_t\t\t\t*field_idx,\n+\t\t\t uint32_t\t\t\t*vlan_idx);\n+\n+#endif /* _ULP_RTE_PARSER_H_ */\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.c b/drivers/net/bnxt/tf_ulp/ulp_template_db.c\nindex 5a5b1f1..6c214b2 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.c\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.c\n@@ -11,6 +11,7 @@\n #include \"ulp_template_db.h\"\n #include \"ulp_template_field_db.h\"\n #include \"ulp_template_struct.h\"\n+#include \"ulp_rte_parser.h\"\n \n uint32_t ulp_act_prop_map_table[] = {\n \t[BNXT_ULP_ACT_PROP_IDX_ENCAP_TUN_SZ] =\n@@ -110,6 +111,201 @@ struct bnxt_ulp_device_params ulp_device_params[] = {\n \t}\n };\n \n+struct bnxt_ulp_rte_hdr_info ulp_hdr_info[] = {\n+\t[RTE_FLOW_ITEM_TYPE_END] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_END,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_VOID] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_void_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_INVERT] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_ANY] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_PF] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_pf_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_VF] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_vf_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_PHY_PORT] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_phy_port_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_PORT_ID] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_port_id_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_RAW] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_ETH] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_eth_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_VLAN] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_vlan_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_IPV4] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_ipv4_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_IPV6] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_ipv6_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_ICMP] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_UDP] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_udp_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_TCP] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_tcp_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_SCTP] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_VXLAN] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_SUPPORTED,\n+\t\t.proto_hdr_func = ulp_rte_vxlan_hdr_handler\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_E_TAG] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_NVGRE] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_MPLS] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_GRE] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_FUZZY] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_GTP] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_GTPC] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_GTPU] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_ESP] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_GENEVE] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_VXLAN_GPE] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_IPV6_EXT] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_ICMP6] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_ICMP6_ND_NS] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_ICMP6_ND_NA] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_SLA_ETH] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_ICMP6_ND_OPT_TLA_ETH] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_MARK] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_META] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_GRE_KEY] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_GTP_PSC] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_PPPOES] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_PPPOED] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_PPPOE_PROTO_ID] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_NSH] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_IGMP] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_AH] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t},\n+\t[RTE_FLOW_ITEM_TYPE_HIGIG2] = {\n+\t\t.hdr_type = BNXT_ULP_HDR_TYPE_NOT_SUPPORTED,\n+\t\t.proto_hdr_func = NULL\n+\t}\n+};\n+\n struct bnxt_ulp_mapper_tbl_list_info ulp_class_tmpl_list[] = {\n \t[((0 << BNXT_ULP_LOG2_MAX_NUM_DEV) | BNXT_ULP_DEVICE_ID_WH_PLUS)] = {\n \t.device_name = BNXT_ULP_DEVICE_ID_WH_PLUS,\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db.h b/drivers/net/bnxt/tf_ulp/ulp_template_db.h\nindex f4850bf..906b542 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_db.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_db.h\n@@ -115,6 +115,13 @@ enum bnxt_ulp_hdr_field {\n \tBNXT_ULP_HDR_FIELD_LAST = 4\n };\n \n+enum bnxt_ulp_hdr_type {\n+\tBNXT_ULP_HDR_TYPE_NOT_SUPPORTED = 0,\n+\tBNXT_ULP_HDR_TYPE_SUPPORTED = 1,\n+\tBNXT_ULP_HDR_TYPE_END = 2,\n+\tBNXT_ULP_HDR_TYPE_LAST = 3\n+};\n+\n enum bnxt_ulp_mask_opc {\n \tBNXT_ULP_MASK_OPC_SET_TO_CONSTANT = 0,\n \tBNXT_ULP_MASK_OPC_SET_TO_HDR_FIELD = 1,\ndiff --git a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\nindex 0e811ec..0699634 100644\n--- a/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\n+++ b/drivers/net/bnxt/tf_ulp/ulp_template_struct.h\n@@ -17,6 +17,18 @@\n #include \"rte_flow.h\"\n #include \"tf_core.h\"\n \n+/* Number of fields for each protocol */\n+#define BNXT_ULP_PROTO_HDR_SVIF_NUM\t1\n+#define BNXT_ULP_PROTO_HDR_ETH_NUM\t3\n+#define BNXT_ULP_PROTO_HDR_S_VLAN_NUM\t3\n+#define BNXT_ULP_PROTO_HDR_VLAN_NUM\t6\n+#define BNXT_ULP_PROTO_HDR_IPV4_NUM\t10\n+#define BNXT_ULP_PROTO_HDR_IPV6_NUM\t6\n+#define BNXT_ULP_PROTO_HDR_UDP_NUM\t4\n+#define BNXT_ULP_PROTO_HDR_TCP_NUM\t9\n+#define BNXT_ULP_PROTO_HDR_VXLAN_NUM\t4\n+#define BNXT_ULP_PROTO_HDR_MAX\t\t128\n+\n struct ulp_rte_hdr_bitmap {\n \tuint64_t\tbits;\n };\n@@ -29,6 +41,20 @@ struct ulp_rte_hdr_field {\n \tuint32_t\tsize;\n };\n \n+/* Flow Parser Header Information Structure */\n+struct bnxt_ulp_rte_hdr_info {\n+\tenum bnxt_ulp_hdr_type\t\t\t\t\thdr_type;\n+\t/* Flow Parser Protocol Header Function Prototype */\n+\tint (*proto_hdr_func)(const struct rte_flow_item\t*item_list,\n+\t\t\t struct ulp_rte_hdr_bitmap\t\t*hdr_bitmap,\n+\t\t\t struct ulp_rte_hdr_field\t\t*hdr_field,\n+\t\t\t uint32_t\t\t\t\t*field_idx,\n+\t\t\t uint32_t\t\t\t\t*vlan_idx);\n+};\n+\n+/* Flow Parser Header Information Structure Array defined in template source*/\n+extern struct bnxt_ulp_rte_hdr_info\tulp_hdr_info[];\n+\n struct bnxt_ulp_matcher_field_info {\n \tenum bnxt_ulp_fmf_mask\tmask_opcode;\n \tenum bnxt_ulp_fmf_spec\tspec_opcode;\n", "prefixes": [ "v4", "25/34" ] }