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GET /api/patches/66389/?format=api
{ "id": 66389, "url": "https://patches.dpdk.org/api/patches/66389/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1583742247-370386-11-git-send-email-alvinx.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1583742247-370386-11-git-send-email-alvinx.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1583742247-370386-11-git-send-email-alvinx.zhang@intel.com", "date": "2020-03-09T08:24:03", "name": "[v1,11/15] net/igc: implement ether-type filter", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "848be9dbf3b5ab4f049d54b1252322c1efdabf3e", "submitter": { "id": 1398, "url": "https://patches.dpdk.org/api/people/1398/?format=api", "name": "Alvin Zhang", "email": "alvinx.zhang@intel.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1583742247-370386-11-git-send-email-alvinx.zhang@intel.com/mbox/", "series": [ { "id": 8831, "url": "https://patches.dpdk.org/api/series/8831/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=8831", "date": "2020-03-09T08:23:53", "name": "[v1,01/15] net/igc: add igc PMD", "version": 1, "mbox": "https://patches.dpdk.org/series/8831/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/66389/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/66389/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 01B12A052E;\n\tMon, 9 Mar 2020 09:30:32 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 39C891C0B8;\n\tMon, 9 Mar 2020 09:29:18 +0100 (CET)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n by dpdk.org (Postfix) with ESMTP id 435C71C021\n for <dev@dpdk.org>; Mon, 9 Mar 2020 09:29:16 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n 09 Mar 2020 01:29:15 -0700", "from unknown (HELO dpdk-zhangalvin-dev.sh.intel.com)\n ([10.240.179.50])\n by orsmga002.jf.intel.com with ESMTP; 09 Mar 2020 01:29:13 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.70,518,1574150400\"; d=\"scan'208\";a=\"260350784\"", "From": "alvinx.zhang@intel.com", "To": "dev@dpdk.org", "Cc": "haiyue.wang@intel.com, xiaolong.ye@intel.com, qi.z.zhang@intel.com,\n beilei.xing@intel.com, Alvin Zhang <alvinx.zhang@intel.com>", "Date": "Mon, 9 Mar 2020 16:24:03 +0800", "Message-Id": "<1583742247-370386-11-git-send-email-alvinx.zhang@intel.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1583742247-370386-1-git-send-email-alvinx.zhang@intel.com>", "References": "<1583742247-370386-1-git-send-email-alvinx.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH v1 11/15] net/igc: implement ether-type filter", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Alvin Zhang <alvinx.zhang@intel.com>\n\nUpdate feature list too.\n\nSigned-off-by: Alvin Zhang <alvinx.zhang@intel.com>\n---\n doc/guides/nics/features/igc.ini | 1 +\n drivers/net/igc/Makefile | 1 +\n drivers/net/igc/igc_ethdev.c | 5 +\n drivers/net/igc/igc_ethdev.h | 15 +++\n drivers/net/igc/igc_filter.c | 237 +++++++++++++++++++++++++++++++++++++++\n drivers/net/igc/igc_filter.h | 31 +++++\n drivers/net/igc/meson.build | 3 +-\n 7 files changed, 292 insertions(+), 1 deletion(-)\n create mode 100644 drivers/net/igc/igc_filter.c\n create mode 100644 drivers/net/igc/igc_filter.h", "diff": "diff --git a/doc/guides/nics/features/igc.ini b/doc/guides/nics/features/igc.ini\nindex f5c862b..95c41ee 100644\n--- a/doc/guides/nics/features/igc.ini\n+++ b/doc/guides/nics/features/igc.ini\n@@ -31,6 +31,7 @@ RSS key update = Y\n RSS reta update = Y\n VLAN filter = Y\n VLAN offload = Y\n+Flow API = P\n Linux UIO = Y\n Linux VFIO = Y\n x86-64 = Y\ndiff --git a/drivers/net/igc/Makefile b/drivers/net/igc/Makefile\nindex b8cc7b9..45b0cf7 100644\n--- a/drivers/net/igc/Makefile\n+++ b/drivers/net/igc/Makefile\n@@ -68,5 +68,6 @@ SRCS-$(CONFIG_RTE_LIBRTE_IGC_PMD) += e1000_phy.c\n SRCS-$(CONFIG_RTE_LIBRTE_IGC_PMD) += igc_logs.c\n SRCS-$(CONFIG_RTE_LIBRTE_IGC_PMD) += igc_ethdev.c\n SRCS-$(CONFIG_RTE_LIBRTE_IGC_PMD) += igc_txrx.c\n+SRCS-$(CONFIG_RTE_LIBRTE_IGC_PMD) += igc_filter.c\n \n include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/net/igc/igc_ethdev.c b/drivers/net/igc/igc_ethdev.c\nindex ae3c42b..e23dc3a 100644\n--- a/drivers/net/igc/igc_ethdev.c\n+++ b/drivers/net/igc/igc_ethdev.c\n@@ -11,6 +11,7 @@\n \n #include \"igc_logs.h\"\n #include \"igc_txrx.h\"\n+#include \"igc_filter.h\"\n \n #define IGC_INTEL_VENDOR_ID\t\t0x8086\n \n@@ -289,6 +290,7 @@ static int eth_igc_vlan_tpid_set(struct rte_eth_dev *dev,\n \t.vlan_offload_set\t= eth_igc_vlan_offload_set,\n \t.vlan_tpid_set\t\t= eth_igc_vlan_tpid_set,\n \t.vlan_strip_queue_set\t= eth_igc_vlan_strip_queue_set,\n+\t.filter_ctrl\t\t= eth_igc_filter_ctrl,\n };\n \n /*\n@@ -1155,6 +1157,8 @@ static int eth_igc_vlan_tpid_set(struct rte_eth_dev *dev,\n \tif (!adapter->stopped)\n \t\teth_igc_stop(dev);\n \n+\tigc_clear_all_filter(dev);\n+\n \tigc_intr_other_disable(dev);\n \tdo {\n \t\tint ret = rte_intr_callback_unregister(intr_handle,\n@@ -1324,6 +1328,7 @@ static int eth_igc_vlan_tpid_set(struct rte_eth_dev *dev,\n \t\tigc->rxq_stats_map[i] = -1;\n \t}\n \n+\tigc_clear_all_filter(dev);\n \treturn 0;\n \n err_late:\ndiff --git a/drivers/net/igc/igc_ethdev.h b/drivers/net/igc/igc_ethdev.h\nindex 1a157ee..0880380 100644\n--- a/drivers/net/igc/igc_ethdev.h\n+++ b/drivers/net/igc/igc_ethdev.h\n@@ -91,6 +91,14 @@\n \tETH_RSS_IPV6_TCP_EX | \\\n \tETH_RSS_IPV6_UDP_EX)\n \n+#define IGC_MAX_ETQF_FILTERS\t\t3\t/* etqf(3) is used for 1588 */\n+#define IGC_ETQF_FILTER_1588\t\t3\n+#define IGC_ETQF_QUEUE_SHIFT\t\t16\n+#define IGC_ETQF_QUEUE_MASK\t\t(7 << IGC_ETQF_QUEUE_SHIFT)\n+#define IGC_GET_ETHER_TYPE_FROM_ETQF(_etqf)\t((uint16_t)(_etqf))\n+#define IGC_GET_QUEUE_FROM_ETQF(_etqf)\t\\\n+\t((uint8_t)(((_etqf) & IGC_ETQF_QUEUE_MASK) >> IGC_ETQF_QUEUE_SHIFT))\n+\n /* structure for interrupt relative data */\n struct igc_interrupt {\n \tuint32_t flags;\n@@ -126,6 +134,11 @@ struct igc_vfta {\n \tuint32_t vfta[IGC_VFTA_SIZE];\n };\n \n+/* ethertype filter structure */\n+struct igc_ethertype_filter {\n+\tuint32_t etqf;\n+};\n+\n /*\n * Structure to store private data for each driver instance (for each port).\n */\n@@ -139,6 +152,8 @@ struct igc_adapter {\n \tstruct igc_interrupt\tintr;\n \tstruct igc_vfta\tshadow_vfta;\n \tbool\t\tstopped;\n+\n+\tstruct igc_ethertype_filter ethertype_filters[IGC_MAX_ETQF_FILTERS];\n };\n \n #define IGC_DEV_PRIVATE(_dev)\t((_dev)->data->dev_private)\ndiff --git a/drivers/net/igc/igc_filter.c b/drivers/net/igc/igc_filter.c\nnew file mode 100644\nindex 0000000..231fcd4\n--- /dev/null\n+++ b/drivers/net/igc/igc_filter.c\n@@ -0,0 +1,237 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2020 Intel Corporation\n+ */\n+\n+#include \"rte_malloc.h\"\n+#include \"igc_logs.h\"\n+#include \"igc_txrx.h\"\n+#include \"igc_filter.h\"\n+\n+/*\n+ * igc_ethertype_filter_lookup - lookup ether-type filter\n+ *\n+ * @igc, IGC filter pointer\n+ * @ethertype, ethernet type\n+ * @empty, a place to store the index of empty entry if the item not found\n+ * it's not smaller than 0 if valid, otherwise -1 for no empty entry.\n+ * empty parameter is only valid if the return value of the function is -1\n+ *\n+ * Return value\n+ * >= 0, item index of the ether-type filter\n+ * -1, the item not been found\n+ */\n+static inline int\n+igc_ethertype_filter_lookup(const struct igc_adapter *igc,\n+\t\t\tuint16_t ethertype, int *empty)\n+{\n+\tint i = 0;\n+\n+\tif (empty) {\n+\t\t/* set to invalid valid */\n+\t\t*empty = -1;\n+\n+\t\t/* search the filters array */\n+\t\tfor (; i < IGC_MAX_ETQF_FILTERS; i++) {\n+\t\t\tuint32_t etqf = igc->ethertype_filters[i].etqf;\n+\t\t\tif (etqf) {\n+\t\t\t\tif (IGC_GET_ETHER_TYPE_FROM_ETQF(etqf) ==\n+\t\t\t\t\tethertype)\n+\t\t\t\t\t/* filter be found, return index */\n+\t\t\t\t\treturn i;\n+\t\t\t} else {\n+\t\t\t\t/* get empty entry */\n+\t\t\t\t*empty = i;\n+\t\t\t\ti++;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\t/* search the rest of filters */\n+\tfor (; i < IGC_MAX_ETQF_FILTERS; i++) {\n+\t\tuint32_t etqf = igc->ethertype_filters[i].etqf;\n+\t\tif (etqf && IGC_GET_ETHER_TYPE_FROM_ETQF(etqf) == ethertype)\n+\t\t\treturn i;\t/* filter be found, return index */\n+\t}\n+\n+\treturn -1;\n+}\n+\n+int\n+igc_del_ethertype_filter(struct rte_eth_dev *dev,\n+\t\t\tconst struct rte_eth_ethertype_filter *filter)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\tstruct igc_adapter *igc = IGC_DEV_PRIVATE(dev);\n+\tuint32_t etqf;\n+\tint ret;\n+\n+\tret = igc_ethertype_filter_lookup(igc, filter->ether_type, NULL);\n+\tif (ret < 0) {\n+\t\t/* not found */\n+\t\tPMD_DRV_LOG(ERR, \"ethertype (0x%04x) filter doesn't\"\n+\t\t\t\" exist.\", filter->ether_type);\n+\t\treturn -ENOENT;\n+\t}\n+\n+\tetqf = 0;\n+\tigc->ethertype_filters[ret].etqf = 0;\n+\n+\tIGC_WRITE_REG(hw, IGC_ETQF(ret), etqf);\n+\tIGC_WRITE_FLUSH(hw);\n+\treturn 0;\n+}\n+\n+int\n+igc_add_ethertype_filter(struct rte_eth_dev *dev,\n+\t\t\tconst struct rte_eth_ethertype_filter *filter)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\tstruct igc_adapter *igc = IGC_DEV_PRIVATE(dev);\n+\tuint32_t etqf;\n+\tint ret, empty;\n+\n+\tif (filter->ether_type == RTE_ETHER_TYPE_IPV4 ||\n+\t\tfilter->ether_type == RTE_ETHER_TYPE_IPV6) {\n+\t\tPMD_DRV_LOG(ERR, \"unsupported ether_type(0x%04x) in\"\n+\t\t\t\" ethertype filter.\", filter->ether_type);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (filter->flags & RTE_ETHTYPE_FLAGS_MAC) {\n+\t\tPMD_DRV_LOG(ERR, \"mac compare is unsupported.\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (filter->flags & RTE_ETHTYPE_FLAGS_DROP) {\n+\t\tPMD_DRV_LOG(ERR, \"drop option is unsupported.\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tret = igc_ethertype_filter_lookup(igc, filter->ether_type, &empty);\n+\tif (ret >= 0) {\n+\t\tPMD_DRV_LOG(ERR, \"ethertype (0x%04x) filter exists.\",\n+\t\t\t\tfilter->ether_type);\n+\t\treturn -EEXIST;\n+\t}\n+\n+\tif (empty < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"no ethertype filter entry.\");\n+\t\treturn -ENOSPC;\n+\t}\n+\tret = empty;\n+\n+\tetqf = filter->ether_type;\n+\tetqf |= IGC_ETQF_FILTER_ENABLE | IGC_ETQF_QUEUE_ENABLE;\n+\tetqf |= (uint32_t)filter->queue << IGC_ETQF_QUEUE_SHIFT;\n+\tigc->ethertype_filters[ret].etqf = etqf;\n+\n+\tIGC_WRITE_REG(hw, IGC_ETQF(ret), etqf);\n+\tIGC_WRITE_FLUSH(hw);\n+\treturn 0;\n+}\n+\n+static int\n+igc_get_ethertype_filter(const struct rte_eth_dev *dev,\n+\t\t\tstruct rte_eth_ethertype_filter *filter)\n+{\n+\tconst struct igc_adapter *igc = IGC_DEV_PRIVATE(dev);\n+\tuint32_t etqf;\n+\tint ret;\n+\n+\tret = igc_ethertype_filter_lookup(igc, filter->ether_type, NULL);\n+\tif (ret < 0) {\n+\t\tPMD_DRV_LOG(ERR, \"ethertype (0x%04x) filter doesn't exist.\",\n+\t\t\t filter->ether_type);\n+\t\treturn -ENOENT;\n+\t}\n+\n+\tetqf = igc->ethertype_filters[ret].etqf;\n+\tfilter->queue = IGC_GET_QUEUE_FROM_ETQF(etqf);\n+\tfilter->flags = 0;\n+\treturn 0;\n+}\n+\n+/* clear all the ether type filters */\n+static void\n+igc_clear_all_ethertype_filter(struct rte_eth_dev *dev)\n+{\n+\tstruct igc_hw *hw = IGC_DEV_PRIVATE_HW(dev);\n+\tstruct igc_adapter *igc = IGC_DEV_PRIVATE(dev);\n+\tint i;\n+\n+\tfor (i = 0; i < IGC_MAX_ETQF_FILTERS; i++)\n+\t\tIGC_WRITE_REG(hw, IGC_ETQF(i), 0);\n+\tIGC_WRITE_FLUSH(hw);\n+\n+\tmemset(&igc->ethertype_filters, 0, sizeof(igc->ethertype_filters));\n+}\n+\n+/**\n+ * igc_ethertype_filter_handle - Handle operations for ethernet type filter.\n+ *\n+ * @dev: pointer to rte_eth_dev structure\n+ * @filter_op:operation will be taken.\n+ * @filter: a pointer to structure of rte_eth_ethertype_filter\n+ *\n+ * Return 0, or negative for error\n+ **/\n+static int\n+igc_ethertype_filter_handle(struct rte_eth_dev *dev,\n+\t\t\tenum rte_filter_op filter_op,\n+\t\t\tstruct rte_eth_ethertype_filter *filter)\n+{\n+\tint ret;\n+\n+\tif (filter_op == RTE_ETH_FILTER_NOP)\n+\t\treturn 0;\n+\n+\tif (filter == NULL) {\n+\t\tPMD_DRV_LOG(ERR, \"filter shouldn't be NULL for operation %u.\",\n+\t\t\t filter_op);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tswitch (filter_op) {\n+\tcase RTE_ETH_FILTER_ADD:\n+\t\tret = igc_add_ethertype_filter(dev, filter);\n+\t\tbreak;\n+\tcase RTE_ETH_FILTER_DELETE:\n+\t\tret = igc_del_ethertype_filter(dev, filter);\n+\t\tbreak;\n+\tcase RTE_ETH_FILTER_GET:\n+\t\tret = igc_get_ethertype_filter(dev, filter);\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(ERR, \"unsupported operation %u.\", filter_op);\n+\t\tret = -EINVAL;\n+\t\tbreak;\n+\t}\n+\treturn ret;\n+}\n+\n+void\n+igc_clear_all_filter(struct rte_eth_dev *dev)\n+{\n+\tigc_clear_all_ethertype_filter(dev);\n+}\n+\n+int\n+eth_igc_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type,\n+\t\tenum rte_filter_op filter_op, void *arg)\n+{\n+\tint ret = 0;\n+\n+\tswitch (filter_type) {\n+\tcase RTE_ETH_FILTER_ETHERTYPE:\n+\t\tret = igc_ethertype_filter_handle(dev, filter_op,\n+\t\t\t(struct rte_eth_ethertype_filter *)arg);\n+\t\tbreak;\n+\tdefault:\n+\t\tPMD_DRV_LOG(WARNING, \"Filter type (%d) not supported\",\n+\t\t\t\t\t\t\tfilter_type);\n+\t\tret = -EINVAL;\n+\t}\n+\n+\treturn ret;\n+}\ndiff --git a/drivers/net/igc/igc_filter.h b/drivers/net/igc/igc_filter.h\nnew file mode 100644\nindex 0000000..eff0e47\n--- /dev/null\n+++ b/drivers/net/igc/igc_filter.h\n@@ -0,0 +1,31 @@\n+/*\n+ * SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2020 Intel Corporation\n+ */\n+\n+#ifndef _IGC_FILTER_H_\n+#define _IGC_FILTER_H_\n+\n+#include <rte_ethdev_core.h>\n+#include <rte_eth_ctrl.h>\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+int igc_add_ethertype_filter(struct rte_eth_dev *dev,\n+\t\tconst struct rte_eth_ethertype_filter *filter);\n+int igc_del_ethertype_filter(struct rte_eth_dev *dev,\n+\t\tconst struct rte_eth_ethertype_filter *filter);\n+void\n+igc_clear_all_filter(struct rte_eth_dev *dev);\n+\n+int\n+eth_igc_filter_ctrl(struct rte_eth_dev *dev, enum rte_filter_type filter_type,\n+\t\tenum rte_filter_op filter_op, void *arg);\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* IGC_FILTER_H_ */\ndiff --git a/drivers/net/igc/meson.build b/drivers/net/igc/meson.build\nindex 8742a59..d509c0e 100644\n--- a/drivers/net/igc/meson.build\n+++ b/drivers/net/igc/meson.build\n@@ -7,7 +7,8 @@ objs = [base_objs]\n sources = files(\n \t'igc_logs.c',\n \t'igc_ethdev.c',\n-\t'igc_txrx.c'\n+\t'igc_txrx.c',\n+\t'igc_filter.c'\n )\n \n includes += include_directories('base')\n", "prefixes": [ "v1", "11/15" ] }