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GET /api/patches/64852/?format=api
{ "id": 64852, "url": "https://patches.dpdk.org/api/patches/64852/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1579273172-19188-1-git-send-email-viacheslavo@mellanox.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1579273172-19188-1-git-send-email-viacheslavo@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1579273172-19188-1-git-send-email-viacheslavo@mellanox.com", "date": "2020-01-17T14:59:32", "name": "[v2] net/mlx5: fix metadata item endianness conversion", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "1a4d079c87b24e7ab6c4553eaf12479450e161df", "submitter": { "id": 1102, "url": "https://patches.dpdk.org/api/people/1102/?format=api", "name": "Slava Ovsiienko", "email": "viacheslavo@mellanox.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1579273172-19188-1-git-send-email-viacheslavo@mellanox.com/mbox/", "series": [ { "id": 8199, "url": "https://patches.dpdk.org/api/series/8199/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=8199", "date": "2020-01-17T14:59:32", "name": "[v2] net/mlx5: fix metadata item endianness conversion", "version": 2, "mbox": "https://patches.dpdk.org/series/8199/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/64852/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/64852/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from dpdk.org (dpdk.org [92.243.14.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 716F2A051A;\n\tFri, 17 Jan 2020 15:59:36 +0100 (CET)", "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 4A91F1AFF;\n\tFri, 17 Jan 2020 15:59:36 +0100 (CET)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n by dpdk.org (Postfix) with ESMTP id 437561AFF\n for <dev@dpdk.org>; Fri, 17 Jan 2020 15:59:35 +0100 (CET)", "from Internal Mail-Server by MTLPINE1 (envelope-from\n viacheslavo@mellanox.com)\n with ESMTPS (AES256-SHA encrypted); 17 Jan 2020 16:59:34 +0200", "from pegasus11.mtr.labs.mlnx (pegasus11.mtr.labs.mlnx\n [10.210.16.104])\n by labmailer.mlnx (8.13.8/8.13.8) with ESMTP id 00HExYAI027271;\n Fri, 17 Jan 2020 16:59:34 +0200", "from pegasus11.mtr.labs.mlnx (localhost [127.0.0.1])\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7) with ESMTP id 00HExYSn019815;\n Fri, 17 Jan 2020 14:59:34 GMT", "(from viacheslavo@localhost)\n by pegasus11.mtr.labs.mlnx (8.14.7/8.14.7/Submit) id 00HExXg1019814;\n Fri, 17 Jan 2020 14:59:33 GMT" ], "X-Authentication-Warning": "pegasus11.mtr.labs.mlnx: viacheslavo set sender to\n viacheslavo@mellanox.com using -f", "From": "Viacheslav Ovsiienko <viacheslavo@mellanox.com>", "To": "dev@dpdk.org", "Cc": "matan@mellanox.com, rasland@mellanox.com, ferruh.yigit@intel.com,\n stable@dpdk.org", "Date": "Fri, 17 Jan 2020 14:59:32 +0000", "Message-Id": "<1579273172-19188-1-git-send-email-viacheslavo@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1577197235-26433-1-git-send-email-viacheslavo@mellanox.com>", "References": "<1577197235-26433-1-git-send-email-viacheslavo@mellanox.com>", "Subject": "[dpdk-dev] [PATCH v2] net/mlx5: fix metadata item endianness\n\tconversion", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "The mlx5 datapath does not implement any endianness conversions\nfor the metadata being sent and received to provide the better\nperformance (because these conversions would be performed for\neach packet). These metadata are also involved into flow processing\n(there might be some flows matching on metadata patterns or setting\nthe new metadata values) inside the NIC. It order to configure\nhardware in correct way all necessary endianness conversions are\ndone by rte_flow handling code (only once on flow creation). This\npatch fixes one of these conversions for the little-endian hosts\nin case if META/MARK items are less than 32 bits.\n\nFixes: acfcd5c52f94 (\"net/mlx5: update meta register matcher set\")\nCc: stable@dpdk.org\n\nSigned-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\nv1: - http://patchwork.dpdk.org/patch/64125/\nv2: - commit message is rewritten\n\n drivers/net/mlx5/mlx5_flow_dv.c | 6 +++++-\n 1 file changed, 5 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex dd21bc6..e8a764c 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -5909,8 +5909,12 @@ struct field_modify_info modify_tcp[] = {\n \t\t\tstruct mlx5_priv *priv = dev->data->dev_private;\n \t\t\tuint32_t msk_c0 = priv->sh->dv_regc0_mask;\n \t\t\tuint32_t shl_c0 = rte_bsf32(msk_c0);\n+#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN\n+\t\t\tuint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);\n \n-\t\t\tmsk_c0 = rte_cpu_to_be_32(msk_c0);\n+\t\t\tvalue >>= shr_c0;\n+\t\t\tmask >>= shr_c0;\n+#endif\n \t\t\tvalue <<= shl_c0;\n \t\t\tmask <<= shl_c0;\n \t\t\tassert(msk_c0);\n", "prefixes": [ "v2" ] }