Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/60496/?format=api
{ "id": 60496, "url": "https://patches.dpdk.org/api/patches/60496/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20191003131918.30970-6-bruce.richardson@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20191003131918.30970-6-bruce.richardson@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20191003131918.30970-6-bruce.richardson@intel.com", "date": "2019-10-03T13:19:17", "name": "[5/6] examples/load_balancer: remove example from DPDK", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "3de715386cbd418a288813e02f4228283e693808", "submitter": { "id": 20, "url": "https://patches.dpdk.org/api/people/20/?format=api", "name": "Bruce Richardson", "email": "bruce.richardson@intel.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20191003131918.30970-6-bruce.richardson@intel.com/mbox/", "series": [ { "id": 6683, "url": "https://patches.dpdk.org/api/series/6683/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6683", "date": "2019-10-03T13:19:12", "name": "remove a few example applications", "version": 1, "mbox": "https://patches.dpdk.org/series/6683/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/60496/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/60496/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 038771C133;\n\tThu, 3 Oct 2019 15:20:01 +0200 (CEST)", "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id D8D801C12A;\n\tThu, 3 Oct 2019 15:19:57 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n\tby fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t03 Oct 2019 06:19:57 -0700", "from silpixa00399126.ir.intel.com (HELO\n\tsilpixa00399126.ger.corp.intel.com) ([10.237.223.2])\n\tby orsmga008.jf.intel.com with ESMTP; 03 Oct 2019 06:19:54 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.67,252,1566889200\"; d=\"scan'208\";a=\"185910580\"", "From": "Bruce Richardson <bruce.richardson@intel.com>", "To": "dev@dpdk.org", "Cc": "techboard@dpdk.org,\n\tCiara Power <ciara.power@intel.com>", "Date": "Thu, 3 Oct 2019 14:19:17 +0100", "Message-Id": "<20191003131918.30970-6-bruce.richardson@intel.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<20191003131918.30970-1-bruce.richardson@intel.com>", "References": "<20191003131918.30970-1-bruce.richardson@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Subject": "[dpdk-dev] [PATCH 5/6] examples/load_balancer: remove example from\n\tDPDK", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Ciara Power <ciara.power@intel.com>\n\nThis example can be removed because DPDK now has a range of libraries,\nespecially rte_eventdev, that did not exist previously for load\nbalancing, making this less relevant. Also, modern NIC cards have\ngreater ability to do load balancing, e.g. using RSS, over a wider range\nof fields than earlier cards did.\n\nSigned-off-by: Ciara Power <ciara.power@intel.com>\n---\n MAINTAINERS | 3 -\n doc/guides/sample_app_ug/index.rst | 1 -\n doc/guides/sample_app_ug/intro.rst | 2 +-\n doc/guides/sample_app_ug/load_balancer.rst | 201 ----\n examples/Makefile | 1 -\n examples/load_balancer/Makefile | 62 --\n examples/load_balancer/config.c | 1030 --------------------\n examples/load_balancer/init.c | 520 ----------\n examples/load_balancer/main.c | 76 --\n examples/load_balancer/main.h | 351 -------\n examples/load_balancer/meson.build | 12 -\n examples/load_balancer/runtime.c | 642 ------------\n examples/meson.build | 1 -\n 13 files changed, 1 insertion(+), 2901 deletions(-)\n delete mode 100644 doc/guides/sample_app_ug/load_balancer.rst\n delete mode 100644 examples/load_balancer/Makefile\n delete mode 100644 examples/load_balancer/config.c\n delete mode 100644 examples/load_balancer/init.c\n delete mode 100644 examples/load_balancer/main.c\n delete mode 100644 examples/load_balancer/main.h\n delete mode 100644 examples/load_balancer/meson.build\n delete mode 100644 examples/load_balancer/runtime.c", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 6b9fa4dc2..3db771bd7 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -1461,9 +1461,6 @@ F: doc/guides/sample_app_ug/l3_forward.rst\n F: examples/link_status_interrupt/\n F: doc/guides/sample_app_ug/link_status_intr.rst\n \n-F: examples/load_balancer/\n-F: doc/guides/sample_app_ug/load_balancer.rst\n-\n L-threads - EXPERIMENTAL\n M: John McNamara <john.mcnamara@intel.com>\n F: examples/performance-thread/\ndiff --git a/doc/guides/sample_app_ug/index.rst b/doc/guides/sample_app_ug/index.rst\nindex 5f4924df6..191eebb56 100644\n--- a/doc/guides/sample_app_ug/index.rst\n+++ b/doc/guides/sample_app_ug/index.rst\n@@ -30,7 +30,6 @@ Sample Applications User Guides\n l3_forward_power_man\n l3_forward_access_ctrl\n link_status_intr\n- load_balancer\n server_node_efd\n service_cores\n multi_process\ndiff --git a/doc/guides/sample_app_ug/intro.rst b/doc/guides/sample_app_ug/intro.rst\nindex 39af887da..981e50f94 100644\n--- a/doc/guides/sample_app_ug/intro.rst\n+++ b/doc/guides/sample_app_ug/intro.rst\n@@ -61,7 +61,7 @@ applications that are available in the examples directory of DPDK:\n +---------------------------------------+--------------------------------------+\n | Link Status Interrupt | VMDQ Forwarding |\n +---------------------------------------+--------------------------------------+\n- | Load Balancer | VMDQ and DCB Forwarding |\n+ | | VMDQ and DCB Forwarding |\n +---------------------------------------+--------------------------------------+\n | Multi-process | VM Power Management |\n +---------------------------------------+--------------------------------------+\ndiff --git a/doc/guides/sample_app_ug/load_balancer.rst b/doc/guides/sample_app_ug/load_balancer.rst\ndeleted file mode 100644\nindex 8f2abdfb8..000000000\n--- a/doc/guides/sample_app_ug/load_balancer.rst\n+++ /dev/null\n@@ -1,201 +0,0 @@\n-.. SPDX-License-Identifier: BSD-3-Clause\n- Copyright(c) 2010-2014 Intel Corporation.\n-\n-Load Balancer Sample Application\n-================================\n-\n-The Load Balancer sample application demonstrates the concept of isolating the packet I/O task\n-from the application-specific workload.\n-Depending on the performance target,\n-a number of logical cores (lcores) are dedicated to handle the interaction with the NIC ports (I/O lcores),\n-while the rest of the lcores are dedicated to performing the application processing (worker lcores).\n-The worker lcores are totally oblivious to the intricacies of the packet I/O activity and\n-use the NIC-agnostic interface provided by software rings to exchange packets with the I/O cores.\n-\n-Overview\n---------\n-\n-The architecture of the Load Balance application is presented in the following figure.\n-\n-.. _figure_load_bal_app_arch:\n-\n-.. figure:: img/load_bal_app_arch.*\n-\n- Load Balancer Application Architecture\n-\n-\n-For the sake of simplicity, the diagram illustrates a specific case of two I/O RX and two I/O TX lcores off loading the packet I/O\n-overhead incurred by four NIC ports from four worker cores, with each I/O lcore handling RX/TX for two NIC ports.\n-\n-I/O RX Logical Cores\n-~~~~~~~~~~~~~~~~~~~~\n-\n-Each I/O RX lcore performs packet RX from its assigned NIC RX rings and then distributes the received packets to the worker threads.\n-The application allows each I/O RX lcore to communicate with any of the worker threads,\n-therefore each (I/O RX lcore, worker lcore) pair is connected through a dedicated single producer - single consumer software ring.\n-\n-The worker lcore to handle the current packet is determined by reading a predefined 1-byte field from the input packet:\n-\n-worker_id = packet[load_balancing_field] % n_workers\n-\n-Since all the packets that are part of the same traffic flow are expected to have the same value for the load balancing field,\n-this scheme also ensures that all the packets that are part of the same traffic flow are directed to the same worker lcore (flow affinity)\n-in the same order they enter the system (packet ordering).\n-\n-I/O TX Logical Cores\n-~~~~~~~~~~~~~~~~~~~~\n-\n-Each I/O lcore owns the packet TX for a predefined set of NIC ports. To enable each worker thread to send packets to any NIC TX port,\n-the application creates a software ring for each (worker lcore, NIC TX port) pair,\n-with each I/O TX core handling those software rings that are associated with NIC ports that it handles.\n-\n-Worker Logical Cores\n-~~~~~~~~~~~~~~~~~~~~\n-\n-Each worker lcore reads packets from its set of input software rings and\n-routes them to the NIC ports for transmission by dispatching them to output software rings.\n-The routing logic is LPM based, with all the worker threads sharing the same LPM rules.\n-\n-Compiling the Application\n--------------------------\n-\n-To compile the sample application see :doc:`compiling`.\n-\n-The application is located in the ``load_balancer`` sub-directory.\n-\n-Running the Application\n------------------------\n-\n-To successfully run the application,\n-the command line used to start the application has to be in sync with the traffic flows configured on the traffic generator side.\n-\n-For examples of application command lines and traffic generator flows, please refer to the DPDK Test Report.\n-For more details on how to set up and run the sample applications provided with DPDK package,\n-please refer to the *DPDK Getting Started Guide*.\n-\n-Explanation\n------------\n-\n-Application Configuration\n-~~~~~~~~~~~~~~~~~~~~~~~~~\n-\n-The application run-time configuration is done through the application command line parameters.\n-Any parameter that is not specified as mandatory is optional,\n-with the default value hard-coded in the main.h header file from the application folder.\n-\n-The list of application command line parameters is listed below:\n-\n-#. --rx \"(PORT, QUEUE, LCORE), ...\": The list of NIC RX ports and queues handled by the I/O RX lcores.\n- This parameter also implicitly defines the list of I/O RX lcores. This is a mandatory parameter.\n-\n-#. --tx \"(PORT, LCORE), ... \": The list of NIC TX ports handled by the I/O TX lcores.\n- This parameter also implicitly defines the list of I/O TX lcores.\n- This is a mandatory parameter.\n-\n-#. --w \"LCORE, ...\": The list of the worker lcores. This is a mandatory parameter.\n-\n-#. --lpm \"IP / PREFIX => PORT; ...\": The list of LPM rules used by the worker lcores for packet forwarding.\n- This is a mandatory parameter.\n-\n-#. --rsz \"A, B, C, D\": Ring sizes:\n-\n- #. A = The size (in number of buffer descriptors) of each of the NIC RX rings read by the I/O RX lcores.\n-\n- #. B = The size (in number of elements) of each of the software rings used by the I/O RX lcores to send packets to worker lcores.\n-\n- #. C = The size (in number of elements) of each of the software rings used by the worker lcores to send packets to I/O TX lcores.\n-\n- #. D = The size (in number of buffer descriptors) of each of the NIC TX rings written by I/O TX lcores.\n-\n-#. --bsz \"(A, B), (C, D), (E, F)\": Burst sizes:\n-\n- #. A = The I/O RX lcore read burst size from NIC RX.\n-\n- #. B = The I/O RX lcore write burst size to the output software rings.\n-\n- #. C = The worker lcore read burst size from the input software rings.\n-\n- #. D = The worker lcore write burst size to the output software rings.\n-\n- #. E = The I/O TX lcore read burst size from the input software rings.\n-\n- #. F = The I/O TX lcore write burst size to the NIC TX.\n-\n-#. --pos-lb POS: The position of the 1-byte field within the input packet used by the I/O RX lcores\n- to identify the worker lcore for the current packet.\n- This field needs to be within the first 64 bytes of the input packet.\n-\n-The infrastructure of software rings connecting I/O lcores and worker lcores is built by the application\n-as a result of the application configuration provided by the user through the application command line parameters.\n-\n-A specific lcore performing the I/O RX role for a specific set of NIC ports can also perform the I/O TX role\n-for the same or a different set of NIC ports.\n-A specific lcore cannot perform both the I/O role (either RX or TX) and the worker role during the same session.\n-\n-Example:\n-\n-.. code-block:: console\n-\n- ./load_balancer -l 3-7 -n 4 -- --rx \"(0,0,3),(1,0,3)\" --tx \"(0,3),(1,3)\" --w \"4,5,6,7\" --lpm \"1.0.0.0/24=>0; 1.0.1.0/24=>1;\" --pos-lb 29\n-\n-There is a single I/O lcore (lcore 3) that handles RX and TX for two NIC ports (ports 0 and 1) that\n-handles packets to/from four worker lcores (lcores 4, 5, 6 and 7) that\n-are assigned worker IDs 0 to 3 (worker ID for lcore 4 is 0, for lcore 5 is 1, for lcore 6 is 2 and for lcore 7 is 3).\n-\n-Assuming that all the input packets are IPv4 packets with no VLAN label and the source IP address of the current packet is A.B.C.D,\n-the worker lcore for the current packet is determined by byte D (which is byte 29).\n-There are two LPM rules that are used by each worker lcore to route packets to the output NIC ports.\n-\n-The following table illustrates the packet flow through the system for several possible traffic flows:\n-\n-+------------+----------------+-----------------+------------------------------+--------------+\n-| **Flow #** | **Source** | **Destination** | **Worker ID (Worker lcore)** | **Output** |\n-| | **IP Address** | **IP Address** | | **NIC Port** |\n-| | | | | |\n-+============+================+=================+==============================+==============+\n-| 1 | 0.0.0.0 | 1.0.0.1 | 0 (4) | 0 |\n-| | | | | |\n-+------------+----------------+-----------------+------------------------------+--------------+\n-| 2 | 0.0.0.1 | 1.0.1.2 | 1 (5) | 1 |\n-| | | | | |\n-+------------+----------------+-----------------+------------------------------+--------------+\n-| 3 | 0.0.0.14 | 1.0.0.3 | 2 (6) | 0 |\n-| | | | | |\n-+------------+----------------+-----------------+------------------------------+--------------+\n-| 4 | 0.0.0.15 | 1.0.1.4 | 3 (7) | 1 |\n-| | | | | |\n-+------------+----------------+-----------------+------------------------------+--------------+\n-\n-NUMA Support\n-~~~~~~~~~~~~\n-\n-The application has built-in performance enhancements for the NUMA case:\n-\n-#. One buffer pool per each CPU socket.\n-\n-#. One LPM table per each CPU socket.\n-\n-#. Memory for the NIC RX or TX rings is allocated on the same socket with the lcore handling the respective ring.\n-\n-In the case where multiple CPU sockets are used in the system,\n-it is recommended to enable at least one lcore to fulfill the I/O role for the NIC ports that\n-are directly attached to that CPU socket through the PCI Express* bus.\n-It is always recommended to handle the packet I/O with lcores from the same CPU socket as the NICs.\n-\n-Depending on whether the I/O RX lcore (same CPU socket as NIC RX),\n-the worker lcore and the I/O TX lcore (same CPU socket as NIC TX) handling a specific input packet,\n-are on the same or different CPU sockets, the following run-time scenarios are possible:\n-\n-#. AAA: The packet is received, processed and transmitted without going across CPU sockets.\n-\n-#. AAB: The packet is received and processed on socket A,\n- but as it has to be transmitted on a NIC port connected to socket B,\n- the packet is sent to socket B through software rings.\n-\n-#. ABB: The packet is received on socket A, but as it has to be processed by a worker lcore on socket B,\n- the packet is sent to socket B through software rings.\n- The packet is transmitted by a NIC port connected to the same CPU socket as the worker lcore that processed it.\n-\n-#. ABC: The packet is received on socket A, it is processed by an lcore on socket B,\n- then it has to be transmitted out by a NIC connected to socket C.\n- The performance price for crossing the CPU socket boundary is paid twice for this packet.\ndiff --git a/examples/Makefile b/examples/Makefile\nindex 6bba09ce9..62d0865c5 100644\n--- a/examples/Makefile\n+++ b/examples/Makefile\n@@ -48,7 +48,6 @@ ifeq ($(CONFIG_RTE_LIBRTE_LPM)$(CONFIG_RTE_LIBRTE_HASH),yy)\n DIRS-$(CONFIG_RTE_LIBRTE_POWER) += l3fwd-power\n endif\n DIRS-y += link_status_interrupt\n-DIRS-$(CONFIG_RTE_LIBRTE_LPM) += load_balancer\n DIRS-y += multi_process\n DIRS-y += ntb\n DIRS-$(CONFIG_RTE_LIBRTE_REORDER) += packet_ordering\ndiff --git a/examples/load_balancer/Makefile b/examples/load_balancer/Makefile\ndeleted file mode 100644\nindex caae8a107..000000000\n--- a/examples/load_balancer/Makefile\n+++ /dev/null\n@@ -1,62 +0,0 @@\n-# SPDX-License-Identifier: BSD-3-Clause\n-# Copyright(c) 2010-2014 Intel Corporation\n-\n-# binary name\n-APP = load_balancer\n-\n-# all source are stored in SRCS-y\n-SRCS-y := main.c config.c init.c runtime.c\n-\n-# Build using pkg-config variables if possible\n-ifeq ($(shell pkg-config --exists libdpdk && echo 0),0)\n-\n-all: shared\n-.PHONY: shared static\n-shared: build/$(APP)-shared\n-\tln -sf $(APP)-shared build/$(APP)\n-static: build/$(APP)-static\n-\tln -sf $(APP)-static build/$(APP)\n-\n-PKGCONF=pkg-config --define-prefix\n-\n-PC_FILE := $(shell $(PKGCONF) --path libdpdk)\n-CFLAGS += -O3 $(shell $(PKGCONF) --cflags libdpdk)\n-LDFLAGS_SHARED = $(shell $(PKGCONF) --libs libdpdk)\n-LDFLAGS_STATIC = -Wl,-Bstatic $(shell $(PKGCONF) --static --libs libdpdk)\n-\n-build/$(APP)-shared: $(SRCS-y) Makefile $(PC_FILE) | build\n-\t$(CC) $(CFLAGS) $(SRCS-y) -o $@ $(LDFLAGS) $(LDFLAGS_SHARED)\n-\n-build/$(APP)-static: $(SRCS-y) Makefile $(PC_FILE) | build\n-\t$(CC) $(CFLAGS) $(SRCS-y) -o $@ $(LDFLAGS) $(LDFLAGS_STATIC)\n-\n-build:\n-\t@mkdir -p $@\n-\n-.PHONY: clean\n-clean:\n-\trm -f build/$(APP) build/$(APP)-static build/$(APP)-shared\n-\ttest -d build && rmdir -p build || true\n-\n-else # Build using legacy build system\n-\n-ifeq ($(RTE_SDK),)\n-$(error \"Please define RTE_SDK environment variable\")\n-endif\n-\n-# Default target, detect a build directory, by looking for a path with a .config\n-RTE_TARGET ?= $(notdir $(abspath $(dir $(firstword $(wildcard $(RTE_SDK)/*/.config)))))\n-\n-include $(RTE_SDK)/mk/rte.vars.mk\n-\n-CFLAGS += -O3 -g\n-CFLAGS += $(WERROR_FLAGS)\n-\n-# workaround for a gcc bug with noreturn attribute\n-# http://gcc.gnu.org/bugzilla/show_bug.cgi?id=12603\n-ifeq ($(CONFIG_RTE_TOOLCHAIN_GCC),y)\n-CFLAGS_main.o += -Wno-return-type\n-endif\n-\n-include $(RTE_SDK)/mk/rte.extapp.mk\n-endif\ndiff --git a/examples/load_balancer/config.c b/examples/load_balancer/config.c\ndeleted file mode 100644\nindex 972c85c5b..000000000\n--- a/examples/load_balancer/config.c\n+++ /dev/null\n@@ -1,1030 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2010-2014 Intel Corporation\n- */\n-\n-#include <stdio.h>\n-#include <stdlib.h>\n-#include <stdint.h>\n-#include <inttypes.h>\n-#include <sys/types.h>\n-#include <string.h>\n-#include <sys/queue.h>\n-#include <stdarg.h>\n-#include <errno.h>\n-#include <getopt.h>\n-\n-#include <rte_common.h>\n-#include <rte_byteorder.h>\n-#include <rte_log.h>\n-#include <rte_memory.h>\n-#include <rte_memcpy.h>\n-#include <rte_eal.h>\n-#include <rte_launch.h>\n-#include <rte_atomic.h>\n-#include <rte_cycles.h>\n-#include <rte_prefetch.h>\n-#include <rte_lcore.h>\n-#include <rte_per_lcore.h>\n-#include <rte_branch_prediction.h>\n-#include <rte_interrupts.h>\n-#include <rte_random.h>\n-#include <rte_debug.h>\n-#include <rte_ether.h>\n-#include <rte_ethdev.h>\n-#include <rte_mempool.h>\n-#include <rte_mbuf.h>\n-#include <rte_ip.h>\n-#include <rte_tcp.h>\n-#include <rte_lpm.h>\n-#include <rte_string_fns.h>\n-\n-#include \"main.h\"\n-\n-struct app_params app;\n-\n-static const char usage[] =\n-\" \\n\"\n-\" load_balancer <EAL PARAMS> -- <APP PARAMS> \\n\"\n-\" \\n\"\n-\"Application manadatory parameters: \\n\"\n-\" --rx \\\"(PORT, QUEUE, LCORE), ...\\\" : List of NIC RX ports and queues \\n\"\n-\" handled by the I/O RX lcores \\n\"\n-\" --tx \\\"(PORT, LCORE), ...\\\" : List of NIC TX ports handled by the I/O TX \\n\"\n-\" lcores \\n\"\n-\" --w \\\"LCORE, ...\\\" : List of the worker lcores \\n\"\n-\" --lpm \\\"IP / PREFIX => PORT; ...\\\" : List of LPM rules used by the worker \\n\"\n-\" lcores for packet forwarding \\n\"\n-\" \\n\"\n-\"Application optional parameters: \\n\"\n-\" --rsz \\\"A, B, C, D\\\" : Ring sizes \\n\"\n-\" A = Size (in number of buffer descriptors) of each of the NIC RX \\n\"\n-\" rings read by the I/O RX lcores (default value is %u) \\n\"\n-\" B = Size (in number of elements) of each of the SW rings used by the\\n\"\n-\" I/O RX lcores to send packets to worker lcores (default value is\\n\"\n-\" %u) \\n\"\n-\" C = Size (in number of elements) of each of the SW rings used by the\\n\"\n-\" worker lcores to send packets to I/O TX lcores (default value is\\n\"\n-\" %u) \\n\"\n-\" D = Size (in number of buffer descriptors) of each of the NIC TX \\n\"\n-\" rings written by I/O TX lcores (default value is %u) \\n\"\n-\" --bsz \\\"(A, B), (C, D), (E, F)\\\" : Burst sizes \\n\"\n-\" A = I/O RX lcore read burst size from NIC RX (default value is %u) \\n\"\n-\" B = I/O RX lcore write burst size to output SW rings (default value \\n\"\n-\" is %u) \\n\"\n-\" C = Worker lcore read burst size from input SW rings (default value \\n\"\n-\" is %u) \\n\"\n-\" D = Worker lcore write burst size to output SW rings (default value \\n\"\n-\" is %u) \\n\"\n-\" E = I/O TX lcore read burst size from input SW rings (default value \\n\"\n-\" is %u) \\n\"\n-\" F = I/O TX lcore write burst size to NIC TX (default value is %u) \\n\"\n-\" --pos-lb POS : Position of the 1-byte field within the input packet used by\\n\"\n-\" the I/O RX lcores to identify the worker lcore for the current \\n\"\n-\" packet (default value is %u) \\n\";\n-\n-void\n-app_print_usage(void)\n-{\n-\tprintf(usage,\n-\t\tAPP_DEFAULT_NIC_RX_RING_SIZE,\n-\t\tAPP_DEFAULT_RING_RX_SIZE,\n-\t\tAPP_DEFAULT_RING_TX_SIZE,\n-\t\tAPP_DEFAULT_NIC_TX_RING_SIZE,\n-\t\tAPP_DEFAULT_BURST_SIZE_IO_RX_READ,\n-\t\tAPP_DEFAULT_BURST_SIZE_IO_RX_WRITE,\n-\t\tAPP_DEFAULT_BURST_SIZE_WORKER_READ,\n-\t\tAPP_DEFAULT_BURST_SIZE_WORKER_WRITE,\n-\t\tAPP_DEFAULT_BURST_SIZE_IO_TX_READ,\n-\t\tAPP_DEFAULT_BURST_SIZE_IO_TX_WRITE,\n-\t\tAPP_DEFAULT_IO_RX_LB_POS\n-\t);\n-}\n-\n-#ifndef APP_ARG_RX_MAX_CHARS\n-#define APP_ARG_RX_MAX_CHARS 4096\n-#endif\n-\n-#ifndef APP_ARG_RX_MAX_TUPLES\n-#define APP_ARG_RX_MAX_TUPLES 128\n-#endif\n-\n-static int\n-str_to_unsigned_array(\n-\tconst char *s, size_t sbuflen,\n-\tchar separator,\n-\tunsigned num_vals,\n-\tunsigned *vals)\n-{\n-\tchar str[sbuflen+1];\n-\tchar *splits[num_vals];\n-\tchar *endptr = NULL;\n-\tint i, num_splits = 0;\n-\n-\t/* copy s so we don't modify original string */\n-\tstrlcpy(str, s, sizeof(str));\n-\tnum_splits = rte_strsplit(str, sizeof(str), splits, num_vals, separator);\n-\n-\terrno = 0;\n-\tfor (i = 0; i < num_splits; i++) {\n-\t\tvals[i] = strtoul(splits[i], &endptr, 0);\n-\t\tif (errno != 0 || *endptr != '\\0')\n-\t\t\treturn -1;\n-\t}\n-\n-\treturn num_splits;\n-}\n-\n-static int\n-str_to_unsigned_vals(\n-\tconst char *s,\n-\tsize_t sbuflen,\n-\tchar separator,\n-\tunsigned num_vals, ...)\n-{\n-\tunsigned i, vals[num_vals];\n-\tva_list ap;\n-\n-\tnum_vals = str_to_unsigned_array(s, sbuflen, separator, num_vals, vals);\n-\n-\tva_start(ap, num_vals);\n-\tfor (i = 0; i < num_vals; i++) {\n-\t\tunsigned *u = va_arg(ap, unsigned *);\n-\t\t*u = vals[i];\n-\t}\n-\tva_end(ap);\n-\treturn num_vals;\n-}\n-\n-static int\n-parse_arg_rx(const char *arg)\n-{\n-\tconst char *p0 = arg, *p = arg;\n-\tuint32_t n_tuples;\n-\n-\tif (strnlen(arg, APP_ARG_RX_MAX_CHARS + 1) == APP_ARG_RX_MAX_CHARS + 1) {\n-\t\treturn -1;\n-\t}\n-\n-\tn_tuples = 0;\n-\twhile ((p = strchr(p0,'(')) != NULL) {\n-\t\tstruct app_lcore_params *lp;\n-\t\tuint32_t port, queue, lcore, i;\n-\n-\t\tp0 = strchr(p++, ')');\n-\t\tif ((p0 == NULL) ||\n-\t\t (str_to_unsigned_vals(p, p0 - p, ',', 3, &port, &queue, &lcore) != 3)) {\n-\t\t\treturn -2;\n-\t\t}\n-\n-\t\t/* Enable port and queue for later initialization */\n-\t\tif ((port >= APP_MAX_NIC_PORTS) || (queue >= APP_MAX_RX_QUEUES_PER_NIC_PORT)) {\n-\t\t\treturn -3;\n-\t\t}\n-\t\tif (app.nic_rx_queue_mask[port][queue] != 0) {\n-\t\t\treturn -4;\n-\t\t}\n-\t\tapp.nic_rx_queue_mask[port][queue] = 1;\n-\n-\t\t/* Check and assign (port, queue) to I/O lcore */\n-\t\tif (rte_lcore_is_enabled(lcore) == 0) {\n-\t\t\treturn -5;\n-\t\t}\n-\n-\t\tif (lcore >= APP_MAX_LCORES) {\n-\t\t\treturn -6;\n-\t\t}\n-\t\tlp = &app.lcore_params[lcore];\n-\t\tif (lp->type == e_APP_LCORE_WORKER) {\n-\t\t\treturn -7;\n-\t\t}\n-\t\tlp->type = e_APP_LCORE_IO;\n-\t\tconst size_t n_queues = RTE_MIN(lp->io.rx.n_nic_queues,\n-\t\t RTE_DIM(lp->io.rx.nic_queues));\n-\t\tfor (i = 0; i < n_queues; i ++) {\n-\t\t\tif ((lp->io.rx.nic_queues[i].port == port) &&\n-\t\t\t (lp->io.rx.nic_queues[i].queue == queue)) {\n-\t\t\t\treturn -8;\n-\t\t\t}\n-\t\t}\n-\t\tif (lp->io.rx.n_nic_queues >= APP_MAX_NIC_RX_QUEUES_PER_IO_LCORE) {\n-\t\t\treturn -9;\n-\t\t}\n-\t\tlp->io.rx.nic_queues[lp->io.rx.n_nic_queues].port = port;\n-\t\tlp->io.rx.nic_queues[lp->io.rx.n_nic_queues].queue = (uint8_t) queue;\n-\t\tlp->io.rx.n_nic_queues ++;\n-\n-\t\tn_tuples ++;\n-\t\tif (n_tuples > APP_ARG_RX_MAX_TUPLES) {\n-\t\t\treturn -10;\n-\t\t}\n-\t}\n-\n-\tif (n_tuples == 0) {\n-\t\treturn -11;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-#ifndef APP_ARG_TX_MAX_CHARS\n-#define APP_ARG_TX_MAX_CHARS 4096\n-#endif\n-\n-#ifndef APP_ARG_TX_MAX_TUPLES\n-#define APP_ARG_TX_MAX_TUPLES 128\n-#endif\n-\n-static int\n-parse_arg_tx(const char *arg)\n-{\n-\tconst char *p0 = arg, *p = arg;\n-\tuint32_t n_tuples;\n-\n-\tif (strnlen(arg, APP_ARG_TX_MAX_CHARS + 1) == APP_ARG_TX_MAX_CHARS + 1) {\n-\t\treturn -1;\n-\t}\n-\n-\tn_tuples = 0;\n-\twhile ((p = strchr(p0,'(')) != NULL) {\n-\t\tstruct app_lcore_params *lp;\n-\t\tuint32_t port, lcore, i;\n-\n-\t\tp0 = strchr(p++, ')');\n-\t\tif ((p0 == NULL) ||\n-\t\t (str_to_unsigned_vals(p, p0 - p, ',', 2, &port, &lcore) != 2)) {\n-\t\t\treturn -2;\n-\t\t}\n-\n-\t\t/* Enable port and queue for later initialization */\n-\t\tif (port >= APP_MAX_NIC_PORTS) {\n-\t\t\treturn -3;\n-\t\t}\n-\t\tif (app.nic_tx_port_mask[port] != 0) {\n-\t\t\treturn -4;\n-\t\t}\n-\t\tapp.nic_tx_port_mask[port] = 1;\n-\n-\t\t/* Check and assign (port, queue) to I/O lcore */\n-\t\tif (rte_lcore_is_enabled(lcore) == 0) {\n-\t\t\treturn -5;\n-\t\t}\n-\n-\t\tif (lcore >= APP_MAX_LCORES) {\n-\t\t\treturn -6;\n-\t\t}\n-\t\tlp = &app.lcore_params[lcore];\n-\t\tif (lp->type == e_APP_LCORE_WORKER) {\n-\t\t\treturn -7;\n-\t\t}\n-\t\tlp->type = e_APP_LCORE_IO;\n-\t\tconst size_t n_ports = RTE_MIN(lp->io.tx.n_nic_ports,\n-\t\t RTE_DIM(lp->io.tx.nic_ports));\n-\t\tfor (i = 0; i < n_ports; i ++) {\n-\t\t\tif (lp->io.tx.nic_ports[i] == port) {\n-\t\t\t\treturn -8;\n-\t\t\t}\n-\t\t}\n-\t\tif (lp->io.tx.n_nic_ports >= APP_MAX_NIC_TX_PORTS_PER_IO_LCORE) {\n-\t\t\treturn -9;\n-\t\t}\n-\t\tlp->io.tx.nic_ports[lp->io.tx.n_nic_ports] = port;\n-\t\tlp->io.tx.n_nic_ports ++;\n-\n-\t\tn_tuples ++;\n-\t\tif (n_tuples > APP_ARG_TX_MAX_TUPLES) {\n-\t\t\treturn -10;\n-\t\t}\n-\t}\n-\n-\tif (n_tuples == 0) {\n-\t\treturn -11;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-#ifndef APP_ARG_W_MAX_CHARS\n-#define APP_ARG_W_MAX_CHARS 4096\n-#endif\n-\n-#ifndef APP_ARG_W_MAX_TUPLES\n-#define APP_ARG_W_MAX_TUPLES APP_MAX_WORKER_LCORES\n-#endif\n-\n-static int\n-parse_arg_w(const char *arg)\n-{\n-\tconst char *p = arg;\n-\tuint32_t n_tuples;\n-\n-\tif (strnlen(arg, APP_ARG_W_MAX_CHARS + 1) == APP_ARG_W_MAX_CHARS + 1) {\n-\t\treturn -1;\n-\t}\n-\n-\tn_tuples = 0;\n-\twhile (*p != 0) {\n-\t\tstruct app_lcore_params *lp;\n-\t\tuint32_t lcore;\n-\n-\t\terrno = 0;\n-\t\tlcore = strtoul(p, NULL, 0);\n-\t\tif (errno != 0) {\n-\t\t\treturn -2;\n-\t\t}\n-\n-\t\t/* Check and enable worker lcore */\n-\t\tif (rte_lcore_is_enabled(lcore) == 0) {\n-\t\t\treturn -3;\n-\t\t}\n-\n-\t\tif (lcore >= APP_MAX_LCORES) {\n-\t\t\treturn -4;\n-\t\t}\n-\t\tlp = &app.lcore_params[lcore];\n-\t\tif (lp->type == e_APP_LCORE_IO) {\n-\t\t\treturn -5;\n-\t\t}\n-\t\tlp->type = e_APP_LCORE_WORKER;\n-\n-\t\tn_tuples ++;\n-\t\tif (n_tuples > APP_ARG_W_MAX_TUPLES) {\n-\t\t\treturn -6;\n-\t\t}\n-\n-\t\tp = strchr(p, ',');\n-\t\tif (p == NULL) {\n-\t\t\tbreak;\n-\t\t}\n-\t\tp ++;\n-\t}\n-\n-\tif (n_tuples == 0) {\n-\t\treturn -7;\n-\t}\n-\n-\tif ((n_tuples & (n_tuples - 1)) != 0) {\n-\t\treturn -8;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-#ifndef APP_ARG_LPM_MAX_CHARS\n-#define APP_ARG_LPM_MAX_CHARS 4096\n-#endif\n-\n-static int\n-parse_arg_lpm(const char *arg)\n-{\n-\tconst char *p = arg, *p0;\n-\n-\tif (strnlen(arg, APP_ARG_LPM_MAX_CHARS + 1) == APP_ARG_TX_MAX_CHARS + 1) {\n-\t\treturn -1;\n-\t}\n-\n-\twhile (*p != 0) {\n-\t\tuint32_t ip_a, ip_b, ip_c, ip_d, ip, depth, if_out;\n-\t\tchar *endptr;\n-\n-\t\tp0 = strchr(p, '/');\n-\t\tif ((p0 == NULL) ||\n-\t\t (str_to_unsigned_vals(p, p0 - p, '.', 4, &ip_a, &ip_b, &ip_c, &ip_d) != 4)) {\n-\t\t\treturn -2;\n-\t\t}\n-\n-\t\tp = p0 + 1;\n-\t\terrno = 0;\n-\t\tdepth = strtoul(p, &endptr, 0);\n-\t\tif (errno != 0 || *endptr != '=') {\n-\t\t\treturn -3;\n-\t\t}\n-\t\tp = strchr(p, '>');\n-\t\tif (p == NULL) {\n-\t\t\treturn -4;\n-\t\t}\n-\t\tif_out = strtoul(++p, &endptr, 0);\n-\t\tif (errno != 0 || (*endptr != '\\0' && *endptr != ';')) {\n-\t\t\treturn -5;\n-\t\t}\n-\n-\t\tif ((ip_a >= 256) || (ip_b >= 256) || (ip_c >= 256) || (ip_d >= 256) ||\n-\t\t (depth == 0) || (depth >= 32) ||\n-\t\t\t (if_out >= APP_MAX_NIC_PORTS)) {\n-\t\t\treturn -6;\n-\t\t}\n-\t\tip = (ip_a << 24) | (ip_b << 16) | (ip_c << 8) | ip_d;\n-\n-\t\tif (app.n_lpm_rules >= APP_MAX_LPM_RULES) {\n-\t\t\treturn -7;\n-\t\t}\n-\t\tapp.lpm_rules[app.n_lpm_rules].ip = ip;\n-\t\tapp.lpm_rules[app.n_lpm_rules].depth = (uint8_t) depth;\n-\t\tapp.lpm_rules[app.n_lpm_rules].if_out = (uint8_t) if_out;\n-\t\tapp.n_lpm_rules ++;\n-\n-\t\tp = strchr(p, ';');\n-\t\tif (p == NULL) {\n-\t\t\treturn -8;\n-\t\t}\n-\t\tp ++;\n-\t}\n-\n-\tif (app.n_lpm_rules == 0) {\n-\t\treturn -9;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-static int\n-app_check_lpm_table(void)\n-{\n-\tuint32_t rule;\n-\n-\t/* For each rule, check that the output I/F is enabled */\n-\tfor (rule = 0; rule < app.n_lpm_rules; rule ++)\n-\t{\n-\t\tuint32_t port = app.lpm_rules[rule].if_out;\n-\n-\t\tif (app.nic_tx_port_mask[port] == 0) {\n-\t\t\treturn -1;\n-\t\t}\n-\t}\n-\n-\treturn 0;\n-}\n-\n-static int\n-app_check_every_rx_port_is_tx_enabled(void)\n-{\n-\tuint16_t port;\n-\n-\tfor (port = 0; port < APP_MAX_NIC_PORTS; port ++) {\n-\t\tif ((app_get_nic_rx_queues_per_port(port) > 0) && (app.nic_tx_port_mask[port] == 0)) {\n-\t\t\treturn -1;\n-\t\t}\n-\t}\n-\n-\treturn 0;\n-}\n-\n-#ifndef APP_ARG_RSZ_CHARS\n-#define APP_ARG_RSZ_CHARS 63\n-#endif\n-\n-static int\n-parse_arg_rsz(const char *arg)\n-{\n-\tif (strnlen(arg, APP_ARG_RSZ_CHARS + 1) == APP_ARG_RSZ_CHARS + 1) {\n-\t\treturn -1;\n-\t}\n-\n-\tif (str_to_unsigned_vals(arg, APP_ARG_RSZ_CHARS, ',', 4,\n-\t\t\t&app.nic_rx_ring_size,\n-\t\t\t&app.ring_rx_size,\n-\t\t\t&app.ring_tx_size,\n-\t\t\t&app.nic_tx_ring_size) != 4)\n-\t\treturn -2;\n-\n-\n-\tif ((app.nic_rx_ring_size == 0) ||\n-\t\t(app.nic_tx_ring_size == 0) ||\n-\t\t(app.ring_rx_size == 0) ||\n-\t\t(app.ring_tx_size == 0)) {\n-\t\treturn -3;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-#ifndef APP_ARG_BSZ_CHARS\n-#define APP_ARG_BSZ_CHARS 63\n-#endif\n-\n-static int\n-parse_arg_bsz(const char *arg)\n-{\n-\tconst char *p = arg, *p0;\n-\tif (strnlen(arg, APP_ARG_BSZ_CHARS + 1) == APP_ARG_BSZ_CHARS + 1) {\n-\t\treturn -1;\n-\t}\n-\n-\tp0 = strchr(p++, ')');\n-\tif ((p0 == NULL) ||\n-\t (str_to_unsigned_vals(p, p0 - p, ',', 2, &app.burst_size_io_rx_read, &app.burst_size_io_rx_write) != 2)) {\n-\t\treturn -2;\n-\t}\n-\n-\tp = strchr(p0, '(');\n-\tif (p == NULL) {\n-\t\treturn -3;\n-\t}\n-\n-\tp0 = strchr(p++, ')');\n-\tif ((p0 == NULL) ||\n-\t (str_to_unsigned_vals(p, p0 - p, ',', 2, &app.burst_size_worker_read, &app.burst_size_worker_write) != 2)) {\n-\t\treturn -4;\n-\t}\n-\n-\tp = strchr(p0, '(');\n-\tif (p == NULL) {\n-\t\treturn -5;\n-\t}\n-\n-\tp0 = strchr(p++, ')');\n-\tif ((p0 == NULL) ||\n-\t (str_to_unsigned_vals(p, p0 - p, ',', 2, &app.burst_size_io_tx_read, &app.burst_size_io_tx_write) != 2)) {\n-\t\treturn -6;\n-\t}\n-\n-\tif ((app.burst_size_io_rx_read == 0) ||\n-\t\t(app.burst_size_io_rx_write == 0) ||\n-\t\t(app.burst_size_worker_read == 0) ||\n-\t\t(app.burst_size_worker_write == 0) ||\n-\t\t(app.burst_size_io_tx_read == 0) ||\n-\t\t(app.burst_size_io_tx_write == 0)) {\n-\t\treturn -7;\n-\t}\n-\n-\tif ((app.burst_size_io_rx_read > APP_MBUF_ARRAY_SIZE) ||\n-\t\t(app.burst_size_io_rx_write > APP_MBUF_ARRAY_SIZE) ||\n-\t\t(app.burst_size_worker_read > APP_MBUF_ARRAY_SIZE) ||\n-\t\t(app.burst_size_worker_write > APP_MBUF_ARRAY_SIZE) ||\n-\t\t((2 * app.burst_size_io_tx_read) > APP_MBUF_ARRAY_SIZE) ||\n-\t\t(app.burst_size_io_tx_write > APP_MBUF_ARRAY_SIZE)) {\n-\t\treturn -8;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-#ifndef APP_ARG_NUMERICAL_SIZE_CHARS\n-#define APP_ARG_NUMERICAL_SIZE_CHARS 15\n-#endif\n-\n-static int\n-parse_arg_pos_lb(const char *arg)\n-{\n-\tuint32_t x;\n-\tchar *endpt;\n-\n-\tif (strnlen(arg, APP_ARG_NUMERICAL_SIZE_CHARS + 1) == APP_ARG_NUMERICAL_SIZE_CHARS + 1) {\n-\t\treturn -1;\n-\t}\n-\n-\terrno = 0;\n-\tx = strtoul(arg, &endpt, 10);\n-\tif (errno != 0 || endpt == arg || *endpt != '\\0'){\n-\t\treturn -2;\n-\t}\n-\n-\tif (x >= 64) {\n-\t\treturn -3;\n-\t}\n-\n-\tapp.pos_lb = (uint8_t) x;\n-\n-\treturn 0;\n-}\n-\n-/* Parse the argument given in the command line of the application */\n-int\n-app_parse_args(int argc, char **argv)\n-{\n-\tint opt, ret;\n-\tchar **argvopt;\n-\tint option_index;\n-\tchar *prgname = argv[0];\n-\tstatic struct option lgopts[] = {\n-\t\t{\"rx\", 1, 0, 0},\n-\t\t{\"tx\", 1, 0, 0},\n-\t\t{\"w\", 1, 0, 0},\n-\t\t{\"lpm\", 1, 0, 0},\n-\t\t{\"rsz\", 1, 0, 0},\n-\t\t{\"bsz\", 1, 0, 0},\n-\t\t{\"pos-lb\", 1, 0, 0},\n-\t\t{NULL, 0, 0, 0}\n-\t};\n-\tuint32_t arg_w = 0;\n-\tuint32_t arg_rx = 0;\n-\tuint32_t arg_tx = 0;\n-\tuint32_t arg_lpm = 0;\n-\tuint32_t arg_rsz = 0;\n-\tuint32_t arg_bsz = 0;\n-\tuint32_t arg_pos_lb = 0;\n-\n-\targvopt = argv;\n-\n-\twhile ((opt = getopt_long(argc, argvopt, \"\",\n-\t\t\t\tlgopts, &option_index)) != EOF) {\n-\n-\t\tswitch (opt) {\n-\t\t/* long options */\n-\t\tcase 0:\n-\t\t\tif (!strcmp(lgopts[option_index].name, \"rx\")) {\n-\t\t\t\targ_rx = 1;\n-\t\t\t\tret = parse_arg_rx(optarg);\n-\t\t\t\tif (ret) {\n-\t\t\t\t\tprintf(\"Incorrect value for --rx argument (%d)\\n\", ret);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n-\t\t\tif (!strcmp(lgopts[option_index].name, \"tx\")) {\n-\t\t\t\targ_tx = 1;\n-\t\t\t\tret = parse_arg_tx(optarg);\n-\t\t\t\tif (ret) {\n-\t\t\t\t\tprintf(\"Incorrect value for --tx argument (%d)\\n\", ret);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n-\t\t\tif (!strcmp(lgopts[option_index].name, \"w\")) {\n-\t\t\t\targ_w = 1;\n-\t\t\t\tret = parse_arg_w(optarg);\n-\t\t\t\tif (ret) {\n-\t\t\t\t\tprintf(\"Incorrect value for --w argument (%d)\\n\", ret);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n-\t\t\tif (!strcmp(lgopts[option_index].name, \"lpm\")) {\n-\t\t\t\targ_lpm = 1;\n-\t\t\t\tret = parse_arg_lpm(optarg);\n-\t\t\t\tif (ret) {\n-\t\t\t\t\tprintf(\"Incorrect value for --lpm argument (%d)\\n\", ret);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n-\t\t\tif (!strcmp(lgopts[option_index].name, \"rsz\")) {\n-\t\t\t\targ_rsz = 1;\n-\t\t\t\tret = parse_arg_rsz(optarg);\n-\t\t\t\tif (ret) {\n-\t\t\t\t\tprintf(\"Incorrect value for --rsz argument (%d)\\n\", ret);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n-\t\t\tif (!strcmp(lgopts[option_index].name, \"bsz\")) {\n-\t\t\t\targ_bsz = 1;\n-\t\t\t\tret = parse_arg_bsz(optarg);\n-\t\t\t\tif (ret) {\n-\t\t\t\t\tprintf(\"Incorrect value for --bsz argument (%d)\\n\", ret);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n-\t\t\tif (!strcmp(lgopts[option_index].name, \"pos-lb\")) {\n-\t\t\t\targ_pos_lb = 1;\n-\t\t\t\tret = parse_arg_pos_lb(optarg);\n-\t\t\t\tif (ret) {\n-\t\t\t\t\tprintf(\"Incorrect value for --pos-lb argument (%d)\\n\", ret);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n-\t\t\tbreak;\n-\n-\t\tdefault:\n-\t\t\treturn -1;\n-\t\t}\n-\t}\n-\n-\t/* Check that all mandatory arguments are provided */\n-\tif ((arg_rx == 0) || (arg_tx == 0) || (arg_w == 0) || (arg_lpm == 0)){\n-\t\tprintf(\"Not all mandatory arguments are present\\n\");\n-\t\treturn -1;\n-\t}\n-\n-\t/* Assign default values for the optional arguments not provided */\n-\tif (arg_rsz == 0) {\n-\t\tapp.nic_rx_ring_size = APP_DEFAULT_NIC_RX_RING_SIZE;\n-\t\tapp.nic_tx_ring_size = APP_DEFAULT_NIC_TX_RING_SIZE;\n-\t\tapp.ring_rx_size = APP_DEFAULT_RING_RX_SIZE;\n-\t\tapp.ring_tx_size = APP_DEFAULT_RING_TX_SIZE;\n-\t}\n-\n-\tif (arg_bsz == 0) {\n-\t\tapp.burst_size_io_rx_read = APP_DEFAULT_BURST_SIZE_IO_RX_READ;\n-\t\tapp.burst_size_io_rx_write = APP_DEFAULT_BURST_SIZE_IO_RX_WRITE;\n-\t\tapp.burst_size_io_tx_read = APP_DEFAULT_BURST_SIZE_IO_TX_READ;\n-\t\tapp.burst_size_io_tx_write = APP_DEFAULT_BURST_SIZE_IO_TX_WRITE;\n-\t\tapp.burst_size_worker_read = APP_DEFAULT_BURST_SIZE_WORKER_READ;\n-\t\tapp.burst_size_worker_write = APP_DEFAULT_BURST_SIZE_WORKER_WRITE;\n-\t}\n-\n-\tif (arg_pos_lb == 0) {\n-\t\tapp.pos_lb = APP_DEFAULT_IO_RX_LB_POS;\n-\t}\n-\n-\t/* Check cross-consistency of arguments */\n-\tif ((ret = app_check_lpm_table()) < 0) {\n-\t\tprintf(\"At least one LPM rule is inconsistent (%d)\\n\", ret);\n-\t\treturn -1;\n-\t}\n-\tif (app_check_every_rx_port_is_tx_enabled() < 0) {\n-\t\tprintf(\"On LPM lookup miss, packet is sent back on the input port.\\n\");\n-\t\tprintf(\"At least one RX port is not enabled for TX.\\n\");\n-\t\treturn -2;\n-\t}\n-\n-\tif (optind >= 0)\n-\t\targv[optind - 1] = prgname;\n-\n-\tret = optind - 1;\n-\toptind = 1; /* reset getopt lib */\n-\treturn ret;\n-}\n-\n-int\n-app_get_nic_rx_queues_per_port(uint16_t port)\n-{\n-\tuint32_t i, count;\n-\n-\tif (port >= APP_MAX_NIC_PORTS) {\n-\t\treturn -1;\n-\t}\n-\n-\tcount = 0;\n-\tfor (i = 0; i < APP_MAX_RX_QUEUES_PER_NIC_PORT; i ++) {\n-\t\tif (app.nic_rx_queue_mask[port][i] == 1) {\n-\t\t\tcount ++;\n-\t\t}\n-\t}\n-\n-\treturn count;\n-}\n-\n-int\n-app_get_lcore_for_nic_rx(uint16_t port, uint8_t queue, uint32_t *lcore_out)\n-{\n-\tuint32_t lcore;\n-\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_io *lp = &app.lcore_params[lcore].io;\n-\t\tuint32_t i;\n-\n-\t\tif (app.lcore_params[lcore].type != e_APP_LCORE_IO) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tconst size_t n_queues = RTE_MIN(lp->rx.n_nic_queues,\n-\t\t RTE_DIM(lp->rx.nic_queues));\n-\t\tfor (i = 0; i < n_queues; i ++) {\n-\t\t\tif ((lp->rx.nic_queues[i].port == port) &&\n-\t\t\t (lp->rx.nic_queues[i].queue == queue)) {\n-\t\t\t\t*lcore_out = lcore;\n-\t\t\t\treturn 0;\n-\t\t\t}\n-\t\t}\n-\t}\n-\n-\treturn -1;\n-}\n-\n-int\n-app_get_lcore_for_nic_tx(uint16_t port, uint32_t *lcore_out)\n-{\n-\tuint32_t lcore;\n-\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_io *lp = &app.lcore_params[lcore].io;\n-\t\tuint32_t i;\n-\n-\t\tif (app.lcore_params[lcore].type != e_APP_LCORE_IO) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tconst size_t n_ports = RTE_MIN(lp->tx.n_nic_ports,\n-\t\t RTE_DIM(lp->tx.nic_ports));\n-\t\tfor (i = 0; i < n_ports; i ++) {\n-\t\t\tif (lp->tx.nic_ports[i] == port) {\n-\t\t\t\t*lcore_out = lcore;\n-\t\t\t\treturn 0;\n-\t\t\t}\n-\t\t}\n-\t}\n-\n-\treturn -1;\n-}\n-\n-int\n-app_is_socket_used(uint32_t socket)\n-{\n-\tuint32_t lcore;\n-\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tif (app.lcore_params[lcore].type == e_APP_LCORE_DISABLED) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tif (socket == rte_lcore_to_socket_id(lcore)) {\n-\t\t\treturn 1;\n-\t\t}\n-\t}\n-\n-\treturn 0;\n-}\n-\n-uint32_t\n-app_get_lcores_io_rx(void)\n-{\n-\tuint32_t lcore, count;\n-\n-\tcount = 0;\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_io *lp_io = &app.lcore_params[lcore].io;\n-\n-\t\tif ((app.lcore_params[lcore].type != e_APP_LCORE_IO) ||\n-\t\t (lp_io->rx.n_nic_queues == 0)) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tcount ++;\n-\t}\n-\n-\treturn count;\n-}\n-\n-uint32_t\n-app_get_lcores_worker(void)\n-{\n-\tuint32_t lcore, count;\n-\n-\tcount = 0;\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tif (app.lcore_params[lcore].type != e_APP_LCORE_WORKER) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tcount ++;\n-\t}\n-\n-\tif (count > APP_MAX_WORKER_LCORES) {\n-\t\trte_panic(\"Algorithmic error (too many worker lcores)\\n\");\n-\t\treturn 0;\n-\t}\n-\n-\treturn count;\n-}\n-\n-void\n-app_print_params(void)\n-{\n-\tunsigned port, queue, lcore, rule, i, j;\n-\n-\t/* Print NIC RX configuration */\n-\tprintf(\"NIC RX ports: \");\n-\tfor (port = 0; port < APP_MAX_NIC_PORTS; port ++) {\n-\t\tuint32_t n_rx_queues = app_get_nic_rx_queues_per_port(port);\n-\n-\t\tif (n_rx_queues == 0) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tprintf(\"%u (\", port);\n-\t\tfor (queue = 0; queue < APP_MAX_RX_QUEUES_PER_NIC_PORT; queue ++) {\n-\t\t\tif (app.nic_rx_queue_mask[port][queue] == 1) {\n-\t\t\t\tprintf(\"%u \", queue);\n-\t\t\t}\n-\t\t}\n-\t\tprintf(\") \");\n-\t}\n-\tprintf(\";\\n\");\n-\n-\t/* Print I/O lcore RX params */\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_io *lp = &app.lcore_params[lcore].io;\n-\n-\t\tif ((app.lcore_params[lcore].type != e_APP_LCORE_IO) ||\n-\t\t (lp->rx.n_nic_queues == 0)) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tprintf(\"I/O lcore %u (socket %u): \", lcore, rte_lcore_to_socket_id(lcore));\n-\n-\t\tprintf(\"RX ports \");\n-\t\tfor (i = 0; i < lp->rx.n_nic_queues; i ++) {\n-\t\t\tprintf(\"(%u, %u) \",\n-\t\t\t\t(unsigned) lp->rx.nic_queues[i].port,\n-\t\t\t\t(unsigned) lp->rx.nic_queues[i].queue);\n-\t\t}\n-\t\tprintf(\"; \");\n-\n-\t\tprintf(\"Output rings \");\n-\t\tfor (i = 0; i < lp->rx.n_rings; i ++) {\n-\t\t\tprintf(\"%p \", lp->rx.rings[i]);\n-\t\t}\n-\t\tprintf(\";\\n\");\n-\t}\n-\n-\t/* Print worker lcore RX params */\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_worker *lp = &app.lcore_params[lcore].worker;\n-\n-\t\tif (app.lcore_params[lcore].type != e_APP_LCORE_WORKER) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tprintf(\"Worker lcore %u (socket %u) ID %u: \",\n-\t\t\tlcore,\n-\t\t\trte_lcore_to_socket_id(lcore),\n-\t\t\t(unsigned)lp->worker_id);\n-\n-\t\tprintf(\"Input rings \");\n-\t\tfor (i = 0; i < lp->n_rings_in; i ++) {\n-\t\t\tprintf(\"%p \", lp->rings_in[i]);\n-\t\t}\n-\n-\t\tprintf(\";\\n\");\n-\t}\n-\n-\tprintf(\"\\n\");\n-\n-\t/* Print NIC TX configuration */\n-\tprintf(\"NIC TX ports: \");\n-\tfor (port = 0; port < APP_MAX_NIC_PORTS; port ++) {\n-\t\tif (app.nic_tx_port_mask[port] == 1) {\n-\t\t\tprintf(\"%u \", port);\n-\t\t}\n-\t}\n-\tprintf(\";\\n\");\n-\n-\t/* Print I/O TX lcore params */\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_io *lp = &app.lcore_params[lcore].io;\n-\t\tuint32_t n_workers = app_get_lcores_worker();\n-\n-\t\tif ((app.lcore_params[lcore].type != e_APP_LCORE_IO) ||\n-\t\t (lp->tx.n_nic_ports == 0)) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tprintf(\"I/O lcore %u (socket %u): \", lcore, rte_lcore_to_socket_id(lcore));\n-\n-\t\tprintf(\"Input rings per TX port \");\n-\t\tfor (i = 0; i < lp->tx.n_nic_ports; i ++) {\n-\t\t\tport = lp->tx.nic_ports[i];\n-\n-\t\t\tprintf(\"%u (\", port);\n-\t\t\tfor (j = 0; j < n_workers; j ++) {\n-\t\t\t\tprintf(\"%p \", lp->tx.rings[port][j]);\n-\t\t\t}\n-\t\t\tprintf(\") \");\n-\n-\t\t}\n-\n-\t\tprintf(\";\\n\");\n-\t}\n-\n-\t/* Print worker lcore TX params */\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_worker *lp = &app.lcore_params[lcore].worker;\n-\n-\t\tif (app.lcore_params[lcore].type != e_APP_LCORE_WORKER) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tprintf(\"Worker lcore %u (socket %u) ID %u: \\n\",\n-\t\t\tlcore,\n-\t\t\trte_lcore_to_socket_id(lcore),\n-\t\t\t(unsigned)lp->worker_id);\n-\n-\t\tprintf(\"Output rings per TX port \");\n-\t\tfor (port = 0; port < APP_MAX_NIC_PORTS; port ++) {\n-\t\t\tif (lp->rings_out[port] != NULL) {\n-\t\t\t\tprintf(\"%u (%p) \", port, lp->rings_out[port]);\n-\t\t\t}\n-\t\t}\n-\n-\t\tprintf(\";\\n\");\n-\t}\n-\n-\t/* Print LPM rules */\n-\tprintf(\"LPM rules: \\n\");\n-\tfor (rule = 0; rule < app.n_lpm_rules; rule ++) {\n-\t\tuint32_t ip = app.lpm_rules[rule].ip;\n-\t\tuint8_t depth = app.lpm_rules[rule].depth;\n-\t\tuint8_t if_out = app.lpm_rules[rule].if_out;\n-\n-\t\tprintf(\"\\t%u: %u.%u.%u.%u/%u => %u;\\n\",\n-\t\t\trule,\n-\t\t\t(unsigned) (ip & 0xFF000000) >> 24,\n-\t\t\t(unsigned) (ip & 0x00FF0000) >> 16,\n-\t\t\t(unsigned) (ip & 0x0000FF00) >> 8,\n-\t\t\t(unsigned) ip & 0x000000FF,\n-\t\t\t(unsigned) depth,\n-\t\t\t(unsigned) if_out\n-\t\t);\n-\t}\n-\n-\t/* Rings */\n-\tprintf(\"Ring sizes: NIC RX = %u; Worker in = %u; Worker out = %u; NIC TX = %u;\\n\",\n-\t\t(unsigned) app.nic_rx_ring_size,\n-\t\t(unsigned) app.ring_rx_size,\n-\t\t(unsigned) app.ring_tx_size,\n-\t\t(unsigned) app.nic_tx_ring_size);\n-\n-\t/* Bursts */\n-\tprintf(\"Burst sizes: I/O RX (rd = %u, wr = %u); Worker (rd = %u, wr = %u); I/O TX (rd = %u, wr = %u)\\n\",\n-\t\t(unsigned) app.burst_size_io_rx_read,\n-\t\t(unsigned) app.burst_size_io_rx_write,\n-\t\t(unsigned) app.burst_size_worker_read,\n-\t\t(unsigned) app.burst_size_worker_write,\n-\t\t(unsigned) app.burst_size_io_tx_read,\n-\t\t(unsigned) app.burst_size_io_tx_write);\n-}\ndiff --git a/examples/load_balancer/init.c b/examples/load_balancer/init.c\ndeleted file mode 100644\nindex 3ab7d0211..000000000\n--- a/examples/load_balancer/init.c\n+++ /dev/null\n@@ -1,520 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2010-2014 Intel Corporation\n- */\n-\n-#include <stdio.h>\n-#include <stdlib.h>\n-#include <stdint.h>\n-#include <inttypes.h>\n-#include <sys/types.h>\n-#include <string.h>\n-#include <sys/queue.h>\n-#include <stdarg.h>\n-#include <errno.h>\n-#include <getopt.h>\n-\n-#include <rte_common.h>\n-#include <rte_byteorder.h>\n-#include <rte_log.h>\n-#include <rte_memory.h>\n-#include <rte_memcpy.h>\n-#include <rte_eal.h>\n-#include <rte_launch.h>\n-#include <rte_atomic.h>\n-#include <rte_cycles.h>\n-#include <rte_prefetch.h>\n-#include <rte_lcore.h>\n-#include <rte_per_lcore.h>\n-#include <rte_branch_prediction.h>\n-#include <rte_interrupts.h>\n-#include <rte_random.h>\n-#include <rte_debug.h>\n-#include <rte_ether.h>\n-#include <rte_ethdev.h>\n-#include <rte_ring.h>\n-#include <rte_mempool.h>\n-#include <rte_mbuf.h>\n-#include <rte_string_fns.h>\n-#include <rte_ip.h>\n-#include <rte_tcp.h>\n-#include <rte_lpm.h>\n-\n-#include \"main.h\"\n-\n-static struct rte_eth_conf port_conf = {\n-\t.rxmode = {\n-\t\t.mq_mode\t= ETH_MQ_RX_RSS,\n-\t\t.split_hdr_size = 0,\n-\t\t.offloads = DEV_RX_OFFLOAD_CHECKSUM,\n-\t},\n-\t.rx_adv_conf = {\n-\t\t.rss_conf = {\n-\t\t\t.rss_key = NULL,\n-\t\t\t.rss_hf = ETH_RSS_IP,\n-\t\t},\n-\t},\n-\t.txmode = {\n-\t\t.mq_mode = ETH_MQ_TX_NONE,\n-\t},\n-};\n-\n-static void\n-app_assign_worker_ids(void)\n-{\n-\tuint32_t lcore, worker_id;\n-\n-\t/* Assign ID for each worker */\n-\tworker_id = 0;\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_worker *lp_worker = &app.lcore_params[lcore].worker;\n-\n-\t\tif (app.lcore_params[lcore].type != e_APP_LCORE_WORKER) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tlp_worker->worker_id = worker_id;\n-\t\tworker_id ++;\n-\t}\n-}\n-\n-static void\n-app_init_mbuf_pools(void)\n-{\n-\tunsigned socket, lcore;\n-\n-\t/* Init the buffer pools */\n-\tfor (socket = 0; socket < APP_MAX_SOCKETS; socket ++) {\n-\t\tchar name[32];\n-\t\tif (app_is_socket_used(socket) == 0) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tsnprintf(name, sizeof(name), \"mbuf_pool_%u\", socket);\n-\t\tprintf(\"Creating the mbuf pool for socket %u ...\\n\", socket);\n-\t\tapp.pools[socket] = rte_pktmbuf_pool_create(\n-\t\t\tname, APP_DEFAULT_MEMPOOL_BUFFERS,\n-\t\t\tAPP_DEFAULT_MEMPOOL_CACHE_SIZE,\n-\t\t\t0, APP_DEFAULT_MBUF_DATA_SIZE, socket);\n-\t\tif (app.pools[socket] == NULL) {\n-\t\t\trte_panic(\"Cannot create mbuf pool on socket %u\\n\", socket);\n-\t\t}\n-\t}\n-\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tif (app.lcore_params[lcore].type == e_APP_LCORE_DISABLED) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tsocket = rte_lcore_to_socket_id(lcore);\n-\t\tapp.lcore_params[lcore].pool = app.pools[socket];\n-\t}\n-}\n-\n-static void\n-app_init_lpm_tables(void)\n-{\n-\tunsigned socket, lcore;\n-\n-\t/* Init the LPM tables */\n-\tfor (socket = 0; socket < APP_MAX_SOCKETS; socket ++) {\n-\t\tchar name[32];\n-\t\tuint32_t rule;\n-\n-\t\tif (app_is_socket_used(socket) == 0) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tstruct rte_lpm_config lpm_config;\n-\n-\t\tlpm_config.max_rules = APP_MAX_LPM_RULES;\n-\t\tlpm_config.number_tbl8s = 256;\n-\t\tlpm_config.flags = 0;\n-\t\tsnprintf(name, sizeof(name), \"lpm_table_%u\", socket);\n-\t\tprintf(\"Creating the LPM table for socket %u ...\\n\", socket);\n-\t\tapp.lpm_tables[socket] = rte_lpm_create(\n-\t\t\tname,\n-\t\t\tsocket,\n-\t\t\t&lpm_config);\n-\t\tif (app.lpm_tables[socket] == NULL) {\n-\t\t\trte_panic(\"Unable to create LPM table on socket %u\\n\", socket);\n-\t\t}\n-\n-\t\tfor (rule = 0; rule < app.n_lpm_rules; rule ++) {\n-\t\t\tint ret;\n-\n-\t\t\tret = rte_lpm_add(app.lpm_tables[socket],\n-\t\t\t\tapp.lpm_rules[rule].ip,\n-\t\t\t\tapp.lpm_rules[rule].depth,\n-\t\t\t\tapp.lpm_rules[rule].if_out);\n-\n-\t\t\tif (ret < 0) {\n-\t\t\t\trte_panic(\"Unable to add entry %u (%x/%u => %u) to the LPM table on socket %u (%d)\\n\",\n-\t\t\t\t\t(unsigned) rule,\n-\t\t\t\t\t(unsigned) app.lpm_rules[rule].ip,\n-\t\t\t\t\t(unsigned) app.lpm_rules[rule].depth,\n-\t\t\t\t\t(unsigned) app.lpm_rules[rule].if_out,\n-\t\t\t\t\tsocket,\n-\t\t\t\t\tret);\n-\t\t\t}\n-\t\t}\n-\n-\t}\n-\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tif (app.lcore_params[lcore].type != e_APP_LCORE_WORKER) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tsocket = rte_lcore_to_socket_id(lcore);\n-\t\tapp.lcore_params[lcore].worker.lpm_table = app.lpm_tables[socket];\n-\t}\n-}\n-\n-static void\n-app_init_rings_rx(void)\n-{\n-\tunsigned lcore;\n-\n-\t/* Initialize the rings for the RX side */\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_io *lp_io = &app.lcore_params[lcore].io;\n-\t\tunsigned socket_io, lcore_worker;\n-\n-\t\tif ((app.lcore_params[lcore].type != e_APP_LCORE_IO) ||\n-\t\t (lp_io->rx.n_nic_queues == 0)) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tsocket_io = rte_lcore_to_socket_id(lcore);\n-\n-\t\tfor (lcore_worker = 0; lcore_worker < APP_MAX_LCORES; lcore_worker ++) {\n-\t\t\tchar name[32];\n-\t\t\tstruct app_lcore_params_worker *lp_worker = &app.lcore_params[lcore_worker].worker;\n-\t\t\tstruct rte_ring *ring = NULL;\n-\n-\t\t\tif (app.lcore_params[lcore_worker].type != e_APP_LCORE_WORKER) {\n-\t\t\t\tcontinue;\n-\t\t\t}\n-\n-\t\t\tprintf(\"Creating ring to connect I/O lcore %u (socket %u) with worker lcore %u ...\\n\",\n-\t\t\t\tlcore,\n-\t\t\t\tsocket_io,\n-\t\t\t\tlcore_worker);\n-\t\t\tsnprintf(name, sizeof(name), \"app_ring_rx_s%u_io%u_w%u\",\n-\t\t\t\tsocket_io,\n-\t\t\t\tlcore,\n-\t\t\t\tlcore_worker);\n-\t\t\tring = rte_ring_create(\n-\t\t\t\tname,\n-\t\t\t\tapp.ring_rx_size,\n-\t\t\t\tsocket_io,\n-\t\t\t\tRING_F_SP_ENQ | RING_F_SC_DEQ);\n-\t\t\tif (ring == NULL) {\n-\t\t\t\trte_panic(\"Cannot create ring to connect I/O core %u with worker core %u\\n\",\n-\t\t\t\t\tlcore,\n-\t\t\t\t\tlcore_worker);\n-\t\t\t}\n-\n-\t\t\tlp_io->rx.rings[lp_io->rx.n_rings] = ring;\n-\t\t\tlp_io->rx.n_rings ++;\n-\n-\t\t\tlp_worker->rings_in[lp_worker->n_rings_in] = ring;\n-\t\t\tlp_worker->n_rings_in ++;\n-\t\t}\n-\t}\n-\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_io *lp_io = &app.lcore_params[lcore].io;\n-\n-\t\tif ((app.lcore_params[lcore].type != e_APP_LCORE_IO) ||\n-\t\t (lp_io->rx.n_nic_queues == 0)) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tif (lp_io->rx.n_rings != app_get_lcores_worker()) {\n-\t\t\trte_panic(\"Algorithmic error (I/O RX rings)\\n\");\n-\t\t}\n-\t}\n-\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_worker *lp_worker = &app.lcore_params[lcore].worker;\n-\n-\t\tif (app.lcore_params[lcore].type != e_APP_LCORE_WORKER) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tif (lp_worker->n_rings_in != app_get_lcores_io_rx()) {\n-\t\t\trte_panic(\"Algorithmic error (worker input rings)\\n\");\n-\t\t}\n-\t}\n-}\n-\n-static void\n-app_init_rings_tx(void)\n-{\n-\tunsigned lcore;\n-\n-\t/* Initialize the rings for the TX side */\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_worker *lp_worker = &app.lcore_params[lcore].worker;\n-\t\tunsigned port;\n-\n-\t\tif (app.lcore_params[lcore].type != e_APP_LCORE_WORKER) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tfor (port = 0; port < APP_MAX_NIC_PORTS; port ++) {\n-\t\t\tchar name[32];\n-\t\t\tstruct app_lcore_params_io *lp_io = NULL;\n-\t\t\tstruct rte_ring *ring;\n-\t\t\tuint32_t socket_io, lcore_io;\n-\n-\t\t\tif (app.nic_tx_port_mask[port] == 0) {\n-\t\t\t\tcontinue;\n-\t\t\t}\n-\n-\t\t\tif (app_get_lcore_for_nic_tx(port, &lcore_io) < 0) {\n-\t\t\t\trte_panic(\"Algorithmic error (no I/O core to handle TX of port %u)\\n\",\n-\t\t\t\t\tport);\n-\t\t\t}\n-\n-\t\t\tlp_io = &app.lcore_params[lcore_io].io;\n-\t\t\tsocket_io = rte_lcore_to_socket_id(lcore_io);\n-\n-\t\t\tprintf(\"Creating ring to connect worker lcore %u with TX port %u (through I/O lcore %u) (socket %u) ...\\n\",\n-\t\t\t\tlcore, port, (unsigned)lcore_io, (unsigned)socket_io);\n-\t\t\tsnprintf(name, sizeof(name), \"app_ring_tx_s%u_w%u_p%u\", socket_io, lcore, port);\n-\t\t\tring = rte_ring_create(\n-\t\t\t\tname,\n-\t\t\t\tapp.ring_tx_size,\n-\t\t\t\tsocket_io,\n-\t\t\t\tRING_F_SP_ENQ | RING_F_SC_DEQ);\n-\t\t\tif (ring == NULL) {\n-\t\t\t\trte_panic(\"Cannot create ring to connect worker core %u with TX port %u\\n\",\n-\t\t\t\t\tlcore,\n-\t\t\t\t\tport);\n-\t\t\t}\n-\n-\t\t\tlp_worker->rings_out[port] = ring;\n-\t\t\tlp_io->tx.rings[port][lp_worker->worker_id] = ring;\n-\t\t}\n-\t}\n-\n-\tfor (lcore = 0; lcore < APP_MAX_LCORES; lcore ++) {\n-\t\tstruct app_lcore_params_io *lp_io = &app.lcore_params[lcore].io;\n-\t\tunsigned i;\n-\n-\t\tif ((app.lcore_params[lcore].type != e_APP_LCORE_IO) ||\n-\t\t (lp_io->tx.n_nic_ports == 0)) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tfor (i = 0; i < lp_io->tx.n_nic_ports; i ++){\n-\t\t\tunsigned port, j;\n-\n-\t\t\tport = lp_io->tx.nic_ports[i];\n-\t\t\tfor (j = 0; j < app_get_lcores_worker(); j ++) {\n-\t\t\t\tif (lp_io->tx.rings[port][j] == NULL) {\n-\t\t\t\t\trte_panic(\"Algorithmic error (I/O TX rings)\\n\");\n-\t\t\t\t}\n-\t\t\t}\n-\t\t}\n-\t}\n-}\n-\n-/* Check the link status of all ports in up to 9s, and print them finally */\n-static void\n-check_all_ports_link_status(uint16_t port_num, uint32_t port_mask)\n-{\n-#define CHECK_INTERVAL 100 /* 100ms */\n-#define MAX_CHECK_TIME 90 /* 9s (90 * 100ms) in total */\n-\tuint16_t portid;\n-\tuint8_t count, all_ports_up, print_flag = 0;\n-\tstruct rte_eth_link link;\n-\tuint32_t n_rx_queues, n_tx_queues;\n-\n-\tprintf(\"\\nChecking link status\");\n-\tfflush(stdout);\n-\tfor (count = 0; count <= MAX_CHECK_TIME; count++) {\n-\t\tall_ports_up = 1;\n-\t\tfor (portid = 0; portid < port_num; portid++) {\n-\t\t\tif ((port_mask & (1 << portid)) == 0)\n-\t\t\t\tcontinue;\n-\t\t\tn_rx_queues = app_get_nic_rx_queues_per_port(portid);\n-\t\t\tn_tx_queues = app.nic_tx_port_mask[portid];\n-\t\t\tif ((n_rx_queues == 0) && (n_tx_queues == 0))\n-\t\t\t\tcontinue;\n-\t\t\tmemset(&link, 0, sizeof(link));\n-\t\t\trte_eth_link_get_nowait(portid, &link);\n-\t\t\t/* print link status if flag set */\n-\t\t\tif (print_flag == 1) {\n-\t\t\t\tif (link.link_status)\n-\t\t\t\t\tprintf(\n-\t\t\t\t\t\"Port%d Link Up - speed %uMbps - %s\\n\",\n-\t\t\t\t\t\tportid, link.link_speed,\n-\t\t\t\t(link.link_duplex == ETH_LINK_FULL_DUPLEX) ?\n-\t\t\t\t\t(\"full-duplex\") : (\"half-duplex\\n\"));\n-\t\t\t\telse\n-\t\t\t\t\tprintf(\"Port %d Link Down\\n\", portid);\n-\t\t\t\tcontinue;\n-\t\t\t}\n-\t\t\t/* clear all_ports_up flag if any link down */\n-\t\t\tif (link.link_status == ETH_LINK_DOWN) {\n-\t\t\t\tall_ports_up = 0;\n-\t\t\t\tbreak;\n-\t\t\t}\n-\t\t}\n-\t\t/* after finally printing all link status, get out */\n-\t\tif (print_flag == 1)\n-\t\t\tbreak;\n-\n-\t\tif (all_ports_up == 0) {\n-\t\t\tprintf(\".\");\n-\t\t\tfflush(stdout);\n-\t\t\trte_delay_ms(CHECK_INTERVAL);\n-\t\t}\n-\n-\t\t/* set the print_flag if all ports up or timeout */\n-\t\tif (all_ports_up == 1 || count == (MAX_CHECK_TIME - 1)) {\n-\t\t\tprint_flag = 1;\n-\t\t\tprintf(\"done\\n\");\n-\t\t}\n-\t}\n-}\n-\n-static void\n-app_init_nics(void)\n-{\n-\tunsigned socket;\n-\tuint32_t lcore;\n-\tuint16_t port;\n-\tuint8_t queue;\n-\tint ret;\n-\tuint32_t n_rx_queues, n_tx_queues;\n-\n-\t/* Init NIC ports and queues, then start the ports */\n-\tfor (port = 0; port < APP_MAX_NIC_PORTS; port ++) {\n-\t\tstruct rte_mempool *pool;\n-\t\tuint16_t nic_rx_ring_size;\n-\t\tuint16_t nic_tx_ring_size;\n-\t\tstruct rte_eth_rxconf rxq_conf;\n-\t\tstruct rte_eth_txconf txq_conf;\n-\t\tstruct rte_eth_dev_info dev_info;\n-\t\tstruct rte_eth_conf local_port_conf = port_conf;\n-\n-\t\tn_rx_queues = app_get_nic_rx_queues_per_port(port);\n-\t\tn_tx_queues = app.nic_tx_port_mask[port];\n-\n-\t\tif ((n_rx_queues == 0) && (n_tx_queues == 0)) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\t/* Init port */\n-\t\tprintf(\"Initializing NIC port %u ...\\n\", port);\n-\t\trte_eth_dev_info_get(port, &dev_info);\n-\t\tif (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)\n-\t\t\tlocal_port_conf.txmode.offloads |=\n-\t\t\t\tDEV_TX_OFFLOAD_MBUF_FAST_FREE;\n-\n-\t\tlocal_port_conf.rx_adv_conf.rss_conf.rss_hf &=\n-\t\t\tdev_info.flow_type_rss_offloads;\n-\t\tif (local_port_conf.rx_adv_conf.rss_conf.rss_hf !=\n-\t\t\t\tport_conf.rx_adv_conf.rss_conf.rss_hf) {\n-\t\t\tprintf(\"Port %u modified RSS hash function based on hardware support,\"\n-\t\t\t\t\"requested:%#\"PRIx64\" configured:%#\"PRIx64\"\\n\",\n-\t\t\t\tport,\n-\t\t\t\tport_conf.rx_adv_conf.rss_conf.rss_hf,\n-\t\t\t\tlocal_port_conf.rx_adv_conf.rss_conf.rss_hf);\n-\t\t}\n-\n-\t\tret = rte_eth_dev_configure(\n-\t\t\tport,\n-\t\t\t(uint8_t) n_rx_queues,\n-\t\t\t(uint8_t) n_tx_queues,\n-\t\t\t&local_port_conf);\n-\t\tif (ret < 0) {\n-\t\t\trte_panic(\"Cannot init NIC port %u (%d)\\n\", port, ret);\n-\t\t}\n-\t\trte_eth_promiscuous_enable(port);\n-\n-\t\tnic_rx_ring_size = app.nic_rx_ring_size;\n-\t\tnic_tx_ring_size = app.nic_tx_ring_size;\n-\t\tret = rte_eth_dev_adjust_nb_rx_tx_desc(\n-\t\t\tport, &nic_rx_ring_size, &nic_tx_ring_size);\n-\t\tif (ret < 0) {\n-\t\t\trte_panic(\"Cannot adjust number of descriptors for port %u (%d)\\n\",\n-\t\t\t\t port, ret);\n-\t\t}\n-\t\tapp.nic_rx_ring_size = nic_rx_ring_size;\n-\t\tapp.nic_tx_ring_size = nic_tx_ring_size;\n-\n-\t\trxq_conf = dev_info.default_rxconf;\n-\t\trxq_conf.offloads = local_port_conf.rxmode.offloads;\n-\t\t/* Init RX queues */\n-\t\tfor (queue = 0; queue < APP_MAX_RX_QUEUES_PER_NIC_PORT; queue ++) {\n-\t\t\tif (app.nic_rx_queue_mask[port][queue] == 0) {\n-\t\t\t\tcontinue;\n-\t\t\t}\n-\n-\t\t\tapp_get_lcore_for_nic_rx(port, queue, &lcore);\n-\t\t\tsocket = rte_lcore_to_socket_id(lcore);\n-\t\t\tpool = app.lcore_params[lcore].pool;\n-\n-\t\t\tprintf(\"Initializing NIC port %u RX queue %u ...\\n\",\n-\t\t\t\tport, queue);\n-\t\t\tret = rte_eth_rx_queue_setup(\n-\t\t\t\tport,\n-\t\t\t\tqueue,\n-\t\t\t\t(uint16_t) app.nic_rx_ring_size,\n-\t\t\t\tsocket,\n-\t\t\t\t&rxq_conf,\n-\t\t\t\tpool);\n-\t\t\tif (ret < 0) {\n-\t\t\t\trte_panic(\"Cannot init RX queue %u for port %u (%d)\\n\",\n-\t\t\t\t\t queue, port, ret);\n-\t\t\t}\n-\t\t}\n-\n-\t\ttxq_conf = dev_info.default_txconf;\n-\t\ttxq_conf.offloads = local_port_conf.txmode.offloads;\n-\t\t/* Init TX queues */\n-\t\tif (app.nic_tx_port_mask[port] == 1) {\n-\t\t\tapp_get_lcore_for_nic_tx(port, &lcore);\n-\t\t\tsocket = rte_lcore_to_socket_id(lcore);\n-\t\t\tprintf(\"Initializing NIC port %u TX queue 0 ...\\n\",\n-\t\t\t\tport);\n-\t\t\tret = rte_eth_tx_queue_setup(\n-\t\t\t\tport,\n-\t\t\t\t0,\n-\t\t\t\t(uint16_t) app.nic_tx_ring_size,\n-\t\t\t\tsocket,\n-\t\t\t\t&txq_conf);\n-\t\t\tif (ret < 0) {\n-\t\t\t\trte_panic(\"Cannot init TX queue 0 for port %d (%d)\\n\",\n-\t\t\t\t\tport,\n-\t\t\t\t\tret);\n-\t\t\t}\n-\t\t}\n-\n-\t\t/* Start port */\n-\t\tret = rte_eth_dev_start(port);\n-\t\tif (ret < 0) {\n-\t\t\trte_panic(\"Cannot start port %d (%d)\\n\", port, ret);\n-\t\t}\n-\t}\n-\n-\tcheck_all_ports_link_status(APP_MAX_NIC_PORTS, (~0x0));\n-}\n-\n-void\n-app_init(void)\n-{\n-\tapp_assign_worker_ids();\n-\tapp_init_mbuf_pools();\n-\tapp_init_lpm_tables();\n-\tapp_init_rings_rx();\n-\tapp_init_rings_tx();\n-\tapp_init_nics();\n-\n-\tprintf(\"Initialization completed.\\n\");\n-}\ndiff --git a/examples/load_balancer/main.c b/examples/load_balancer/main.c\ndeleted file mode 100644\nindex d3dcb235d..000000000\n--- a/examples/load_balancer/main.c\n+++ /dev/null\n@@ -1,76 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2010-2014 Intel Corporation\n- */\n-\n-#include <stdio.h>\n-#include <stdlib.h>\n-#include <stdint.h>\n-#include <inttypes.h>\n-#include <sys/types.h>\n-#include <string.h>\n-#include <sys/queue.h>\n-#include <stdarg.h>\n-#include <errno.h>\n-#include <getopt.h>\n-#include <unistd.h>\n-\n-#include <rte_common.h>\n-#include <rte_byteorder.h>\n-#include <rte_log.h>\n-#include <rte_memory.h>\n-#include <rte_memcpy.h>\n-#include <rte_eal.h>\n-#include <rte_launch.h>\n-#include <rte_atomic.h>\n-#include <rte_cycles.h>\n-#include <rte_prefetch.h>\n-#include <rte_lcore.h>\n-#include <rte_per_lcore.h>\n-#include <rte_branch_prediction.h>\n-#include <rte_interrupts.h>\n-#include <rte_random.h>\n-#include <rte_debug.h>\n-#include <rte_ether.h>\n-#include <rte_ethdev.h>\n-#include <rte_mempool.h>\n-#include <rte_mbuf.h>\n-#include <rte_ip.h>\n-#include <rte_tcp.h>\n-#include <rte_lpm.h>\n-\n-#include \"main.h\"\n-\n-int\n-main(int argc, char **argv)\n-{\n-\tuint32_t lcore;\n-\tint ret;\n-\n-\t/* Init EAL */\n-\tret = rte_eal_init(argc, argv);\n-\tif (ret < 0)\n-\t\treturn -1;\n-\targc -= ret;\n-\targv += ret;\n-\n-\t/* Parse application arguments (after the EAL ones) */\n-\tret = app_parse_args(argc, argv);\n-\tif (ret < 0) {\n-\t\tapp_print_usage();\n-\t\treturn -1;\n-\t}\n-\n-\t/* Init */\n-\tapp_init();\n-\tapp_print_params();\n-\n-\t/* Launch per-lcore init on every lcore */\n-\trte_eal_mp_remote_launch(app_lcore_main_loop, NULL, CALL_MASTER);\n-\tRTE_LCORE_FOREACH_SLAVE(lcore) {\n-\t\tif (rte_eal_wait_lcore(lcore) < 0) {\n-\t\t\treturn -1;\n-\t\t}\n-\t}\n-\n-\treturn 0;\n-}\ndiff --git a/examples/load_balancer/main.h b/examples/load_balancer/main.h\ndeleted file mode 100644\nindex 9fefb62ed..000000000\n--- a/examples/load_balancer/main.h\n+++ /dev/null\n@@ -1,351 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2010-2014 Intel Corporation\n- */\n-\n-#ifndef _MAIN_H_\n-#define _MAIN_H_\n-\n-/* Logical cores */\n-#ifndef APP_MAX_SOCKETS\n-#define APP_MAX_SOCKETS 2\n-#endif\n-\n-#ifndef APP_MAX_LCORES\n-#define APP_MAX_LCORES RTE_MAX_LCORE\n-#endif\n-\n-#ifndef APP_MAX_NIC_PORTS\n-#define APP_MAX_NIC_PORTS RTE_MAX_ETHPORTS\n-#endif\n-\n-#ifndef APP_MAX_RX_QUEUES_PER_NIC_PORT\n-#define APP_MAX_RX_QUEUES_PER_NIC_PORT 128\n-#endif\n-\n-#ifndef APP_MAX_TX_QUEUES_PER_NIC_PORT\n-#define APP_MAX_TX_QUEUES_PER_NIC_PORT 128\n-#endif\n-\n-#ifndef APP_MAX_IO_LCORES\n-#if (APP_MAX_LCORES > 16)\n-#define APP_MAX_IO_LCORES 16\n-#else\n-#define APP_MAX_IO_LCORES APP_MAX_LCORES\n-#endif\n-#endif\n-#if (APP_MAX_IO_LCORES > APP_MAX_LCORES)\n-#error \"APP_MAX_IO_LCORES is too big\"\n-#endif\n-\n-#ifndef APP_MAX_NIC_RX_QUEUES_PER_IO_LCORE\n-#define APP_MAX_NIC_RX_QUEUES_PER_IO_LCORE 16\n-#endif\n-\n-#ifndef APP_MAX_NIC_TX_PORTS_PER_IO_LCORE\n-#define APP_MAX_NIC_TX_PORTS_PER_IO_LCORE 16\n-#endif\n-#if (APP_MAX_NIC_TX_PORTS_PER_IO_LCORE > APP_MAX_NIC_PORTS)\n-#error \"APP_MAX_NIC_TX_PORTS_PER_IO_LCORE too big\"\n-#endif\n-\n-#ifndef APP_MAX_WORKER_LCORES\n-#if (APP_MAX_LCORES > 16)\n-#define APP_MAX_WORKER_LCORES 16\n-#else\n-#define APP_MAX_WORKER_LCORES APP_MAX_LCORES\n-#endif\n-#endif\n-#if (APP_MAX_WORKER_LCORES > APP_MAX_LCORES)\n-#error \"APP_MAX_WORKER_LCORES is too big\"\n-#endif\n-\n-\n-/* Mempools */\n-#ifndef APP_DEFAULT_MBUF_DATA_SIZE\n-#define APP_DEFAULT_MBUF_DATA_SIZE RTE_MBUF_DEFAULT_BUF_SIZE\n-#endif\n-\n-#ifndef APP_DEFAULT_MEMPOOL_BUFFERS\n-#define APP_DEFAULT_MEMPOOL_BUFFERS 8192 * 4\n-#endif\n-\n-#ifndef APP_DEFAULT_MEMPOOL_CACHE_SIZE\n-#define APP_DEFAULT_MEMPOOL_CACHE_SIZE 256\n-#endif\n-\n-/* LPM Tables */\n-#ifndef APP_MAX_LPM_RULES\n-#define APP_MAX_LPM_RULES 1024\n-#endif\n-\n-/* NIC RX */\n-#ifndef APP_DEFAULT_NIC_RX_RING_SIZE\n-#define APP_DEFAULT_NIC_RX_RING_SIZE 1024\n-#endif\n-\n-/*\n- * RX and TX Prefetch, Host, and Write-back threshold values should be\n- * carefully set for optimal performance. Consult the network\n- * controller's datasheet and supporting DPDK documentation for guidance\n- * on how these parameters should be set.\n- */\n-#ifndef APP_DEFAULT_NIC_RX_PTHRESH\n-#define APP_DEFAULT_NIC_RX_PTHRESH 8\n-#endif\n-\n-#ifndef APP_DEFAULT_NIC_RX_HTHRESH\n-#define APP_DEFAULT_NIC_RX_HTHRESH 8\n-#endif\n-\n-#ifndef APP_DEFAULT_NIC_RX_WTHRESH\n-#define APP_DEFAULT_NIC_RX_WTHRESH 4\n-#endif\n-\n-#ifndef APP_DEFAULT_NIC_RX_FREE_THRESH\n-#define APP_DEFAULT_NIC_RX_FREE_THRESH 64\n-#endif\n-\n-#ifndef APP_DEFAULT_NIC_RX_DROP_EN\n-#define APP_DEFAULT_NIC_RX_DROP_EN 0\n-#endif\n-\n-/* NIC TX */\n-#ifndef APP_DEFAULT_NIC_TX_RING_SIZE\n-#define APP_DEFAULT_NIC_TX_RING_SIZE 1024\n-#endif\n-\n-/*\n- * These default values are optimized for use with the Intel(R) 82599 10 GbE\n- * Controller and the DPDK ixgbe PMD. Consider using other values for other\n- * network controllers and/or network drivers.\n- */\n-#ifndef APP_DEFAULT_NIC_TX_PTHRESH\n-#define APP_DEFAULT_NIC_TX_PTHRESH 36\n-#endif\n-\n-#ifndef APP_DEFAULT_NIC_TX_HTHRESH\n-#define APP_DEFAULT_NIC_TX_HTHRESH 0\n-#endif\n-\n-#ifndef APP_DEFAULT_NIC_TX_WTHRESH\n-#define APP_DEFAULT_NIC_TX_WTHRESH 0\n-#endif\n-\n-#ifndef APP_DEFAULT_NIC_TX_FREE_THRESH\n-#define APP_DEFAULT_NIC_TX_FREE_THRESH 0\n-#endif\n-\n-#ifndef APP_DEFAULT_NIC_TX_RS_THRESH\n-#define APP_DEFAULT_NIC_TX_RS_THRESH 0\n-#endif\n-\n-/* Software Rings */\n-#ifndef APP_DEFAULT_RING_RX_SIZE\n-#define APP_DEFAULT_RING_RX_SIZE 1024\n-#endif\n-\n-#ifndef APP_DEFAULT_RING_TX_SIZE\n-#define APP_DEFAULT_RING_TX_SIZE 1024\n-#endif\n-\n-/* Bursts */\n-#ifndef APP_MBUF_ARRAY_SIZE\n-#define APP_MBUF_ARRAY_SIZE 512\n-#endif\n-\n-#ifndef APP_DEFAULT_BURST_SIZE_IO_RX_READ\n-#define APP_DEFAULT_BURST_SIZE_IO_RX_READ 144\n-#endif\n-#if (APP_DEFAULT_BURST_SIZE_IO_RX_READ > APP_MBUF_ARRAY_SIZE)\n-#error \"APP_DEFAULT_BURST_SIZE_IO_RX_READ is too big\"\n-#endif\n-\n-#ifndef APP_DEFAULT_BURST_SIZE_IO_RX_WRITE\n-#define APP_DEFAULT_BURST_SIZE_IO_RX_WRITE 144\n-#endif\n-#if (APP_DEFAULT_BURST_SIZE_IO_RX_WRITE > APP_MBUF_ARRAY_SIZE)\n-#error \"APP_DEFAULT_BURST_SIZE_IO_RX_WRITE is too big\"\n-#endif\n-\n-#ifndef APP_DEFAULT_BURST_SIZE_IO_TX_READ\n-#define APP_DEFAULT_BURST_SIZE_IO_TX_READ 144\n-#endif\n-#if (APP_DEFAULT_BURST_SIZE_IO_TX_READ > APP_MBUF_ARRAY_SIZE)\n-#error \"APP_DEFAULT_BURST_SIZE_IO_TX_READ is too big\"\n-#endif\n-\n-#ifndef APP_DEFAULT_BURST_SIZE_IO_TX_WRITE\n-#define APP_DEFAULT_BURST_SIZE_IO_TX_WRITE 144\n-#endif\n-#if (APP_DEFAULT_BURST_SIZE_IO_TX_WRITE > APP_MBUF_ARRAY_SIZE)\n-#error \"APP_DEFAULT_BURST_SIZE_IO_TX_WRITE is too big\"\n-#endif\n-\n-#ifndef APP_DEFAULT_BURST_SIZE_WORKER_READ\n-#define APP_DEFAULT_BURST_SIZE_WORKER_READ 144\n-#endif\n-#if ((2 * APP_DEFAULT_BURST_SIZE_WORKER_READ) > APP_MBUF_ARRAY_SIZE)\n-#error \"APP_DEFAULT_BURST_SIZE_WORKER_READ is too big\"\n-#endif\n-\n-#ifndef APP_DEFAULT_BURST_SIZE_WORKER_WRITE\n-#define APP_DEFAULT_BURST_SIZE_WORKER_WRITE 144\n-#endif\n-#if (APP_DEFAULT_BURST_SIZE_WORKER_WRITE > APP_MBUF_ARRAY_SIZE)\n-#error \"APP_DEFAULT_BURST_SIZE_WORKER_WRITE is too big\"\n-#endif\n-\n-/* Load balancing logic */\n-#ifndef APP_DEFAULT_IO_RX_LB_POS\n-#define APP_DEFAULT_IO_RX_LB_POS 29\n-#endif\n-#if (APP_DEFAULT_IO_RX_LB_POS >= 64)\n-#error \"APP_DEFAULT_IO_RX_LB_POS is too big\"\n-#endif\n-\n-struct app_mbuf_array {\n-\tstruct rte_mbuf *array[APP_MBUF_ARRAY_SIZE];\n-\tuint32_t n_mbufs;\n-};\n-\n-enum app_lcore_type {\n-\te_APP_LCORE_DISABLED = 0,\n-\te_APP_LCORE_IO,\n-\te_APP_LCORE_WORKER\n-};\n-\n-struct app_lcore_params_io {\n-\t/* I/O RX */\n-\tstruct {\n-\t\t/* NIC */\n-\t\tstruct {\n-\t\t\tuint16_t port;\n-\t\t\tuint8_t queue;\n-\t\t} nic_queues[APP_MAX_NIC_RX_QUEUES_PER_IO_LCORE];\n-\t\tuint32_t n_nic_queues;\n-\n-\t\t/* Rings */\n-\t\tstruct rte_ring *rings[APP_MAX_WORKER_LCORES];\n-\t\tuint32_t n_rings;\n-\n-\t\t/* Internal buffers */\n-\t\tstruct app_mbuf_array mbuf_in;\n-\t\tstruct app_mbuf_array mbuf_out[APP_MAX_WORKER_LCORES];\n-\t\tuint8_t mbuf_out_flush[APP_MAX_WORKER_LCORES];\n-\n-\t\t/* Stats */\n-\t\tuint32_t nic_queues_count[APP_MAX_NIC_RX_QUEUES_PER_IO_LCORE];\n-\t\tuint32_t nic_queues_iters[APP_MAX_NIC_RX_QUEUES_PER_IO_LCORE];\n-\t\tuint32_t rings_count[APP_MAX_WORKER_LCORES];\n-\t\tuint32_t rings_iters[APP_MAX_WORKER_LCORES];\n-\t} rx;\n-\n-\t/* I/O TX */\n-\tstruct {\n-\t\t/* Rings */\n-\t\tstruct rte_ring *rings[APP_MAX_NIC_PORTS][APP_MAX_WORKER_LCORES];\n-\n-\t\t/* NIC */\n-\t\tuint16_t nic_ports[APP_MAX_NIC_TX_PORTS_PER_IO_LCORE];\n-\t\tuint32_t n_nic_ports;\n-\n-\t\t/* Internal buffers */\n-\t\tstruct app_mbuf_array mbuf_out[APP_MAX_NIC_TX_PORTS_PER_IO_LCORE];\n-\t\tuint8_t mbuf_out_flush[APP_MAX_NIC_TX_PORTS_PER_IO_LCORE];\n-\n-\t\t/* Stats */\n-\t\tuint32_t rings_count[APP_MAX_NIC_PORTS][APP_MAX_WORKER_LCORES];\n-\t\tuint32_t rings_iters[APP_MAX_NIC_PORTS][APP_MAX_WORKER_LCORES];\n-\t\tuint32_t nic_ports_count[APP_MAX_NIC_TX_PORTS_PER_IO_LCORE];\n-\t\tuint32_t nic_ports_iters[APP_MAX_NIC_TX_PORTS_PER_IO_LCORE];\n-\t} tx;\n-};\n-\n-struct app_lcore_params_worker {\n-\t/* Rings */\n-\tstruct rte_ring *rings_in[APP_MAX_IO_LCORES];\n-\tuint32_t n_rings_in;\n-\tstruct rte_ring *rings_out[APP_MAX_NIC_PORTS];\n-\n-\t/* LPM table */\n-\tstruct rte_lpm *lpm_table;\n-\tuint32_t worker_id;\n-\n-\t/* Internal buffers */\n-\tstruct app_mbuf_array mbuf_in;\n-\tstruct app_mbuf_array mbuf_out[APP_MAX_NIC_PORTS];\n-\tuint8_t mbuf_out_flush[APP_MAX_NIC_PORTS];\n-\n-\t/* Stats */\n-\tuint32_t rings_in_count[APP_MAX_IO_LCORES];\n-\tuint32_t rings_in_iters[APP_MAX_IO_LCORES];\n-\tuint32_t rings_out_count[APP_MAX_NIC_PORTS];\n-\tuint32_t rings_out_iters[APP_MAX_NIC_PORTS];\n-};\n-\n-struct app_lcore_params {\n-\tunion {\n-\t\tstruct app_lcore_params_io io;\n-\t\tstruct app_lcore_params_worker worker;\n-\t};\n-\tenum app_lcore_type type;\n-\tstruct rte_mempool *pool;\n-} __rte_cache_aligned;\n-\n-struct app_lpm_rule {\n-\tuint32_t ip;\n-\tuint8_t depth;\n-\tuint8_t if_out;\n-};\n-\n-struct app_params {\n-\t/* lcore */\n-\tstruct app_lcore_params lcore_params[APP_MAX_LCORES];\n-\n-\t/* NIC */\n-\tuint8_t nic_rx_queue_mask[APP_MAX_NIC_PORTS][APP_MAX_RX_QUEUES_PER_NIC_PORT];\n-\tuint8_t nic_tx_port_mask[APP_MAX_NIC_PORTS];\n-\n-\t/* mbuf pools */\n-\tstruct rte_mempool *pools[APP_MAX_SOCKETS];\n-\n-\t/* LPM tables */\n-\tstruct rte_lpm *lpm_tables[APP_MAX_SOCKETS];\n-\tstruct app_lpm_rule lpm_rules[APP_MAX_LPM_RULES];\n-\tuint32_t n_lpm_rules;\n-\n-\t/* rings */\n-\tuint32_t nic_rx_ring_size;\n-\tuint32_t nic_tx_ring_size;\n-\tuint32_t ring_rx_size;\n-\tuint32_t ring_tx_size;\n-\n-\t/* burst size */\n-\tuint32_t burst_size_io_rx_read;\n-\tuint32_t burst_size_io_rx_write;\n-\tuint32_t burst_size_io_tx_read;\n-\tuint32_t burst_size_io_tx_write;\n-\tuint32_t burst_size_worker_read;\n-\tuint32_t burst_size_worker_write;\n-\n-\t/* load balancing */\n-\tuint8_t pos_lb;\n-} __rte_cache_aligned;\n-\n-extern struct app_params app;\n-\n-int app_parse_args(int argc, char **argv);\n-void app_print_usage(void);\n-void app_init(void);\n-int app_lcore_main_loop(void *arg);\n-\n-int app_get_nic_rx_queues_per_port(uint16_t port);\n-int app_get_lcore_for_nic_rx(uint16_t port, uint8_t queue,\n-\t\t\t uint32_t *lcore_out);\n-int app_get_lcore_for_nic_tx(uint16_t port, uint32_t *lcore_out);\n-int app_is_socket_used(uint32_t socket);\n-uint32_t app_get_lcores_io_rx(void);\n-uint32_t app_get_lcores_worker(void);\n-void app_print_params(void);\n-\n-#endif /* _MAIN_H_ */\ndiff --git a/examples/load_balancer/meson.build b/examples/load_balancer/meson.build\ndeleted file mode 100644\nindex 4f7ac3999..000000000\n--- a/examples/load_balancer/meson.build\n+++ /dev/null\n@@ -1,12 +0,0 @@\n-# SPDX-License-Identifier: BSD-3-Clause\n-# Copyright(c) 2017 Intel Corporation\n-\n-# meson file, for building this example as part of a main DPDK build.\n-#\n-# To build this example as a standalone application with an already-installed\n-# DPDK instance, use 'make'\n-\n-deps += 'lpm'\n-sources = files(\n-\t'config.c', 'init.c', 'main.c', 'runtime.c'\n-)\ndiff --git a/examples/load_balancer/runtime.c b/examples/load_balancer/runtime.c\ndeleted file mode 100644\nindex f0aad1513..000000000\n--- a/examples/load_balancer/runtime.c\n+++ /dev/null\n@@ -1,642 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2010-2014 Intel Corporation\n- */\n-\n-#include <stdio.h>\n-#include <stdlib.h>\n-#include <stdint.h>\n-#include <inttypes.h>\n-#include <sys/types.h>\n-#include <string.h>\n-#include <sys/queue.h>\n-#include <stdarg.h>\n-#include <errno.h>\n-#include <getopt.h>\n-\n-#include <rte_common.h>\n-#include <rte_byteorder.h>\n-#include <rte_log.h>\n-#include <rte_memory.h>\n-#include <rte_memcpy.h>\n-#include <rte_eal.h>\n-#include <rte_launch.h>\n-#include <rte_atomic.h>\n-#include <rte_cycles.h>\n-#include <rte_prefetch.h>\n-#include <rte_lcore.h>\n-#include <rte_per_lcore.h>\n-#include <rte_branch_prediction.h>\n-#include <rte_interrupts.h>\n-#include <rte_random.h>\n-#include <rte_debug.h>\n-#include <rte_ether.h>\n-#include <rte_ethdev.h>\n-#include <rte_ring.h>\n-#include <rte_mempool.h>\n-#include <rte_mbuf.h>\n-#include <rte_ip.h>\n-#include <rte_tcp.h>\n-#include <rte_lpm.h>\n-\n-#include \"main.h\"\n-\n-#ifndef APP_LCORE_IO_FLUSH\n-#define APP_LCORE_IO_FLUSH 1000000\n-#endif\n-\n-#ifndef APP_LCORE_WORKER_FLUSH\n-#define APP_LCORE_WORKER_FLUSH 1000000\n-#endif\n-\n-#ifndef APP_STATS\n-#define APP_STATS 1000000\n-#endif\n-\n-#define APP_IO_RX_DROP_ALL_PACKETS 0\n-#define APP_WORKER_DROP_ALL_PACKETS 0\n-#define APP_IO_TX_DROP_ALL_PACKETS 0\n-\n-#ifndef APP_IO_RX_PREFETCH_ENABLE\n-#define APP_IO_RX_PREFETCH_ENABLE 1\n-#endif\n-\n-#ifndef APP_WORKER_PREFETCH_ENABLE\n-#define APP_WORKER_PREFETCH_ENABLE 1\n-#endif\n-\n-#ifndef APP_IO_TX_PREFETCH_ENABLE\n-#define APP_IO_TX_PREFETCH_ENABLE 1\n-#endif\n-\n-#if APP_IO_RX_PREFETCH_ENABLE\n-#define APP_IO_RX_PREFETCH0(p) rte_prefetch0(p)\n-#define APP_IO_RX_PREFETCH1(p) rte_prefetch1(p)\n-#else\n-#define APP_IO_RX_PREFETCH0(p)\n-#define APP_IO_RX_PREFETCH1(p)\n-#endif\n-\n-#if APP_WORKER_PREFETCH_ENABLE\n-#define APP_WORKER_PREFETCH0(p) rte_prefetch0(p)\n-#define APP_WORKER_PREFETCH1(p) rte_prefetch1(p)\n-#else\n-#define APP_WORKER_PREFETCH0(p)\n-#define APP_WORKER_PREFETCH1(p)\n-#endif\n-\n-#if APP_IO_TX_PREFETCH_ENABLE\n-#define APP_IO_TX_PREFETCH0(p) rte_prefetch0(p)\n-#define APP_IO_TX_PREFETCH1(p) rte_prefetch1(p)\n-#else\n-#define APP_IO_TX_PREFETCH0(p)\n-#define APP_IO_TX_PREFETCH1(p)\n-#endif\n-\n-static inline void\n-app_lcore_io_rx_buffer_to_send (\n-\tstruct app_lcore_params_io *lp,\n-\tuint32_t worker,\n-\tstruct rte_mbuf *mbuf,\n-\tuint32_t bsz)\n-{\n-\tuint32_t pos;\n-\tint ret;\n-\n-\tpos = lp->rx.mbuf_out[worker].n_mbufs;\n-\tlp->rx.mbuf_out[worker].array[pos ++] = mbuf;\n-\tif (likely(pos < bsz)) {\n-\t\tlp->rx.mbuf_out[worker].n_mbufs = pos;\n-\t\treturn;\n-\t}\n-\n-\tret = rte_ring_sp_enqueue_bulk(\n-\t\tlp->rx.rings[worker],\n-\t\t(void **) lp->rx.mbuf_out[worker].array,\n-\t\tbsz,\n-\t\tNULL);\n-\n-\tif (unlikely(ret == 0)) {\n-\t\tuint32_t k;\n-\t\tfor (k = 0; k < bsz; k ++) {\n-\t\t\tstruct rte_mbuf *m = lp->rx.mbuf_out[worker].array[k];\n-\t\t\trte_pktmbuf_free(m);\n-\t\t}\n-\t}\n-\n-\tlp->rx.mbuf_out[worker].n_mbufs = 0;\n-\tlp->rx.mbuf_out_flush[worker] = 0;\n-\n-#if APP_STATS\n-\tlp->rx.rings_iters[worker] ++;\n-\tif (likely(ret == 0)) {\n-\t\tlp->rx.rings_count[worker] ++;\n-\t}\n-\tif (unlikely(lp->rx.rings_iters[worker] == APP_STATS)) {\n-\t\tunsigned lcore = rte_lcore_id();\n-\n-\t\tprintf(\"\\tI/O RX %u out (worker %u): enq success rate = %.2f\\n\",\n-\t\t\tlcore,\n-\t\t\t(unsigned)worker,\n-\t\t\t((double) lp->rx.rings_count[worker]) / ((double) lp->rx.rings_iters[worker]));\n-\t\tlp->rx.rings_iters[worker] = 0;\n-\t\tlp->rx.rings_count[worker] = 0;\n-\t}\n-#endif\n-}\n-\n-static inline void\n-app_lcore_io_rx(\n-\tstruct app_lcore_params_io *lp,\n-\tuint32_t n_workers,\n-\tuint32_t bsz_rd,\n-\tuint32_t bsz_wr,\n-\tuint8_t pos_lb)\n-{\n-\tstruct rte_mbuf *mbuf_1_0, *mbuf_1_1, *mbuf_2_0, *mbuf_2_1;\n-\tuint8_t *data_1_0, *data_1_1 = NULL;\n-\tuint32_t i;\n-\n-\tfor (i = 0; i < lp->rx.n_nic_queues; i ++) {\n-\t\tuint16_t port = lp->rx.nic_queues[i].port;\n-\t\tuint8_t queue = lp->rx.nic_queues[i].queue;\n-\t\tuint32_t n_mbufs, j;\n-\n-\t\tn_mbufs = rte_eth_rx_burst(\n-\t\t\tport,\n-\t\t\tqueue,\n-\t\t\tlp->rx.mbuf_in.array,\n-\t\t\t(uint16_t) bsz_rd);\n-\n-\t\tif (unlikely(n_mbufs == 0)) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-#if APP_STATS\n-\t\tlp->rx.nic_queues_iters[i] ++;\n-\t\tlp->rx.nic_queues_count[i] += n_mbufs;\n-\t\tif (unlikely(lp->rx.nic_queues_iters[i] == APP_STATS)) {\n-\t\t\tstruct rte_eth_stats stats;\n-\t\t\tunsigned lcore = rte_lcore_id();\n-\n-\t\t\trte_eth_stats_get(port, &stats);\n-\n-\t\t\tprintf(\"I/O RX %u in (NIC port %u): NIC drop ratio = %.2f avg burst size = %.2f\\n\",\n-\t\t\t\tlcore,\n-\t\t\t\tport,\n-\t\t\t\t(double) stats.imissed / (double) (stats.imissed + stats.ipackets),\n-\t\t\t\t((double) lp->rx.nic_queues_count[i]) / ((double) lp->rx.nic_queues_iters[i]));\n-\t\t\tlp->rx.nic_queues_iters[i] = 0;\n-\t\t\tlp->rx.nic_queues_count[i] = 0;\n-\t\t}\n-#endif\n-\n-#if APP_IO_RX_DROP_ALL_PACKETS\n-\t\tfor (j = 0; j < n_mbufs; j ++) {\n-\t\t\tstruct rte_mbuf *pkt = lp->rx.mbuf_in.array[j];\n-\t\t\trte_pktmbuf_free(pkt);\n-\t\t}\n-\n-\t\tcontinue;\n-#endif\n-\n-\t\tmbuf_1_0 = lp->rx.mbuf_in.array[0];\n-\t\tmbuf_1_1 = lp->rx.mbuf_in.array[1];\n-\t\tdata_1_0 = rte_pktmbuf_mtod(mbuf_1_0, uint8_t *);\n-\t\tif (likely(n_mbufs > 1)) {\n-\t\t\tdata_1_1 = rte_pktmbuf_mtod(mbuf_1_1, uint8_t *);\n-\t\t}\n-\n-\t\tmbuf_2_0 = lp->rx.mbuf_in.array[2];\n-\t\tmbuf_2_1 = lp->rx.mbuf_in.array[3];\n-\t\tAPP_IO_RX_PREFETCH0(mbuf_2_0);\n-\t\tAPP_IO_RX_PREFETCH0(mbuf_2_1);\n-\n-\t\tfor (j = 0; j + 3 < n_mbufs; j += 2) {\n-\t\t\tstruct rte_mbuf *mbuf_0_0, *mbuf_0_1;\n-\t\t\tuint8_t *data_0_0, *data_0_1;\n-\t\t\tuint32_t worker_0, worker_1;\n-\n-\t\t\tmbuf_0_0 = mbuf_1_0;\n-\t\t\tmbuf_0_1 = mbuf_1_1;\n-\t\t\tdata_0_0 = data_1_0;\n-\t\t\tdata_0_1 = data_1_1;\n-\n-\t\t\tmbuf_1_0 = mbuf_2_0;\n-\t\t\tmbuf_1_1 = mbuf_2_1;\n-\t\t\tdata_1_0 = rte_pktmbuf_mtod(mbuf_2_0, uint8_t *);\n-\t\t\tdata_1_1 = rte_pktmbuf_mtod(mbuf_2_1, uint8_t *);\n-\t\t\tAPP_IO_RX_PREFETCH0(data_1_0);\n-\t\t\tAPP_IO_RX_PREFETCH0(data_1_1);\n-\n-\t\t\tmbuf_2_0 = lp->rx.mbuf_in.array[j+4];\n-\t\t\tmbuf_2_1 = lp->rx.mbuf_in.array[j+5];\n-\t\t\tAPP_IO_RX_PREFETCH0(mbuf_2_0);\n-\t\t\tAPP_IO_RX_PREFETCH0(mbuf_2_1);\n-\n-\t\t\tworker_0 = data_0_0[pos_lb] & (n_workers - 1);\n-\t\t\tworker_1 = data_0_1[pos_lb] & (n_workers - 1);\n-\n-\t\t\tapp_lcore_io_rx_buffer_to_send(lp, worker_0, mbuf_0_0, bsz_wr);\n-\t\t\tapp_lcore_io_rx_buffer_to_send(lp, worker_1, mbuf_0_1, bsz_wr);\n-\t\t}\n-\n-\t\t/* Handle the last 1, 2 (when n_mbufs is even) or 3 (when n_mbufs is odd) packets */\n-\t\tfor ( ; j < n_mbufs; j += 1) {\n-\t\t\tstruct rte_mbuf *mbuf;\n-\t\t\tuint8_t *data;\n-\t\t\tuint32_t worker;\n-\n-\t\t\tmbuf = mbuf_1_0;\n-\t\t\tmbuf_1_0 = mbuf_1_1;\n-\t\t\tmbuf_1_1 = mbuf_2_0;\n-\t\t\tmbuf_2_0 = mbuf_2_1;\n-\n-\t\t\tdata = rte_pktmbuf_mtod(mbuf, uint8_t *);\n-\n-\t\t\tAPP_IO_RX_PREFETCH0(mbuf_1_0);\n-\n-\t\t\tworker = data[pos_lb] & (n_workers - 1);\n-\n-\t\t\tapp_lcore_io_rx_buffer_to_send(lp, worker, mbuf, bsz_wr);\n-\t\t}\n-\t}\n-}\n-\n-static inline void\n-app_lcore_io_rx_flush(struct app_lcore_params_io *lp, uint32_t n_workers)\n-{\n-\tuint32_t worker;\n-\n-\tfor (worker = 0; worker < n_workers; worker ++) {\n-\t\tint ret;\n-\n-\t\tif (likely((lp->rx.mbuf_out_flush[worker] == 0) ||\n-\t\t (lp->rx.mbuf_out[worker].n_mbufs == 0))) {\n-\t\t\tlp->rx.mbuf_out_flush[worker] = 1;\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tret = rte_ring_sp_enqueue_bulk(\n-\t\t\tlp->rx.rings[worker],\n-\t\t\t(void **) lp->rx.mbuf_out[worker].array,\n-\t\t\tlp->rx.mbuf_out[worker].n_mbufs,\n-\t\t\tNULL);\n-\n-\t\tif (unlikely(ret == 0)) {\n-\t\t\tuint32_t k;\n-\t\t\tfor (k = 0; k < lp->rx.mbuf_out[worker].n_mbufs; k ++) {\n-\t\t\t\tstruct rte_mbuf *pkt_to_free = lp->rx.mbuf_out[worker].array[k];\n-\t\t\t\trte_pktmbuf_free(pkt_to_free);\n-\t\t\t}\n-\t\t}\n-\n-\t\tlp->rx.mbuf_out[worker].n_mbufs = 0;\n-\t\tlp->rx.mbuf_out_flush[worker] = 1;\n-\t}\n-}\n-\n-static inline void\n-app_lcore_io_tx(\n-\tstruct app_lcore_params_io *lp,\n-\tuint32_t n_workers,\n-\tuint32_t bsz_rd,\n-\tuint32_t bsz_wr)\n-{\n-\tuint32_t worker;\n-\n-\tfor (worker = 0; worker < n_workers; worker ++) {\n-\t\tuint32_t i;\n-\n-\t\tfor (i = 0; i < lp->tx.n_nic_ports; i ++) {\n-\t\t\tuint16_t port = lp->tx.nic_ports[i];\n-\t\t\tstruct rte_ring *ring = lp->tx.rings[port][worker];\n-\t\t\tuint32_t n_mbufs, n_pkts;\n-\t\t\tint ret;\n-\n-\t\t\tn_mbufs = lp->tx.mbuf_out[port].n_mbufs;\n-\t\t\tret = rte_ring_sc_dequeue_bulk(\n-\t\t\t\tring,\n-\t\t\t\t(void **) &lp->tx.mbuf_out[port].array[n_mbufs],\n-\t\t\t\tbsz_rd,\n-\t\t\t\tNULL);\n-\n-\t\t\tif (unlikely(ret == 0))\n-\t\t\t\tcontinue;\n-\n-\t\t\tn_mbufs += bsz_rd;\n-\n-#if APP_IO_TX_DROP_ALL_PACKETS\n-\t\t\t{\n-\t\t\t\tuint32_t j;\n-\t\t\t\tAPP_IO_TX_PREFETCH0(lp->tx.mbuf_out[port].array[0]);\n-\t\t\t\tAPP_IO_TX_PREFETCH0(lp->tx.mbuf_out[port].array[1]);\n-\n-\t\t\t\tfor (j = 0; j < n_mbufs; j ++) {\n-\t\t\t\t\tif (likely(j < n_mbufs - 2)) {\n-\t\t\t\t\t\tAPP_IO_TX_PREFETCH0(lp->tx.mbuf_out[port].array[j + 2]);\n-\t\t\t\t\t}\n-\n-\t\t\t\t\trte_pktmbuf_free(lp->tx.mbuf_out[port].array[j]);\n-\t\t\t\t}\n-\n-\t\t\t\tlp->tx.mbuf_out[port].n_mbufs = 0;\n-\n-\t\t\t\tcontinue;\n-\t\t\t}\n-#endif\n-\n-\t\t\tif (unlikely(n_mbufs < bsz_wr)) {\n-\t\t\t\tlp->tx.mbuf_out[port].n_mbufs = n_mbufs;\n-\t\t\t\tcontinue;\n-\t\t\t}\n-\n-\t\t\tn_pkts = rte_eth_tx_burst(\n-\t\t\t\tport,\n-\t\t\t\t0,\n-\t\t\t\tlp->tx.mbuf_out[port].array,\n-\t\t\t\t(uint16_t) n_mbufs);\n-\n-#if APP_STATS\n-\t\t\tlp->tx.nic_ports_iters[port] ++;\n-\t\t\tlp->tx.nic_ports_count[port] += n_pkts;\n-\t\t\tif (unlikely(lp->tx.nic_ports_iters[port] == APP_STATS)) {\n-\t\t\t\tunsigned lcore = rte_lcore_id();\n-\n-\t\t\t\tprintf(\"\\t\\t\\tI/O TX %u out (port %u): avg burst size = %.2f\\n\",\n-\t\t\t\t\tlcore,\n-\t\t\t\t\tport,\n-\t\t\t\t\t((double) lp->tx.nic_ports_count[port]) / ((double) lp->tx.nic_ports_iters[port]));\n-\t\t\t\tlp->tx.nic_ports_iters[port] = 0;\n-\t\t\t\tlp->tx.nic_ports_count[port] = 0;\n-\t\t\t}\n-#endif\n-\n-\t\t\tif (unlikely(n_pkts < n_mbufs)) {\n-\t\t\t\tuint32_t k;\n-\t\t\t\tfor (k = n_pkts; k < n_mbufs; k ++) {\n-\t\t\t\t\tstruct rte_mbuf *pkt_to_free = lp->tx.mbuf_out[port].array[k];\n-\t\t\t\t\trte_pktmbuf_free(pkt_to_free);\n-\t\t\t\t}\n-\t\t\t}\n-\t\t\tlp->tx.mbuf_out[port].n_mbufs = 0;\n-\t\t\tlp->tx.mbuf_out_flush[port] = 0;\n-\t\t}\n-\t}\n-}\n-\n-static inline void\n-app_lcore_io_tx_flush(struct app_lcore_params_io *lp)\n-{\n-\tuint16_t port;\n-\tuint32_t i;\n-\n-\tfor (i = 0; i < lp->tx.n_nic_ports; i++) {\n-\t\tuint32_t n_pkts;\n-\n-\t\tport = lp->tx.nic_ports[i];\n-\t\tif (likely((lp->tx.mbuf_out_flush[port] == 0) ||\n-\t\t (lp->tx.mbuf_out[port].n_mbufs == 0))) {\n-\t\t\tlp->tx.mbuf_out_flush[port] = 1;\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tn_pkts = rte_eth_tx_burst(\n-\t\t\tport,\n-\t\t\t0,\n-\t\t\tlp->tx.mbuf_out[port].array,\n-\t\t\t(uint16_t) lp->tx.mbuf_out[port].n_mbufs);\n-\n-\t\tif (unlikely(n_pkts < lp->tx.mbuf_out[port].n_mbufs)) {\n-\t\t\tuint32_t k;\n-\t\t\tfor (k = n_pkts; k < lp->tx.mbuf_out[port].n_mbufs; k ++) {\n-\t\t\t\tstruct rte_mbuf *pkt_to_free = lp->tx.mbuf_out[port].array[k];\n-\t\t\t\trte_pktmbuf_free(pkt_to_free);\n-\t\t\t}\n-\t\t}\n-\n-\t\tlp->tx.mbuf_out[port].n_mbufs = 0;\n-\t\tlp->tx.mbuf_out_flush[port] = 1;\n-\t}\n-}\n-\n-static void\n-app_lcore_main_loop_io(void)\n-{\n-\tuint32_t lcore = rte_lcore_id();\n-\tstruct app_lcore_params_io *lp = &app.lcore_params[lcore].io;\n-\tuint32_t n_workers = app_get_lcores_worker();\n-\tuint64_t i = 0;\n-\n-\tuint32_t bsz_rx_rd = app.burst_size_io_rx_read;\n-\tuint32_t bsz_rx_wr = app.burst_size_io_rx_write;\n-\tuint32_t bsz_tx_rd = app.burst_size_io_tx_read;\n-\tuint32_t bsz_tx_wr = app.burst_size_io_tx_write;\n-\n-\tuint8_t pos_lb = app.pos_lb;\n-\n-\tfor ( ; ; ) {\n-\t\tif (APP_LCORE_IO_FLUSH && (unlikely(i == APP_LCORE_IO_FLUSH))) {\n-\t\t\tif (likely(lp->rx.n_nic_queues > 0)) {\n-\t\t\t\tapp_lcore_io_rx_flush(lp, n_workers);\n-\t\t\t}\n-\n-\t\t\tif (likely(lp->tx.n_nic_ports > 0)) {\n-\t\t\t\tapp_lcore_io_tx_flush(lp);\n-\t\t\t}\n-\n-\t\t\ti = 0;\n-\t\t}\n-\n-\t\tif (likely(lp->rx.n_nic_queues > 0)) {\n-\t\t\tapp_lcore_io_rx(lp, n_workers, bsz_rx_rd, bsz_rx_wr, pos_lb);\n-\t\t}\n-\n-\t\tif (likely(lp->tx.n_nic_ports > 0)) {\n-\t\t\tapp_lcore_io_tx(lp, n_workers, bsz_tx_rd, bsz_tx_wr);\n-\t\t}\n-\n-\t\ti ++;\n-\t}\n-}\n-\n-static inline void\n-app_lcore_worker(\n-\tstruct app_lcore_params_worker *lp,\n-\tuint32_t bsz_rd,\n-\tuint32_t bsz_wr)\n-{\n-\tuint32_t i;\n-\n-\tfor (i = 0; i < lp->n_rings_in; i ++) {\n-\t\tstruct rte_ring *ring_in = lp->rings_in[i];\n-\t\tuint32_t j;\n-\t\tint ret;\n-\n-\t\tret = rte_ring_sc_dequeue_bulk(\n-\t\t\tring_in,\n-\t\t\t(void **) lp->mbuf_in.array,\n-\t\t\tbsz_rd,\n-\t\t\tNULL);\n-\n-\t\tif (unlikely(ret == 0))\n-\t\t\tcontinue;\n-\n-#if APP_WORKER_DROP_ALL_PACKETS\n-\t\tfor (j = 0; j < bsz_rd; j ++) {\n-\t\t\tstruct rte_mbuf *pkt = lp->mbuf_in.array[j];\n-\t\t\trte_pktmbuf_free(pkt);\n-\t\t}\n-\n-\t\tcontinue;\n-#endif\n-\n-\t\tAPP_WORKER_PREFETCH1(rte_pktmbuf_mtod(lp->mbuf_in.array[0], unsigned char *));\n-\t\tAPP_WORKER_PREFETCH0(lp->mbuf_in.array[1]);\n-\n-\t\tfor (j = 0; j < bsz_rd; j ++) {\n-\t\t\tstruct rte_mbuf *pkt;\n-\t\t\tstruct rte_ipv4_hdr *ipv4_hdr;\n-\t\t\tuint32_t ipv4_dst, pos;\n-\t\t\tuint32_t port;\n-\n-\t\t\tif (likely(j < bsz_rd - 1)) {\n-\t\t\t\tAPP_WORKER_PREFETCH1(rte_pktmbuf_mtod(lp->mbuf_in.array[j+1], unsigned char *));\n-\t\t\t}\n-\t\t\tif (likely(j < bsz_rd - 2)) {\n-\t\t\t\tAPP_WORKER_PREFETCH0(lp->mbuf_in.array[j+2]);\n-\t\t\t}\n-\n-\t\t\tpkt = lp->mbuf_in.array[j];\n-\t\t\tipv4_hdr = rte_pktmbuf_mtod_offset(\n-\t\t\t\tpkt, struct rte_ipv4_hdr *,\n-\t\t\t\tsizeof(struct rte_ether_hdr));\n-\t\t\tipv4_dst = rte_be_to_cpu_32(ipv4_hdr->dst_addr);\n-\n-\t\t\tif (unlikely(rte_lpm_lookup(lp->lpm_table, ipv4_dst, &port) != 0)) {\n-\t\t\t\tport = pkt->port;\n-\t\t\t}\n-\n-\t\t\tpos = lp->mbuf_out[port].n_mbufs;\n-\n-\t\t\tlp->mbuf_out[port].array[pos ++] = pkt;\n-\t\t\tif (likely(pos < bsz_wr)) {\n-\t\t\t\tlp->mbuf_out[port].n_mbufs = pos;\n-\t\t\t\tcontinue;\n-\t\t\t}\n-\n-\t\t\tret = rte_ring_sp_enqueue_bulk(\n-\t\t\t\tlp->rings_out[port],\n-\t\t\t\t(void **) lp->mbuf_out[port].array,\n-\t\t\t\tbsz_wr,\n-\t\t\t\tNULL);\n-\n-#if APP_STATS\n-\t\t\tlp->rings_out_iters[port] ++;\n-\t\t\tif (ret > 0) {\n-\t\t\t\tlp->rings_out_count[port] += 1;\n-\t\t\t}\n-\t\t\tif (lp->rings_out_iters[port] == APP_STATS){\n-\t\t\t\tprintf(\"\\t\\tWorker %u out (NIC port %u): enq success rate = %.2f\\n\",\n-\t\t\t\t\t(unsigned) lp->worker_id,\n-\t\t\t\t\tport,\n-\t\t\t\t\t((double) lp->rings_out_count[port]) / ((double) lp->rings_out_iters[port]));\n-\t\t\t\tlp->rings_out_iters[port] = 0;\n-\t\t\t\tlp->rings_out_count[port] = 0;\n-\t\t\t}\n-#endif\n-\n-\t\t\tif (unlikely(ret == 0)) {\n-\t\t\t\tuint32_t k;\n-\t\t\t\tfor (k = 0; k < bsz_wr; k ++) {\n-\t\t\t\t\tstruct rte_mbuf *pkt_to_free = lp->mbuf_out[port].array[k];\n-\t\t\t\t\trte_pktmbuf_free(pkt_to_free);\n-\t\t\t\t}\n-\t\t\t}\n-\n-\t\t\tlp->mbuf_out[port].n_mbufs = 0;\n-\t\t\tlp->mbuf_out_flush[port] = 0;\n-\t\t}\n-\t}\n-}\n-\n-static inline void\n-app_lcore_worker_flush(struct app_lcore_params_worker *lp)\n-{\n-\tuint32_t port;\n-\n-\tfor (port = 0; port < APP_MAX_NIC_PORTS; port ++) {\n-\t\tint ret;\n-\n-\t\tif (unlikely(lp->rings_out[port] == NULL)) {\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tif (likely((lp->mbuf_out_flush[port] == 0) ||\n-\t\t (lp->mbuf_out[port].n_mbufs == 0))) {\n-\t\t\tlp->mbuf_out_flush[port] = 1;\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tret = rte_ring_sp_enqueue_bulk(\n-\t\t\tlp->rings_out[port],\n-\t\t\t(void **) lp->mbuf_out[port].array,\n-\t\t\tlp->mbuf_out[port].n_mbufs,\n-\t\t\tNULL);\n-\n-\t\tif (unlikely(ret == 0)) {\n-\t\t\tuint32_t k;\n-\t\t\tfor (k = 0; k < lp->mbuf_out[port].n_mbufs; k ++) {\n-\t\t\t\tstruct rte_mbuf *pkt_to_free = lp->mbuf_out[port].array[k];\n-\t\t\t\trte_pktmbuf_free(pkt_to_free);\n-\t\t\t}\n-\t\t}\n-\n-\t\tlp->mbuf_out[port].n_mbufs = 0;\n-\t\tlp->mbuf_out_flush[port] = 1;\n-\t}\n-}\n-\n-static void\n-app_lcore_main_loop_worker(void) {\n-\tuint32_t lcore = rte_lcore_id();\n-\tstruct app_lcore_params_worker *lp = &app.lcore_params[lcore].worker;\n-\tuint64_t i = 0;\n-\n-\tuint32_t bsz_rd = app.burst_size_worker_read;\n-\tuint32_t bsz_wr = app.burst_size_worker_write;\n-\n-\tfor ( ; ; ) {\n-\t\tif (APP_LCORE_WORKER_FLUSH && (unlikely(i == APP_LCORE_WORKER_FLUSH))) {\n-\t\t\tapp_lcore_worker_flush(lp);\n-\t\t\ti = 0;\n-\t\t}\n-\n-\t\tapp_lcore_worker(lp, bsz_rd, bsz_wr);\n-\n-\t\ti ++;\n-\t}\n-}\n-\n-int\n-app_lcore_main_loop(__attribute__((unused)) void *arg)\n-{\n-\tstruct app_lcore_params *lp;\n-\tunsigned lcore;\n-\n-\tlcore = rte_lcore_id();\n-\tlp = &app.lcore_params[lcore];\n-\n-\tif (lp->type == e_APP_LCORE_IO) {\n-\t\tprintf(\"Logical core %u (I/O) main loop.\\n\", lcore);\n-\t\tapp_lcore_main_loop_io();\n-\t}\n-\n-\tif (lp->type == e_APP_LCORE_WORKER) {\n-\t\tprintf(\"Logical core %u (worker %u) main loop.\\n\",\n-\t\t\tlcore,\n-\t\t\t(unsigned) lp->worker.worker_id);\n-\t\tapp_lcore_main_loop_worker();\n-\t}\n-\n-\treturn 0;\n-}\ndiff --git a/examples/meson.build b/examples/meson.build\nindex f0356f2a1..e4580f74a 100644\n--- a/examples/meson.build\n+++ b/examples/meson.build\n@@ -24,7 +24,6 @@ all_examples = [\n \t'l2fwd-keepalive', 'l3fwd',\n \t'l3fwd-acl', 'l3fwd-power',\n \t'link_status_interrupt',\n-\t'load_balancer',\n \t'multi_process/client_server_mp/mp_client',\n \t'multi_process/client_server_mp/mp_server',\n \t'multi_process/hotplug_mp',\n", "prefixes": [ "5/6" ] }