get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/59843/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 59843,
    "url": "https://patches.dpdk.org/api/patches/59843/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190926100558.24348-5-pbhagavatula@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190926100558.24348-5-pbhagavatula@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190926100558.24348-5-pbhagavatula@marvell.com",
    "date": "2019-09-26T10:05:51",
    "name": "[04/11] examples/l3fwd: add ethdev setup based on eventdev",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "a1e11f526ae584063804ff59aaaba17860da5a6d",
    "submitter": {
        "id": 1183,
        "url": "https://patches.dpdk.org/api/people/1183/?format=api",
        "name": "Pavan Nikhilesh Bhagavatula",
        "email": "pbhagavatula@marvell.com"
    },
    "delegate": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190926100558.24348-5-pbhagavatula@marvell.com/mbox/",
    "series": [
        {
            "id": 6542,
            "url": "https://patches.dpdk.org/api/series/6542/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6542",
            "date": "2019-09-26T10:05:47",
            "name": "example/l3fwd: introduce event device support",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/6542/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/59843/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/59843/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 2C25A1BF6D;\n\tThu, 26 Sep 2019 12:06:21 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n\t[67.231.156.173]) by dpdk.org (Postfix) with ESMTP id C74D21BEBF\n\tfor <dev@dpdk.org>; Thu, 26 Sep 2019 12:06:19 +0200 (CEST)",
            "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n\tby mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id\n\tx8QA4fI7032589; Thu, 26 Sep 2019 03:06:19 -0700",
            "from sc-exch01.marvell.com ([199.233.58.181])\n\tby mx0b-0016f401.pphosted.com with ESMTP id 2v8u5dr1a1-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); \n\tThu, 26 Sep 2019 03:06:19 -0700",
            "from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH01.marvell.com\n\t(10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3;\n\tThu, 26 Sep 2019 03:06:17 -0700",
            "from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com\n\t(10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend\n\tTransport; Thu, 26 Sep 2019 03:06:17 -0700",
            "from BG-LT7430.marvell.com (unknown [10.28.17.15])\n\tby maili.marvell.com (Postfix) with ESMTP id 459BA3F703F;\n\tThu, 26 Sep 2019 03:06:14 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n\th=from : to : cc :\n\tsubject : date : message-id : in-reply-to : references : mime-version\n\t: content-transfer-encoding : content-type; s=pfpt0818;\n\tbh=aLuAmyEK82PdbcLaMIHxcrWwurHELjVNjQhrgVa7nnQ=;\n\tb=Mm8fq6hRhxalPegk67ze53bv6HBl9c64BmPvubOLtJ22QvrKsrfH7dj3kBv/HrtkpaDj\n\tpgj9tYLgubYKDi27PjKsak+gJRcFizqfYsK2DuA91+RRC15Tx8E6xB4ZMPhhKbJzhNJ3\n\t7oLgzJq6dqFRK7a4UPRWdUkq5oYS4Rup4jt4/XCZvSdh3arZLhhqdgRRXDj4DOYoqI+c\n\tSZGDEMasG/OL6sNywqKuyYlMvlKtoJ9ffMV/On6eJAYsk1qOadu9i+4/Kps2LhuSB5z+\n\ttTQA+S5MVHN70pIcoQydRWsYBxApQ+//jD/MRa0GkiPqtR5RgpY30ILmckupgh30bUlv\n\tag== ",
        "From": "<pbhagavatula@marvell.com>",
        "To": "<jerinj@marvell.com>, <akhil.goyal@nxp.com>, Marko Kovacevic\n\t<marko.kovacevic@intel.com>, Ori Kam <orika@mellanox.com>,\n\tBruce Richardson\n\t<bruce.richardson@intel.com>, Radu Nicolau <radu.nicolau@intel.com>, \n\t\"Tomasz Kantecki\" <tomasz.kantecki@intel.com>",
        "CC": "<dev@dpdk.org>, Sunil Kumar Kori <skori@marvell.com>",
        "Date": "Thu, 26 Sep 2019 15:35:51 +0530",
        "Message-ID": "<20190926100558.24348-5-pbhagavatula@marvell.com>",
        "X-Mailer": "git-send-email 2.17.1",
        "In-Reply-To": "<20190926100558.24348-1-pbhagavatula@marvell.com>",
        "References": "<20190926100558.24348-1-pbhagavatula@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:6.0.95,1.0.8\n\tdefinitions=2019-09-26_04:2019-09-25,2019-09-26 signatures=0",
        "Subject": "[dpdk-dev] [PATCH 04/11] examples/l3fwd: add ethdev setup based on\n\teventdev",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Sunil Kumar Kori <skori@marvell.com>\n\nAdd ethernet port Rx/Tx queue setup for event device which are later\nused for setting up event eth Rx/Tx adapters.\n\nSigned-off-by: Sunil Kumar Kori <skori@marvell.com>\n---\n examples/l3fwd/l3fwd.h          |  10 +++\n examples/l3fwd/l3fwd_eventdev.c | 129 +++++++++++++++++++++++++++++++-\n examples/l3fwd/l3fwd_eventdev.h |   5 +-\n examples/l3fwd/main.c           |  15 ++--\n 4 files changed, 147 insertions(+), 12 deletions(-)",
    "diff": "diff --git a/examples/l3fwd/l3fwd.h b/examples/l3fwd/l3fwd.h\nindex 838aeed1d..ef978ae64 100644\n--- a/examples/l3fwd/l3fwd.h\n+++ b/examples/l3fwd/l3fwd.h\n@@ -18,9 +18,16 @@\n #define NO_HASH_MULTI_LOOKUP 1\n #endif\n \n+/*\n+ * Configurable number of RX/TX ring descriptors\n+ */\n+#define RTE_TEST_RX_DESC_DEFAULT 1024\n+#define RTE_TEST_TX_DESC_DEFAULT 1024\n+\n #define MAX_PKT_BURST     32\n #define BURST_TX_DRAIN_US 100 /* TX drain every ~100us */\n \n+#define MEMPOOL_CACHE_SIZE 256\n #define MAX_RX_QUEUE_PER_LCORE 16\n \n /*\n@@ -172,6 +179,9 @@ is_valid_ipv4_pkt(struct rte_ipv4_hdr *pkt, uint32_t link_len)\n }\n #endif /* DO_RFC_1812_CHECKS */\n \n+int\n+init_mem(uint16_t portid, unsigned int nb_mbuf);\n+\n /* Function pointers for LPM or EM functionality. */\n void\n setup_lpm(const int socketid);\ndiff --git a/examples/l3fwd/l3fwd_eventdev.c b/examples/l3fwd/l3fwd_eventdev.c\nindex 7e2c4c66b..f07cd4b31 100644\n--- a/examples/l3fwd/l3fwd_eventdev.c\n+++ b/examples/l3fwd/l3fwd_eventdev.c\n@@ -8,6 +8,14 @@\n #include \"l3fwd.h\"\n #include \"l3fwd_eventdev.h\"\n \n+static void\n+print_ethaddr(const char *name, const struct rte_ether_addr *eth_addr)\n+{\n+\tchar buf[RTE_ETHER_ADDR_FMT_SIZE];\n+\trte_ether_format_addr(buf, RTE_ETHER_ADDR_FMT_SIZE, eth_addr);\n+\tprintf(\"%s%s\", name, buf);\n+}\n+\n static void\n parse_mode(const char *optarg)\n {\n@@ -66,6 +74,122 @@ l3fwd_parse_eventdev_args(char **argv, int argc)\n \treturn 0;\n }\n \n+static void\n+l3fwd_eth_dev_port_setup(struct rte_eth_conf *port_conf)\n+{\n+\tstruct l3fwd_eventdev_resources *evdev_rsrc = l3fwd_get_eventdev_rsrc();\n+\tuint16_t nb_ports = rte_eth_dev_count_avail();\n+\tuint16_t nb_rxd = RTE_TEST_RX_DESC_DEFAULT;\n+\tuint16_t nb_txd = RTE_TEST_TX_DESC_DEFAULT;\n+\tunsigned int nb_lcores = rte_lcore_count();\n+\tstruct rte_eth_conf local_port_conf;\n+\tstruct rte_eth_dev_info dev_info;\n+\tstruct rte_eth_txconf txconf;\n+\tstruct rte_eth_rxconf rxconf;\n+\tunsigned int nb_mbuf;\n+\tuint16_t port_id;\n+\tint32_t ret;\n+\n+\t/* initialize all ports */\n+\tRTE_ETH_FOREACH_DEV(port_id) {\n+\t\tlocal_port_conf = *port_conf;\n+\t\t/* skip ports that are not enabled */\n+\t\tif ((evdev_rsrc->port_mask & (1 << port_id)) == 0) {\n+\t\t\tprintf(\"\\nSkipping disabled port %d\\n\", port_id);\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\t/* init port */\n+\t\tprintf(\"Initializing port %d ... \", port_id);\n+\t\tfflush(stdout);\n+\t\tprintf(\"Creating queues: nb_rxq=1 nb_txq=1...\\n\");\n+\n+\t\trte_eth_dev_info_get(port_id, &dev_info);\n+\t\tif (dev_info.tx_offload_capa & DEV_TX_OFFLOAD_MBUF_FAST_FREE)\n+\t\t\tlocal_port_conf.txmode.offloads |=\n+\t\t\t\t\t\tDEV_TX_OFFLOAD_MBUF_FAST_FREE;\n+\n+\t\tlocal_port_conf.rx_adv_conf.rss_conf.rss_hf &=\n+\t\t\t\t\t\tdev_info.flow_type_rss_offloads;\n+\t\tif (local_port_conf.rx_adv_conf.rss_conf.rss_hf !=\n+\t\t\t\tport_conf->rx_adv_conf.rss_conf.rss_hf) {\n+\t\t\tprintf(\"Port %u modified RSS hash function \"\n+\t\t\t       \"based on hardware support,\"\n+\t\t\t       \"requested:%#\"PRIx64\" configured:%#\"PRIx64\"\\n\",\n+\t\t\t       port_id,\n+\t\t\t       port_conf->rx_adv_conf.rss_conf.rss_hf,\n+\t\t\t       local_port_conf.rx_adv_conf.rss_conf.rss_hf);\n+\t\t}\n+\n+\t\tret = rte_eth_dev_configure(port_id, 1, 1, &local_port_conf);\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t \"Cannot configure device: err=%d, port=%d\\n\",\n+\t\t\t\t ret, port_id);\n+\n+\t\tret = rte_eth_dev_adjust_nb_rx_tx_desc(port_id, &nb_rxd,\n+\t\t\t\t\t\t       &nb_txd);\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t \"Cannot adjust number of descriptors: err=%d, \"\n+\t\t\t\t \"port=%d\\n\", ret, port_id);\n+\n+\t\trte_eth_macaddr_get(port_id, &ports_eth_addr[port_id]);\n+\t\tprint_ethaddr(\" Address:\", &ports_eth_addr[port_id]);\n+\t\tprintf(\", \");\n+\t\tprint_ethaddr(\"Destination:\",\n+\t\t\t(const struct rte_ether_addr *)&dest_eth_addr[port_id]);\n+\t\tprintf(\", \");\n+\n+\t\t/* prepare source MAC for each port. */\n+\t\trte_ether_addr_copy(&ports_eth_addr[port_id],\n+\t\t\t(struct rte_ether_addr *)(val_eth + port_id) + 1);\n+\n+\t\t/* init memory */\n+\t\tif (!evdev_rsrc->per_port_pool) {\n+\t\t\t/* port_id = 0; this is *not* signifying the first port,\n+\t\t\t * rather, it signifies that port_id is ignored.\n+\t\t\t */\n+\t\t\tnb_mbuf = RTE_MAX(nb_ports * nb_rxd +\n+\t\t\t\t\t  nb_ports * nb_txd +\n+\t\t\t\t\t  nb_ports * nb_lcores *\n+\t\t\t\t\t\t\tMAX_PKT_BURST +\n+\t\t\t\t\t  nb_lcores * MEMPOOL_CACHE_SIZE,\n+\t\t\t\t\t  8192u);\n+\t\t\tret = init_mem(0, nb_mbuf);\n+\t\t} else {\n+\t\t\tnb_mbuf = RTE_MAX(nb_rxd + nb_rxd +\n+\t\t\t\t\t  nb_lcores * MAX_PKT_BURST +\n+\t\t\t\t\t  nb_lcores * MEMPOOL_CACHE_SIZE,\n+\t\t\t\t\t  8192u);\n+\t\t\tret = init_mem(port_id, nb_mbuf);\n+\t\t}\n+\t\t/* init one Rx queue per port */\n+\t\trxconf = dev_info.default_rxconf;\n+\t\trxconf.offloads = local_port_conf.rxmode.offloads;\n+\t\tif (!evdev_rsrc->per_port_pool)\n+\t\t\tret = rte_eth_rx_queue_setup(port_id, 0, nb_rxd, 0,\n+\t\t\t\t\t&rxconf, evdev_rsrc->pkt_pool[0][0]);\n+\t\telse\n+\t\t\tret = rte_eth_rx_queue_setup(port_id, 0, nb_rxd, 0,\n+\t\t\t\t\t&rxconf,\n+\t\t\t\t\tevdev_rsrc->pkt_pool[port_id][0]);\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t \"rte_eth_rx_queue_setup: err=%d, \"\n+\t\t\t\t \"port=%d\\n\", ret, port_id);\n+\n+\t\t/* init one Tx queue per port */\n+\t\ttxconf = dev_info.default_txconf;\n+\t\ttxconf.offloads = local_port_conf.txmode.offloads;\n+\t\tret = rte_eth_tx_queue_setup(port_id, 0, nb_txd, 0, &txconf);\n+\t\tif (ret < 0)\n+\t\t\trte_exit(EXIT_FAILURE,\n+\t\t\t\t \"rte_eth_tx_queue_setup: err=%d, \"\n+\t\t\t\t \"port=%d\\n\", ret, port_id);\n+\t}\n+}\n+\n static void\n l3fwd_eventdev_capability_setup(void)\n {\n@@ -155,7 +279,7 @@ l3fwd_eventdev_setup(uint16_t ethdev_count)\n }\n \n void\n-l3fwd_eventdev_resource_setup(void)\n+l3fwd_eventdev_resource_setup(struct rte_eth_conf *port_conf)\n {\n \tstruct l3fwd_eventdev_resources *evdev_rsrc = l3fwd_get_eventdev_rsrc();\n \tuint16_t ethdev_count = rte_eth_dev_count_avail();\n@@ -172,6 +296,9 @@ l3fwd_eventdev_resource_setup(void)\n \t/* Setup eventdev capability callbacks */\n \tl3fwd_eventdev_capability_setup();\n \n+\t/* Ethernet device configuration */\n+\tl3fwd_eth_dev_port_setup(port_conf);\n+\n \t/* Event device configuration */\n \tl3fwd_eventdev_setup(ethdev_count);\n }\ndiff --git a/examples/l3fwd/l3fwd_eventdev.h b/examples/l3fwd/l3fwd_eventdev.h\nindex ce4e35443..f63f3d4ef 100644\n--- a/examples/l3fwd/l3fwd_eventdev.h\n+++ b/examples/l3fwd/l3fwd_eventdev.h\n@@ -40,6 +40,9 @@ struct l3fwd_eventdev_setup_ops {\n struct l3fwd_eventdev_resources {\n \tuint8_t disable_implicit_release;\n \tstruct l3fwd_eventdev_setup_ops ops;\n+\tstruct rte_mempool * (*pkt_pool)[NB_SOCKETS];\n+\tuint32_t port_mask;\n+\tuint8_t per_port_pool;\n \tuint8_t event_d_id;\n \tuint8_t sync_mode;\n \tuint8_t tx_mode_q;\n@@ -72,7 +75,7 @@ l3fwd_get_eventdev_rsrc(void)\n \treturn NULL;\n }\n \n-void l3fwd_eventdev_resource_setup(void);\n+void l3fwd_eventdev_resource_setup(struct rte_eth_conf *port_conf);\n void l3fwd_eventdev_set_generic_ops(struct l3fwd_eventdev_setup_ops *ops);\n void l3fwd_eventdev_set_internal_port_ops(struct l3fwd_eventdev_setup_ops *ops);\n \ndiff --git a/examples/l3fwd/main.c b/examples/l3fwd/main.c\nindex bd88bd4ce..0ecb0ef68 100644\n--- a/examples/l3fwd/main.c\n+++ b/examples/l3fwd/main.c\n@@ -45,12 +45,6 @@\n #include <cmdline_parse_etheraddr.h>\n \n #include \"l3fwd.h\"\n-\n-/*\n- * Configurable number of RX/TX ring descriptors\n- */\n-#define RTE_TEST_RX_DESC_DEFAULT 1024\n-#define RTE_TEST_TX_DESC_DEFAULT 1024\n #include \"l3fwd_eventdev.h\"\n \n #define MAX_TX_QUEUE_PER_PORT RTE_MAX_ETHPORTS\n@@ -448,7 +442,6 @@ parse_eth_dest(const char *optarg)\n }\n \n #define MAX_JUMBO_PKT_LEN  9600\n-#define MEMPOOL_CACHE_SIZE 256\n \n static const char short_options[] =\n \t\"p:\"  /* portmask */\n@@ -678,7 +671,7 @@ print_ethaddr(const char *name, const struct rte_ether_addr *eth_addr)\n \tprintf(\"%s%s\", name, buf);\n }\n \n-static int\n+int\n init_mem(uint16_t portid, unsigned int nb_mbuf)\n {\n \tstruct lcore_conf *qconf;\n@@ -857,14 +850,16 @@ main(int argc, char **argv)\n \t}\n \n \tevdev_rsrc = l3fwd_get_eventdev_rsrc();\n-\tRTE_SET_USED(evdev_rsrc);\n \t/* parse application arguments (after the EAL ones) */\n \tret = parse_args(argc, argv);\n \tif (ret < 0)\n \t\trte_exit(EXIT_FAILURE, \"Invalid L3FWD parameters\\n\");\n \n+\tevdev_rsrc->per_port_pool = per_port_pool;\n+\tevdev_rsrc->pkt_pool = pktmbuf_pool;\n+\tevdev_rsrc->port_mask = enabled_port_mask;\n \t/* Configure eventdev parameters if user has requested */\n-\tl3fwd_eventdev_resource_setup();\n+\tl3fwd_eventdev_resource_setup(&port_conf);\n \n \tif (check_lcore_params() < 0)\n \t\trte_exit(EXIT_FAILURE, \"check_lcore_params failed\\n\");\n",
    "prefixes": [
        "04/11"
    ]
}