Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/57941/?format=api
{ "id": 57941, "url": "https://patches.dpdk.org/api/patches/57941/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190826105105.19121-41-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190826105105.19121-41-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190826105105.19121-41-qi.z.zhang@intel.com", "date": "2019-08-26T10:50:42", "name": "[40/63] net/ice/base: improve switch chained recipe", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "dab804f77c0e05be208e7793ee881475ae0ca750", "submitter": { "id": 504, "url": "https://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190826105105.19121-41-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 6119, "url": "https://patches.dpdk.org/api/series/6119/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=6119", "date": "2019-08-26T10:50:02", "name": "net/ice/base: update base code", "version": 1, "mbox": "https://patches.dpdk.org/series/6119/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/57941/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/57941/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 379661C1D9;\n\tMon, 26 Aug 2019 12:50:50 +0200 (CEST)", "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n\tby dpdk.org (Postfix) with ESMTP id 114A71C0D2\n\tfor <dev@dpdk.org>; Mon, 26 Aug 2019 12:49:38 +0200 (CEST)", "from orsmga003.jf.intel.com ([10.7.209.27])\n\tby orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t26 Aug 2019 03:49:38 -0700", "from dpdk51.sh.intel.com ([10.67.110.245])\n\tby orsmga003.jf.intel.com with ESMTP; 26 Aug 2019 03:49:36 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.64,431,1559545200\"; d=\"scan'208\";a=\"182402379\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "wenzhuo.lu@intel.com,\n\tqiming.yang@intel.com", "Cc": "dev@dpdk.org, xiaolong.ye@intel.com, Qi Zhang <qi.z.zhang@intel.com>,\n\tDan Nowlin <dan.nowlin@intel.com>,\n\tPaul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Mon, 26 Aug 2019 18:50:42 +0800", "Message-Id": "<20190826105105.19121-41-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20190826105105.19121-1-qi.z.zhang@intel.com>", "References": "<20190826105105.19121-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH 40/63] net/ice/base: improve switch chained recipe", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When updating switch database with chained recipes from\nfirmware, where a null pointer derefence was occurring due to looking\ninto a sub-recipe entry which is not filled in.\n\nSigned-off-by: Dan Nowlin <dan.nowlin@intel.com>\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_protocol_type.h | 2 +\n drivers/net/ice/base/ice_switch.c | 164 ++++++++++++++++++++-----------\n 2 files changed, 108 insertions(+), 58 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h\nindex ee40bdc30..91f56f3fa 100644\n--- a/drivers/net/ice/base/ice_protocol_type.h\n+++ b/drivers/net/ice/base/ice_protocol_type.h\n@@ -135,6 +135,8 @@ enum ice_prot_id {\n #define ICE_GRE_OF_HW\t64 /* NVGRE */\n #define ICE_META_DATA_ID_HW 255 /* this is used for tunnel type */\n \n+#define ICE_MDID_SIZE 2\n+#define ICE_TUN_FLAG_MDID 21\n #define ICE_TUN_FLAG_MASK 0xFF\n #define ICE_TUN_FLAG_FV_IND 2\n \ndiff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex 65ec1bb93..b4f50e0e5 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -455,29 +455,24 @@ static void ice_get_recp_to_prof_map(struct ice_hw *hw);\n static void ice_collect_result_idx(struct ice_aqc_recipe_data_elem *buf,\n \t\t\t\t struct ice_sw_recipe *recp)\n {\n-\tif (buf->content.result_indx & ICE_AQ_RECIPE_ID_IS_ROOT)\n+\tif (buf->content.result_indx & ICE_AQ_RECIPE_RESULT_EN)\n \t\tice_set_bit(buf->content.result_indx &\n-\t\t\t ~ICE_AQ_RECIPE_ID_IS_ROOT, recp->res_idxs);\n+\t\t\t ~ICE_AQ_RECIPE_RESULT_EN, recp->res_idxs);\n }\n \n /**\n- * ice_collect_result_idx_from_bitmap - copy result index values using bitmap\n- * @hw: pointer to hardware structure\n- * @recp: the recipe struct to copy data into\n+ * ice_init_possible_res_bm - initialize possible result bitmap\n+ * @pos_result_bm: pointer to the bitmap to initialize\n */\n-static void\n-ice_collect_result_idx_from_bitmap(struct ice_hw *hw,\n-\t\t\t\t struct ice_sw_recipe *recp)\n+static void ice_init_possible_res_bm(ice_bitmap_t *pos_result_bm)\n {\n-\tu16 bit = 0;\n+\tu16 bit;\n \n-\twhile (ICE_MAX_NUM_RECIPES >\n-\t (bit = ice_find_next_bit(recp->r_bitmap, ICE_MAX_NUM_RECIPES,\n-\t\t\t\t\tbit))) {\n-\t\tice_collect_result_idx(hw->switch_info->recp_list[bit].root_buf,\n-\t\t\t\t recp);\n-\t\tbit++;\n-\t}\n+\tice_zero_bitmap(pos_result_bm, ICE_MAX_FV_WORDS);\n+\n+\tfor (bit = 0; bit < ICE_MAX_FV_WORDS; bit++)\n+\t\tif (ICE_POSSIBLE_RES_IDX & BIT_ULL(bit))\n+\t\t\tice_set_bit(bit, pos_result_bm);\n }\n \n /**\n@@ -495,14 +490,16 @@ static enum ice_status\n ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,\n \t\t bool *refresh_required)\n {\n-\tu16 i, sub_recps, fv_word_idx = 0, result_idx = 0;\n-\tice_declare_bitmap(r_bitmap, ICE_MAX_NUM_PROFILES);\n-\tu16 result_idxs[ICE_MAX_CHAIN_RECIPE] = { 0 };\n+\tice_declare_bitmap(possible_idx, ICE_MAX_FV_WORDS);\n+\tice_declare_bitmap(result_bm, ICE_MAX_FV_WORDS);\n \tstruct ice_aqc_recipe_data_elem *tmp;\n \tu16 num_recps = ICE_MAX_NUM_RECIPES;\n \tstruct ice_prot_lkup_ext *lkup_exts;\n+\tu16 i, sub_recps, fv_word_idx = 0;\n \tenum ice_status status;\n-\tu8 is_root;\n+\n+\tice_zero_bitmap(result_bm, ICE_MAX_FV_WORDS);\n+\tice_init_possible_res_bm(possible_idx);\n \n \t/* we need a buffer big enough to accommodate all the recipes */\n \ttmp = (struct ice_aqc_recipe_data_elem *)ice_calloc(hw,\n@@ -528,14 +525,18 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,\n \t\tice_get_recp_to_prof_map(hw);\n \t\t*refresh_required = false;\n \t}\n-\tlkup_exts = &recps[rid].lkup_exts;\n-\t/* start populating all the entries for recps[rid] based on lkups from\n-\t * firmware\n+\n+\t/* Start populating all the entries for recps[rid] based on lkups from\n+\t * firmware. Note that we are only creating the root recipe in our\n+\t * database.\n \t */\n+\tlkup_exts = &recps[rid].lkup_exts;\n+\n \tfor (sub_recps = 0; sub_recps < num_recps; sub_recps++) {\n \t\tstruct ice_aqc_recipe_data_elem root_bufs = tmp[sub_recps];\n \t\tstruct ice_recp_grp_entry *rg_entry;\n-\t\tu8 prof_id, prot = 0;\n+\t\tu8 prof_id, idx, prot = 0;\n+\t\tbool is_root;\n \t\tu16 off = 0;\n \n \t\trg_entry = (struct ice_recp_grp_entry *)\n@@ -544,15 +545,18 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,\n \t\t\tstatus = ICE_ERR_NO_MEMORY;\n \t\t\tgoto err_unroll;\n \t\t}\n-\t\t/* When copying, clear the result index enable bit */\n-\t\tresult_idxs[result_idx] = root_bufs.content.result_indx &\n-\t\t\t~ICE_AQ_RECIPE_RESULT_EN;\n \n-\t\tice_memcpy(r_bitmap,\n-\t\t\t recipe_to_profile[tmp[sub_recps].recipe_indx],\n-\t\t\t sizeof(r_bitmap), ICE_NONDMA_TO_NONDMA);\n+\t\tidx = root_bufs.recipe_indx;\n+\t\tis_root = root_bufs.content.rid & ICE_AQ_RECIPE_ID_IS_ROOT;\n+\n+\t\t/* Mark all result indices in this chain */\n+\t\tif (root_bufs.content.result_indx & ICE_AQ_RECIPE_RESULT_EN)\n+\t\t\tice_set_bit(root_bufs.content.result_indx &\n+\t\t\t\t ~ICE_AQ_RECIPE_RESULT_EN, result_bm);\n+\n \t\t/* get the first profile that is associated with rid */\n-\t\tprof_id = ice_find_first_bit(r_bitmap, ICE_MAX_NUM_PROFILES);\n+\t\tprof_id = ice_find_first_bit(recipe_to_profile[idx],\n+\t\t\t\t\t ICE_MAX_NUM_PROFILES);\n \t\tfor (i = 0; i < ICE_NUM_WORDS_RECIPE; i++) {\n \t\t\tu8 lkup_indx = root_bufs.content.lkup_indx[i + 1];\n \n@@ -569,12 +573,8 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,\n \t\t\t * has ICE_AQ_RECIPE_LKUP_IGNORE or 0 since it isn't a\n \t\t\t * valid offset value.\n \t\t\t */\n-\t\t\tif (result_idxs[0] == rg_entry->fv_idx[i] ||\n-\t\t\t result_idxs[1] == rg_entry->fv_idx[i] ||\n-\t\t\t result_idxs[2] == rg_entry->fv_idx[i] ||\n-\t\t\t result_idxs[3] == rg_entry->fv_idx[i] ||\n-\t\t\t result_idxs[4] == rg_entry->fv_idx[i] ||\n-\t\t\t rg_entry->fv_idx[i] == ICE_AQ_RECIPE_LKUP_IGNORE ||\n+\t\t\tif (ice_is_bit_set(possible_idx, rg_entry->fv_idx[i]) ||\n+\t\t\t rg_entry->fv_idx[i] & ICE_AQ_RECIPE_LKUP_IGNORE ||\n \t\t\t rg_entry->fv_idx[i] == 0)\n \t\t\t\tcontinue;\n \n@@ -588,7 +588,29 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,\n \t\t * recipe\n \t\t */\n \t\tLIST_ADD(&rg_entry->l_entry, &recps[rid].rg_list);\n+\n+\t\t/* Propagate some data to the recipe database */\n+\t\trecps[idx].is_root = is_root;\n+\t\trecps[idx].priority = root_bufs.content.act_ctrl_fwd_priority;\n+\t\tif (root_bufs.content.result_indx & ICE_AQ_RECIPE_RESULT_EN)\n+\t\t\trecps[idx].chain_idx = root_bufs.content.result_indx &\n+\t\t\t\t~ICE_AQ_RECIPE_RESULT_EN;\n+\t\telse\n+\t\t\trecps[idx].chain_idx = ICE_INVAL_CHAIN_IND;\n+\n+\t\tif (!is_root)\n+\t\t\tcontinue;\n+\n+\t\t/* Only do the following for root recipes entries */\n+\t\tice_memcpy(recps[idx].r_bitmap, root_bufs.recipe_bitmap,\n+\t\t\t sizeof(recps[idx].r_bitmap), ICE_NONDMA_TO_NONDMA);\n+\t\trecps[idx].root_rid = root_bufs.content.rid &\n+\t\t\t~ICE_AQ_RECIPE_ID_IS_ROOT;\n+\t\trecps[idx].priority = root_bufs.content.act_ctrl_fwd_priority;\n+\t\trecps[idx].big_recp = (recps[rid].n_grp_count > 1);\n \t}\n+\n+\t/* Complete initialization of the root recipe entry */\n \tlkup_exts->n_val_words = fv_word_idx;\n \trecps[rid].n_grp_count = num_recps;\n \trecps[rid].root_buf = (struct ice_aqc_recipe_data_elem *)\n@@ -600,26 +622,9 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,\n \tice_memcpy(recps[rid].root_buf, tmp, recps[rid].n_grp_count *\n \t\t sizeof(*recps[rid].root_buf), ICE_NONDMA_TO_NONDMA);\n \n-\tice_memcpy(recps[rid].r_bitmap, tmp->recipe_bitmap,\n-\t\t sizeof(recps[rid].r_bitmap), ICE_NONDMA_TO_NONDMA);\n-\n-\tif (tmp->content.result_indx & ICE_AQ_RECIPE_RESULT_EN)\n-\t\trecps[rid].chain_idx = tmp->content.result_indx &\n-\t\t\t~ICE_AQ_RECIPE_RESULT_EN;\n-\telse\n-\t\trecps[rid].chain_idx = ICE_INVAL_CHAIN_IND;\n-\n-\trecps[rid].root_rid = tmp->content.rid & ~ICE_AQ_RECIPE_ID_IS_ROOT;\n-\tis_root = (tmp->content.rid & ICE_AQ_RECIPE_ID_IS_ROOT) != 0;\n-\trecps[rid].is_root = is_root;\n-\trecps[rid].big_recp = (is_root && recps[rid].n_grp_count > 1);\n-\n-\t/* Copy non-result fv index values to recipe. This call will also update\n-\t * the result index bitmap appropriately.\n-\t */\n-\tice_collect_result_idx_from_bitmap(hw, &recps[rid]);\n-\n-\trecps[rid].priority = tmp->content.act_ctrl_fwd_priority;\n+\t/* Copy result indexes */\n+\tice_memcpy(recps[rid].res_idxs, result_bm, sizeof(recps[rid].res_idxs),\n+\t\t ICE_NONDMA_TO_NONDMA);\n \trecps[rid].recp_created = true;\n \n err_unroll:\n@@ -5038,10 +5043,10 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles,\n \tu16 count = 0;\n \tu16 bit;\n \n-\tice_zero_bitmap(possible_idx, ICE_MAX_FV_WORDS);\n \tice_zero_bitmap(free_idx, ICE_MAX_FV_WORDS);\n \tice_zero_bitmap(used_idx, ICE_MAX_FV_WORDS);\n \tice_zero_bitmap(recipes, ICE_MAX_NUM_RECIPES);\n+\tice_init_possible_res_bm(possible_idx);\n \n \tfor (bit = 0; bit < ICE_MAX_FV_WORDS; bit++)\n \t\tif (ICE_POSSIBLE_RES_IDX & BIT_ULL(bit))\n@@ -5503,6 +5508,34 @@ ice_get_fv(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,\n \treturn status;\n }\n \n+/**\n+ * ice_add_special_words - Add words that are not protocols, such as metadata\n+ * @rinfo: other information regarding the rule e.g. priority and action info\n+ * @lkup_exts: lookup word structure\n+ */\n+static enum ice_status\n+ice_add_special_words(struct ice_adv_rule_info *rinfo,\n+\t\t struct ice_prot_lkup_ext *lkup_exts)\n+{\n+\t/* If this is a tunneled packet, then add recipe index to match the\n+\t * tunnel bit in the packet metadata flags.\n+\t */\n+\tif (rinfo->tun_type != ICE_NON_TUN) {\n+\t\tif (lkup_exts->n_val_words < ICE_MAX_CHAIN_WORDS) {\n+\t\t\tu8 word = lkup_exts->n_val_words++;\n+\n+\t\t\tlkup_exts->fv_words[word].prot_id = ICE_META_DATA_ID_HW;\n+\t\t\tlkup_exts->fv_words[word].off = ICE_TUN_FLAG_MDID *\n+\t\t\t\tICE_MDID_SIZE;\n+\t\t\tlkup_exts->field_mask[word] = ICE_TUN_FLAG_MASK;\n+\t\t} else {\n+\t\t\treturn ICE_ERR_MAX_LIMIT;\n+\t\t}\n+\t}\n+\n+\treturn ICE_SUCCESS;\n+}\n+\n /* ice_get_compat_fv_bitmap - Get compatible field vector bitmap for rule\n * @hw: pointer to hardware structure\n * @rinfo: other information regarding the rule e.g. priority and action info\n@@ -5650,6 +5683,13 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,\n \t\tice_set_bit((u16)fvit->profile_id, profiles);\n \t}\n \n+\t/* Create any special protocol/offset pairs, such as looking at tunnel\n+\t * bits by extracting metadata\n+\t */\n+\tstatus = ice_add_special_words(rinfo, lkup_exts);\n+\tif (status)\n+\t\tgoto err_free_lkup_exts;\n+\n \t/* Look for a recipe which matches our requested fv / mask list */\n \t*rid = ice_find_recp(hw, lkup_exts);\n \tif (*rid < ICE_MAX_NUM_RECIPES)\n@@ -6424,6 +6464,14 @@ ice_rem_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,\n \t\tif (!count)\n \t\t\treturn ICE_ERR_CFG;\n \t}\n+\n+\t/* Create any special protocol/offset pairs, such as looking at tunnel\n+\t * bits by extracting metadata\n+\t */\n+\tstatus = ice_add_special_words(rinfo, &lkup_exts);\n+\tif (status)\n+\t\treturn status;\n+\n \trid = ice_find_recp(hw, &lkup_exts);\n \t/* If did not find a recipe that match the existing criteria */\n \tif (rid == ICE_MAX_NUM_RECIPES)\n", "prefixes": [ "40/63" ] }