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GET /api/patches/56846/?format=api
{ "id": 56846, "url": "https://patches.dpdk.org/api/patches/56846/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1563786795-14027-21-git-send-email-matan@mellanox.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1563786795-14027-21-git-send-email-matan@mellanox.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1563786795-14027-21-git-send-email-matan@mellanox.com", "date": "2019-07-22T09:13:07", "name": "[20/28] net/mlx5: function to create Rx verbs work queue", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "df9b274e375dde13fa9f8d2f5655da17c8917cdf", "submitter": { "id": 796, "url": "https://patches.dpdk.org/api/people/796/?format=api", "name": "Matan Azrad", "email": "matan@mellanox.com" }, "delegate": { "id": 3268, "url": "https://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1563786795-14027-21-git-send-email-matan@mellanox.com/mbox/", "series": [ { "id": 5639, "url": "https://patches.dpdk.org/api/series/5639/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=5639", "date": "2019-07-22T09:12:48", "name": "net/mlx5: support LRO", "version": 1, "mbox": "https://patches.dpdk.org/series/5639/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/56846/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/56846/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id EE4B51BE77;\n\tMon, 22 Jul 2019 11:14:19 +0200 (CEST)", "from mellanox.co.il (mail-il-dmz.mellanox.com [193.47.165.129])\n\tby dpdk.org (Postfix) with ESMTP id 759A01BDF3\n\tfor <dev@dpdk.org>; Mon, 22 Jul 2019 11:13:30 +0200 (CEST)", "from Internal Mail-Server by MTLPINE2 (envelope-from\n\tmatan@mellanox.com)\n\twith ESMTPS (AES256-SHA encrypted); 22 Jul 2019 12:13:24 +0300", "from pegasus07.mtr.labs.mlnx (pegasus07.mtr.labs.mlnx\n\t[10.210.16.112])\n\tby labmailer.mlnx (8.13.8/8.13.8) with ESMTP id x6M9DMjj010084;\n\tMon, 22 Jul 2019 12:13:24 +0300" ], "From": "Matan Azrad <matan@mellanox.com>", "To": "Shahaf Shuler <shahafs@mellanox.com>, Yongseok Koh <yskoh@mellanox.com>, \n\tViacheslav Ovsiienko <viacheslavo@mellanox.com>", "Cc": "dev@dpdk.org, Dekel Peled <dekelp@mellanox.com>", "Date": "Mon, 22 Jul 2019 09:13:07 +0000", "Message-Id": "<1563786795-14027-21-git-send-email-matan@mellanox.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1563786795-14027-1-git-send-email-matan@mellanox.com>", "References": "<1563786795-14027-1-git-send-email-matan@mellanox.com>", "Subject": "[dpdk-dev] [PATCH 20/28] net/mlx5: function to create Rx verbs work\n\tqueue", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Dekel Peled <dekelp@mellanox.com>\n\nVerbs WQ for RxQ is created inside function mlx5_rxq_obj_new().\nThis patch moves the creation of verbs WQ to dedicated function\nmlx5_ibv_wq_new().\n\nSigned-off-by: Dekel Peled <dekelp@mellanox.com>\nAcked-by: Matan Azrad <matan@mellanox.com>\n---\n drivers/net/mlx5/mlx5_rxq.c | 178 +++++++++++++++++++++++++-------------------\n 1 file changed, 103 insertions(+), 75 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex e5015bb..9d859df 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -900,6 +900,106 @@\n }\n \n /**\n+ * Create a WQ Verbs object.\n+ *\n+ * @param dev\n+ * Pointer to Ethernet device.\n+ * @param priv\n+ * Pointer to device private data.\n+ * @param rxq_data\n+ * Pointer to Rx queue data.\n+ * @param idx\n+ * Queue index in DPDK Rx queue array\n+ * @param wqe_n\n+ * Number of WQEs in WQ.\n+ * @param rxq_obj\n+ * Pointer to Rx queue object data.\n+ *\n+ * @return\n+ * The Verbs object initialised, NULL otherwise and rte_errno is set.\n+ */\n+static struct ibv_wq *\n+mlx5_ibv_wq_new(struct rte_eth_dev *dev, struct mlx5_priv *priv,\n+\t\tstruct mlx5_rxq_data *rxq_data, uint16_t idx,\n+\t\tunsigned int wqe_n, struct mlx5_rxq_obj *rxq_obj)\n+{\n+\tstruct {\n+\t\tstruct ibv_wq_init_attr ibv;\n+#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT\n+\t\tstruct mlx5dv_wq_init_attr mlx5;\n+#endif\n+\t} wq_attr;\n+\n+\twq_attr.ibv = (struct ibv_wq_init_attr){\n+\t\t.wq_context = NULL, /* Could be useful in the future. */\n+\t\t.wq_type = IBV_WQT_RQ,\n+\t\t/* Max number of outstanding WRs. */\n+\t\t.max_wr = wqe_n >> rxq_data->sges_n,\n+\t\t/* Max number of scatter/gather elements in a WR. */\n+\t\t.max_sge = 1 << rxq_data->sges_n,\n+\t\t.pd = priv->sh->pd,\n+\t\t.cq = rxq_obj->cq,\n+\t\t.comp_mask = IBV_WQ_FLAGS_CVLAN_STRIPPING | 0,\n+\t\t.create_flags = (rxq_data->vlan_strip ?\n+\t\t\t\t IBV_WQ_FLAGS_CVLAN_STRIPPING : 0),\n+\t};\n+\t/* By default, FCS (CRC) is stripped by hardware. */\n+\tif (rxq_data->crc_present) {\n+\t\twq_attr.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS;\n+\t\twq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;\n+\t}\n+\tif (priv->config.hw_padding) {\n+#if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)\n+\t\twq_attr.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING;\n+\t\twq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;\n+#elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)\n+\t\twq_attr.ibv.create_flags |= IBV_WQ_FLAGS_PCI_WRITE_END_PADDING;\n+\t\twq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;\n+#endif\n+\t}\n+#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT\n+\twq_attr.mlx5 = (struct mlx5dv_wq_init_attr){\n+\t\t.comp_mask = 0,\n+\t};\n+\tif (mlx5_rxq_mprq_enabled(rxq_data)) {\n+\t\tstruct mlx5dv_striding_rq_init_attr *mprq_attr =\n+\t\t\t\t\t\t&wq_attr.mlx5.striding_rq_attrs;\n+\n+\t\twq_attr.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;\n+\t\t*mprq_attr = (struct mlx5dv_striding_rq_init_attr){\n+\t\t\t.single_stride_log_num_of_bytes = rxq_data->strd_sz_n,\n+\t\t\t.single_wqe_log_num_of_strides = rxq_data->strd_num_n,\n+\t\t\t.two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,\n+\t\t};\n+\t}\n+\trxq_obj->wq = mlx5_glue->dv_create_wq(priv->sh->ctx, &wq_attr.ibv,\n+\t\t\t\t\t &wq_attr.mlx5);\n+#else\n+\trxq_obj->wq = mlx5_glue->create_wq(priv->sh->ctx, &wq_attr.ibv);\n+#endif\n+\tif (rxq_obj->wq) {\n+\t\t/*\n+\t\t * Make sure number of WRs*SGEs match expectations since a queue\n+\t\t * cannot allocate more than \"desc\" buffers.\n+\t\t */\n+\t\tif (wq_attr.ibv.max_wr != (wqe_n >> rxq_data->sges_n) ||\n+\t\t wq_attr.ibv.max_sge != (1u << rxq_data->sges_n)) {\n+\t\t\tDRV_LOG(ERR,\n+\t\t\t\t\"port %u Rx queue %u requested %u*%u but got\"\n+\t\t\t\t\" %u*%u WRs*SGEs\",\n+\t\t\t\tdev->data->port_id, idx,\n+\t\t\t\twqe_n >> rxq_data->sges_n,\n+\t\t\t\t(1 << rxq_data->sges_n),\n+\t\t\t\twq_attr.ibv.max_wr, wq_attr.ibv.max_sge);\n+\t\t\tclaim_zero(mlx5_glue->destroy_wq(rxq_obj->wq));\n+\t\t\trxq_obj->wq = NULL;\n+\t\t\trte_errno = EINVAL;\n+\t\t}\n+\t}\n+\treturn rxq_obj->wq;\n+}\n+\n+/**\n * Create the Rx queue Verbs/DevX object.\n *\n * @param dev\n@@ -918,12 +1018,6 @@ struct mlx5_rxq_obj *\n \tstruct mlx5_rxq_ctrl *rxq_ctrl =\n \t\tcontainer_of(rxq_data, struct mlx5_rxq_ctrl, rxq);\n \tstruct ibv_wq_attr mod;\n-\tstruct {\n-\t\tstruct ibv_wq_init_attr ibv;\n-#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT\n-\t\tstruct mlx5dv_wq_init_attr mlx5;\n-#endif\n-\t} wq_attr;\n \tunsigned int cqe_n;\n \tunsigned int wqe_n = 1 << rxq_data->elts_n;\n \tstruct mlx5_rxq_obj *tmpl = NULL;\n@@ -931,8 +1025,6 @@ struct mlx5_rxq_obj *\n \tstruct mlx5dv_rwq rwq;\n \tint ret = 0;\n \tstruct mlx5dv_obj obj;\n-\tstruct mlx5_dev_config *config = &priv->config;\n-\tconst int mprq_en = mlx5_rxq_mprq_enabled(rxq_data);\n \n \tassert(rxq_data);\n \tassert(!rxq_ctrl->obj);\n@@ -957,7 +1049,7 @@ struct mlx5_rxq_obj *\n \t\t\tgoto error;\n \t\t}\n \t}\n-\tif (mprq_en)\n+\tif (mlx5_rxq_mprq_enabled(rxq_data))\n \t\tcqe_n = wqe_n * (1 << rxq_data->strd_num_n) - 1;\n \telse\n \t\tcqe_n = wqe_n - 1;\n@@ -972,77 +1064,13 @@ struct mlx5_rxq_obj *\n \t\tdev->data->port_id, priv->sh->device_attr.orig_attr.max_qp_wr);\n \tDRV_LOG(DEBUG, \"port %u device_attr.max_sge is %d\",\n \t\tdev->data->port_id, priv->sh->device_attr.orig_attr.max_sge);\n-\twq_attr.ibv = (struct ibv_wq_init_attr){\n-\t\t.wq_context = NULL, /* Could be useful in the future. */\n-\t\t.wq_type = IBV_WQT_RQ,\n-\t\t/* Max number of outstanding WRs. */\n-\t\t.max_wr = wqe_n >> rxq_data->sges_n,\n-\t\t/* Max number of scatter/gather elements in a WR. */\n-\t\t.max_sge = 1 << rxq_data->sges_n,\n-\t\t.pd = priv->sh->pd,\n-\t\t.cq = tmpl->cq,\n-\t\t.comp_mask =\n-\t\t\tIBV_WQ_FLAGS_CVLAN_STRIPPING |\n-\t\t\t0,\n-\t\t.create_flags = (rxq_data->vlan_strip ?\n-\t\t\t\t IBV_WQ_FLAGS_CVLAN_STRIPPING :\n-\t\t\t\t 0),\n-\t};\n-\t/* By default, FCS (CRC) is stripped by hardware. */\n-\tif (rxq_data->crc_present) {\n-\t\twq_attr.ibv.create_flags |= IBV_WQ_FLAGS_SCATTER_FCS;\n-\t\twq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;\n-\t}\n-\tif (config->hw_padding) {\n-#if defined(HAVE_IBV_WQ_FLAG_RX_END_PADDING)\n-\t\twq_attr.ibv.create_flags |= IBV_WQ_FLAG_RX_END_PADDING;\n-\t\twq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;\n-#elif defined(HAVE_IBV_WQ_FLAGS_PCI_WRITE_END_PADDING)\n-\t\twq_attr.ibv.create_flags |= IBV_WQ_FLAGS_PCI_WRITE_END_PADDING;\n-\t\twq_attr.ibv.comp_mask |= IBV_WQ_INIT_ATTR_FLAGS;\n-#endif\n-\t}\n-#ifdef HAVE_IBV_DEVICE_STRIDING_RQ_SUPPORT\n-\twq_attr.mlx5 = (struct mlx5dv_wq_init_attr){\n-\t\t.comp_mask = 0,\n-\t};\n-\tif (mprq_en) {\n-\t\tstruct mlx5dv_striding_rq_init_attr *mprq_attr =\n-\t\t\t&wq_attr.mlx5.striding_rq_attrs;\n-\n-\t\twq_attr.mlx5.comp_mask |= MLX5DV_WQ_INIT_ATTR_MASK_STRIDING_RQ;\n-\t\t*mprq_attr = (struct mlx5dv_striding_rq_init_attr){\n-\t\t\t.single_stride_log_num_of_bytes = rxq_data->strd_sz_n,\n-\t\t\t.single_wqe_log_num_of_strides = rxq_data->strd_num_n,\n-\t\t\t.two_byte_shift_en = MLX5_MPRQ_TWO_BYTE_SHIFT,\n-\t\t};\n-\t}\n-\ttmpl->wq = mlx5_glue->dv_create_wq(priv->sh->ctx, &wq_attr.ibv,\n-\t\t\t\t\t &wq_attr.mlx5);\n-#else\n-\ttmpl->wq = mlx5_glue->create_wq(priv->sh->ctx, &wq_attr.ibv);\n-#endif\n-\tif (tmpl->wq == NULL) {\n+\ttmpl->wq = mlx5_ibv_wq_new(dev, priv, rxq_data, idx, wqe_n, tmpl);\n+\tif (!tmpl->wq) {\n \t\tDRV_LOG(ERR, \"port %u Rx queue %u WQ creation failure\",\n \t\t\tdev->data->port_id, idx);\n \t\trte_errno = ENOMEM;\n \t\tgoto error;\n \t}\n-\t/*\n-\t * Make sure number of WRs*SGEs match expectations since a queue\n-\t * cannot allocate more than \"desc\" buffers.\n-\t */\n-\tif (wq_attr.ibv.max_wr != (wqe_n >> rxq_data->sges_n) ||\n-\t wq_attr.ibv.max_sge != (1u << rxq_data->sges_n)) {\n-\t\tDRV_LOG(ERR,\n-\t\t\t\"port %u Rx queue %u requested %u*%u but got %u*%u\"\n-\t\t\t\" WRs*SGEs\",\n-\t\t\tdev->data->port_id, idx,\n-\t\t\twqe_n >> rxq_data->sges_n, (1 << rxq_data->sges_n),\n-\t\t\twq_attr.ibv.max_wr, wq_attr.ibv.max_sge);\n-\t\trte_errno = EINVAL;\n-\t\tgoto error;\n-\t}\n \t/* Change queue state to ready. */\n \tmod = (struct ibv_wq_attr){\n \t\t.attr_mask = IBV_WQ_ATTR_STATE,\n", "prefixes": [ "20/28" ] }