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GET /api/patches/56564/?format=api
{ "id": 56564, "url": "https://patches.dpdk.org/api/patches/56564/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190717052837.647-8-rnagadheeraj@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190717052837.647-8-rnagadheeraj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190717052837.647-8-rnagadheeraj@marvell.com", "date": "2019-07-17T05:29:10", "name": "[07/10] crypto/nitrox: add session management operations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9067a80ec228ca7e7dda2f7304a89185c2109b0d", "submitter": { "id": 1365, "url": "https://patches.dpdk.org/api/people/1365/?format=api", "name": "Nagadheeraj Rottela", "email": "rnagadheeraj@marvell.com" }, "delegate": { "id": 6690, "url": "https://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190717052837.647-8-rnagadheeraj@marvell.com/mbox/", "series": [ { "id": 5550, "url": "https://patches.dpdk.org/api/series/5550/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=5550", "date": "2019-07-17T05:29:01", "name": "add Nitrox crypto device support", "version": 1, "mbox": "https://patches.dpdk.org/series/5550/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/56564/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/56564/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", 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"tZYiF4cuX33wlpbV2aLYQljLbqB5UtesMb9fF0m9d6/LFEIQFP/7UCDBhZNT34jGWlkI4x6emnYEZc4qy7fQBq29Xg3hyDaYPJa663tUMiIsqtgRa5TDQ8XjwNy1juS3Z3qj7b8B67f9ZXk9ufzzmutzCLdaxo/tuPag9wbEwVvxUNDVHeL6r4ldfDn/N5laVNJJ28ZUVmZkKsw9DjVzLZmN9+36pK9hP8diD1iLDEsekWkQr2ANJKh0Gx2C/rNP3CmZnQJNjq5El0YJerje9K0dFEjUERx0PfXYXvpH5nO4fmo+kgQe8p+Z1pn1xlVXPmFTNfsqJeOEfae9OffmhXQO33v/n0NLrwCdxGoNcq955lwZNyVRzddXmd9LWXkf4DtTeH6Jmc659JgngCwTnESbFd0Tt0RoWy9EPsrMXbc=", "Content-Type": "text/plain; charset=\"iso-8859-1\"", "Content-Transfer-Encoding": "quoted-printable", "MIME-Version": "1.0", "X-MS-Exchange-CrossTenant-Network-Message-Id": "9c91fa0d-275f-4988-9426-08d70a77b27b", "X-MS-Exchange-CrossTenant-originalarrivaltime": "17 Jul 2019 05:29:10.9842\n\t(UTC)", "X-MS-Exchange-CrossTenant-fromentityheader": "Hosted", "X-MS-Exchange-CrossTenant-id": "70e1fb47-1155-421d-87fc-2e58f638b6e0", "X-MS-Exchange-CrossTenant-mailboxtype": "HOSTED", "X-MS-Exchange-CrossTenant-userprincipalname": "rnagadheeraj@marvell.com", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MN2PR18MB2767", "X-OriginatorOrg": "marvell.com", "X-Proofpoint-Virus-Version": "vendor=fsecure engine=2.50.10434:5.22.84,1.0.8\n\tdefinitions=2019-07-17_02:2019-07-16,2019-07-17 signatures=0", "Subject": "[dpdk-dev] [PATCH 07/10] crypto/nitrox: add session management\n\toperations", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add all the session management operations.\n\nSigned-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>\n---\n drivers/crypto/nitrox/nitrox_sym.c | 323 ++++++++++++++++++++++++++++++++-\n drivers/crypto/nitrox/nitrox_sym_ctx.h | 85 +++++++++\n 2 files changed, 405 insertions(+), 3 deletions(-)\n create mode 100644 drivers/crypto/nitrox/nitrox_sym_ctx.h", "diff": "diff --git a/drivers/crypto/nitrox/nitrox_sym.c b/drivers/crypto/nitrox/nitrox_sym.c\nindex 05f089cae..34c62b02e 100644\n--- a/drivers/crypto/nitrox/nitrox_sym.c\n+++ b/drivers/crypto/nitrox/nitrox_sym.c\n@@ -12,16 +12,54 @@\n #include \"nitrox_sym_capabilities.h\"\n #include \"nitrox_qp.h\"\n #include \"nitrox_sym_reqmgr.h\"\n+#include \"nitrox_sym_ctx.h\"\n #include \"nitrox_logs.h\"\n \n #define CRYPTODEV_NAME_NITROX_PMD crypto_nitrox\n+#define MC_MAC_MISMATCH_ERR_CODE 0x4c\n #define NPS_PKT_IN_INSTR_SIZE 64\n+#define IV_FROM_DPTR 1\n+#define FLEXI_CRYPTO_ENCRYPT_HMAC 0x33\n+#define AES_KEYSIZE_128 16\n+#define AES_KEYSIZE_192 24\n+#define AES_KEYSIZE_256 32\n+#define MAX_IV_LEN 16\n \n struct nitrox_sym_device {\n \tstruct rte_cryptodev *cdev;\n \tstruct nitrox_device *ndev;\n };\n \n+/* Cipher opcodes */\n+enum flexi_cipher {\n+\tCIPHER_NULL = 0,\n+\tCIPHER_3DES_CBC,\n+\tCIPHER_3DES_ECB,\n+\tCIPHER_AES_CBC,\n+\tCIPHER_AES_ECB,\n+\tCIPHER_AES_CFB,\n+\tCIPHER_AES_CTR,\n+\tCIPHER_AES_GCM,\n+\tCIPHER_AES_XTS,\n+\tCIPHER_AES_CCM,\n+\tCIPHER_AES_CBC_CTS,\n+\tCIPHER_AES_ECB_CTS,\n+\tCIPHER_INVALID\n+};\n+\n+/* Auth opcodes */\n+enum flexi_auth {\n+\tAUTH_NULL = 0,\n+\tAUTH_MD5,\n+\tAUTH_SHA1,\n+\tAUTH_SHA2_SHA224,\n+\tAUTH_SHA2_SHA256,\n+\tAUTH_SHA2_SHA384,\n+\tAUTH_SHA2_SHA512,\n+\tAUTH_GMAC,\n+\tAUTH_INVALID\n+};\n+\n uint8_t nitrox_sym_drv_id;\n static const char nitrox_sym_drv_name[] = RTE_STR(CRYPTODEV_NAME_NITROX_PMD);\n static const struct rte_driver nitrox_rte_sym_drv = {\n@@ -204,6 +242,285 @@ nitrox_sym_dev_qp_release(struct rte_cryptodev *cdev, uint16_t qp_id)\n \treturn err;\n }\n \n+static unsigned int\n+nitrox_sym_dev_sess_get_size(__rte_unused struct rte_cryptodev *cdev)\n+{\n+\treturn sizeof(struct nitrox_crypto_ctx);\n+}\n+\n+static enum nitrox_chain\n+get_crypto_chain_order(const struct rte_crypto_sym_xform *xform)\n+{\n+\tenum nitrox_chain res = NITROX_CHAIN_NOT_SUPPORTED;\n+\n+\tif (unlikely(xform == NULL))\n+\t\treturn res;\n+\n+\tswitch (xform->type) {\n+\tcase RTE_CRYPTO_SYM_XFORM_AUTH:\n+\t\tif (xform->next == NULL) {\n+\t\t\tres = NITROX_CHAIN_NOT_SUPPORTED;\n+\t\t} else if (xform->next->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {\n+\t\t\tif (xform->auth.op == RTE_CRYPTO_AUTH_OP_VERIFY &&\n+\t\t\t xform->next->cipher.op ==\n+\t\t\t RTE_CRYPTO_CIPHER_OP_DECRYPT) {\n+\t\t\t\tres = NITROX_CHAIN_AUTH_CIPHER;\n+\t\t\t} else {\n+\t\t\t\tNITROX_LOG(ERR, \"auth op %d, cipher op %d\\n\",\n+\t\t\t\t xform->auth.op, xform->next->cipher.op);\n+\t\t\t}\n+\t\t}\n+\t\tbreak;\n+\tcase RTE_CRYPTO_SYM_XFORM_CIPHER:\n+\t\tif (xform->next == NULL) {\n+\t\t\tres = NITROX_CHAIN_CIPHER_ONLY;\n+\t\t} else if (xform->next->type == RTE_CRYPTO_SYM_XFORM_AUTH) {\n+\t\t\tif (xform->cipher.op == RTE_CRYPTO_CIPHER_OP_ENCRYPT &&\n+\t\t\t xform->next->auth.op ==\n+\t\t\t RTE_CRYPTO_AUTH_OP_GENERATE) {\n+\t\t\t\tres = NITROX_CHAIN_CIPHER_AUTH;\n+\t\t\t} else {\n+\t\t\t\tNITROX_LOG(ERR, \"cipher op %d, auth op %d\\n\",\n+\t\t\t\t xform->cipher.op, xform->next->auth.op);\n+\t\t\t}\n+\t\t}\n+\t\tbreak;\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\treturn res;\n+}\n+\n+static enum flexi_cipher\n+get_flexi_cipher_type(enum rte_crypto_cipher_algorithm algo, bool *is_aes)\n+{\n+\tenum flexi_cipher type;\n+\n+\tswitch (algo) {\n+\tcase RTE_CRYPTO_CIPHER_AES_CBC:\n+\t\ttype = CIPHER_AES_CBC;\n+\t\t*is_aes = true;\n+\t\tbreak;\n+\tdefault:\n+\t\ttype = CIPHER_INVALID;\n+\t\tNITROX_LOG(ERR, \"Algorithm not supported %d\\n\", algo);\n+\t\tbreak;\n+\t}\n+\n+\treturn type;\n+}\n+\n+static int\n+flexi_aes_keylen(size_t keylen, bool is_aes)\n+{\n+\tint aes_keylen;\n+\n+\tif (!is_aes)\n+\t\treturn 0;\n+\n+\tswitch (keylen) {\n+\tcase AES_KEYSIZE_128:\n+\t\taes_keylen = 1;\n+\t\tbreak;\n+\tcase AES_KEYSIZE_192:\n+\t\taes_keylen = 2;\n+\t\tbreak;\n+\tcase AES_KEYSIZE_256:\n+\t\taes_keylen = 3;\n+\t\tbreak;\n+\tdefault:\n+\t\tNITROX_LOG(ERR, \"Invalid keylen %zu\\n\", keylen);\n+\t\taes_keylen = -EINVAL;\n+\t\tbreak;\n+\t}\n+\n+\treturn aes_keylen;\n+}\n+\n+static bool\n+crypto_key_is_valid(struct rte_crypto_cipher_xform *xform,\n+\t\t struct flexi_crypto_context *fctx)\n+{\n+\tif (unlikely(xform->key.length > sizeof(fctx->crypto.key))) {\n+\t\tNITROX_LOG(ERR, \"Invalid crypto key length %d\\n\",\n+\t\t\t xform->key.length);\n+\t\treturn false;\n+\t}\n+\n+\treturn true;\n+}\n+\n+static int\n+configure_cipher_ctx(struct rte_crypto_cipher_xform *xform,\n+\t\t struct nitrox_crypto_ctx *ctx)\n+{\n+\tenum flexi_cipher type;\n+\tbool cipher_is_aes = false;\n+\tint aes_keylen;\n+\tstruct flexi_crypto_context *fctx = &ctx->fctx;\n+\n+\ttype = get_flexi_cipher_type(xform->algo, &cipher_is_aes);\n+\tif (unlikely(type == CIPHER_INVALID))\n+\t\treturn -ENOTSUP;\n+\n+\taes_keylen = flexi_aes_keylen(xform->key.length, cipher_is_aes);\n+\tif (unlikely(aes_keylen < 0))\n+\t\treturn -EINVAL;\n+\n+\tif (unlikely(!cipher_is_aes && !crypto_key_is_valid(xform, fctx)))\n+\t\treturn -EINVAL;\n+\n+\tif (unlikely(xform->iv.length > MAX_IV_LEN))\n+\t\treturn -EINVAL;\n+\n+\tfctx->flags = rte_be_to_cpu_64(fctx->flags);\n+\tfctx->w0.cipher_type = type;\n+\tfctx->w0.aes_keylen = aes_keylen;\n+\tfctx->w0.iv_source = IV_FROM_DPTR;\n+\tfctx->flags = rte_cpu_to_be_64(fctx->flags);\n+\tmemset(fctx->crypto.key, 0, sizeof(fctx->crypto.key));\n+\tmemcpy(fctx->crypto.key, xform->key.data, xform->key.length);\n+\n+\tctx->opcode = FLEXI_CRYPTO_ENCRYPT_HMAC;\n+\tctx->req_op = (xform->op == RTE_CRYPTO_CIPHER_OP_ENCRYPT) ?\n+\t\t\tNITROX_OP_ENCRYPT : NITROX_OP_DECRYPT;\n+\tctx->iv.offset = xform->iv.offset;\n+\tctx->iv.length = xform->iv.length;\n+\treturn 0;\n+}\n+\n+static enum flexi_auth\n+get_flexi_auth_type(enum rte_crypto_auth_algorithm algo)\n+{\n+\tenum flexi_auth type;\n+\n+\tswitch (algo) {\n+\tcase RTE_CRYPTO_AUTH_SHA1_HMAC:\n+\t\ttype = AUTH_SHA1;\n+\t\tbreak;\n+\tdefault:\n+\t\tNITROX_LOG(ERR, \"Algorithm not supported %d\\n\", algo);\n+\t\ttype = AUTH_INVALID;\n+\t\tbreak;\n+\t}\n+\n+\treturn type;\n+}\n+\n+static bool\n+auth_key_digest_is_valid(struct rte_crypto_auth_xform *xform,\n+\t\t\t struct flexi_crypto_context *fctx)\n+{\n+\tif (unlikely(!xform->key.data && xform->key.length)) {\n+\t\tNITROX_LOG(ERR, \"Invalid auth key\\n\");\n+\t\treturn false;\n+\t}\n+\n+\tif (unlikely(xform->key.length > sizeof(fctx->auth.opad))) {\n+\t\tNITROX_LOG(ERR, \"Invalid auth key length %d\\n\",\n+\t\t\t xform->key.length);\n+\t\treturn false;\n+\t}\n+\n+\treturn true;\n+}\n+\n+static int\n+configure_auth_ctx(struct rte_crypto_auth_xform *xform,\n+\t\t struct nitrox_crypto_ctx *ctx)\n+{\n+\tenum flexi_auth type;\n+\tstruct flexi_crypto_context *fctx = &ctx->fctx;\n+\n+\ttype = get_flexi_auth_type(xform->algo);\n+\tif (unlikely(type == AUTH_INVALID))\n+\t\treturn -ENOTSUP;\n+\n+\tif (unlikely(!auth_key_digest_is_valid(xform, fctx)))\n+\t\treturn -EINVAL;\n+\n+\tctx->auth_op = xform->op;\n+\tctx->auth_algo = xform->algo;\n+\tctx->digest_length = xform->digest_length;\n+\n+\tfctx->flags = rte_be_to_cpu_64(fctx->flags);\n+\tfctx->w0.hash_type = type;\n+\tfctx->w0.auth_input_type = 1;\n+\tfctx->w0.mac_len = xform->digest_length;\n+\tfctx->flags = rte_cpu_to_be_64(fctx->flags);\n+\tmemset(&fctx->auth, 0, sizeof(fctx->auth));\n+\tmemcpy(fctx->auth.opad, xform->key.data, xform->key.length);\n+\treturn 0;\n+}\n+\n+static int\n+nitrox_sym_dev_sess_configure(struct rte_cryptodev *cdev,\n+\t\t\t struct rte_crypto_sym_xform *xform,\n+\t\t\t struct rte_cryptodev_sym_session *sess,\n+\t\t\t struct rte_mempool *mempool)\n+{\n+\tvoid *mp_obj;\n+\tstruct nitrox_crypto_ctx *ctx;\n+\tstruct rte_crypto_cipher_xform *cipher_xform = NULL;\n+\tstruct rte_crypto_auth_xform *auth_xform = NULL;\n+\n+\tif (rte_mempool_get(mempool, &mp_obj)) {\n+\t\tNITROX_LOG(ERR, \"Couldn't allocate context\\n\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tctx = mp_obj;\n+\tctx->nitrox_chain = get_crypto_chain_order(xform);\n+\tswitch (ctx->nitrox_chain) {\n+\tcase NITROX_CHAIN_CIPHER_AUTH:\n+\t\tcipher_xform = &xform->cipher;\n+\t\tauth_xform = &xform->next->auth;\n+\t\tbreak;\n+\tcase NITROX_CHAIN_AUTH_CIPHER:\n+\t\tauth_xform = &xform->auth;\n+\t\tcipher_xform = &xform->next->cipher;\n+\t\tbreak;\n+\tdefault:\n+\t\tNITROX_LOG(ERR, \"Crypto chain not supported\\n\");\n+\t\tgoto err;\n+\t}\n+\n+\tif (cipher_xform && unlikely(configure_cipher_ctx(cipher_xform, ctx))) {\n+\t\tNITROX_LOG(ERR, \"Failed to configure cipher ctx\\n\");\n+\t\tgoto err;\n+\t}\n+\n+\tif (auth_xform && unlikely(configure_auth_ctx(auth_xform, ctx))) {\n+\t\tNITROX_LOG(ERR, \"Failed to configure auth ctx\\n\");\n+\t\tgoto err;\n+\t}\n+\n+\tctx->iova = rte_mempool_virt2iova(ctx);\n+\tset_sym_session_private_data(sess, cdev->driver_id, ctx);\n+\treturn 0;\n+err:\n+\trte_mempool_put(mempool, mp_obj);\n+\treturn -EINVAL;\n+}\n+\n+static void\n+nitrox_sym_dev_sess_clear(struct rte_cryptodev *cdev,\n+\t\t\t struct rte_cryptodev_sym_session *sess)\n+{\n+\tstruct nitrox_crypto_ctx *ctx = get_sym_session_private_data(sess,\n+\t\t\t\t\t\t\tcdev->driver_id);\n+\tstruct rte_mempool *sess_mp;\n+\n+\tif (!ctx)\n+\t\treturn;\n+\n+\tmemset(ctx, 0, sizeof(*ctx));\n+\tsess_mp = rte_mempool_from_obj(ctx);\n+\tset_sym_session_private_data(sess, cdev->driver_id, NULL);\n+\trte_mempool_put(sess_mp, ctx);\n+}\n+\n static struct rte_cryptodev_ops nitrox_cryptodev_ops = {\n \t.dev_configure\t\t= nitrox_sym_dev_config,\n \t.dev_start\t\t= nitrox_sym_dev_start,\n@@ -217,9 +534,9 @@ static struct rte_cryptodev_ops nitrox_cryptodev_ops = {\n \t.queue_pair_setup\t= nitrox_sym_dev_qp_setup,\n \t.queue_pair_release = nitrox_sym_dev_qp_release,\n \n-\t.sym_session_get_size = NULL,\n-\t.sym_session_configure = NULL,\n-\t.sym_session_clear = NULL\n+\t.sym_session_get_size = nitrox_sym_dev_sess_get_size,\n+\t.sym_session_configure = nitrox_sym_dev_sess_configure,\n+\t.sym_session_clear = nitrox_sym_dev_sess_clear\n };\n \n int\ndiff --git a/drivers/crypto/nitrox/nitrox_sym_ctx.h b/drivers/crypto/nitrox/nitrox_sym_ctx.h\nnew file mode 100644\nindex 000000000..d63c71455\n--- /dev/null\n+++ b/drivers/crypto/nitrox/nitrox_sym_ctx.h\n@@ -0,0 +1,85 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2019 Marvell International Ltd.\n+ */\n+\n+#ifndef _NITROX_SYM_CTX_H_\n+#define _NITROX_SYM_CTX_H_\n+\n+#include <stdbool.h>\n+\n+#include <rte_crypto.h>\n+\n+#define AES_MAX_KEY_SIZE 32\n+#define AES_BLOCK_SIZE 16\n+\n+enum nitrox_chain {\n+\tNITROX_CHAIN_CIPHER_ONLY,\n+\tNITROX_CHAIN_CIPHER_AUTH,\n+\tNITROX_CHAIN_AUTH_CIPHER,\n+\tNITROX_CHAIN_COMBINED,\n+\tNITROX_CHAIN_NOT_SUPPORTED\n+};\n+\n+enum nitrox_op {\n+\tNITROX_OP_ENCRYPT,\n+\tNITROX_OP_DECRYPT,\n+};\n+\n+struct crypto_keys {\n+\tuint8_t key[AES_MAX_KEY_SIZE];\n+\tuint8_t iv[AES_BLOCK_SIZE];\n+};\n+\n+struct auth_keys {\n+\tuint8_t ipad[64];\n+\tuint8_t opad[64];\n+};\n+\n+struct flexi_crypto_context {\n+\tunion {\n+\t\tuint64_t flags;\n+\t\tstruct {\n+#if RTE_BYTE_ORDER == RTE_BIG_ENDIAN\n+\t\t\tuint64_t cipher_type : 4;\n+\t\t\tuint64_t reserved_59 : 1;\n+\t\t\tuint64_t aes_keylen : 2;\n+\t\t\tuint64_t iv_source : 1;\n+\t\t\tuint64_t hash_type : 4;\n+\t\t\tuint64_t reserved_49_51 : 3;\n+\t\t\tuint64_t auth_input_type : 1;\n+\t\t\tuint64_t mac_len : 8;\n+\t\t\tuint64_t reserved_0_39 : 40;\n+#else\n+\t\t\tuint64_t reserved_0_39 : 40;\n+\t\t\tuint64_t mac_len : 8;\n+\t\t\tuint64_t auth_input_type : 1;\n+\t\t\tuint64_t reserved_49_51 : 3;\n+\t\t\tuint64_t hash_type : 4;\n+\t\t\tuint64_t iv_source : 1;\n+\t\t\tuint64_t aes_keylen : 2;\n+\t\t\tuint64_t reserved_59 : 1;\n+\t\t\tuint64_t cipher_type : 4;\n+#endif\n+\t\t} w0;\n+\t};\n+\n+\tstruct crypto_keys crypto;\n+\tstruct auth_keys auth;\n+};\n+\n+struct nitrox_crypto_ctx {\n+\tstruct flexi_crypto_context fctx;\n+\tenum nitrox_chain nitrox_chain;\n+\tenum rte_crypto_auth_operation auth_op;\n+\tenum rte_crypto_auth_algorithm auth_algo;\n+\tstruct {\n+\t\tuint16_t offset;\n+\t\tuint16_t length;\n+\t} iv;\n+\trte_iova_t iova;\n+\tuint16_t digest_length;\n+\tuint8_t opcode;\n+\tuint8_t req_op;\n+};\n+\n+#endif /* _NITROX_SYM_CTX_H_ */\n", "prefixes": [ "07/10" ] }