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GET /api/patches/5589/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 5589,
    "url": "https://patches.dpdk.org/api/patches/5589/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1434712103-7500-3-git-send-email-roman.dementiev@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1434712103-7500-3-git-send-email-roman.dementiev@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1434712103-7500-3-git-send-email-roman.dementiev@intel.com",
    "date": "2015-06-19T11:08:22",
    "name": "[dpdk-dev,v3,2/3] rwlock: add support for HTM lock elision for x86",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "57975e80fdb394ac165a199fb7bfbbd21f94fb24",
    "submitter": {
        "id": 255,
        "url": "https://patches.dpdk.org/api/people/255/?format=api",
        "name": "Roman Dementiev",
        "email": "roman.dementiev@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1434712103-7500-3-git-send-email-roman.dementiev@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/5589/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/5589/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 5EE07C7EA;\n\tFri, 19 Jun 2015 13:08:49 +0200 (CEST)",
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 9F6E5C812\n\tfor <dev@dpdk.org>; Fri, 19 Jun 2015 13:08:44 +0200 (CEST)",
            "from fmsmga001.fm.intel.com ([10.253.24.23])\n\tby orsmga102.jf.intel.com with ESMTP; 19 Jun 2015 04:08:43 -0700",
            "from walterge-mobl1.ger.corp.intel.com (HELO localhost)\n\t([10.252.32.109])\n\tby fmsmga001.fm.intel.com with ESMTP; 19 Jun 2015 04:08:42 -0700"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.13,643,1427785200\"; d=\"scan'208\";a=\"730583457\"",
        "From": "Roman Dementiev <roman.dementiev@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Fri, 19 Jun 2015 13:08:22 +0200",
        "Message-Id": "<1434712103-7500-3-git-send-email-roman.dementiev@intel.com>",
        "X-Mailer": "git-send-email 1.9.5.msysgit.0",
        "In-Reply-To": "<1434712103-7500-1-git-send-email-roman.dementiev@intel.com>",
        "References": "<1434475006-13732-1-git-send-email-roman.dementiev@intel.com>\n\t<1434712103-7500-1-git-send-email-roman.dementiev@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v3 2/3] rwlock: add support for HTM lock elision\n\tfor x86",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "This patch adds methods that use hardware memory transactions (HTM) on\nfast-path for rwlock (a.k.a. lock elision). Here the methods are implemented\nfor x86 using Restricted Transactional Memory instructions (Intel(r)\nTransactional Synchronization Extensions). The implementation fall-backs to\nthe normal rwlock if HTM is not available or memory transactions fail. This is\nnot a replacement for all rwlock usages since not all critical sections\nprotected by locks are friendly to HTM. For example, an attempt to perform\na HW I/O operation inside a hardware memory transaction always aborts\nthe transaction since the CPU is not able to roll-back should the transaction\nfail. Therefore, hardware transactional locks are not advised to be used around\nrte_eth_rx_burst() and rte_eth_tx_burst() calls.\n\nSigned-off-by: Roman Dementiev <roman.dementiev@intel.com>\nAcked-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n lib/librte_eal/common/Makefile                     |   4 +-\n .../common/include/arch/ppc_64/rte_rwlock.h        |  38 ++++\n .../common/include/arch/x86/rte_rwlock.h           |  82 ++++++++\n lib/librte_eal/common/include/generic/rte_rwlock.h | 208 +++++++++++++++++++++\n lib/librte_eal/common/include/rte_rwlock.h         | 158 ----------------\n 5 files changed, 330 insertions(+), 160 deletions(-)\n create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_rwlock.h\n create mode 100644 lib/librte_eal/common/include/arch/x86/rte_rwlock.h\n create mode 100644 lib/librte_eal/common/include/generic/rte_rwlock.h\n delete mode 100644 lib/librte_eal/common/include/rte_rwlock.h",
    "diff": "diff --git a/lib/librte_eal/common/Makefile b/lib/librte_eal/common/Makefile\nindex 3ea3bbf..38772d4 100644\n--- a/lib/librte_eal/common/Makefile\n+++ b/lib/librte_eal/common/Makefile\n@@ -35,7 +35,7 @@ INC := rte_branch_prediction.h rte_common.h\n INC += rte_debug.h rte_eal.h rte_errno.h rte_launch.h rte_lcore.h\n INC += rte_log.h rte_memory.h rte_memzone.h rte_pci.h\n INC += rte_pci_dev_ids.h rte_per_lcore.h rte_random.h\n-INC += rte_rwlock.h rte_tailq.h rte_interrupts.h rte_alarm.h\n+INC += rte_tailq.h rte_interrupts.h rte_alarm.h\n INC += rte_string_fns.h rte_version.h\n INC += rte_eal_memconfig.h rte_malloc_heap.h\n INC += rte_hexdump.h rte_devargs.h rte_dev.h\n@@ -46,7 +46,7 @@ INC += rte_warnings.h\n endif\n \n GENERIC_INC := rte_atomic.h rte_byteorder.h rte_cycles.h rte_prefetch.h\n-GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h\n+GENERIC_INC += rte_spinlock.h rte_memcpy.h rte_cpuflags.h rte_rwlock.h\n # defined in mk/arch/$(RTE_ARCH)/rte.vars.mk\n ARCH_DIR ?= $(RTE_ARCH)\n ARCH_INC := $(notdir $(wildcard $(RTE_SDK)/lib/librte_eal/common/include/arch/$(ARCH_DIR)/*.h))\ndiff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_rwlock.h b/lib/librte_eal/common/include/arch/ppc_64/rte_rwlock.h\nnew file mode 100644\nindex 0000000..de8af19\n--- /dev/null\n+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_rwlock.h\n@@ -0,0 +1,38 @@\n+#ifndef _RTE_RWLOCK_PPC_64_H_\n+#define _RTE_RWLOCK_PPC_64_H_\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include \"generic/rte_rwlock.h\"\n+\n+static inline void\n+rte_rwlock_read_lock_tm(rte_rwlock_t *rwl)\n+{\n+\trte_rwlock_read_lock(rwl);\n+}\n+\n+static inline void\n+rte_rwlock_read_unlock_tm(rte_rwlock_t *rwl)\n+{\n+\trte_rwlock_read_unlock(rwl);\n+}\n+\n+static inline void\n+rte_rwlock_write_lock_tm(rte_rwlock_t *rwl)\n+{\n+\trte_rwlock_write_lock(rwl);\n+}\n+\n+static inline void\n+rte_rwlock_write_unlock_tm(rte_rwlock_t *rwl)\n+{\n+\trte_rwlock_write_unlock(rwl);\n+}\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_RWLOCK_PPC_64_H_ */\ndiff --git a/lib/librte_eal/common/include/arch/x86/rte_rwlock.h b/lib/librte_eal/common/include/arch/x86/rte_rwlock.h\nnew file mode 100644\nindex 0000000..afd1c3c\n--- /dev/null\n+++ b/lib/librte_eal/common/include/arch/x86/rte_rwlock.h\n@@ -0,0 +1,82 @@\n+/*-\n+ *   BSD LICENSE\n+ *\n+ *   Copyright(c) 2015 Intel Corporation. All rights reserved.\n+ *   All rights reserved.\n+ *\n+ *   Redistribution and use in source and binary forms, with or without\n+ *   modification, are permitted provided that the following conditions\n+ *   are met:\n+ *\n+ *     * Redistributions of source code must retain the above copyright\n+ *       notice, this list of conditions and the following disclaimer.\n+ *     * Redistributions in binary form must reproduce the above copyright\n+ *       notice, this list of conditions and the following disclaimer in\n+ *       the documentation and/or other materials provided with the\n+ *       distribution.\n+ *     * Neither the name of Intel Corporation nor the names of its\n+ *       contributors may be used to endorse or promote products derived\n+ *       from this software without specific prior written permission.\n+ *\n+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ *   \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef _RTE_RWLOCK_X86_64_H_\n+#define _RTE_RWLOCK_X86_64_H_\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include \"generic/rte_rwlock.h\"\n+#include \"rte_spinlock.h\"\n+\n+static inline void\n+rte_rwlock_read_lock_tm(rte_rwlock_t *rwl)\n+{\n+\tif (likely(rte_try_tm(&rwl->cnt)))\n+\t\treturn;\n+\trte_rwlock_read_lock(rwl);\n+}\n+\n+static inline void\n+rte_rwlock_read_unlock_tm(rte_rwlock_t *rwl)\n+{\n+\tif (unlikely(rwl->cnt))\n+\t\trte_rwlock_read_unlock(rwl);\n+\telse\n+\t\trte_xend();\n+}\n+\n+static inline void\n+rte_rwlock_write_lock_tm(rte_rwlock_t *rwl)\n+{\n+\tif (likely(rte_try_tm(&rwl->cnt)))\n+\t\treturn;\n+\trte_rwlock_write_lock(rwl);\n+}\n+\n+static inline void\n+rte_rwlock_write_unlock_tm(rte_rwlock_t *rwl)\n+{\n+\tif (unlikely(rwl->cnt))\n+\t\trte_rwlock_write_unlock(rwl);\n+\telse\n+\t\trte_xend();\n+}\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_RWLOCK_X86_64_H_ */\ndiff --git a/lib/librte_eal/common/include/generic/rte_rwlock.h b/lib/librte_eal/common/include/generic/rte_rwlock.h\nnew file mode 100644\nindex 0000000..7a0fdc5\n--- /dev/null\n+++ b/lib/librte_eal/common/include/generic/rte_rwlock.h\n@@ -0,0 +1,208 @@\n+/*-\n+ *   BSD LICENSE\n+ *\n+ *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.\n+ *   All rights reserved.\n+ *\n+ *   Redistribution and use in source and binary forms, with or without\n+ *   modification, are permitted provided that the following conditions\n+ *   are met:\n+ *\n+ *     * Redistributions of source code must retain the above copyright\n+ *       notice, this list of conditions and the following disclaimer.\n+ *     * Redistributions in binary form must reproduce the above copyright\n+ *       notice, this list of conditions and the following disclaimer in\n+ *       the documentation and/or other materials provided with the\n+ *       distribution.\n+ *     * Neither the name of Intel Corporation nor the names of its\n+ *       contributors may be used to endorse or promote products derived\n+ *       from this software without specific prior written permission.\n+ *\n+ *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ *   \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#ifndef _RTE_RWLOCK_H_\n+#define _RTE_RWLOCK_H_\n+\n+/**\n+ * @file\n+ *\n+ * RTE Read-Write Locks\n+ *\n+ * This file defines an API for read-write locks. The lock is used to\n+ * protect data that allows multiple readers in parallel, but only\n+ * one writer. All readers are blocked until the writer is finished\n+ * writing.\n+ *\n+ */\n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+#include <rte_common.h>\n+#include <rte_atomic.h>\n+\n+/**\n+ * The rte_rwlock_t type.\n+ *\n+ * cnt is -1 when write lock is held, and > 0 when read locks are held.\n+ */\n+typedef struct {\n+\tvolatile int32_t cnt; /**< -1 when W lock held, > 0 when R locks held. */\n+} rte_rwlock_t;\n+\n+/**\n+ * A static rwlock initializer.\n+ */\n+#define RTE_RWLOCK_INITIALIZER { 0 }\n+\n+/**\n+ * Initialize the rwlock to an unlocked state.\n+ *\n+ * @param rwl\n+ *   A pointer to the rwlock structure.\n+ */\n+static inline void\n+rte_rwlock_init(rte_rwlock_t *rwl)\n+{\n+\trwl->cnt = 0;\n+}\n+\n+/**\n+ * Take a read lock. Loop until the lock is held.\n+ *\n+ * @param rwl\n+ *   A pointer to a rwlock structure.\n+ */\n+static inline void\n+rte_rwlock_read_lock(rte_rwlock_t *rwl)\n+{\n+\tint32_t x;\n+\tint success = 0;\n+\n+\twhile (success == 0) {\n+\t\tx = rwl->cnt;\n+\t\t/* write lock is held */\n+\t\tif (x < 0) {\n+\t\t\trte_pause();\n+\t\t\tcontinue;\n+\t\t}\n+\t\tsuccess = rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt,\n+\t\t\t\t\t      x, x + 1);\n+\t}\n+}\n+\n+/**\n+ * Release a read lock.\n+ *\n+ * @param rwl\n+ *   A pointer to the rwlock structure.\n+ */\n+static inline void\n+rte_rwlock_read_unlock(rte_rwlock_t *rwl)\n+{\n+\trte_atomic32_dec((rte_atomic32_t *)(intptr_t)&rwl->cnt);\n+}\n+\n+/**\n+ * Take a write lock. Loop until the lock is held.\n+ *\n+ * @param rwl\n+ *   A pointer to a rwlock structure.\n+ */\n+static inline void\n+rte_rwlock_write_lock(rte_rwlock_t *rwl)\n+{\n+\tint32_t x;\n+\tint success = 0;\n+\n+\twhile (success == 0) {\n+\t\tx = rwl->cnt;\n+\t\t/* a lock is held */\n+\t\tif (x != 0) {\n+\t\t\trte_pause();\n+\t\t\tcontinue;\n+\t\t}\n+\t\tsuccess = rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt,\n+\t\t\t\t\t      0, -1);\n+\t}\n+}\n+\n+/**\n+ * Release a write lock.\n+ *\n+ * @param rwl\n+ *   A pointer to a rwlock structure.\n+ */\n+static inline void\n+rte_rwlock_write_unlock(rte_rwlock_t *rwl)\n+{\n+\trte_atomic32_inc((rte_atomic32_t *)(intptr_t)&rwl->cnt);\n+}\n+\n+/**\n+ * Try to execute critical section in a hardware memory transaction, if it\n+ * fails or not available take a read lock\n+ *\n+ * NOTE: An attempt to perform a HW I/O operation inside a hardware memory\n+ * transaction always aborts the transaction since the CPU is not able to\n+ * roll-back should the transaction fail. Therefore, hardware transactional\n+ * locks are not advised to be used around rte_eth_rx_burst() and\n+ * rte_eth_tx_burst() calls.\n+ *\n+ * @param rwl\n+ *   A pointer to a rwlock structure.\n+ */\n+static inline void\n+rte_rwlock_read_lock_tm(rte_rwlock_t *rwl);\n+\n+/**\n+ * Commit hardware memory transaction or release the read lock if the lock is used as a fall-back\n+ *\n+ * @param rwl\n+ *   A pointer to the rwlock structure.\n+ */\n+static inline void\n+rte_rwlock_read_unlock_tm(rte_rwlock_t *rwl);\n+\n+/**\n+ * Try to execute critical section in a hardware memory transaction, if it\n+ * fails or not available take a write lock\n+ *\n+ * NOTE: An attempt to perform a HW I/O operation inside a hardware memory\n+ * transaction always aborts the transaction since the CPU is not able to\n+ * roll-back should the transaction fail. Therefore, hardware transactional\n+ * locks are not advised to be used around rte_eth_rx_burst() and\n+ * rte_eth_tx_burst() calls.\n+ *\n+ * @param rwl\n+ *   A pointer to a rwlock structure.\n+ */\n+static inline void\n+rte_rwlock_write_lock_tm(rte_rwlock_t *rwl);\n+\n+/**\n+ * Commit hardware memory transaction or release the write lock if the lock is used as a fall-back\n+ *\n+ * @param rwl\n+ *   A pointer to a rwlock structure.\n+ */\n+static inline void\n+rte_rwlock_write_unlock_tm(rte_rwlock_t *rwl);\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+#endif /* _RTE_RWLOCK_H_ */\ndiff --git a/lib/librte_eal/common/include/rte_rwlock.h b/lib/librte_eal/common/include/rte_rwlock.h\ndeleted file mode 100644\nindex 115731d..0000000\n--- a/lib/librte_eal/common/include/rte_rwlock.h\n+++ /dev/null\n@@ -1,158 +0,0 @@\n-/*-\n- *   BSD LICENSE\n- *\n- *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.\n- *   All rights reserved.\n- *\n- *   Redistribution and use in source and binary forms, with or without\n- *   modification, are permitted provided that the following conditions\n- *   are met:\n- *\n- *     * Redistributions of source code must retain the above copyright\n- *       notice, this list of conditions and the following disclaimer.\n- *     * Redistributions in binary form must reproduce the above copyright\n- *       notice, this list of conditions and the following disclaimer in\n- *       the documentation and/or other materials provided with the\n- *       distribution.\n- *     * Neither the name of Intel Corporation nor the names of its\n- *       contributors may be used to endorse or promote products derived\n- *       from this software without specific prior written permission.\n- *\n- *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- *   \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n- *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n- *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n- *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n- *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n- *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n- *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n- *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n- *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n- */\n-\n-#ifndef _RTE_RWLOCK_H_\n-#define _RTE_RWLOCK_H_\n-\n-/**\n- * @file\n- *\n- * RTE Read-Write Locks\n- *\n- * This file defines an API for read-write locks. The lock is used to\n- * protect data that allows multiple readers in parallel, but only\n- * one writer. All readers are blocked until the writer is finished\n- * writing.\n- *\n- */\n-\n-#ifdef __cplusplus\n-extern \"C\" {\n-#endif\n-\n-#include <rte_common.h>\n-#include <rte_atomic.h>\n-\n-/**\n- * The rte_rwlock_t type.\n- *\n- * cnt is -1 when write lock is held, and > 0 when read locks are held.\n- */\n-typedef struct {\n-\tvolatile int32_t cnt; /**< -1 when W lock held, > 0 when R locks held. */\n-} rte_rwlock_t;\n-\n-/**\n- * A static rwlock initializer.\n- */\n-#define RTE_RWLOCK_INITIALIZER { 0 }\n-\n-/**\n- * Initialize the rwlock to an unlocked state.\n- *\n- * @param rwl\n- *   A pointer to the rwlock structure.\n- */\n-static inline void\n-rte_rwlock_init(rte_rwlock_t *rwl)\n-{\n-\trwl->cnt = 0;\n-}\n-\n-/**\n- * Take a read lock. Loop until the lock is held.\n- *\n- * @param rwl\n- *   A pointer to a rwlock structure.\n- */\n-static inline void\n-rte_rwlock_read_lock(rte_rwlock_t *rwl)\n-{\n-\tint32_t x;\n-\tint success = 0;\n-\n-\twhile (success == 0) {\n-\t\tx = rwl->cnt;\n-\t\t/* write lock is held */\n-\t\tif (x < 0) {\n-\t\t\trte_pause();\n-\t\t\tcontinue;\n-\t\t}\n-\t\tsuccess = rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt,\n-\t\t\t\t\t      x, x + 1);\n-\t}\n-}\n-\n-/**\n- * Release a read lock.\n- *\n- * @param rwl\n- *   A pointer to the rwlock structure.\n- */\n-static inline void\n-rte_rwlock_read_unlock(rte_rwlock_t *rwl)\n-{\n-\trte_atomic32_dec((rte_atomic32_t *)(intptr_t)&rwl->cnt);\n-}\n-\n-/**\n- * Take a write lock. Loop until the lock is held.\n- *\n- * @param rwl\n- *   A pointer to a rwlock structure.\n- */\n-static inline void\n-rte_rwlock_write_lock(rte_rwlock_t *rwl)\n-{\n-\tint32_t x;\n-\tint success = 0;\n-\n-\twhile (success == 0) {\n-\t\tx = rwl->cnt;\n-\t\t/* a lock is held */\n-\t\tif (x != 0) {\n-\t\t\trte_pause();\n-\t\t\tcontinue;\n-\t\t}\n-\t\tsuccess = rte_atomic32_cmpset((volatile uint32_t *)&rwl->cnt,\n-\t\t\t\t\t      0, -1);\n-\t}\n-}\n-\n-/**\n- * Release a write lock.\n- *\n- * @param rwl\n- *   A pointer to a rwlock structure.\n- */\n-static inline void\n-rte_rwlock_write_unlock(rte_rwlock_t *rwl)\n-{\n-\trte_atomic32_inc((rte_atomic32_t *)(intptr_t)&rwl->cnt);\n-}\n-\n-#ifdef __cplusplus\n-}\n-#endif\n-\n-#endif /* _RTE_RWLOCK_H_ */\n",
    "prefixes": [
        "dpdk-dev",
        "v3",
        "2/3"
    ]
}