get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/50847/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 50847,
    "url": "https://patches.dpdk.org/api/patches/50847/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190306041634.12976-5-anand.rawat@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20190306041634.12976-5-anand.rawat@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20190306041634.12976-5-anand.rawat@intel.com",
    "date": "2019-03-06T04:16:32",
    "name": "[v2,4/6] eal: add minimum viable code for eal on windows",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "911793d69ce3a007c5ca95cea5dff6e757bfa457",
    "submitter": {
        "id": 1231,
        "url": "https://patches.dpdk.org/api/people/1231/?format=api",
        "name": "Anand Rawat",
        "email": "anand.rawat@intel.com"
    },
    "delegate": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190306041634.12976-5-anand.rawat@intel.com/mbox/",
    "series": [
        {
            "id": 3639,
            "url": "https://patches.dpdk.org/api/series/3639/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=3639",
            "date": "2019-03-06T04:16:28",
            "name": "HelloWorld example for windows",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/3639/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/50847/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/50847/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 49E304D3A;\n\tWed,  6 Mar 2019 05:16:43 +0100 (CET)",
            "from mga18.intel.com (mga18.intel.com [134.134.136.126])\n\tby dpdk.org (Postfix) with ESMTP id C36294C94\n\tfor <dev@dpdk.org>; Wed,  6 Mar 2019 05:16:37 +0100 (CET)",
            "from orsmga005.jf.intel.com ([10.7.209.41])\n\tby orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t05 Mar 2019 20:16:35 -0800",
            "from anandraw-devbx.amr.corp.intel.com ([10.19.242.57])\n\tby orsmga005.jf.intel.com with ESMTP; 05 Mar 2019 20:16:35 -0800"
        ],
        "X-Amp-Result": "SKIPPED(no attachment in message)",
        "X-Amp-File-Uploaded": "False",
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.58,446,1544515200\"; d=\"scan'208\";a=\"304752074\"",
        "From": "Anand Rawat <anand.rawat@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "pallavi.kadam@intel.com, ranjit.menon@intel.com, jeffrey.b.shaw@intel.com,\n\tthomas@monjalon.net",
        "Date": "Tue,  5 Mar 2019 20:16:32 -0800",
        "Message-Id": "<20190306041634.12976-5-anand.rawat@intel.com>",
        "X-Mailer": "git-send-email 2.17.1.windows.2",
        "In-Reply-To": "<20190306041634.12976-1-anand.rawat@intel.com>",
        "References": "<20190306041634.12976-1-anand.rawat@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v2 4/6] eal: add minimum viable code for eal on\n\twindows",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "Add windows specific logic for eal.c, eal_lcore.c,\neal_debug.c and eal_thread.c. Update meson logic to build\neal on windows.\n\nSigned-off-by: Anand Rawat <anand.rawat@intel.com>\nSigned-off-by: Pallavi Kadam <pallavi.kadam@intel.com>\nReviewed-by: Jeff Shaw <jeffrey.b.shaw@intel.com>\nReviewed-by: Ranjit Menon <ranjit.menon@intel.com>\n---\n lib/librte_eal/common/meson.build             |  94 +++++------\n lib/librte_eal/windows/eal/eal.c              |  70 ++++++++-\n lib/librte_eal/windows/eal/eal_debug.c        |  12 +-\n lib/librte_eal/windows/eal/eal_lcore.c        |  97 ++++++++++--\n lib/librte_eal/windows/eal/eal_thread.c       | 146 +++++++++++++++++-\n .../windows/eal/include/exec-env/regex.h      |   2 +\n .../eal/include/exec-env/rte_windows.h        |  24 +++\n 7 files changed, 379 insertions(+), 66 deletions(-)",
    "diff": "diff --git a/lib/librte_eal/common/meson.build b/lib/librte_eal/common/meson.build\nindex c010e8737..759516e2a 100644\n--- a/lib/librte_eal/common/meson.build\n+++ b/lib/librte_eal/common/meson.build\n@@ -5,8 +5,14 @@ eal_inc += include_directories('.', 'include',\n \t\tjoin_paths('include/arch', arch_subdir))\n \n common_objs = []\n-common_sources = []\n common_headers = []\n+\n+common_sources = files(\n+\t\t'eal_common_errno.c',\n+\t\t'eal_common_launch.c',\n+\t\t'eal_common_lcore.c',\n+\t\t'eal_common_log.c'\n+\t)\n if host_machine.system() != 'windows'\n \tcommon_sources = files(\n \t\t'eal_common_bus.c',\n@@ -14,13 +20,9 @@ if host_machine.system() != 'windows'\n \t\t'eal_common_class.c',\n \t\t'eal_common_devargs.c',\n \t\t'eal_common_dev.c',\n-\t\t'eal_common_errno.c',\n \t\t'eal_common_fbarray.c',\n \t\t'eal_common_hexdump.c',\n \t\t'eal_common_hypervisor.c',\n-\t\t'eal_common_launch.c',\n-\t\t'eal_common_lcore.c',\n-\t\t'eal_common_log.c',\n \t\t'eal_common_memalloc.c',\n \t\t'eal_common_memory.c',\n \t\t'eal_common_memzone.c',\n@@ -47,7 +49,22 @@ endif\n eal_common_arch_sources = []\n eal_common_arch_objs = []\n \n-common_headers += files('include/rte_common.h')\n+common_headers += files(\n+\t\t'include/rte_branch_prediction.h',\n+\t\t'include/rte_bus.h',\n+\t\t'include/rte_common.h',\n+\t\t'include/rte_debug.h',\n+\t\t'include/rte_dev.h',\n+\t\t'include/rte_eal.h',\n+\t\t'include/rte_errno.h',\n+\t\t'include/rte_launch.h',\n+\t\t'include/rte_lcore.h',\n+\t\t'include/rte_log.h',\n+\t\t'include/rte_memory.h',\n+\t\t'include/rte_pci_dev_feature_defs.h',\n+\t\t'include/rte_per_lcore.h',\n+\t\t'include/rte_string_fns.h'\n+\t)\n if host_machine.system() != 'windows'\n \tsubdir(join_paths('arch', arch_subdir))\n endif\n@@ -55,45 +72,32 @@ common_sources += eal_common_arch_sources\n common_objs += eal_common_arch_objs\n \n common_headers += files(\n-\t'include/rte_alarm.h',\n-\t'include/rte_branch_prediction.h',\n-\t'include/rte_bus.h',\n-\t'include/rte_bitmap.h',\n-\t'include/rte_class.h',\n-\t'include/rte_compat.h',\n-\t'include/rte_debug.h',\n-\t'include/rte_devargs.h',\n-\t'include/rte_dev.h',\n-\t'include/rte_eal.h',\n-\t'include/rte_eal_memconfig.h',\n-\t'include/rte_eal_interrupts.h',\n-\t'include/rte_errno.h',\n-\t'include/rte_fbarray.h',\n-\t'include/rte_hexdump.h',\n-\t'include/rte_hypervisor.h',\n-\t'include/rte_interrupts.h',\n-\t'include/rte_keepalive.h',\n-\t'include/rte_launch.h',\n-\t'include/rte_lcore.h',\n-\t'include/rte_log.h',\n-\t'include/rte_malloc.h',\n-\t'include/rte_malloc_heap.h',\n-\t'include/rte_memory.h',\n-\t'include/rte_memzone.h',\n-\t'include/rte_option.h',\n-\t'include/rte_pci_dev_feature_defs.h',\n-\t'include/rte_pci_dev_features.h',\n-\t'include/rte_per_lcore.h',\n-\t'include/rte_random.h',\n-\t'include/rte_reciprocal.h',\n-\t'include/rte_service.h',\n-\t'include/rte_service_component.h',\n-\t'include/rte_string_fns.h',\n-\t'include/rte_tailq.h',\n-\t'include/rte_time.h',\n-\t'include/rte_uuid.h',\n-\t'include/rte_version.h'\n-)\n+\t\t'include/rte_alarm.h',\n+\t\t'include/rte_bitmap.h',\n+\t\t'include/rte_class.h',\n+\t\t'include/rte_compat.h',\n+\t\t'include/rte_devargs.h',\n+\t\t'include/rte_eal_memconfig.h',\n+\t\t'include/rte_eal_interrupts.h',\n+\t\t'include/rte_fbarray.h',\n+\t\t'include/rte_hexdump.h',\n+\t\t'include/rte_hypervisor.h',\n+\t\t'include/rte_interrupts.h',\n+\t\t'include/rte_keepalive.h',\n+\t\t'include/rte_malloc.h',\n+\t\t'include/rte_malloc_heap.h',\n+\t\t'include/rte_memzone.h',\n+\t\t'include/rte_option.h',\n+\t\t'include/rte_pci_dev_features.h',\n+\t\t'include/rte_random.h',\n+\t\t'include/rte_reciprocal.h',\n+\t\t'include/rte_service.h',\n+\t\t'include/rte_service_component.h',\n+\t\t'include/rte_tailq.h',\n+\t\t'include/rte_time.h',\n+\t\t'include/rte_uuid.h',\n+\t\t'include/rte_version.h'\n+\t)\n \n # special case install the generic headers, since they go in a subdir\n generic_headers = files(\ndiff --git a/lib/librte_eal/windows/eal/eal.c b/lib/librte_eal/windows/eal/eal.c\nindex 134452a77..1c6923e20 100644\n--- a/lib/librte_eal/windows/eal/eal.c\n+++ b/lib/librte_eal/windows/eal/eal.c\n@@ -2,10 +2,78 @@\n  * Copyright(c) 2019 Intel Corporation\n  */\n \n-#include \"rte_common.h\"\n+#include <io.h>\n+#include <fcntl.h>\n+#include <rte_debug.h>\n+#include <rte_eal.h>\n+#include <rte_errno.h>\n+#include <rte_lcore.h>\n+#include <eal_thread.h>\n+#include <eal_private.h>\n+\n+static struct rte_config rte_config;\n+struct lcore_config lcore_config[RTE_MAX_LCORE];\n+\n+struct rte_config *\n+rte_eal_get_configuration(void)\n+{\n+\treturn &rte_config;\n+}\n+\n+static int\n+sync_func(void *arg __rte_unused)\n+{\n+\treturn 0;\n+}\n+\n+static void\n+rte_eal_init_alert(const char *msg)\n+{\n+\tfprintf(stderr, \"EAL: FATAL: %s\\n\", msg);\n+\tRTE_LOG(ERR, EAL, \"%s\\n\", msg);\n+}\n \n int\n rte_eal_init(int argc __rte_unused, char **argv __rte_unused)\n {\n+\tint i;\n+\n+\t/* create a map of all processors in the system */\n+\teal_create_cpu_map();\n+\n+\tif (rte_eal_cpu_init() < 0) {\n+\t\trte_eal_init_alert(\"Cannot detect lcores.\");\n+\t\trte_errno = ENOTSUP;\n+\t\treturn -1;\n+\t}\n+\n+\teal_thread_init_master(rte_config.master_lcore);\n+\n+\tRTE_LCORE_FOREACH_SLAVE(i) {\n+\n+\t\t/*\n+\t\t * create communication pipes between master thread\n+\t\t * and children\n+\t\t */\n+\t\tif (_pipe(lcore_config[i].pipe_master2slave,\n+\t\t\tsizeof(char), _O_BINARY) < 0)\n+\t\t\trte_panic(\"Cannot create pipe\\n\");\n+\t\tif (_pipe(lcore_config[i].pipe_slave2master,\n+\t\t\tsizeof(char), _O_BINARY) < 0)\n+\t\t\trte_panic(\"Cannot create pipe\\n\");\n+\n+\t\tlcore_config[i].state = WAIT;\n+\n+\t\t/* create a thread for each lcore */\n+\t\tif (eal_thread_create(&lcore_config[i].thread_id) != 0)\n+\t\t\trte_panic(\"Cannot create thread\\n\");\n+\t}\n+\n+\t/*\n+\t * Launch a dummy function on all slave lcores, so that master lcore\n+\t * knows they are all ready when this function returns.\n+\t */\n+\trte_eal_mp_remote_launch(sync_func, NULL, SKIP_MASTER);\n+\trte_eal_mp_wait_lcore();\n \treturn 0;\n }\ndiff --git a/lib/librte_eal/windows/eal/eal_debug.c b/lib/librte_eal/windows/eal/eal_debug.c\nindex 012eeccfa..72e5cb97e 100644\n--- a/lib/librte_eal/windows/eal/eal_debug.c\n+++ b/lib/librte_eal/windows/eal/eal_debug.c\n@@ -2,11 +2,17 @@\n  * Copyright(c) 2019 Intel Corporation\n  */\n \n-#include \"rte_common.h\"\n+#include <stdarg.h>\n+#include <rte_log.h>\n \n void\n-__rte_panic(const char *funcname __rte_unused,\n-\t\tconst char *format __rte_unused, ...)\n+__rte_panic(const char *funcname, const char *format, ...)\n {\n+\tva_list ap;\n+\n+\trte_log(RTE_LOG_CRIT, RTE_LOGTYPE_EAL, \"PANIC in %s():\\n\", funcname);\n+\tva_start(ap, format);\n+\trte_vlog(RTE_LOG_CRIT, RTE_LOGTYPE_EAL, format, ap);\n+\tva_end(ap);\n \tabort();\n }\ndiff --git a/lib/librte_eal/windows/eal/eal_lcore.c b/lib/librte_eal/windows/eal/eal_lcore.c\nindex be7adeb18..7d73c9358 100644\n--- a/lib/librte_eal/windows/eal/eal_lcore.c\n+++ b/lib/librte_eal/windows/eal/eal_lcore.c\n@@ -2,25 +2,98 @@\n  * Copyright(c) 2019 Intel Corporation\n  */\n \n-#include \"rte_common.h\"\n+#include <stdint.h>\n+#include <rte_windows.h>\n \n- /* Get the cpu core id value */\n-unsigned int\n-eal_cpu_core_id(unsigned int lcore_id)\n+/* global data structure that contains the CPU map */\n+static struct _wcpu_map {\n+\tunsigned int total_procs;\n+\tunsigned int proc_sockets;\n+\tunsigned int proc_cores;\n+\tunsigned int reserved;\n+\tstruct _win_lcore_map {\n+\t\tuint8_t socket_id;\n+\t\tuint8_t core_id;\n+\t} wlcore_map[RTE_MAX_LCORE];\n+} wcpu_map = { 0 };\n+\n+/*\n+ * Create a map of all processors and associated cores on the system\n+ */\n+void\n+eal_create_cpu_map()\n {\n-\treturn lcore_id;\n+\twcpu_map.total_procs =\n+\t\tGetActiveProcessorCount(ALL_PROCESSOR_GROUPS);\n+\n+\tLOGICAL_PROCESSOR_RELATIONSHIP lprocRel;\n+\tDWORD lprocInfoSize = 0;\n+\tBOOL ht_enabled = FALSE;\n+\n+\t/* First get the processor package information */\n+\tlprocRel = RelationProcessorPackage;\n+\t/* Determine the size of buffer we need (pass NULL) */\n+\tGetLogicalProcessorInformationEx(lprocRel, NULL, &lprocInfoSize);\n+\twcpu_map.proc_sockets = lprocInfoSize / 48;\n+\n+\tlprocInfoSize = 0;\n+\t/* Next get the processor core information */\n+\tlprocRel = RelationProcessorCore;\n+\tGetLogicalProcessorInformationEx(lprocRel, NULL, &lprocInfoSize);\n+\twcpu_map.proc_cores = lprocInfoSize / 48;\n+\n+\tif (wcpu_map.total_procs > wcpu_map.proc_cores)\n+\t\tht_enabled = TRUE;\n+\n+\t/* Distribute the socket and core ids appropriately\n+\t * across the logical cores. For now, split the cores\n+\t * equally across the sockets.\n+\t */\n+\tunsigned int lcore = 0;\n+\tfor (unsigned int socket = 0; socket <\n+\t\t\twcpu_map.proc_sockets; ++socket) {\n+\t\tfor (unsigned int core = 0;\n+\t\t\tcore < (wcpu_map.proc_cores / wcpu_map.proc_sockets);\n+\t\t\t++core) {\n+\t\t\twcpu_map.wlcore_map[lcore]\n+\t\t\t\t\t.socket_id = socket;\n+\t\t\twcpu_map.wlcore_map[lcore]\n+\t\t\t\t\t.core_id = core;\n+\t\t\tlcore++;\n+\t\t\tif (ht_enabled) {\n+\t\t\t\twcpu_map.wlcore_map[lcore]\n+\t\t\t\t\t.socket_id = socket;\n+\t\t\t\twcpu_map.wlcore_map[lcore]\n+\t\t\t\t\t.core_id = core;\n+\t\t\t\tlcore++;\n+\t\t\t}\n+\t\t}\n+\t}\n }\n \n-/* Check if a cpu is present by the presence of the cpu information for it */\n+/*\n+ * Check if a cpu is present by the presence of the cpu information for it\n+ */\n int\n-eal_cpu_detected(unsigned int lcore_id __rte_unused)\n+eal_cpu_detected(unsigned int lcore_id)\n {\n-\treturn 1;\n+\treturn (lcore_id < wcpu_map.total_procs);\n }\n \n-/* Get CPU socket id (NUMA node) for a logical core */\n-unsigned int\n-eal_cpu_socket_id(unsigned int cpu_id __rte_unused)\n+/*\n+ * Get CPU socket id for a logical core\n+ */\n+unsigned\n+eal_cpu_socket_id(unsigned int lcore_id)\n+{\n+\treturn wcpu_map.wlcore_map[lcore_id].socket_id;\n+}\n+\n+/*\n+ * Get the cpu core id value\n+ */\n+unsigned\n+eal_cpu_core_id(unsigned int lcore_id)\n {\n-\treturn 0;\n+\treturn wcpu_map.wlcore_map[lcore_id].core_id;\n }\ndiff --git a/lib/librte_eal/windows/eal/eal_thread.c b/lib/librte_eal/windows/eal/eal_thread.c\nindex 222bd8f4d..200ce0156 100644\n--- a/lib/librte_eal/windows/eal/eal_thread.c\n+++ b/lib/librte_eal/windows/eal/eal_thread.c\n@@ -1,15 +1,151 @@\n /* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2018 Intel Corporation\n+ * Copyright(c) 2019 Intel Corporation\n  */\n \n-#include <windows.h>\n+#include <io.h>\n+#include <rte_windows.h>\n+#include <rte_atomic.h>\n+#include <rte_debug.h>\n+#include <rte_launch.h>\n+#include <rte_lcore.h>\n+#include <rte_per_lcore.h>\n \n-#include \"rte_common.h\"\n+#include \"eal_thread.h\"\n \n-typedef uintptr_t eal_thread_t;\n+RTE_DEFINE_PER_LCORE(unsigned int, _lcore_id) = LCORE_ID_ANY;\n \n+/*\n+ * Send a message to a slave lcore identified by slave_id to call a\n+ * function f with argument arg. Once the execution is done, the\n+ * remote lcore switch in FINISHED state.\n+ */\n int\n-eal_thread_create(eal_thread_t *thread __rte_unused)\n+rte_eal_remote_launch(lcore_function_t *f, void *arg, unsigned int slave_id)\n {\n+\tint n;\n+\tchar c = 0;\n+\tint m2s = lcore_config[slave_id].pipe_master2slave[1];\n+\tint s2m = lcore_config[slave_id].pipe_slave2master[0];\n+\n+\tif (lcore_config[slave_id].state != WAIT)\n+\t\treturn -EBUSY;\n+\n+\tlcore_config[slave_id].f = f;\n+\tlcore_config[slave_id].arg = arg;\n+\n+\t/* send message */\n+\tn = 0;\n+\twhile (n == 0 || (n < 0 && errno == EINTR))\n+\t\tn = _write(m2s, &c, 1);\n+\tif (n < 0)\n+\t\trte_panic(\"cannot write on configuration pipe\\n\");\n+\n+\t/* wait ack */\n+\tdo {\n+\t\tn = _read(s2m, &c, 1);\n+\t} while (n < 0 && errno == EINTR);\n+\n+\tif (n <= 0)\n+\t\trte_panic(\"cannot read on configuration pipe\\n\");\n+\n+\treturn 0;\n+}\n+\n+void\n+eal_thread_init_master(unsigned int lcore_id)\n+{\n+\t/* set the lcore ID in per-lcore memory area */\n+\tRTE_PER_LCORE(_lcore_id) = lcore_id;\n+}\n+\n+static inline eal_thread_t\n+eal_thread_self(void)\n+{\n+\treturn GetCurrentThreadId();\n+}\n+\n+/* main loop of threads */\n+void *\n+eal_thread_loop(void *arg __rte_unused)\n+{\n+\tchar c;\n+\tint n, ret;\n+\tunsigned int lcore_id;\n+\teal_thread_t thread_id;\n+\tint m2s, s2m;\n+\tchar cpuset[RTE_CPU_AFFINITY_STR_LEN];\n+\n+\tthread_id = eal_thread_self();\n+\n+\t/* retrieve our lcore_id from the configuration structure */\n+\tRTE_LCORE_FOREACH_SLAVE(lcore_id) {\n+\t\tif (thread_id == lcore_config[lcore_id].thread_id)\n+\t\t\tbreak;\n+\t}\n+\tif (lcore_id == RTE_MAX_LCORE)\n+\t\trte_panic(\"cannot retrieve lcore id\\n\");\n+\n+\tm2s = lcore_config[lcore_id].pipe_master2slave[0];\n+\ts2m = lcore_config[lcore_id].pipe_slave2master[1];\n+\n+\t/* set the lcore ID in per-lcore memory area */\n+\tRTE_PER_LCORE(_lcore_id) = lcore_id;\n+\n+\tRTE_LOG(DEBUG, EAL, \"lcore %u is ready (tid=%zx;cpuset=[%s])\\n\",\n+\t\tlcore_id, (uintptr_t)thread_id, cpuset);\n+\n+\t/* read on our pipe to get commands */\n+\twhile (1) {\n+\t\tvoid *fct_arg;\n+\n+\t\t/* wait command */\n+\t\tdo {\n+\t\t\tn = _read(m2s, &c, 1);\n+\t\t} while (n < 0 && errno == EINTR);\n+\n+\t\tif (n <= 0)\n+\t\t\trte_panic(\"cannot read on configuration pipe\\n\");\n+\n+\t\tlcore_config[lcore_id].state = RUNNING;\n+\n+\t\t/* send ack */\n+\t\tn = 0;\n+\t\twhile (n == 0 || (n < 0 && errno == EINTR))\n+\t\t\tn = _write(s2m, &c, 1);\n+\t\tif (n < 0)\n+\t\t\trte_panic(\"cannot write on configuration pipe\\n\");\n+\n+\t\tif (lcore_config[lcore_id].f == NULL)\n+\t\t\trte_panic(\"NULL function pointer\\n\");\n+\n+\t\t/* call the function and store the return value */\n+\t\tfct_arg = lcore_config[lcore_id].arg;\n+\t\tret = lcore_config[lcore_id].f(fct_arg);\n+\t\tlcore_config[lcore_id].ret = ret;\n+\t\trte_wmb();\n+\n+\t\t/* when a service core returns, it should go directly to WAIT\n+\t\t * state, because the application will not lcore_wait() for it.\n+\t\t */\n+\t\tif (lcore_config[lcore_id].core_role == ROLE_SERVICE)\n+\t\t\tlcore_config[lcore_id].state = WAIT;\n+\t\telse\n+\t\t\tlcore_config[lcore_id].state = FINISHED;\n+\t}\n+}\n+\n+int\n+eal_thread_create(eal_thread_t *thread)\n+{\n+\tHANDLE th;\n+\n+\tth = CreateThread(NULL, 0, (LPTHREAD_START_ROUTINE)eal_thread_loop,\n+\t\t\t\t\t\tNULL, 0, (LPDWORD)thread);\n+\tif (!th)\n+\t\treturn -1;\n+\n+\tSetPriorityClass(GetCurrentProcess(), REALTIME_PRIORITY_CLASS);\n+\tSetThreadPriority(th, THREAD_PRIORITY_TIME_CRITICAL);\n+\n \treturn 0;\n }\ndiff --git a/lib/librte_eal/windows/eal/include/exec-env/regex.h b/lib/librte_eal/windows/eal/include/exec-env/regex.h\nindex efd3f1ecd..512e5723e 100644\n--- a/lib/librte_eal/windows/eal/include/exec-env/regex.h\n+++ b/lib/librte_eal/windows/eal/include/exec-env/regex.h\n@@ -12,6 +12,8 @@ extern \"C\" {\n #define REG_NOMATCH 1\n #define REG_ESPACE 12\n \n+#include \"rte_common.h\"\n+\n typedef void *regex_t;\n typedef void *regmatch_t;\n \ndiff --git a/lib/librte_eal/windows/eal/include/exec-env/rte_windows.h b/lib/librte_eal/windows/eal/include/exec-env/rte_windows.h\nindex 8e4dc72bb..9f1a9ad62 100644\n--- a/lib/librte_eal/windows/eal/include/exec-env/rte_windows.h\n+++ b/lib/librte_eal/windows/eal/include/exec-env/rte_windows.h\n@@ -9,13 +9,37 @@\n extern \"C\" {\n #endif\n \n+#include <windows.h>\n+\n #define __extension__\n #define __thread __declspec(thread)\n \n #define strerror_r(a, b, c) strerror_s(b, c, a)\n \n+#define strdup(str)\t_strdup(str)\n+\n typedef void *ssize_t;\n \n+typedef uintptr_t eal_thread_t;\n+\n+/**\n+ * Create a thread.\n+ * This function is private to EAL.\n+ *\n+ * @param thread\n+ *   The location to store the thread id if successful.\n+ * @return\n+ *   0 for success, -1 if the thread is not created.\n+ */\n+int eal_thread_create(eal_thread_t *thread);\n+\n+/**\n+ * Create a map of processors and cores on the system.\n+ * This function is private to EAL.\n+ *\n+ */\n+void eal_create_cpu_map(void);\n+\n #ifdef __cplusplus\n }\n #endif\n",
    "prefixes": [
        "v2",
        "4/6"
    ]
}