Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/50560/?format=api
{ "id": 50560, "url": "https://patches.dpdk.org/api/patches/50560/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20190228055650.25237-2-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20190228055650.25237-2-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20190228055650.25237-2-qi.z.zhang@intel.com", "date": "2019-02-28T05:56:14", "name": "[01/37] net/ice/base: add switch resource allocation and free", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "ff5cf74a6b9ca7d1cfd39220bf76b4dc30d567df", "submitter": { "id": 504, "url": "https://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20190228055650.25237-2-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 3567, "url": "https://patches.dpdk.org/api/series/3567/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=3567", "date": "2019-02-28T05:56:13", "name": "share code update.", "version": 1, "mbox": "https://patches.dpdk.org/series/3567/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/50560/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/50560/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 414D13256;\n\tThu, 28 Feb 2019 06:55:09 +0100 (CET)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n\tby dpdk.org (Postfix) with ESMTP id 4B1A21E34\n\tfor <dev@dpdk.org>; Thu, 28 Feb 2019 06:55:06 +0100 (CET)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n\tby fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t27 Feb 2019 21:55:05 -0800", "from dpdk51.sh.intel.com ([10.67.110.190])\n\tby fmsmga006.fm.intel.com with ESMTP; 27 Feb 2019 21:55:04 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.58,422,1544515200\"; d=\"scan'208\";a=\"322784184\"", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "wenzhuo.lu@intel.com,\n\tqiming.yang@intel.com", "Cc": "paul.m.stillwell.jr@intel.com, dev@dpdk.org, ferruh.yigit@intel.com,\n\tQi Zhang <qi.z.zhang@intel.com>", "Date": "Thu, 28 Feb 2019 13:56:14 +0800", "Message-Id": "<20190228055650.25237-2-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.13.6", "In-Reply-To": "<20190228055650.25237-1-qi.z.zhang@intel.com>", "References": "<20190228055650.25237-1-qi.z.zhang@intel.com>", "Subject": "[dpdk-dev] [PATCH 01/37] net/ice/base: add switch resource\n\tallocation and free", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Add two APIs ice_alloc_sw and ice_free_sw to support\nswitch related resource allocation and free.\n\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/base/ice_switch.c | 150 ++++++++++++++++++++++++++++++++++++++\n drivers/net/ice/base/ice_switch.h | 5 ++\n 2 files changed, 155 insertions(+)", "diff": "diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex 0379cd045..a7b712e17 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -129,6 +129,156 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf,\n }\n \n \n+/**\n+ * ice_alloc_sw - allocate resources specific to switch\n+ * @hw: pointer to the HW struct\n+ * @ena_stats: true to turn on VEB stats\n+ * @shared_res: true for shared resource, false for dedicated resource\n+ * @sw_id: switch ID returned\n+ * @counter_id: VEB counter ID returned\n+ *\n+ * allocates switch resources (SWID and VEB counter) (0x0208)\n+ */\n+enum ice_status\n+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,\n+\t u16 *counter_id)\n+{\n+\tstruct ice_aqc_alloc_free_res_elem *sw_buf;\n+\tstruct ice_aqc_res_elem *sw_ele;\n+\tenum ice_status status;\n+\tu16 buf_len;\n+\n+\tbuf_len = sizeof(*sw_buf);\n+\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)\n+\t\t ice_malloc(hw, buf_len);\n+\tif (!sw_buf)\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\n+\t/* Prepare buffer for switch ID.\n+\t * The number of resource entries in buffer is passed as 1 since only a\n+\t * single switch/VEB instance is allocated, and hence a single sw_id\n+\t * is requested.\n+\t */\n+\tsw_buf->num_elems = CPU_TO_LE16(1);\n+\tsw_buf->res_type =\n+\t\tCPU_TO_LE16(ICE_AQC_RES_TYPE_SWID |\n+\t\t\t (shared_res ? ICE_AQC_RES_TYPE_FLAG_SHARED :\n+\t\t\t ICE_AQC_RES_TYPE_FLAG_DEDICATED));\n+\n+\tstatus = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,\n+\t\t\t\t ice_aqc_opc_alloc_res, NULL);\n+\n+\tif (status)\n+\t\tgoto ice_alloc_sw_exit;\n+\n+\tsw_ele = &sw_buf->elem[0];\n+\t*sw_id = LE16_TO_CPU(sw_ele->e.sw_resp);\n+\n+\tif (ena_stats) {\n+\t\t/* Prepare buffer for VEB Counter */\n+\t\tenum ice_adminq_opc opc = ice_aqc_opc_alloc_res;\n+\t\tstruct ice_aqc_alloc_free_res_elem *counter_buf;\n+\t\tstruct ice_aqc_res_elem *counter_ele;\n+\n+\t\tcounter_buf = (struct ice_aqc_alloc_free_res_elem *)\n+\t\t\t\tice_malloc(hw, buf_len);\n+\t\tif (!counter_buf) {\n+\t\t\tstatus = ICE_ERR_NO_MEMORY;\n+\t\t\tgoto ice_alloc_sw_exit;\n+\t\t}\n+\n+\t\t/* The number of resource entries in buffer is passed as 1 since\n+\t\t * only a single switch/VEB instance is allocated, and hence a\n+\t\t * single VEB counter is requested.\n+\t\t */\n+\t\tcounter_buf->num_elems = CPU_TO_LE16(1);\n+\t\tcounter_buf->res_type =\n+\t\t\tCPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER |\n+\t\t\t\t ICE_AQC_RES_TYPE_FLAG_DEDICATED);\n+\t\tstatus = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,\n+\t\t\t\t\t opc, NULL);\n+\n+\t\tif (status) {\n+\t\t\tice_free(hw, counter_buf);\n+\t\t\tgoto ice_alloc_sw_exit;\n+\t\t}\n+\t\tcounter_ele = &counter_buf->elem[0];\n+\t\t*counter_id = LE16_TO_CPU(counter_ele->e.sw_resp);\n+\t\tice_free(hw, counter_buf);\n+\t}\n+\n+ice_alloc_sw_exit:\n+\tice_free(hw, sw_buf);\n+\treturn status;\n+}\n+\n+/**\n+ * ice_free_sw - free resources specific to switch\n+ * @hw: pointer to the HW struct\n+ * @sw_id: switch ID returned\n+ * @counter_id: VEB counter ID returned\n+ *\n+ * free switch resources (SWID and VEB counter) (0x0209)\n+ *\n+ * NOTE: This function frees multiple resources. It continues\n+ * releasing other resources even after it encounters error.\n+ * The error code returned is the last error it encountered.\n+ */\n+enum ice_status ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id)\n+{\n+\tstruct ice_aqc_alloc_free_res_elem *sw_buf, *counter_buf;\n+\tenum ice_status status, ret_status;\n+\tu16 buf_len;\n+\n+\tbuf_len = sizeof(*sw_buf);\n+\tsw_buf = (struct ice_aqc_alloc_free_res_elem *)\n+\t\t ice_malloc(hw, buf_len);\n+\tif (!sw_buf)\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\n+\t/* Prepare buffer to free for switch ID res.\n+\t * The number of resource entries in buffer is passed as 1 since only a\n+\t * single switch/VEB instance is freed, and hence a single sw_id\n+\t * is released.\n+\t */\n+\tsw_buf->num_elems = CPU_TO_LE16(1);\n+\tsw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_SWID);\n+\tsw_buf->elem[0].e.sw_resp = CPU_TO_LE16(sw_id);\n+\n+\tret_status = ice_aq_alloc_free_res(hw, 1, sw_buf, buf_len,\n+\t\t\t\t\t ice_aqc_opc_free_res, NULL);\n+\n+\tif (ret_status)\n+\t\tice_debug(hw, ICE_DBG_SW, \"CQ CMD Buffer:\\n\");\n+\n+\t/* Prepare buffer to free for VEB Counter resource */\n+\tcounter_buf = (struct ice_aqc_alloc_free_res_elem *)\n+\t\t\tice_malloc(hw, buf_len);\n+\tif (!counter_buf) {\n+\t\tice_free(hw, sw_buf);\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\t}\n+\n+\t/* The number of resource entries in buffer is passed as 1 since only a\n+\t * single switch/VEB instance is freed, and hence a single VEB counter\n+\t * is released\n+\t */\n+\tcounter_buf->num_elems = CPU_TO_LE16(1);\n+\tcounter_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_VEB_COUNTER);\n+\tcounter_buf->elem[0].e.sw_resp = CPU_TO_LE16(counter_id);\n+\n+\tstatus = ice_aq_alloc_free_res(hw, 1, counter_buf, buf_len,\n+\t\t\t\t ice_aqc_opc_free_res, NULL);\n+\tif (status) {\n+\t\tice_debug(hw, ICE_DBG_SW,\n+\t\t\t \"VEB counter resource could not be freed\\n\");\n+\t\tret_status = status;\n+\t}\n+\n+\tice_free(hw, counter_buf);\n+\tice_free(hw, sw_buf);\n+\treturn ret_status;\n+}\n \n /**\n * ice_aq_add_vsi\ndiff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h\nindex 66a172fc2..dd21781f7 100644\n--- a/drivers/net/ice/base/ice_switch.h\n+++ b/drivers/net/ice/base/ice_switch.h\n@@ -290,6 +290,11 @@ ice_free_vlan_res_counter(struct ice_hw *hw, u16 counter_id);\n /* Switch/bridge related commands */\n enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw);\n enum ice_status\n+ice_alloc_sw(struct ice_hw *hw, bool ena_stats, bool shared_res, u16 *sw_id,\n+\t u16 *counter_id);\n+enum ice_status\n+ice_free_sw(struct ice_hw *hw, u16 sw_id, u16 counter_id);\n+enum ice_status\n ice_add_vlan(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list);\n enum ice_status ice_add_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);\n enum ice_status ice_remove_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_lst);\n", "prefixes": [ "01/37" ] }