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GET /api/patches/48980/?format=api
{ "id": 48980, "url": "https://patches.dpdk.org/api/patches/48980/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1545032259-77179-13-git-send-email-wenzhuo.lu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1545032259-77179-13-git-send-email-wenzhuo.lu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1545032259-77179-13-git-send-email-wenzhuo.lu@intel.com", "date": "2018-12-17T07:37:20", "name": "[v5,12/31] net/ice/base: add protocol structures and defines", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "02556c12b86dd7fb56109a89eec09f32bccc8822", "submitter": { "id": 258, "url": "https://patches.dpdk.org/api/people/258/?format=api", "name": "Wenzhuo Lu", "email": "wenzhuo.lu@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1545032259-77179-13-git-send-email-wenzhuo.lu@intel.com/mbox/", "series": [ { "id": 2824, "url": "https://patches.dpdk.org/api/series/2824/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=2824", "date": "2018-12-17T07:37:08", "name": "A new net PMD - ICE", "version": 5, "mbox": "https://patches.dpdk.org/series/2824/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/48980/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/48980/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 18B8F1B5FE;\n\tMon, 17 Dec 2018 08:33:19 +0100 (CET)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 869D31B5AC\n\tfor <dev@dpdk.org>; Mon, 17 Dec 2018 08:33:09 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t16 Dec 2018 23:33:07 -0800", "from dpdk26.sh.intel.com ([10.67.110.164])\n\tby orsmga002.jf.intel.com with ESMTP; 16 Dec 2018 23:33:08 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.56,364,1539673200\"; d=\"scan'208\";a=\"118899197\"", "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "To": "dev@dpdk.org", "Cc": "Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Mon, 17 Dec 2018 15:37:20 +0800", "Message-Id": "<1545032259-77179-13-git-send-email-wenzhuo.lu@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1545032259-77179-1-git-send-email-wenzhuo.lu@intel.com>", "References": "<1542956179-80951-1-git-send-email-wenzhuo.lu@intel.com>\n\t<1545032259-77179-1-git-send-email-wenzhuo.lu@intel.com>", "Subject": "[dpdk-dev] [PATCH v5 12/31] net/ice/base: add protocol structures\n\tand defines", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\n\nAdd the structures and defines that define what\nprotocols the NIC can handle.\n\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\n---\n drivers/net/ice/base/ice_protocol_type.h | 248 +++++++++++++++++++++++++++++++\n 1 file changed, 248 insertions(+)\n create mode 100644 drivers/net/ice/base/ice_protocol_type.h", "diff": "diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h\nnew file mode 100644\nindex 0000000..7b92c71\n--- /dev/null\n+++ b/drivers/net/ice/base/ice_protocol_type.h\n@@ -0,0 +1,248 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2001-2018\n+ */\n+\n+#ifndef _ICE_PROTOCOL_TYPE_H_\n+#define _ICE_PROTOCOL_TYPE_H_\n+#include \"ice_flex_type.h\"\n+#define ICE_IPV6_ADDR_LENGTH 16\n+\n+/* Each recipe can match up to 5 different fields. Fields to match can be meta-\n+ * data, values extracted from packet headers, or results from other recipes.\n+ * One of the 5 fields is reserved for matching the switch ID. So, up to 4\n+ * recipes can provide intermediate results to another one through chaining,\n+ * e.g. recipes 0, 1, 2, and 3 can provide intermediate results to recipe 4.\n+ */\n+#define ICE_NUM_WORDS_RECIPE 4\n+\n+/* Max recipes that can be chained */\n+#define ICE_MAX_CHAIN_RECIPE 5\n+\n+/* 1 word reserved for switch id from allowed 5 words.\n+ * So a recipe can have max 4 words. And you can chain 5 such recipes\n+ * together. So maximum words that can be programmed for look up is 5 * 4.\n+ */\n+#define ICE_MAX_CHAIN_WORDS (ICE_NUM_WORDS_RECIPE * ICE_MAX_CHAIN_RECIPE)\n+\n+/* Field vector index corresponding to chaining */\n+#define ICE_CHAIN_FV_INDEX_START 47\n+\n+enum ice_protocol_type {\n+\tICE_MAC_OFOS = 0,\n+\tICE_MAC_IL,\n+\tICE_IPV4_OFOS,\n+\tICE_IPV4_IL,\n+\tICE_IPV6_IL,\n+\tICE_IPV6_OFOS,\n+\tICE_TCP_IL,\n+\tICE_UDP_ILOS,\n+\tICE_SCTP_IL,\n+\tICE_VXLAN,\n+\tICE_GENEVE,\n+\tICE_VXLAN_GPE,\n+\tICE_NVGRE,\n+\tICE_PROTOCOL_LAST\n+};\n+\n+enum ice_sw_tunnel_type {\n+\tICE_NON_TUN,\n+\tICE_SW_TUN_VXLAN_GPE,\n+\tICE_SW_TUN_GENEVE,\n+\tICE_SW_TUN_VXLAN,\n+\tICE_SW_TUN_NVGRE,\n+\tICE_SW_TUN_UDP, /* This means all \"UDP\" tunnel types: VXLAN-GPE, VXLAN\n+\t\t\t * and GENEVE\n+\t\t\t */\n+\tICE_ALL_TUNNELS /* All tunnel types including NVGRE */\n+};\n+\n+/* Decoders for ice_prot_id:\n+ * - F: First\n+ * - I: Inner\n+ * - L: Last\n+ * - O: Outer\n+ * - S: Single\n+ */\n+enum ice_prot_id {\n+\tICE_PROT_ID_INVAL\t= 0,\n+\tICE_PROT_MAC_OF_OR_S\t= 1,\n+\tICE_PROT_MAC_O2\t\t= 2,\n+\tICE_PROT_MAC_IL\t\t= 4,\n+\tICE_PROT_MAC_IN_MAC\t= 7,\n+\tICE_PROT_ETYPE_OL\t= 9,\n+\tICE_PROT_ETYPE_IL\t= 10,\n+\tICE_PROT_PAY\t\t= 15,\n+\tICE_PROT_EVLAN_O\t= 16,\n+\tICE_PROT_VLAN_O\t\t= 17,\n+\tICE_PROT_VLAN_IF\t= 18,\n+\tICE_PROT_MPLS_OL_MINUS_1 = 27,\n+\tICE_PROT_MPLS_OL_OR_OS\t= 28,\n+\tICE_PROT_MPLS_IL\t= 29,\n+\tICE_PROT_IPV4_OF_OR_S\t= 32,\n+\tICE_PROT_IPV4_IL\t= 33,\n+\tICE_PROT_IPV6_OF_OR_S\t= 40,\n+\tICE_PROT_IPV6_IL\t= 41,\n+\tICE_PROT_IPV6_FRAG\t= 47,\n+\tICE_PROT_TCP_IL\t\t= 49,\n+\tICE_PROT_UDP_OF\t\t= 52,\n+\tICE_PROT_UDP_IL_OR_S\t= 53,\n+\tICE_PROT_GRE_OF\t\t= 64,\n+\tICE_PROT_NSH_F\t\t= 84,\n+\tICE_PROT_ESP_F\t\t= 88,\n+\tICE_PROT_ESP_2\t\t= 89,\n+\tICE_PROT_SCTP_IL\t= 96,\n+\tICE_PROT_ICMP_IL\t= 98,\n+\tICE_PROT_ICMPV6_IL\t= 100,\n+\tICE_PROT_VRRP_F\t\t= 101,\n+\tICE_PROT_OSPF\t\t= 102,\n+\tICE_PROT_ATAOE_OF\t= 114,\n+\tICE_PROT_CTRL_OF\t= 116,\n+\tICE_PROT_LLDP_OF\t= 117,\n+\tICE_PROT_ARP_OF\t\t= 118,\n+\tICE_PROT_EAPOL_OF\t= 120,\n+\tICE_PROT_META_ID\t= 255, /* when offset == metaddata */\n+\tICE_PROT_INVALID\t= 255 /* when offset == 0xFF */\n+};\n+\n+\n+#define ICE_MAC_OFOS_HW\t\t1\n+#define ICE_MAC_IL_HW\t\t4\n+#define ICE_IPV4_OFOS_HW\t32\n+#define ICE_IPV4_IL_HW\t\t33\n+#define ICE_IPV6_OFOS_HW\t40\n+#define ICE_IPV6_IL_HW\t\t41\n+#define ICE_TCP_IL_HW\t\t49\n+#define ICE_UDP_ILOS_HW\t\t53\n+#define ICE_SCTP_IL_HW\t\t96\n+\n+/* ICE_UDP_OF is used to identify all 3 tunnel types\n+ * VXLAN, GENEVE and VXLAN_GPE. To differentiate further\n+ * need to use flags from the field vector\n+ */\n+#define ICE_UDP_OF_HW\t52 /* UDP Tunnels */\n+#define ICE_GRE_OF_HW\t64 /* NVGRE */\n+#define ICE_META_DATA_ID_HW 255 /* this is used for tunnel type */\n+\n+#define ICE_TUN_FLAG_MASK 0xFF\n+#define ICE_TUN_FLAG_FV_IND 2\n+\n+#define ICE_PROTOCOL_MAX_ENTRIES 16\n+\n+/* Mapping of software defined protocol id to hardware defined protocol id */\n+struct ice_protocol_entry {\n+\tenum ice_protocol_type type;\n+\tu8 protocol_id;\n+};\n+\n+\n+struct ice_ether_hdr {\n+\tu8 dst_addr[ETH_ALEN];\n+\tu8 src_addr[ETH_ALEN];\n+\tu16 ethtype_id;\n+};\n+\n+struct ice_ether_vlan_hdr {\n+\tu8 dst_addr[ETH_ALEN];\n+\tu8 src_addr[ETH_ALEN];\n+\tu32 vlan_id;\n+};\n+\n+struct ice_ipv4_hdr {\n+\tu8 version;\n+\tu8 tos;\n+\tu16 total_length;\n+\tu16 id;\n+\tu16 frag_off;\n+\tu8 time_to_live;\n+\tu8 protocol;\n+\tu16 check;\n+\tu32 src_addr;\n+\tu32 dst_addr;\n+};\n+\n+struct ice_ipv6_hdr {\n+\tu8 version;\n+\tu8 tc;\n+\tu16 flow_label;\n+\tu16 payload_len;\n+\tu8 next_hdr;\n+\tu8 hop_limit;\n+\tu8 src_addr[ICE_IPV6_ADDR_LENGTH];\n+\tu8 dst_addr[ICE_IPV6_ADDR_LENGTH];\n+};\n+\n+struct ice_sctp_hdr {\n+\tu16 src_port;\n+\tu16 dst_port;\n+\tu32 verification_tag;\n+\tu32 check;\n+};\n+\n+struct ice_l4_hdr {\n+\tu16 src_port;\n+\tu16 dst_port;\n+\tu16 len;\n+\tu16 check;\n+};\n+\n+struct ice_udp_tnl_hdr {\n+\tu16 field;\n+\tu16 proto_type;\n+\tu16 vni;\n+};\n+\n+struct ice_nvgre {\n+\tu16 tni;\n+\tu16 flow_id;\n+};\n+\n+union ice_prot_hdr {\n+\t\tstruct ice_ether_hdr eth_hdr;\n+\t\tstruct ice_ipv4_hdr ipv4_hdr;\n+\t\tstruct ice_ipv6_hdr ice_ipv6_ofos_hdr;\n+\t\tstruct ice_l4_hdr l4_hdr;\n+\t\tstruct ice_sctp_hdr sctp_hdr;\n+\t\tstruct ice_udp_tnl_hdr tnl_hdr;\n+\t\tstruct ice_nvgre nvgre_hdr;\n+};\n+\n+/* This is mapping table entry that maps every word within a given protocol\n+ * structure to the real byte offset as per the specification of that\n+ * protocol header.\n+ * for e.g. dst address is 3 words in ethertype header and corresponding bytes\n+ * are 0, 2, 3 in the actual packet header and src address is at 4, 6, 8\n+ */\n+struct ice_prot_ext_tbl_entry {\n+\tenum ice_protocol_type prot_type;\n+\t/* Byte offset into header of given protocol type */\n+\tu8 offs[sizeof(union ice_prot_hdr)];\n+};\n+\n+/* Extractions to be looked up for a given recipe */\n+struct ice_prot_lkup_ext {\n+\tu16 prot_type;\n+\tu8 n_val_words;\n+\t/* create a buffer to hold max words per recipe */\n+\tu8 field_off[ICE_MAX_CHAIN_WORDS];\n+\n+\tstruct ice_fv_word fv_words[ICE_MAX_CHAIN_WORDS];\n+\n+\t/* Indicate field offsets that have field vector indices assigned */\n+\tice_declare_bitmap(done, ICE_MAX_CHAIN_WORDS);\n+};\n+\n+struct ice_pref_recipe_group {\n+\tu8 n_val_pairs;\t\t/* Number of valid pairs */\n+\tstruct ice_fv_word pairs[ICE_NUM_WORDS_RECIPE];\n+};\n+\n+struct ice_recp_grp_entry {\n+\tstruct LIST_ENTRY_TYPE l_entry;\n+\n+#define ICE_INVAL_CHAIN_IND 0xFF\n+\tu16 rid;\n+\tu8 chain_idx;\n+\tu16 fv_idx[ICE_NUM_WORDS_RECIPE];\n+\tstruct ice_pref_recipe_group r_group;\n+};\n+#endif /* _ICE_PROTOCOL_TYPE_H_ */\n", "prefixes": [ "v5", "12/31" ] }