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GET /api/patches/48811/?format=api
{ "id": 48811, "url": "https://patches.dpdk.org/api/patches/48811/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1544776518-91047-8-git-send-email-wenzhuo.lu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1544776518-91047-8-git-send-email-wenzhuo.lu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1544776518-91047-8-git-send-email-wenzhuo.lu@intel.com", "date": "2018-12-14T08:34:53", "name": "[v4,07/32] net/ice/base: add data center bridging (DCB)", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "8b8a70cdcdb2bee0b22c2aaf67366c03eddfcee3", "submitter": { "id": 258, "url": "https://patches.dpdk.org/api/people/258/?format=api", "name": "Wenzhuo Lu", "email": "wenzhuo.lu@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1544776518-91047-8-git-send-email-wenzhuo.lu@intel.com/mbox/", "series": [ { "id": 2772, "url": "https://patches.dpdk.org/api/series/2772/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=2772", "date": "2018-12-14T08:34:46", "name": "A new net PMD - ICE", "version": 4, "mbox": "https://patches.dpdk.org/series/2772/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/48811/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/48811/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 091C21B885;\n\tFri, 14 Dec 2018 09:30:49 +0100 (CET)", "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n\tby dpdk.org (Postfix) with ESMTP id 362561B7C1\n\tfor <dev@dpdk.org>; Fri, 14 Dec 2018 09:30:43 +0100 (CET)", "from fmsmga006.fm.intel.com ([10.253.24.20])\n\tby fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t14 Dec 2018 00:30:42 -0800", "from dpdk26.sh.intel.com ([10.67.110.164])\n\tby fmsmga006.fm.intel.com with ESMTP; 14 Dec 2018 00:30:42 -0800" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.56,352,1539673200\"; d=\"scan'208\";a=\"302131625\"", "From": "Wenzhuo Lu <wenzhuo.lu@intel.com>", "To": "dev@dpdk.org", "Cc": "Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>", "Date": "Fri, 14 Dec 2018 16:34:53 +0800", "Message-Id": "<1544776518-91047-8-git-send-email-wenzhuo.lu@intel.com>", "X-Mailer": "git-send-email 1.9.3", "In-Reply-To": "<1544776518-91047-1-git-send-email-wenzhuo.lu@intel.com>", "References": "<1542956179-80951-1-git-send-email-wenzhuo.lu@intel.com>\n\t<1544776518-91047-1-git-send-email-wenzhuo.lu@intel.com>", "Subject": "[dpdk-dev] [PATCH v4 07/32] net/ice/base: add data center bridging\n\t(DCB)", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\n\nAdd the code to handle DCB.\n\nSigned-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>\n---\n drivers/net/ice/base/ice_dcb.c | 1385 ++++++++++++++++++++++++++++++++++++++++\n drivers/net/ice/base/ice_dcb.h | 220 +++++++\n 2 files changed, 1605 insertions(+)\n create mode 100644 drivers/net/ice/base/ice_dcb.c\n create mode 100644 drivers/net/ice/base/ice_dcb.h", "diff": "diff --git a/drivers/net/ice/base/ice_dcb.c b/drivers/net/ice/base/ice_dcb.c\nnew file mode 100644\nindex 0000000..76411d5\n--- /dev/null\n+++ b/drivers/net/ice/base/ice_dcb.c\n@@ -0,0 +1,1385 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2001-2018\n+ */\n+\n+#include \"ice_common.h\"\n+#include \"ice_sched.h\"\n+#include \"ice_dcb.h\"\n+\n+/**\n+ * ice_aq_get_lldp_mib\n+ * @hw: pointer to the hw struct\n+ * @bridge_type: type of bridge requested\n+ * @mib_type: Local, Remote or both Local and Remote MIBs\n+ * @buf: pointer to the caller-supplied buffer to store the MIB block\n+ * @buf_size: size of the buffer (in bytes)\n+ * @local_len: length of the returned Local LLDP MIB\n+ * @remote_len: length of the returned Remote LLDP MIB\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Requests the complete LLDP MIB (entire packet). (0x0A00)\n+ */\n+enum ice_status\n+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,\n+\t\t u16 buf_size, u16 *local_len, u16 *remote_len,\n+\t\t struct ice_sq_cd *cd)\n+{\n+\tstruct ice_aqc_lldp_get_mib *cmd;\n+\tstruct ice_aq_desc desc;\n+\tenum ice_status status;\n+\n+\tcmd = &desc.params.lldp_get_mib;\n+\n+\tif (buf_size == 0 || !buf)\n+\t\treturn ICE_ERR_PARAM;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_get_mib);\n+\n+\tcmd->type = mib_type & ICE_AQ_LLDP_MIB_TYPE_M;\n+\tcmd->type |= (bridge_type << ICE_AQ_LLDP_BRID_TYPE_S) &\n+\t\tICE_AQ_LLDP_BRID_TYPE_M;\n+\n+\tdesc.datalen = CPU_TO_LE16(buf_size);\n+\n+\tstatus = ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);\n+\tif (!status) {\n+\t\tif (local_len)\n+\t\t\t*local_len = LE16_TO_CPU(cmd->local_len);\n+\t\tif (remote_len)\n+\t\t\t*remote_len = LE16_TO_CPU(cmd->remote_len);\n+\t}\n+\n+\treturn status;\n+}\n+\n+/**\n+ * ice_aq_cfg_lldp_mib_change\n+ * @hw: pointer to the hw struct\n+ * @ena_update: Enable or Disable event posting\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Enable or Disable posting of an event on ARQ when LLDP MIB\n+ * associated with the interface changes (0x0A01)\n+ */\n+enum ice_status\n+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,\n+\t\t\t struct ice_sq_cd *cd)\n+{\n+\tstruct ice_aqc_lldp_set_mib_change *cmd;\n+\tstruct ice_aq_desc desc;\n+\n+\tcmd = &desc.params.lldp_set_event;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_mib_change);\n+\n+\tif (!ena_update)\n+\t\tcmd->command |= ICE_AQ_LLDP_MIB_UPDATE_DIS;\n+\n+\treturn ice_aq_send_cmd(hw, &desc, NULL, 0, cd);\n+}\n+\n+\n+/**\n+ * ice_aq_start_lldp\n+ * @hw: pointer to the hw struct\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Start the embedded LLDP Agent on all ports. (0x0A06)\n+ */\n+enum ice_status ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd)\n+{\n+\tstruct ice_aqc_lldp_start *cmd;\n+\tstruct ice_aq_desc desc;\n+\n+\tcmd = &desc.params.lldp_start;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_start);\n+\n+\tcmd->command = ICE_AQ_LLDP_AGENT_START;\n+\n+\treturn ice_aq_send_cmd(hw, &desc, NULL, 0, cd);\n+}\n+\n+/**\n+ * ice_aq_set_lldp_mib - Set the LLDP MIB\n+ * @hw: pointer to the hw struct\n+ * @mib_type: Local, Remote or both Local and Remote MIBs\n+ * @buf: pointer to the caller-supplied buffer to store the MIB block\n+ * @buf_size: size of the buffer (in bytes)\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Set the LLDP MIB. (0x0A08)\n+ */\n+enum ice_status\n+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,\n+\t\t struct ice_sq_cd *cd)\n+{\n+\tstruct ice_aqc_lldp_set_local_mib *cmd;\n+\tstruct ice_aq_desc desc;\n+\n+\tcmd = &desc.params.lldp_set_mib;\n+\n+\tif (buf_size == 0 || !buf)\n+\t\treturn ICE_ERR_PARAM;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_lldp_set_local_mib);\n+\n+\tdesc.flags |= CPU_TO_LE16((u16)ICE_AQ_FLAG_RD);\n+\tdesc.datalen = CPU_TO_LE16(buf_size);\n+\n+\tcmd->type = mib_type;\n+\tcmd->length = CPU_TO_LE16(buf_size);\n+\n+\treturn ice_aq_send_cmd(hw, &desc, buf, buf_size, cd);\n+}\n+\n+/**\n+ * ice_get_dcbx_status\n+ * @hw: pointer to the hw struct\n+ *\n+ * Get the DCBX status from the Firmware\n+ */\n+u8 ice_get_dcbx_status(struct ice_hw *hw)\n+{\n+\tu32 reg;\n+\n+\treg = rd32(hw, PRTDCB_GENS);\n+\treturn (u8)((reg & PRTDCB_GENS_DCBX_STATUS_M) >>\n+\t\t PRTDCB_GENS_DCBX_STATUS_S);\n+}\n+\n+/**\n+ * ice_parse_ieee_ets_common_tlv\n+ * @buf: Data buffer to be parsed for ETS CFG/REC data\n+ * @ets_cfg: Container to store parsed data\n+ *\n+ * Parses the common data of IEEE 802.1Qaz ETS CFG/REC TLV\n+ */\n+static void\n+ice_parse_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)\n+{\n+\tu8 offset = 0;\n+\tint i;\n+\n+\t/* Priority Assignment Table (4 octets)\n+\t * Octets:| 1 | 2 | 3 | 4 |\n+\t * -----------------------------------------\n+\t * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|\n+\t * -----------------------------------------\n+\t * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|\n+\t * -----------------------------------------\n+\t */\n+\tfor (i = 0; i < 4; i++) {\n+\t\tets_cfg->prio_table[i * 2] =\n+\t\t\t((buf[offset] & ICE_IEEE_ETS_PRIO_1_M) >>\n+\t\t\t ICE_IEEE_ETS_PRIO_1_S);\n+\t\tets_cfg->prio_table[i * 2 + 1] =\n+\t\t\t((buf[offset] & ICE_IEEE_ETS_PRIO_0_M) >>\n+\t\t\t ICE_IEEE_ETS_PRIO_0_S);\n+\t\toffset++;\n+\t}\n+\n+\t/* TC Bandwidth Table (8 octets)\n+\t * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |\n+\t * ---------------------------------\n+\t * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|\n+\t * ---------------------------------\n+\t *\n+\t * TSA Assignment Table (8 octets)\n+\t * Octets:| 9 | 10| 11| 12| 13| 14| 15| 16|\n+\t * ---------------------------------\n+\t * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|\n+\t * ---------------------------------\n+\t */\n+\tfor (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {\n+\t\tets_cfg->tcbwtable[i] = buf[offset];\n+\t\tets_cfg->tsatable[i] = buf[ICE_MAX_TRAFFIC_CLASS + offset++];\n+\t}\n+}\n+\n+/**\n+ * ice_parse_ieee_etscfg_tlv\n+ * @tlv: IEEE 802.1Qaz ETS CFG TLV\n+ * @dcbcfg: Local store to update ETS CFG data\n+ *\n+ * Parses IEEE 802.1Qaz ETS CFG TLV\n+ */\n+static void\n+ice_parse_ieee_etscfg_tlv(struct ice_lldp_org_tlv *tlv,\n+\t\t\t struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tstruct ice_dcb_ets_cfg *etscfg;\n+\tu8 *buf = tlv->tlvinfo;\n+\n+\t/* First Octet post subtype\n+\t * --------------------------\n+\t * |will-|CBS | Re- | Max |\n+\t * |ing | |served| TCs |\n+\t * --------------------------\n+\t * |1bit | 1bit|3 bits|3bits|\n+\t */\n+\tetscfg = &dcbcfg->etscfg;\n+\tetscfg->willing = ((buf[0] & ICE_IEEE_ETS_WILLING_M) >>\n+\t\t\t ICE_IEEE_ETS_WILLING_S);\n+\tetscfg->cbs = ((buf[0] & ICE_IEEE_ETS_CBS_M) >> ICE_IEEE_ETS_CBS_S);\n+\tetscfg->maxtcs = ((buf[0] & ICE_IEEE_ETS_MAXTC_M) >>\n+\t\t\t ICE_IEEE_ETS_MAXTC_S);\n+\n+\t/* Begin parsing at Priority Assignment Table (offset 1 in buf) */\n+\tice_parse_ieee_ets_common_tlv(&buf[1], etscfg);\n+}\n+\n+/**\n+ * ice_parse_ieee_etsrec_tlv\n+ * @tlv: IEEE 802.1Qaz ETS REC TLV\n+ * @dcbcfg: Local store to update ETS REC data\n+ *\n+ * Parses IEEE 802.1Qaz ETS REC TLV\n+ */\n+static void\n+ice_parse_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,\n+\t\t\t struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tu8 *buf = tlv->tlvinfo;\n+\n+\t/* Begin parsing at Priority Assignment Table (offset 1 in buf) */\n+\tice_parse_ieee_ets_common_tlv(&buf[1], &dcbcfg->etsrec);\n+}\n+\n+/**\n+ * ice_parse_ieee_pfccfg_tlv\n+ * @tlv: IEEE 802.1Qaz PFC CFG TLV\n+ * @dcbcfg: Local store to update PFC CFG data\n+ *\n+ * Parses IEEE 802.1Qaz PFC CFG TLV\n+ */\n+static void\n+ice_parse_ieee_pfccfg_tlv(struct ice_lldp_org_tlv *tlv,\n+\t\t\t struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tu8 *buf = tlv->tlvinfo;\n+\n+\t/* ----------------------------------------\n+\t * |will-|MBC | Re- | PFC | PFC Enable |\n+\t * |ing | |served| cap | |\n+\t * -----------------------------------------\n+\t * |1bit | 1bit|2 bits|4bits| 1 octet |\n+\t */\n+\tdcbcfg->pfc.willing = ((buf[0] & ICE_IEEE_PFC_WILLING_M) >>\n+\t\t\t ICE_IEEE_PFC_WILLING_S);\n+\tdcbcfg->pfc.mbc = ((buf[0] & ICE_IEEE_PFC_MBC_M) >> ICE_IEEE_PFC_MBC_S);\n+\tdcbcfg->pfc.pfccap = ((buf[0] & ICE_IEEE_PFC_CAP_M) >>\n+\t\t\t ICE_IEEE_PFC_CAP_S);\n+\tdcbcfg->pfc.pfcena = buf[1];\n+}\n+\n+/**\n+ * ice_parse_ieee_app_tlv\n+ * @tlv: IEEE 802.1Qaz APP TLV\n+ * @dcbcfg: Local store to update APP PRIO data\n+ *\n+ * Parses IEEE 802.1Qaz APP PRIO TLV\n+ */\n+static void\n+ice_parse_ieee_app_tlv(struct ice_lldp_org_tlv *tlv,\n+\t\t struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tu16 offset = 0;\n+\tu16 typelen;\n+\tint i = 0;\n+\tu16 len;\n+\tu8 *buf;\n+\n+\ttypelen = NTOHS(tlv->typelen);\n+\tlen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);\n+\tbuf = tlv->tlvinfo;\n+\n+\t/* Removing sizeof(ouisubtype) and reserved byte from len.\n+\t * Remaining len div 3 is number of APP TLVs.\n+\t */\n+\tlen -= (sizeof(tlv->ouisubtype) + 1);\n+\n+\t/* Move offset to App Priority Table */\n+\toffset++;\n+\n+\t/* Application Priority Table (3 octets)\n+\t * Octets:| 1 | 2 | 3 |\n+\t * -----------------------------------------\n+\t * |Priority|Rsrvd| Sel | Protocol ID |\n+\t * -----------------------------------------\n+\t * Bits:|23 21|20 19|18 16|15 0|\n+\t * -----------------------------------------\n+\t */\n+\twhile (offset < len) {\n+\t\tdcbcfg->app[i].priority = ((buf[offset] &\n+\t\t\t\t\t ICE_IEEE_APP_PRIO_M) >>\n+\t\t\t\t\t ICE_IEEE_APP_PRIO_S);\n+\t\tdcbcfg->app[i].selector = ((buf[offset] &\n+\t\t\t\t\t ICE_IEEE_APP_SEL_M) >>\n+\t\t\t\t\t ICE_IEEE_APP_SEL_S);\n+\t\tdcbcfg->app[i].prot_id = (buf[offset + 1] << 0x8) |\n+\t\t\tbuf[offset + 2];\n+\t\t/* Move to next app */\n+\t\toffset += 3;\n+\t\ti++;\n+\t\tif (i >= ICE_DCBX_MAX_APPS)\n+\t\t\tbreak;\n+\t}\n+\n+\tdcbcfg->numapps = i;\n+}\n+\n+/**\n+ * ice_parse_ieee_tlv\n+ * @tlv: IEEE 802.1Qaz TLV\n+ * @dcbcfg: Local store to update ETS REC data\n+ *\n+ * Get the TLV subtype and send it to parsing function\n+ * based on the subtype value\n+ */\n+static void\n+ice_parse_ieee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tu32 ouisubtype;\n+\tu8 subtype;\n+\n+\touisubtype = NTOHL(tlv->ouisubtype);\n+\tsubtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>\n+\t\t ICE_LLDP_TLV_SUBTYPE_S);\n+\tswitch (subtype) {\n+\tcase ICE_IEEE_SUBTYPE_ETS_CFG:\n+\t\tice_parse_ieee_etscfg_tlv(tlv, dcbcfg);\n+\t\tbreak;\n+\tcase ICE_IEEE_SUBTYPE_ETS_REC:\n+\t\tice_parse_ieee_etsrec_tlv(tlv, dcbcfg);\n+\t\tbreak;\n+\tcase ICE_IEEE_SUBTYPE_PFC_CFG:\n+\t\tice_parse_ieee_pfccfg_tlv(tlv, dcbcfg);\n+\t\tbreak;\n+\tcase ICE_IEEE_SUBTYPE_APP_PRI:\n+\t\tice_parse_ieee_app_tlv(tlv, dcbcfg);\n+\t\tbreak;\n+\tdefault:\n+\t\tbreak;\n+\t}\n+}\n+\n+/**\n+ * ice_parse_cee_pgcfg_tlv\n+ * @tlv: CEE DCBX PG CFG TLV\n+ * @dcbcfg: Local store to update ETS CFG data\n+ *\n+ * Parses CEE DCBX PG CFG TLV\n+ */\n+static void\n+ice_parse_cee_pgcfg_tlv(struct ice_cee_feat_tlv *tlv,\n+\t\t\tstruct ice_dcbx_cfg *dcbcfg)\n+{\n+\tstruct ice_dcb_ets_cfg *etscfg;\n+\tu8 *buf = tlv->tlvinfo;\n+\tu16 offset = 0;\n+\tint i;\n+\n+\tetscfg = &dcbcfg->etscfg;\n+\n+\tif (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)\n+\t\tetscfg->willing = 1;\n+\n+\tetscfg->cbs = 0;\n+\t/* Priority Group Table (4 octets)\n+\t * Octets:| 1 | 2 | 3 | 4 |\n+\t * -----------------------------------------\n+\t * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|\n+\t * -----------------------------------------\n+\t * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|\n+\t * -----------------------------------------\n+\t */\n+\tfor (i = 0; i < 4; i++) {\n+\t\tetscfg->prio_table[i * 2] =\n+\t\t\t((buf[offset] & ICE_CEE_PGID_PRIO_1_M) >>\n+\t\t\t ICE_CEE_PGID_PRIO_1_S);\n+\t\tetscfg->prio_table[i * 2 + 1] =\n+\t\t\t((buf[offset] & ICE_CEE_PGID_PRIO_0_M) >>\n+\t\t\t ICE_CEE_PGID_PRIO_0_S);\n+\t\toffset++;\n+\t}\n+\n+\t/* PG Percentage Table (8 octets)\n+\t * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |\n+\t * ---------------------------------\n+\t * |pg0|pg1|pg2|pg3|pg4|pg5|pg6|pg7|\n+\t * ---------------------------------\n+\t */\n+\tfor (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++)\n+\t\tetscfg->tcbwtable[i] = buf[offset++];\n+\n+\t/* Number of TCs supported (1 octet) */\n+\tetscfg->maxtcs = buf[offset];\n+}\n+\n+/**\n+ * ice_parse_cee_pfccfg_tlv\n+ * @tlv: CEE DCBX PFC CFG TLV\n+ * @dcbcfg: Local store to update PFC CFG data\n+ *\n+ * Parses CEE DCBX PFC CFG TLV\n+ */\n+static void\n+ice_parse_cee_pfccfg_tlv(struct ice_cee_feat_tlv *tlv,\n+\t\t\t struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tu8 *buf = tlv->tlvinfo;\n+\n+\tif (tlv->en_will_err & ICE_CEE_FEAT_TLV_WILLING_M)\n+\t\tdcbcfg->pfc.willing = 1;\n+\n+\t/* ------------------------\n+\t * | PFC Enable | PFC TCs |\n+\t * ------------------------\n+\t * | 1 octet | 1 octet |\n+\t */\n+\tdcbcfg->pfc.pfcena = buf[0];\n+\tdcbcfg->pfc.pfccap = buf[1];\n+}\n+\n+/**\n+ * ice_parse_cee_app_tlv\n+ * @tlv: CEE DCBX APP TLV\n+ * @dcbcfg: Local store to update APP PRIO data\n+ *\n+ * Parses CEE DCBX APP PRIO TLV\n+ */\n+static void\n+ice_parse_cee_app_tlv(struct ice_cee_feat_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tu16 len, typelen, offset = 0;\n+\tstruct ice_cee_app_prio *app;\n+\tu8 i;\n+\n+\ttypelen = NTOHS(tlv->hdr.typelen);\n+\tlen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);\n+\n+\tdcbcfg->numapps = len / sizeof(*app);\n+\tif (!dcbcfg->numapps)\n+\t\treturn;\n+\tif (dcbcfg->numapps > ICE_DCBX_MAX_APPS)\n+\t\tdcbcfg->numapps = ICE_DCBX_MAX_APPS;\n+\n+\tfor (i = 0; i < dcbcfg->numapps; i++) {\n+\t\tu8 up, selector;\n+\n+\t\tapp = (struct ice_cee_app_prio *)(tlv->tlvinfo + offset);\n+\t\tfor (up = 0; up < ICE_MAX_USER_PRIORITY; up++)\n+\t\t\tif (app->prio_map & BIT(up))\n+\t\t\t\tbreak;\n+\n+\t\tdcbcfg->app[i].priority = up;\n+\n+\t\t/* Get Selector from lower 2 bits, and convert to IEEE */\n+\t\tselector = (app->upper_oui_sel & ICE_CEE_APP_SELECTOR_M);\n+\t\tswitch (selector) {\n+\t\tcase ICE_CEE_APP_SEL_ETHTYPE:\n+\t\t\tdcbcfg->app[i].selector = ICE_APP_SEL_ETHTYPE;\n+\t\t\tbreak;\n+\t\tcase ICE_CEE_APP_SEL_TCPIP:\n+\t\t\tdcbcfg->app[i].selector = ICE_APP_SEL_TCPIP;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\t/* Keep selector as it is for unknown types */\n+\t\t\tdcbcfg->app[i].selector = selector;\n+\t\t}\n+\n+\t\tdcbcfg->app[i].prot_id = NTOHS(app->protocol);\n+\t\t/* Move to next app */\n+\t\toffset += sizeof(*app);\n+\t}\n+}\n+\n+/**\n+ * ice_parse_cee_tlv\n+ * @tlv: CEE DCBX TLV\n+ * @dcbcfg: Local store to update DCBX config data\n+ *\n+ * Get the TLV subtype and send it to parsing function\n+ * based on the subtype value\n+ */\n+static void\n+ice_parse_cee_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tstruct ice_cee_feat_tlv *sub_tlv;\n+\tu8 subtype, feat_tlv_count = 0;\n+\tu16 len, tlvlen, typelen;\n+\tu32 ouisubtype;\n+\n+\touisubtype = NTOHL(tlv->ouisubtype);\n+\tsubtype = (u8)((ouisubtype & ICE_LLDP_TLV_SUBTYPE_M) >>\n+\t\t ICE_LLDP_TLV_SUBTYPE_S);\n+\t/* Return if not CEE DCBX */\n+\tif (subtype != ICE_CEE_DCBX_TYPE)\n+\t\treturn;\n+\n+\ttypelen = NTOHS(tlv->typelen);\n+\ttlvlen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);\n+\tlen = sizeof(tlv->typelen) + sizeof(ouisubtype) +\n+\t\tsizeof(struct ice_cee_ctrl_tlv);\n+\t/* Return if no CEE DCBX Feature TLVs */\n+\tif (tlvlen <= len)\n+\t\treturn;\n+\n+\tsub_tlv = (struct ice_cee_feat_tlv *)((char *)tlv + len);\n+\twhile (feat_tlv_count < ICE_CEE_MAX_FEAT_TYPE) {\n+\t\tu16 sublen;\n+\n+\t\ttypelen = NTOHS(sub_tlv->hdr.typelen);\n+\t\tsublen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);\n+\t\tsubtype = (u8)((typelen & ICE_LLDP_TLV_TYPE_M) >>\n+\t\t\t ICE_LLDP_TLV_TYPE_S);\n+\t\tswitch (subtype) {\n+\t\tcase ICE_CEE_SUBTYPE_PG_CFG:\n+\t\t\tice_parse_cee_pgcfg_tlv(sub_tlv, dcbcfg);\n+\t\t\tbreak;\n+\t\tcase ICE_CEE_SUBTYPE_PFC_CFG:\n+\t\t\tice_parse_cee_pfccfg_tlv(sub_tlv, dcbcfg);\n+\t\t\tbreak;\n+\t\tcase ICE_CEE_SUBTYPE_APP_PRI:\n+\t\t\tice_parse_cee_app_tlv(sub_tlv, dcbcfg);\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\treturn;\t/* Invalid Sub-type return */\n+\t\t}\n+\t\tfeat_tlv_count++;\n+\t\t/* Move to next sub TLV */\n+\t\tsub_tlv = (struct ice_cee_feat_tlv *)\n+\t\t\t ((char *)sub_tlv + sizeof(sub_tlv->hdr.typelen) +\n+\t\t\t sublen);\n+\t}\n+}\n+\n+/**\n+ * ice_parse_org_tlv\n+ * @tlv: Organization specific TLV\n+ * @dcbcfg: Local store to update ETS REC data\n+ *\n+ * Currently only IEEE 802.1Qaz TLV is supported, all others\n+ * will be returned\n+ */\n+static void\n+ice_parse_org_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tu32 ouisubtype;\n+\tu32 oui;\n+\n+\touisubtype = NTOHL(tlv->ouisubtype);\n+\toui = ((ouisubtype & ICE_LLDP_TLV_OUI_M) >> ICE_LLDP_TLV_OUI_S);\n+\tswitch (oui) {\n+\tcase ICE_IEEE_8021QAZ_OUI:\n+\t\tice_parse_ieee_tlv(tlv, dcbcfg);\n+\t\tbreak;\n+\tcase ICE_CEE_DCBX_OUI:\n+\t\tice_parse_cee_tlv(tlv, dcbcfg);\n+\t\tbreak;\n+\tdefault:\n+\t\tbreak;\n+\t}\n+}\n+\n+/**\n+ * ice_lldp_to_dcb_cfg\n+ * @lldpmib: LLDPDU to be parsed\n+ * @dcbcfg: store for LLDPDU data\n+ *\n+ * Parse DCB configuration from the LLDPDU\n+ */\n+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tstruct ice_lldp_org_tlv *tlv;\n+\tenum ice_status ret = ICE_SUCCESS;\n+\tu16 offset = 0;\n+\tu16 typelen;\n+\tu16 type;\n+\tu16 len;\n+\n+\tif (!lldpmib || !dcbcfg)\n+\t\treturn ICE_ERR_PARAM;\n+\n+\t/* set to the start of LLDPDU */\n+\tlldpmib += ETH_HEADER_LEN;\n+\ttlv = (struct ice_lldp_org_tlv *)lldpmib;\n+\twhile (1) {\n+\t\ttypelen = NTOHS(tlv->typelen);\n+\t\ttype = ((typelen & ICE_LLDP_TLV_TYPE_M) >> ICE_LLDP_TLV_TYPE_S);\n+\t\tlen = ((typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S);\n+\t\toffset += sizeof(typelen) + len;\n+\n+\t\t/* END TLV or beyond LLDPDU size */\n+\t\tif (type == ICE_TLV_TYPE_END || offset > ICE_LLDPDU_SIZE)\n+\t\t\tbreak;\n+\n+\t\tswitch (type) {\n+\t\tcase ICE_TLV_TYPE_ORG:\n+\t\t\tice_parse_org_tlv(tlv, dcbcfg);\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\t/* Move to next TLV */\n+\t\ttlv = (struct ice_lldp_org_tlv *)\n+\t\t ((char *)tlv + sizeof(tlv->typelen) + len);\n+\t}\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * ice_aq_get_dcb_cfg\n+ * @hw: pointer to the hw struct\n+ * @mib_type: mib type for the query\n+ * @bridgetype: bridge type for the query (remote)\n+ * @dcbcfg: store for LLDPDU data\n+ *\n+ * Query DCB configuration from the firmware\n+ */\n+enum ice_status\n+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,\n+\t\t struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tenum ice_status ret;\n+\tu8 *lldpmib;\n+\n+\t/* Allocate the LLDPDU */\n+\tlldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);\n+\tif (!lldpmib)\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\n+\tret = ice_aq_get_lldp_mib(hw, bridgetype, mib_type, (void *)lldpmib,\n+\t\t\t\t ICE_LLDPDU_SIZE, NULL, NULL, NULL);\n+\n+\tif (ret == ICE_SUCCESS)\n+\t\t/* Parse LLDP MIB to get dcb configuration */\n+\t\tret = ice_lldp_to_dcb_cfg(lldpmib, dcbcfg);\n+\n+\tice_free(hw, lldpmib);\n+\n+\treturn ret;\n+}\n+\n+\n+/**\n+ * ice_aq_start_stop_dcbx - Start/Stop DCBx service in FW\n+ * @hw: pointer to the hw struct\n+ * @start_dcbx_agent: True if DCBx Agent needs to be started\n+ *\t\t False if DCBx Agent needs to be stopped\n+ * @dcbx_agent_status: FW indicates back the DCBx agent status\n+ *\t\t True if DCBx Agent is active\n+ *\t\t False if DCBx Agent is stopped\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Start/Stop the embedded dcbx Agent. In case that this wrapper function\n+ * returns ICE_SUCCESS, caller will need to check if FW returns back the same\n+ * value as stated in dcbx_agent_status, and react accordingly. (0x0A09)\n+ */\n+enum ice_status\n+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,\n+\t\t bool *dcbx_agent_status, struct ice_sq_cd *cd)\n+{\n+\tstruct ice_aqc_lldp_stop_start_specific_agent *cmd;\n+\tenum ice_status status;\n+\tstruct ice_aq_desc desc;\n+\tu16 opcode;\n+\n+\tcmd = &desc.params.lldp_agent_ctrl;\n+\n+\topcode = ice_aqc_opc_lldp_stop_start_specific_agent;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, opcode);\n+\n+\tif (start_dcbx_agent)\n+\t\tcmd->command = ICE_AQC_START_STOP_AGENT_START_DCBX;\n+\n+\tstatus = ice_aq_send_cmd(hw, &desc, NULL, 0, cd);\n+\n+\t*dcbx_agent_status = false;\n+\n+\tif (status == ICE_SUCCESS &&\n+\t cmd->command == ICE_AQC_START_STOP_AGENT_START_DCBX)\n+\t\t*dcbx_agent_status = true;\n+\n+\treturn status;\n+}\n+\n+/**\n+ * ice_aq_get_cee_dcb_cfg\n+ * @hw: pointer to the hw struct\n+ * @buff: response buffer that stores CEE operational configuration\n+ * @cd: pointer to command details structure or NULL\n+ *\n+ * Get CEE DCBX mode operational configuration from firmware (0x0A07)\n+ */\n+enum ice_status\n+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,\n+\t\t struct ice_aqc_get_cee_dcb_cfg_resp *buff,\n+\t\t struct ice_sq_cd *cd)\n+{\n+\tstruct ice_aq_desc desc;\n+\n+\tice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_cee_dcb_cfg);\n+\n+\treturn ice_aq_send_cmd(hw, &desc, (void *)buff, sizeof(*buff), cd);\n+}\n+\n+\n+/**\n+ * ice_cee_to_dcb_cfg\n+ * @cee_cfg: pointer to CEE configuration struct\n+ * @dcbcfg: DCB configuration struct\n+ *\n+ * Convert CEE configuration from firmware to DCB configuration\n+ */\n+static void\n+ice_cee_to_dcb_cfg(struct ice_aqc_get_cee_dcb_cfg_resp *cee_cfg,\n+\t\t struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tu32 status, tlv_status = LE32_TO_CPU(cee_cfg->tlv_status);\n+\tu32 ice_aqc_cee_status_mask, ice_aqc_cee_status_shift;\n+\tu16 app_prio = LE16_TO_CPU(cee_cfg->oper_app_prio);\n+\tu8 i, err, sync, oper, app_index, ice_app_sel_type;\n+\tu16 ice_aqc_cee_app_mask, ice_aqc_cee_app_shift;\n+\tu16 ice_app_prot_id_type;\n+\n+\t/* CEE PG data to ETS config */\n+\tdcbcfg->etscfg.maxtcs = cee_cfg->oper_num_tc;\n+\n+\t/* Note that the FW creates the oper_prio_tc nibbles reversed\n+\t * from those in the CEE Priority Group sub-TLV.\n+\t */\n+\tfor (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {\n+\t\tdcbcfg->etscfg.prio_table[i * 2] =\n+\t\t\t((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_0_M) >>\n+\t\t\t ICE_CEE_PGID_PRIO_0_S);\n+\t\tdcbcfg->etscfg.prio_table[i * 2 + 1] =\n+\t\t\t((cee_cfg->oper_prio_tc[i] & ICE_CEE_PGID_PRIO_1_M) >>\n+\t\t\t ICE_CEE_PGID_PRIO_1_S);\n+\t}\n+\n+\tfor (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {\n+\t\tdcbcfg->etscfg.tcbwtable[i] = cee_cfg->oper_tc_bw[i];\n+\n+\t\tif (dcbcfg->etscfg.prio_table[i] == ICE_CEE_PGID_STRICT) {\n+\t\t\t/* Map it to next empty TC */\n+\t\t\tdcbcfg->etscfg.prio_table[i] = cee_cfg->oper_num_tc - 1;\n+\t\t\tdcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_STRICT;\n+\t\t} else {\n+\t\t\tdcbcfg->etscfg.tsatable[i] = ICE_IEEE_TSA_ETS;\n+\t\t}\n+\t}\n+\n+\t/* CEE PFC data to ETS config */\n+\tdcbcfg->pfc.pfcena = cee_cfg->oper_pfc_en;\n+\tdcbcfg->pfc.pfccap = ICE_MAX_TRAFFIC_CLASS;\n+\n+\tapp_index = 0;\n+\tfor (i = 0; i < 3; i++) {\n+\t\tif (i == 0) {\n+\t\t\t/* FCoE APP */\n+\t\t\tice_aqc_cee_status_mask = ICE_AQC_CEE_FCOE_STATUS_M;\n+\t\t\tice_aqc_cee_status_shift = ICE_AQC_CEE_FCOE_STATUS_S;\n+\t\t\tice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FCOE_M;\n+\t\t\tice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FCOE_S;\n+\t\t\tice_app_sel_type = ICE_APP_SEL_ETHTYPE;\n+\t\t\tice_app_prot_id_type = ICE_APP_PROT_ID_FCOE;\n+\t\t} else if (i == 1) {\n+\t\t\t/* iSCSI APP */\n+\t\t\tice_aqc_cee_status_mask = ICE_AQC_CEE_ISCSI_STATUS_M;\n+\t\t\tice_aqc_cee_status_shift = ICE_AQC_CEE_ISCSI_STATUS_S;\n+\t\t\tice_aqc_cee_app_mask = ICE_AQC_CEE_APP_ISCSI_M;\n+\t\t\tice_aqc_cee_app_shift = ICE_AQC_CEE_APP_ISCSI_S;\n+\t\t\tice_app_sel_type = ICE_APP_SEL_TCPIP;\n+\t\t\tice_app_prot_id_type = ICE_APP_PROT_ID_ISCSI;\n+\t\t} else {\n+\t\t\t/* FIP APP */\n+\t\t\tice_aqc_cee_status_mask = ICE_AQC_CEE_FIP_STATUS_M;\n+\t\t\tice_aqc_cee_status_shift = ICE_AQC_CEE_FIP_STATUS_S;\n+\t\t\tice_aqc_cee_app_mask = ICE_AQC_CEE_APP_FIP_M;\n+\t\t\tice_aqc_cee_app_shift = ICE_AQC_CEE_APP_FIP_S;\n+\t\t\tice_app_sel_type = ICE_APP_SEL_ETHTYPE;\n+\t\t\tice_app_prot_id_type = ICE_APP_PROT_ID_FIP;\n+\t\t}\n+\n+\t\tstatus = (tlv_status & ice_aqc_cee_status_mask) >>\n+\t\t\t ice_aqc_cee_status_shift;\n+\t\terr = (status & ICE_TLV_STATUS_ERR) ? 1 : 0;\n+\t\tsync = (status & ICE_TLV_STATUS_SYNC) ? 1 : 0;\n+\t\toper = (status & ICE_TLV_STATUS_OPER) ? 1 : 0;\n+\t\t/* Add FCoE/iSCSI/FIP APP if Error is False and\n+\t\t * Oper/Sync is True\n+\t\t */\n+\t\tif (!err && sync && oper) {\n+\t\t\tdcbcfg->app[app_index].priority =\n+\t\t\t\t(app_prio & ice_aqc_cee_app_mask) >>\n+\t\t\t\tice_aqc_cee_app_shift;\n+\t\t\tdcbcfg->app[app_index].selector = ice_app_sel_type;\n+\t\t\tdcbcfg->app[app_index].prot_id = ice_app_prot_id_type;\n+\t\t\tapp_index++;\n+\t\t}\n+\t}\n+\n+\tdcbcfg->numapps = app_index;\n+}\n+\n+/**\n+ * ice_get_ieee_dcb_cfg\n+ * @pi: port information structure\n+ * @dcbx_mode: mode of DCBX (IEEE or CEE)\n+ *\n+ * Get IEEE or CEE mode DCB configuration from the Firmware\n+ */\n+STATIC enum ice_status\n+ice_get_ieee_or_cee_dcb_cfg(struct ice_port_info *pi, u8 dcbx_mode)\n+{\n+\tstruct ice_dcbx_cfg *dcbx_cfg = NULL;\n+\tenum ice_status ret;\n+\n+\tif (!pi)\n+\t\treturn ICE_ERR_PARAM;\n+\n+\tif (dcbx_mode == ICE_DCBX_MODE_IEEE)\n+\t\tdcbx_cfg = &pi->local_dcbx_cfg;\n+\telse if (dcbx_mode == ICE_DCBX_MODE_CEE)\n+\t\tdcbx_cfg = &pi->desired_dcbx_cfg;\n+\n+\t/* Get Local DCB Config in case of ICE_DCBX_MODE_IEEE\n+\t * or get CEE DCB Desired Config in case of ICE_DCBX_MODE_CEE\n+\t */\n+\tret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_LOCAL,\n+\t\t\t\t ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);\n+\tif (ret)\n+\t\tgoto out;\n+\n+\t/* Get Remote DCB Config */\n+\tdcbx_cfg = &pi->remote_dcbx_cfg;\n+\tret = ice_aq_get_dcb_cfg(pi->hw, ICE_AQ_LLDP_MIB_REMOTE,\n+\t\t\t\t ICE_AQ_LLDP_BRID_TYPE_NEAREST_BRID, dcbx_cfg);\n+\t/* Don't treat ENOENT as an error for Remote MIBs */\n+\tif (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT)\n+\t\tret = ICE_SUCCESS;\n+\n+out:\n+\treturn ret;\n+}\n+\n+/**\n+ * ice_get_dcb_cfg\n+ * @pi: port information structure\n+ *\n+ * Get DCB configuration from the Firmware\n+ */\n+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi)\n+{\n+\tstruct ice_aqc_get_cee_dcb_cfg_resp cee_cfg;\n+\tstruct ice_dcbx_cfg *dcbx_cfg;\n+\tenum ice_status ret;\n+\n+\tif (!pi)\n+\t\treturn ICE_ERR_PARAM;\n+\n+\tret = ice_aq_get_cee_dcb_cfg(pi->hw, &cee_cfg, NULL);\n+\tif (ret == ICE_SUCCESS) {\n+\t\t/* CEE mode */\n+\t\tdcbx_cfg = &pi->local_dcbx_cfg;\n+\t\tdcbx_cfg->dcbx_mode = ICE_DCBX_MODE_CEE;\n+\t\tdcbx_cfg->tlv_status = LE32_TO_CPU(cee_cfg.tlv_status);\n+\t\tice_cee_to_dcb_cfg(&cee_cfg, dcbx_cfg);\n+\t\tret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_CEE);\n+\t} else if (pi->hw->adminq.sq_last_status == ICE_AQ_RC_ENOENT) {\n+\t\t/* CEE mode not enabled try querying IEEE data */\n+\t\tdcbx_cfg = &pi->local_dcbx_cfg;\n+\t\tdcbx_cfg->dcbx_mode = ICE_DCBX_MODE_IEEE;\n+\t\tret = ice_get_ieee_or_cee_dcb_cfg(pi, ICE_DCBX_MODE_IEEE);\n+\t}\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * ice_init_dcb\n+ * @hw: pointer to the hw struct\n+ *\n+ * Update DCB configuration from the Firmware\n+ */\n+enum ice_status ice_init_dcb(struct ice_hw *hw)\n+{\n+\tstruct ice_port_info *pi;\n+\tenum ice_status ret = ICE_SUCCESS;\n+\n+\tif (!hw->func_caps.common_cap.dcb)\n+\t\treturn ret;\n+\tpi = hw->port_info;\n+\tpi->is_sw_lldp = true;\n+\n+\t/* Get DCBX status */\n+\tpi->dcbx_status = ice_get_dcbx_status(hw);\n+\n+\t/* Check the DCBX Status */\n+\tswitch (pi->dcbx_status) {\n+\tcase ICE_DCBX_STATUS_NOT_STARTED:\n+\t\tbreak;\n+\tcase ICE_DCBX_STATUS_DIS:\n+\t\t/* DCBx not in usable state, stop init */\n+\t\treturn ret;\n+\tcase ICE_DCBX_STATUS_DONE:\n+\tcase ICE_DCBX_STATUS_IN_PROGRESS:\n+\t\t/* Get current DCBX configuration */\n+\t\tret = ice_get_dcb_cfg(pi);\n+\t\tpi->is_sw_lldp = (hw->adminq.sq_last_status == ICE_AQ_RC_EPERM);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t\tbreak;\n+\tcase ICE_DCBX_STATUS_MULTIPLE_PEERS:\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\t/* Configure the LLDP MIB change event */\n+\tret = ice_aq_cfg_lldp_mib_change(hw, true, NULL);\n+\tif (!ret)\n+\t\tpi->is_sw_lldp = false;\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * ice_add_ieee_ets_common_tlv\n+ * @buf: Data buffer to be populated with ice_dcb_ets_cfg data\n+ * @ets_cfg: Container for ice_dcb_ets_cfg data\n+ *\n+ * Populate the TLV buffer with ice_dcb_ets_cfg data\n+ */\n+static void\n+ice_add_ieee_ets_common_tlv(u8 *buf, struct ice_dcb_ets_cfg *ets_cfg)\n+{\n+\tu8 priority0, priority1;\n+\tu8 offset = 0;\n+\tint i;\n+\n+\t/* Priority Assignment Table (4 octets)\n+\t * Octets:| 1 | 2 | 3 | 4 |\n+\t * -----------------------------------------\n+\t * |pri0|pri1|pri2|pri3|pri4|pri5|pri6|pri7|\n+\t * -----------------------------------------\n+\t * Bits:|7 4|3 0|7 4|3 0|7 4|3 0|7 4|3 0|\n+\t * -----------------------------------------\n+\t */\n+\tfor (i = 0; i < ICE_MAX_TRAFFIC_CLASS / 2; i++) {\n+\t\tpriority0 = ets_cfg->prio_table[i * 2] & 0xF;\n+\t\tpriority1 = ets_cfg->prio_table[i * 2 + 1] & 0xF;\n+\t\tbuf[offset] = (priority0 << ICE_IEEE_ETS_PRIO_1_S) | priority1;\n+\t\toffset++;\n+\t}\n+\n+\t/* TC Bandwidth Table (8 octets)\n+\t * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |\n+\t * ---------------------------------\n+\t * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|\n+\t * ---------------------------------\n+\t *\n+\t * TSA Assignment Table (8 octets)\n+\t * Octets:| 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 |\n+\t * ---------------------------------\n+\t * |tc0|tc1|tc2|tc3|tc4|tc5|tc6|tc7|\n+\t * ---------------------------------\n+\t */\n+\tfor (i = 0; i < ICE_MAX_TRAFFIC_CLASS; i++) {\n+\t\tbuf[offset] = ets_cfg->tcbwtable[i];\n+\t\tbuf[ICE_MAX_TRAFFIC_CLASS + offset] = ets_cfg->tsatable[i];\n+\t\toffset++;\n+\t}\n+}\n+\n+/**\n+ * ice_add_ieee_ets_tlv - Prepare ETS TLV in IEEE format\n+ * @tlv: Fill the ETS config data in IEEE format\n+ * @dcbcfg: Local store which holds the DCB Config\n+ *\n+ * Prepare IEEE 802.1Qaz ETS CFG TLV\n+ */\n+static void\n+ice_add_ieee_ets_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tstruct ice_dcb_ets_cfg *etscfg;\n+\tu8 *buf = tlv->tlvinfo;\n+\tu8 maxtcwilling = 0;\n+\tu32 ouisubtype;\n+\tu16 typelen;\n+\n+\ttypelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |\n+\t\t ICE_IEEE_ETS_TLV_LEN);\n+\ttlv->typelen = HTONS(typelen);\n+\n+\touisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |\n+\t\t ICE_IEEE_SUBTYPE_ETS_CFG);\n+\ttlv->ouisubtype = HTONL(ouisubtype);\n+\n+\t/* First Octet post subtype\n+\t * --------------------------\n+\t * |will-|CBS | Re- | Max |\n+\t * |ing | |served| TCs |\n+\t * --------------------------\n+\t * |1bit | 1bit|3 bits|3bits|\n+\t */\n+\tetscfg = &dcbcfg->etscfg;\n+\tif (etscfg->willing)\n+\t\tmaxtcwilling = BIT(ICE_IEEE_ETS_WILLING_S);\n+\tmaxtcwilling |= etscfg->maxtcs & ICE_IEEE_ETS_MAXTC_M;\n+\tbuf[0] = maxtcwilling;\n+\n+\t/* Begin adding at Priority Assignment Table (offset 1 in buf) */\n+\tice_add_ieee_ets_common_tlv(&buf[1], etscfg);\n+}\n+\n+/**\n+ * ice_add_ieee_etsrec_tlv - Prepare ETS Recommended TLV in IEEE format\n+ * @tlv: Fill ETS Recommended TLV in IEEE format\n+ * @dcbcfg: Local store which holds the DCB Config\n+ *\n+ * Prepare IEEE 802.1Qaz ETS REC TLV\n+ */\n+static void\n+ice_add_ieee_etsrec_tlv(struct ice_lldp_org_tlv *tlv,\n+\t\t\tstruct ice_dcbx_cfg *dcbcfg)\n+{\n+\tstruct ice_dcb_ets_cfg *etsrec;\n+\tu8 *buf = tlv->tlvinfo;\n+\tu32 ouisubtype;\n+\tu16 typelen;\n+\n+\ttypelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |\n+\t\t ICE_IEEE_ETS_TLV_LEN);\n+\ttlv->typelen = HTONS(typelen);\n+\n+\touisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |\n+\t\t ICE_IEEE_SUBTYPE_ETS_REC);\n+\ttlv->ouisubtype = HTONL(ouisubtype);\n+\n+\tetsrec = &dcbcfg->etsrec;\n+\n+\t/* First Octet is reserved */\n+\t/* Begin adding at Priority Assignment Table (offset 1 in buf) */\n+\tice_add_ieee_ets_common_tlv(&buf[1], etsrec);\n+}\n+\n+/**\n+ * ice_add_ieee_pfc_tlv - Prepare PFC TLV in IEEE format\n+ * @tlv: Fill PFC TLV in IEEE format\n+ * @dcbcfg: Local store which holds the PFC CFG data\n+ *\n+ * Prepare IEEE 802.1Qaz PFC CFG TLV\n+ */\n+static void\n+ice_add_ieee_pfc_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tu8 *buf = tlv->tlvinfo;\n+\tu32 ouisubtype;\n+\tu16 typelen;\n+\n+\ttypelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) |\n+\t\t ICE_IEEE_PFC_TLV_LEN);\n+\ttlv->typelen = HTONS(typelen);\n+\n+\touisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |\n+\t\t ICE_IEEE_SUBTYPE_PFC_CFG);\n+\ttlv->ouisubtype = HTONL(ouisubtype);\n+\n+\t/* ----------------------------------------\n+\t * |will-|MBC | Re- | PFC | PFC Enable |\n+\t * |ing | |served| cap | |\n+\t * -----------------------------------------\n+\t * |1bit | 1bit|2 bits|4bits| 1 octet |\n+\t */\n+\tif (dcbcfg->pfc.willing)\n+\t\tbuf[0] = BIT(ICE_IEEE_PFC_WILLING_S);\n+\n+\tif (dcbcfg->pfc.mbc)\n+\t\tbuf[0] |= BIT(ICE_IEEE_PFC_MBC_S);\n+\n+\tbuf[0] |= dcbcfg->pfc.pfccap & 0xF;\n+\tbuf[1] = dcbcfg->pfc.pfcena;\n+}\n+\n+/**\n+ * ice_add_ieee_app_pri_tlv - Prepare APP TLV in IEEE format\n+ * @tlv: Fill APP TLV in IEEE format\n+ * @dcbcfg: Local store which holds the APP CFG data\n+ *\n+ * Prepare IEEE 802.1Qaz APP CFG TLV\n+ */\n+static void\n+ice_add_ieee_app_pri_tlv(struct ice_lldp_org_tlv *tlv,\n+\t\t\t struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tu16 typelen, len, offset = 0;\n+\tu8 priority, selector, i = 0;\n+\tu8 *buf = tlv->tlvinfo;\n+\tu32 ouisubtype;\n+\n+\t/* No APP TLVs then just return */\n+\tif (dcbcfg->numapps == 0)\n+\t\treturn;\n+\touisubtype = ((ICE_IEEE_8021QAZ_OUI << ICE_LLDP_TLV_OUI_S) |\n+\t\t ICE_IEEE_SUBTYPE_APP_PRI);\n+\ttlv->ouisubtype = HTONL(ouisubtype);\n+\n+\t/* Move offset to App Priority Table */\n+\toffset++;\n+\t/* Application Priority Table (3 octets)\n+\t * Octets:| 1 | 2 | 3 |\n+\t * -----------------------------------------\n+\t * |Priority|Rsrvd| Sel | Protocol ID |\n+\t * -----------------------------------------\n+\t * Bits:|23 21|20 19|18 16|15 0|\n+\t * -----------------------------------------\n+\t */\n+\twhile (i < dcbcfg->numapps) {\n+\t\tpriority = dcbcfg->app[i].priority & 0x7;\n+\t\tselector = dcbcfg->app[i].selector & 0x7;\n+\t\tbuf[offset] = (priority << ICE_IEEE_APP_PRIO_S) | selector;\n+\t\tbuf[offset + 1] = (dcbcfg->app[i].prot_id >> 0x8) & 0xFF;\n+\t\tbuf[offset + 2] = dcbcfg->app[i].prot_id & 0xFF;\n+\t\t/* Move to next app */\n+\t\toffset += 3;\n+\t\ti++;\n+\t\tif (i >= ICE_DCBX_MAX_APPS)\n+\t\t\tbreak;\n+\t}\n+\t/* len includes size of ouisubtype + 1 reserved + 3*numapps */\n+\tlen = sizeof(tlv->ouisubtype) + 1 + (i * 3);\n+\ttypelen = ((ICE_TLV_TYPE_ORG << ICE_LLDP_TLV_TYPE_S) | (len & 0x1FF));\n+\ttlv->typelen = HTONS(typelen);\n+}\n+\n+/**\n+ * ice_add_dcb_tlv - Add all IEEE TLVs\n+ * @tlv: Fill TLV data in IEEE format\n+ * @dcbcfg: Local store which holds the DCB Config\n+ * @tlvid: Type of IEEE TLV\n+ *\n+ * Add tlv information\n+ */\n+static void\n+ice_add_dcb_tlv(struct ice_lldp_org_tlv *tlv, struct ice_dcbx_cfg *dcbcfg,\n+\t\tu16 tlvid)\n+{\n+\tswitch (tlvid) {\n+\tcase ICE_IEEE_TLV_ID_ETS_CFG:\n+\t\tice_add_ieee_ets_tlv(tlv, dcbcfg);\n+\t\tbreak;\n+\tcase ICE_IEEE_TLV_ID_ETS_REC:\n+\t\tice_add_ieee_etsrec_tlv(tlv, dcbcfg);\n+\t\tbreak;\n+\tcase ICE_IEEE_TLV_ID_PFC_CFG:\n+\t\tice_add_ieee_pfc_tlv(tlv, dcbcfg);\n+\t\tbreak;\n+\tcase ICE_IEEE_TLV_ID_APP_PRI:\n+\t\tice_add_ieee_app_pri_tlv(tlv, dcbcfg);\n+\t\tbreak;\n+\tdefault:\n+\t\tbreak;\n+\t}\n+}\n+\n+/**\n+ * ice_dcb_cfg_to_lldp - Convert DCB configuration to MIB format\n+ * @lldpmib: pointer to the hw struct\n+ * @miblen: length of LLDP mib\n+ * @dcbcfg: Local store which holds the DCB Config\n+ *\n+ * Convert the DCB configuration to MIB format\n+ */\n+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg)\n+{\n+\tu16 len, offset = 0, tlvid = ICE_TLV_ID_START;\n+\tstruct ice_lldp_org_tlv *tlv;\n+\tu16 typelen;\n+\n+\ttlv = (struct ice_lldp_org_tlv *)lldpmib;\n+\twhile (1) {\n+\t\tice_add_dcb_tlv(tlv, dcbcfg, tlvid++);\n+\t\ttypelen = NTOHS(tlv->typelen);\n+\t\tlen = (typelen & ICE_LLDP_TLV_LEN_M) >> ICE_LLDP_TLV_LEN_S;\n+\t\tif (len)\n+\t\t\toffset += len + 2;\n+\t\t/* END TLV or beyond LLDPDU size */\n+\t\tif (tlvid >= ICE_TLV_ID_END_OF_LLDPPDU ||\n+\t\t offset > ICE_LLDPDU_SIZE)\n+\t\t\tbreak;\n+\t\t/* Move to next TLV */\n+\t\tif (len)\n+\t\t\ttlv = (struct ice_lldp_org_tlv *)\n+\t\t\t\t((char *)tlv + sizeof(tlv->typelen) + len);\n+\t}\n+\t*miblen = offset;\n+}\n+\n+/**\n+ * ice_set_dcb_cfg - Set the local LLDP MIB to FW\n+ * @pi: port information structure\n+ *\n+ * Set DCB configuration to the Firmware\n+ */\n+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi)\n+{\n+\tu8 mib_type, *lldpmib = NULL;\n+\tstruct ice_dcbx_cfg *dcbcfg;\n+\tenum ice_status ret;\n+\tstruct ice_hw *hw;\n+\tu16 miblen;\n+\n+\tif (!pi)\n+\t\treturn ICE_ERR_PARAM;\n+\n+\thw = pi->hw;\n+\n+\t/* update the hw local config */\n+\tdcbcfg = &pi->local_dcbx_cfg;\n+\t/* Allocate the LLDPDU */\n+\tlldpmib = (u8 *)ice_malloc(hw, ICE_LLDPDU_SIZE);\n+\tif (!lldpmib)\n+\t\treturn ICE_ERR_NO_MEMORY;\n+\n+\tmib_type = SET_LOCAL_MIB_TYPE_LOCAL_MIB;\n+\tif (dcbcfg->app_mode == ICE_DCBX_APPS_NON_WILLING)\n+\t\tmib_type |= SET_LOCAL_MIB_TYPE_CEE_NON_WILLING;\n+\n+\tice_dcb_cfg_to_lldp(lldpmib, &miblen, dcbcfg);\n+\tret = ice_aq_set_lldp_mib(hw, mib_type, (void *)lldpmib, miblen,\n+\t\t\t\t NULL);\n+\n+\tice_free(hw, lldpmib);\n+\n+\treturn ret;\n+}\n+\n+/**\n+ * ice_aq_query_cfg_port_ets - query or config port ets configuration\n+ * @pi: port information structure\n+ * @buf: pointer to buffer\n+ * @buf_size: buffer size in bytes\n+ * @cd: pointer to command details structure or NULL\n+ * @opcode: query or config port ets\n+ *\n+ * query current or config port ets configuration\n+ */\n+enum ice_status\n+ice_aq_query_cfg_port_ets(struct ice_port_info *pi,\n+\t\t\t struct ice_aqc_port_ets_elem *buf, u16 buf_size,\n+\t\t\t struct ice_sq_cd *cd, enum ice_adminq_opc opcode)\n+{\n+\tstruct ice_aqc_cfg_query_port_ets *cmd;\n+\tstruct ice_aq_desc desc;\n+\tenum ice_status status;\n+\n+\tif (!pi)\n+\t\treturn ICE_ERR_PARAM;\n+\tcmd = &desc.params.port_ets;\n+\tice_fill_dflt_direct_cmd_desc(&desc, opcode);\n+\tcmd->port_teid = pi->root->info.node_teid;\n+\n+\tif (opcode == ice_aqc_opc_cfg_port_ets)\n+\t\tdesc.flags |= CPU_TO_LE16(ICE_AQ_FLAG_RD);\n+\n+\tstatus = ice_aq_send_cmd(pi->hw, &desc, buf, buf_size, cd);\n+\treturn status;\n+}\n+\n+/**\n+ * ice_update_port_tc_tree_cfg - update tc tree configuration\n+ * @pi: port information structure\n+ * @buf: pointer to buffer\n+ *\n+ * update the SW DB with the new TC changes\n+ */\n+enum ice_status\n+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,\n+\t\t\t struct ice_aqc_port_ets_elem *buf)\n+{\n+\tstruct ice_sched_node *node, *tc_node;\n+\tstruct ice_aqc_get_elem elem;\n+\tenum ice_status status = ICE_SUCCESS;\n+\tu32 teid1, teid2;\n+\tu8 i, j;\n+\n+\tif (!pi)\n+\t\treturn ICE_ERR_PARAM;\n+\t/* suspend the missing TC nodes */\n+\tfor (i = 0; i < pi->root->num_children; i++) {\n+\t\tteid1 = LE32_TO_CPU(pi->root->children[i]->info.node_teid);\n+\t\tfor (j = 0; j < ICE_MAX_TRAFFIC_CLASS; j++) {\n+\t\t\tteid2 = LE32_TO_CPU(buf->tc_node_teid[j]);\n+\t\t\tif (teid1 == teid2)\n+\t\t\t\tbreak;\n+\t\t}\n+\t\tif (j < ICE_MAX_TRAFFIC_CLASS)\n+\t\t\tcontinue;\n+\t\t/* TC is missing */\n+\t\tpi->root->children[i]->in_use = false;\n+\t}\n+\t/* add the new TC nodes */\n+\tfor (j = 0; j < ICE_MAX_TRAFFIC_CLASS; j++) {\n+\t\tteid2 = LE32_TO_CPU(buf->tc_node_teid[j]);\n+\t\tif (teid2 == ICE_INVAL_TEID)\n+\t\t\tcontinue;\n+\t\t/* Is it already present in the tree ? */\n+\t\tfor (i = 0; i < pi->root->num_children; i++) {\n+\t\t\ttc_node = pi->root->children[i];\n+\t\t\tif (!tc_node)\n+\t\t\t\tcontinue;\n+\t\t\tteid1 = LE32_TO_CPU(tc_node->info.node_teid);\n+\t\t\tif (teid1 == teid2) {\n+\t\t\t\ttc_node->tc_num = j;\n+\t\t\t\ttc_node->in_use = true;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\t\tif (i < pi->root->num_children)\n+\t\t\tcontinue;\n+\t\t/* new TC */\n+\t\tstatus = ice_sched_query_elem(pi->hw, teid2, &elem);\n+\t\tif (!status)\n+\t\t\tstatus = ice_sched_add_node(pi, 1, &elem.generic[0]);\n+\t\tif (status)\n+\t\t\tbreak;\n+\t\t/* update the TC number */\n+\t\tnode = ice_sched_find_node_by_teid(pi->root, teid2);\n+\t\tif (node)\n+\t\t\tnode->tc_num = j;\n+\t}\n+\treturn status;\n+}\n+\n+/**\n+ * ice_query_cfg_port_ets - query or config port ets configuration\n+ * @pi: port information structure\n+ * @buf: pointer to buffer\n+ * @buf_size: buffer size in bytes\n+ * @cd: pointer to command details structure or NULL\n+ * @config: true - config port ets, false - query port ets\n+ *\n+ * query current/config port ets configuration and update the\n+ * SW DB with the TC changes\n+ */\n+enum ice_status\n+ice_query_cfg_port_ets(struct ice_port_info *pi,\n+\t\t struct ice_aqc_port_ets_elem *buf, u16 buf_size,\n+\t\t struct ice_sq_cd *cd, bool config)\n+{\n+\tenum ice_adminq_opc opcode;\n+\tenum ice_status status;\n+\n+\topcode = config ? ice_aqc_opc_cfg_port_ets : ice_aqc_opc_query_port_ets;\n+\tice_acquire_lock(&pi->sched_lock);\n+\tstatus = ice_aq_query_cfg_port_ets(pi, buf, buf_size, cd, opcode);\n+\tif (!status)\n+\t\tstatus = ice_update_port_tc_tree_cfg(pi, buf);\n+\tice_release_lock(&pi->sched_lock);\n+\treturn status;\n+}\ndiff --git a/drivers/net/ice/base/ice_dcb.h b/drivers/net/ice/base/ice_dcb.h\nnew file mode 100644\nindex 0000000..b0e5a5f\n--- /dev/null\n+++ b/drivers/net/ice/base/ice_dcb.h\n@@ -0,0 +1,220 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2001-2018\n+ */\n+\n+#ifndef _ICE_DCB_H_\n+#define _ICE_DCB_H_\n+\n+#include \"ice_type.h\"\n+\n+#define ICE_DCBX_OFFLOAD_DIS\t\t0\n+#define ICE_DCBX_OFFLOAD_ENABLED\t1\n+\n+#define ICE_DCBX_STATUS_NOT_STARTED\t0\n+#define ICE_DCBX_STATUS_IN_PROGRESS\t1\n+#define ICE_DCBX_STATUS_DONE\t\t2\n+#define ICE_DCBX_STATUS_MULTIPLE_PEERS\t3\n+#define ICE_DCBX_STATUS_DIS\t\t7\n+\n+#define ICE_TLV_TYPE_END\t\t0\n+#define ICE_TLV_TYPE_ORG\t\t127\n+\n+#define ICE_IEEE_8021QAZ_OUI\t\t0x0080C2\n+#define ICE_IEEE_SUBTYPE_ETS_CFG\t9\n+#define ICE_IEEE_SUBTYPE_ETS_REC\t10\n+#define ICE_IEEE_SUBTYPE_PFC_CFG\t11\n+#define ICE_IEEE_SUBTYPE_APP_PRI\t12\n+\n+#define ICE_CEE_DCBX_OUI\t\t0x001B21\n+#define ICE_CEE_DCBX_TYPE\t\t2\n+\n+#define ICE_CEE_SUBTYPE_CTRL\t\t1\n+#define ICE_CEE_SUBTYPE_PG_CFG\t\t2\n+#define ICE_CEE_SUBTYPE_PFC_CFG\t\t3\n+#define ICE_CEE_SUBTYPE_APP_PRI\t\t4\n+\n+#define ICE_CEE_MAX_FEAT_TYPE\t\t3\n+#define ICE_LLDP_ADMINSTATUS_DIS\t0\n+#define ICE_LLDP_ADMINSTATUS_ENA_RX\t1\n+#define ICE_LLDP_ADMINSTATUS_ENA_TX\t2\n+#define ICE_LLDP_ADMINSTATUS_ENA_RXTX\t3\n+\n+/* Defines for LLDP TLV header */\n+#define ICE_LLDP_TLV_LEN_S\t\t0\n+#define ICE_LLDP_TLV_LEN_M\t\t(0x01FF << ICE_LLDP_TLV_LEN_S)\n+#define ICE_LLDP_TLV_TYPE_S\t\t9\n+#define ICE_LLDP_TLV_TYPE_M\t\t(0x7F << ICE_LLDP_TLV_TYPE_S)\n+#define ICE_LLDP_TLV_SUBTYPE_S\t\t0\n+#define ICE_LLDP_TLV_SUBTYPE_M\t\t(0xFF << ICE_LLDP_TLV_SUBTYPE_S)\n+#define ICE_LLDP_TLV_OUI_S\t\t8\n+#define ICE_LLDP_TLV_OUI_M\t\t(0xFFFFFFUL << ICE_LLDP_TLV_OUI_S)\n+\n+/* Defines for IEEE ETS TLV */\n+#define ICE_IEEE_ETS_MAXTC_S\t0\n+#define ICE_IEEE_ETS_MAXTC_M\t\t(0x7 << ICE_IEEE_ETS_MAXTC_S)\n+#define ICE_IEEE_ETS_CBS_S\t\t6\n+#define ICE_IEEE_ETS_CBS_M\t\tBIT(ICE_IEEE_ETS_CBS_S)\n+#define ICE_IEEE_ETS_WILLING_S\t\t7\n+#define ICE_IEEE_ETS_WILLING_M\t\tBIT(ICE_IEEE_ETS_WILLING_S)\n+#define ICE_IEEE_ETS_PRIO_0_S\t\t0\n+#define ICE_IEEE_ETS_PRIO_0_M\t\t(0x7 << ICE_IEEE_ETS_PRIO_0_S)\n+#define ICE_IEEE_ETS_PRIO_1_S\t\t4\n+#define ICE_IEEE_ETS_PRIO_1_M\t\t(0x7 << ICE_IEEE_ETS_PRIO_1_S)\n+#define ICE_CEE_PGID_PRIO_0_S\t\t0\n+#define ICE_CEE_PGID_PRIO_0_M\t\t(0xF << ICE_CEE_PGID_PRIO_0_S)\n+#define ICE_CEE_PGID_PRIO_1_S\t\t4\n+#define ICE_CEE_PGID_PRIO_1_M\t\t(0xF << ICE_CEE_PGID_PRIO_1_S)\n+#define ICE_CEE_PGID_STRICT\t\t15\n+\n+/* Defines for IEEE TSA types */\n+#define ICE_IEEE_TSA_STRICT\t\t0\n+#define ICE_IEEE_TSA_CBS\t\t1\n+#define ICE_IEEE_TSA_ETS\t\t2\n+#define ICE_IEEE_TSA_VENDOR\t\t255\n+\n+/* Defines for IEEE PFC TLV */\n+#define ICE_IEEE_PFC_CAP_S\t\t0\n+#define ICE_IEEE_PFC_CAP_M\t\t(0xF << ICE_IEEE_PFC_CAP_S)\n+#define ICE_IEEE_PFC_MBC_S\t\t6\n+#define ICE_IEEE_PFC_MBC_M\t\tBIT(ICE_IEEE_PFC_MBC_S)\n+#define ICE_IEEE_PFC_WILLING_S\t\t7\n+#define ICE_IEEE_PFC_WILLING_M\t\tBIT(ICE_IEEE_PFC_WILLING_S)\n+\n+/* Defines for IEEE APP TLV */\n+#define ICE_IEEE_APP_SEL_S\t\t0\n+#define ICE_IEEE_APP_SEL_M\t\t(0x7 << ICE_IEEE_APP_SEL_S)\n+#define ICE_IEEE_APP_PRIO_S\t\t5\n+#define ICE_IEEE_APP_PRIO_M\t\t(0x7 << ICE_IEEE_APP_PRIO_S)\n+\n+/* TLV definitions for preparing MIB */\n+#define ICE_TLV_ID_CHASSIS_ID\t\t0\n+#define ICE_TLV_ID_PORT_ID\t\t1\n+#define ICE_TLV_ID_TIME_TO_LIVE\t\t2\n+#define ICE_IEEE_TLV_ID_ETS_CFG\t\t3\n+#define ICE_IEEE_TLV_ID_ETS_REC\t\t4\n+#define ICE_IEEE_TLV_ID_PFC_CFG\t\t5\n+#define ICE_IEEE_TLV_ID_APP_PRI\t\t6\n+#define ICE_TLV_ID_END_OF_LLDPPDU\t7\n+#define ICE_TLV_ID_START\t\tICE_IEEE_TLV_ID_ETS_CFG\n+\n+#define ICE_IEEE_ETS_TLV_LEN\t\t25\n+#define ICE_IEEE_PFC_TLV_LEN\t\t6\n+#define ICE_IEEE_APP_TLV_LEN\t\t11\n+\n+#pragma pack(1)\n+/* IEEE 802.1AB LLDP TLV structure */\n+struct ice_lldp_generic_tlv {\n+\t__be16 typelen;\n+\tu8 tlvinfo[1];\n+};\n+\n+/* IEEE 802.1AB LLDP Organization specific TLV */\n+struct ice_lldp_org_tlv {\n+\t__be16 typelen;\n+\t__be32 ouisubtype;\n+\tu8 tlvinfo[1];\n+};\n+#pragma pack()\n+\n+struct ice_cee_tlv_hdr {\n+\t__be16 typelen;\n+\tu8 operver;\n+\tu8 maxver;\n+};\n+\n+struct ice_cee_ctrl_tlv {\n+\tstruct ice_cee_tlv_hdr hdr;\n+\t__be32 seqno;\n+\t__be32 ackno;\n+};\n+\n+struct ice_cee_feat_tlv {\n+\tstruct ice_cee_tlv_hdr hdr;\n+\tu8 en_will_err; /* Bits: |En|Will|Err|Reserved(5)| */\n+#define ICE_CEE_FEAT_TLV_ENA_M\t\t0x80\n+#define ICE_CEE_FEAT_TLV_WILLING_M\t0x40\n+#define ICE_CEE_FEAT_TLV_ERR_M\t\t0x20\n+\tu8 subtype;\n+\tu8 tlvinfo[1];\n+};\n+\n+#pragma pack(1)\n+struct ice_cee_app_prio {\n+\t__be16 protocol;\n+\tu8 upper_oui_sel; /* Bits: |Upper OUI(6)|Selector(2)| */\n+#define ICE_CEE_APP_SELECTOR_M\t0x03\n+\t__be16 lower_oui;\n+\tu8 prio_map;\n+};\n+#pragma pack()\n+\n+/* TODO: The below structures related LLDP/DCBX variables\n+ * and statistics are defined but need to find how to get\n+ * the required information from the Firmware to use them\n+ */\n+\n+/* IEEE 802.1AB LLDP Agent Statistics */\n+struct ice_lldp_stats {\n+\tu64 remtablelastchangetime;\n+\tu64 remtableinserts;\n+\tu64 remtabledeletes;\n+\tu64 remtabledrops;\n+\tu64 remtableageouts;\n+\tu64 txframestotal;\n+\tu64 rxframesdiscarded;\n+\tu64 rxportframeerrors;\n+\tu64 rxportframestotal;\n+\tu64 rxporttlvsdiscardedtotal;\n+\tu64 rxporttlvsunrecognizedtotal;\n+\tu64 remtoomanyneighbors;\n+};\n+\n+/* IEEE 802.1Qaz DCBX variables */\n+struct ice_dcbx_variables {\n+\tu32 defmaxtrafficclasses;\n+\tu32 defprioritytcmapping;\n+\tu32 deftcbandwidth;\n+\tu32 deftsaassignment;\n+};\n+\n+\n+enum ice_status\n+ice_aq_get_lldp_mib(struct ice_hw *hw, u8 bridge_type, u8 mib_type, void *buf,\n+\t\t u16 buf_size, u16 *local_len, u16 *remote_len,\n+\t\t struct ice_sq_cd *cd);\n+enum ice_status\n+ice_aq_cfg_lldp_mib_change(struct ice_hw *hw, bool ena_update,\n+\t\t\t struct ice_sq_cd *cd);\n+enum ice_status\n+ice_aq_start_lldp(struct ice_hw *hw, struct ice_sq_cd *cd);\n+enum ice_status\n+ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,\n+\t\t struct ice_sq_cd *cd);\n+enum ice_status\n+ice_aq_get_cee_dcb_cfg(struct ice_hw *hw,\n+\t\t struct ice_aqc_get_cee_dcb_cfg_resp *buff,\n+\t\t struct ice_sq_cd *cd);\n+enum ice_status\n+ice_aq_start_stop_dcbx(struct ice_hw *hw, bool start_dcbx_agent,\n+\t\t bool *dcbx_agent_status, struct ice_sq_cd *cd);\n+u8 ice_get_dcbx_status(struct ice_hw *hw);\n+enum ice_status ice_lldp_to_dcb_cfg(u8 *lldpmib, struct ice_dcbx_cfg *dcbcfg);\n+enum ice_status\n+ice_aq_get_dcb_cfg(struct ice_hw *hw, u8 mib_type, u8 bridgetype,\n+\t\t struct ice_dcbx_cfg *dcbcfg);\n+enum ice_status ice_get_dcb_cfg(struct ice_port_info *pi);\n+enum ice_status ice_init_dcb(struct ice_hw *hw);\n+enum ice_status ice_set_dcb_cfg(struct ice_port_info *pi);\n+void ice_dcb_cfg_to_lldp(u8 *lldpmib, u16 *miblen, struct ice_dcbx_cfg *dcbcfg);\n+enum ice_status\n+ice_query_cfg_port_ets(struct ice_port_info *pi,\n+\t\t struct ice_aqc_port_ets_elem *buff, u16 buf_size,\n+\t\t struct ice_sq_cd *cmd_details, bool config);\n+enum ice_status\n+ice_aq_query_cfg_port_ets(struct ice_port_info *pi,\n+\t\t\t struct ice_aqc_port_ets_elem *buf, u16 buf_size,\n+\t\t\t struct ice_sq_cd *cd, enum ice_adminq_opc opcode);\n+enum ice_status\n+ice_update_port_tc_tree_cfg(struct ice_port_info *pi,\n+\t\t\t struct ice_aqc_port_ets_elem *buf);\n+#endif /* _ICE_DCB_H_ */\n", "prefixes": [ "v4", "07/32" ] }