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{
    "id": 4761,
    "url": "https://patches.dpdk.org/api/patches/4761/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1431705423-16134-7-git-send-email-bruce.richardson@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1431705423-16134-7-git-send-email-bruce.richardson@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1431705423-16134-7-git-send-email-bruce.richardson@intel.com",
    "date": "2015-05-15T15:56:50",
    "name": "[dpdk-dev,v2,06/19] enic: move enic PMD to drivers/net directory",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "93c41bdcae076e65a11342fa15f344912796c736",
    "submitter": {
        "id": 20,
        "url": "https://patches.dpdk.org/api/people/20/?format=api",
        "name": "Bruce Richardson",
        "email": "bruce.richardson@intel.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1431705423-16134-7-git-send-email-bruce.richardson@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/4761/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/4761/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id B71145A56;\n\tFri, 15 May 2015 22:29:18 +0200 (CEST)",
            "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 8B0B45A79\n\tfor <dev@dpdk.org>; Fri, 15 May 2015 17:57:12 +0200 (CEST)",
            "from fmsmga003.fm.intel.com ([10.253.24.29])\n\tby orsmga102.jf.intel.com with ESMTP; 15 May 2015 08:57:10 -0700",
            "from irvmail001.ir.intel.com ([163.33.26.43])\n\tby FMSMGA003.fm.intel.com with ESMTP; 15 May 2015 08:57:07 -0700",
            "from sivswdev01.ir.intel.com (sivswdev01.ir.intel.com\n\t[10.237.217.45])\n\tby irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id\n\tt4FFv5PM030277; Fri, 15 May 2015 16:57:06 +0100",
            "from sivswdev01.ir.intel.com (localhost [127.0.0.1])\n\tby sivswdev01.ir.intel.com with ESMTP id t4FFv5bD016216;\n\tFri, 15 May 2015 16:57:05 +0100",
            "(from bricha3@localhost)\n\tby sivswdev01.ir.intel.com with  id t4FFv5hn016212;\n\tFri, 15 May 2015 16:57:05 +0100"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos;i=\"5.13,434,1427785200\"; d=\"scan'208\";a=\"494069678\"",
        "From": "Bruce Richardson <bruce.richardson@intel.com>",
        "To": "dev@dpdk.org",
        "Date": "Fri, 15 May 2015 16:56:50 +0100",
        "Message-Id": "<1431705423-16134-7-git-send-email-bruce.richardson@intel.com>",
        "X-Mailer": "git-send-email 1.7.4.1",
        "In-Reply-To": "<1431705423-16134-1-git-send-email-bruce.richardson@intel.com>",
        "References": "<1431450315-13179-1-git-send-email-bruce.richardson@intel.com>\n\t<1431705423-16134-1-git-send-email-bruce.richardson@intel.com>",
        "X-Mailman-Approved-At": "Fri, 15 May 2015 22:29:13 +0200",
        "Subject": "[dpdk-dev] [PATCH v2 06/19] enic: move enic PMD to drivers/net\n\tdirectory",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "move enic PMD to drivers/net directory\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n drivers/net/Makefile                         |    2 +-\n drivers/net/enic/LICENSE                     |   27 +\n drivers/net/enic/Makefile                    |   71 ++\n drivers/net/enic/enic.h                      |  200 +++++\n drivers/net/enic/enic_clsf.c                 |  259 ++++++\n drivers/net/enic/enic_compat.h               |  147 ++++\n drivers/net/enic/enic_ethdev.c               |  640 +++++++++++++++\n drivers/net/enic/enic_main.c                 | 1117 ++++++++++++++++++++++++++\n drivers/net/enic/enic_res.c                  |  219 +++++\n drivers/net/enic/enic_res.h                  |  168 ++++\n drivers/net/enic/rte_pmd_enic_version.map    |    4 +\n drivers/net/enic/vnic/cq_desc.h              |  126 +++\n drivers/net/enic/vnic/cq_enet_desc.h         |  261 ++++++\n drivers/net/enic/vnic/rq_enet_desc.h         |   76 ++\n drivers/net/enic/vnic/vnic_cq.c              |  117 +++\n drivers/net/enic/vnic/vnic_cq.h              |  151 ++++\n drivers/net/enic/vnic/vnic_dev.c             | 1054 ++++++++++++++++++++++++\n drivers/net/enic/vnic/vnic_dev.h             |  212 +++++\n drivers/net/enic/vnic/vnic_devcmd.h          |  774 ++++++++++++++++++\n drivers/net/enic/vnic/vnic_enet.h            |   78 ++\n drivers/net/enic/vnic/vnic_intr.c            |   78 ++\n drivers/net/enic/vnic/vnic_intr.h            |  126 +++\n drivers/net/enic/vnic/vnic_nic.h             |   88 ++\n drivers/net/enic/vnic/vnic_resource.h        |   97 +++\n drivers/net/enic/vnic/vnic_rq.c              |  245 ++++++\n drivers/net/enic/vnic/vnic_rq.h              |  282 +++++++\n drivers/net/enic/vnic/vnic_rss.c             |   85 ++\n drivers/net/enic/vnic/vnic_rss.h             |   61 ++\n drivers/net/enic/vnic/vnic_stats.h           |   86 ++\n drivers/net/enic/vnic/vnic_wq.c              |  245 ++++++\n drivers/net/enic/vnic/vnic_wq.h              |  283 +++++++\n drivers/net/enic/vnic/wq_enet_desc.h         |  114 +++\n lib/Makefile                                 |    1 -\n lib/librte_pmd_enic/LICENSE                  |   27 -\n lib/librte_pmd_enic/Makefile                 |   71 --\n lib/librte_pmd_enic/enic.h                   |  200 -----\n lib/librte_pmd_enic/enic_clsf.c              |  259 ------\n lib/librte_pmd_enic/enic_compat.h            |  147 ----\n lib/librte_pmd_enic/enic_ethdev.c            |  640 ---------------\n lib/librte_pmd_enic/enic_main.c              | 1117 --------------------------\n lib/librte_pmd_enic/enic_res.c               |  219 -----\n lib/librte_pmd_enic/enic_res.h               |  168 ----\n lib/librte_pmd_enic/rte_pmd_enic_version.map |    4 -\n lib/librte_pmd_enic/vnic/cq_desc.h           |  126 ---\n lib/librte_pmd_enic/vnic/cq_enet_desc.h      |  261 ------\n lib/librte_pmd_enic/vnic/rq_enet_desc.h      |   76 --\n lib/librte_pmd_enic/vnic/vnic_cq.c           |  117 ---\n lib/librte_pmd_enic/vnic/vnic_cq.h           |  151 ----\n lib/librte_pmd_enic/vnic/vnic_dev.c          | 1054 ------------------------\n lib/librte_pmd_enic/vnic/vnic_dev.h          |  212 -----\n lib/librte_pmd_enic/vnic/vnic_devcmd.h       |  774 ------------------\n lib/librte_pmd_enic/vnic/vnic_enet.h         |   78 --\n lib/librte_pmd_enic/vnic/vnic_intr.c         |   78 --\n lib/librte_pmd_enic/vnic/vnic_intr.h         |  126 ---\n lib/librte_pmd_enic/vnic/vnic_nic.h          |   88 --\n lib/librte_pmd_enic/vnic/vnic_resource.h     |   97 ---\n lib/librte_pmd_enic/vnic/vnic_rq.c           |  245 ------\n lib/librte_pmd_enic/vnic/vnic_rq.h           |  282 -------\n lib/librte_pmd_enic/vnic/vnic_rss.c          |   85 --\n lib/librte_pmd_enic/vnic/vnic_rss.h          |   61 --\n lib/librte_pmd_enic/vnic/vnic_stats.h        |   86 --\n lib/librte_pmd_enic/vnic/vnic_wq.c           |  245 ------\n lib/librte_pmd_enic/vnic/vnic_wq.h           |  283 -------\n lib/librte_pmd_enic/vnic/wq_enet_desc.h      |  114 ---\n 64 files changed, 7492 insertions(+), 7493 deletions(-)\n create mode 100644 drivers/net/enic/LICENSE\n create mode 100644 drivers/net/enic/Makefile\n create mode 100644 drivers/net/enic/enic.h\n create mode 100644 drivers/net/enic/enic_clsf.c\n create mode 100644 drivers/net/enic/enic_compat.h\n create mode 100644 drivers/net/enic/enic_ethdev.c\n create mode 100644 drivers/net/enic/enic_main.c\n create mode 100644 drivers/net/enic/enic_res.c\n create mode 100644 drivers/net/enic/enic_res.h\n create mode 100644 drivers/net/enic/rte_pmd_enic_version.map\n create mode 100644 drivers/net/enic/vnic/cq_desc.h\n create mode 100644 drivers/net/enic/vnic/cq_enet_desc.h\n create mode 100644 drivers/net/enic/vnic/rq_enet_desc.h\n create mode 100644 drivers/net/enic/vnic/vnic_cq.c\n create mode 100644 drivers/net/enic/vnic/vnic_cq.h\n create mode 100644 drivers/net/enic/vnic/vnic_dev.c\n create mode 100644 drivers/net/enic/vnic/vnic_dev.h\n create mode 100644 drivers/net/enic/vnic/vnic_devcmd.h\n create mode 100644 drivers/net/enic/vnic/vnic_enet.h\n create mode 100644 drivers/net/enic/vnic/vnic_intr.c\n create mode 100644 drivers/net/enic/vnic/vnic_intr.h\n create mode 100644 drivers/net/enic/vnic/vnic_nic.h\n create mode 100644 drivers/net/enic/vnic/vnic_resource.h\n create mode 100644 drivers/net/enic/vnic/vnic_rq.c\n create mode 100644 drivers/net/enic/vnic/vnic_rq.h\n create mode 100644 drivers/net/enic/vnic/vnic_rss.c\n create mode 100644 drivers/net/enic/vnic/vnic_rss.h\n create mode 100644 drivers/net/enic/vnic/vnic_stats.h\n create mode 100644 drivers/net/enic/vnic/vnic_wq.c\n create mode 100644 drivers/net/enic/vnic/vnic_wq.h\n create mode 100644 drivers/net/enic/vnic/wq_enet_desc.h\n delete mode 100644 lib/librte_pmd_enic/LICENSE\n delete mode 100644 lib/librte_pmd_enic/Makefile\n delete mode 100644 lib/librte_pmd_enic/enic.h\n delete mode 100644 lib/librte_pmd_enic/enic_clsf.c\n delete mode 100644 lib/librte_pmd_enic/enic_compat.h\n delete mode 100644 lib/librte_pmd_enic/enic_ethdev.c\n delete mode 100644 lib/librte_pmd_enic/enic_main.c\n delete mode 100644 lib/librte_pmd_enic/enic_res.c\n delete mode 100644 lib/librte_pmd_enic/enic_res.h\n delete mode 100644 lib/librte_pmd_enic/rte_pmd_enic_version.map\n delete mode 100644 lib/librte_pmd_enic/vnic/cq_desc.h\n delete mode 100644 lib/librte_pmd_enic/vnic/cq_enet_desc.h\n delete mode 100644 lib/librte_pmd_enic/vnic/rq_enet_desc.h\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_cq.c\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_cq.h\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_dev.c\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_dev.h\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_devcmd.h\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_enet.h\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_intr.c\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_intr.h\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_nic.h\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_resource.h\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_rq.c\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_rq.h\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_rss.c\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_rss.h\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_stats.h\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_wq.c\n delete mode 100644 lib/librte_pmd_enic/vnic/vnic_wq.h\n delete mode 100644 lib/librte_pmd_enic/vnic/wq_enet_desc.h",
    "diff": "diff --git a/drivers/net/Makefile b/drivers/net/Makefile\nindex 6ae6c42..446ee5e 100644\n--- a/drivers/net/Makefile\n+++ b/drivers/net/Makefile\n@@ -34,11 +34,11 @@ include $(RTE_SDK)/mk/rte.vars.mk\n DIRS-$(CONFIG_RTE_LIBRTE_PMD_AF_PACKET) += af_packet\n DIRS-$(CONFIG_RTE_LIBRTE_PMD_BOND) += bonding\n DIRS-$(CONFIG_RTE_LIBRTE_E1000_PMD) += e1000\n+DIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic\n #DIRS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += librte_pmd_ixgbe\n #DIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += librte_pmd_i40e\n #DIRS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += librte_pmd_fm10k\n #DIRS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += librte_pmd_mlx4\n-#DIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += librte_pmd_enic\n #DIRS-$(CONFIG_RTE_LIBRTE_PMD_RING) += librte_pmd_ring\n #DIRS-$(CONFIG_RTE_LIBRTE_PMD_PCAP) += librte_pmd_pcap\n #DIRS-$(CONFIG_RTE_LIBRTE_VIRTIO_PMD) += librte_pmd_virtio\ndiff --git a/drivers/net/enic/LICENSE b/drivers/net/enic/LICENSE\nnew file mode 100644\nindex 0000000..46a27a4\n--- /dev/null\n+++ b/drivers/net/enic/LICENSE\n@@ -0,0 +1,27 @@\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\ndiff --git a/drivers/net/enic/Makefile b/drivers/net/enic/Makefile\nnew file mode 100644\nindex 0000000..bfc0994\n--- /dev/null\n+++ b/drivers/net/enic/Makefile\n@@ -0,0 +1,71 @@\n+#\n+# Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n+# Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+#\n+# Copyright (c) 2014, Cisco Systems, Inc.\n+# All rights reserved.\n+#\n+# Redistribution and use in source and binary forms, with or without\n+# modification, are permitted provided that the following conditions\n+# are met:\n+#\n+# 1. Redistributions of source code must retain the above copyright\n+# notice, this list of conditions and the following disclaimer.\n+#\n+# 2. Redistributions in binary form must reproduce the above copyright\n+# notice, this list of conditions and the following disclaimer in\n+# the documentation and/or other materials provided with the\n+# distribution.\n+#\n+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+# \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+# POSSIBILITY OF SUCH DAMAGE.\n+\n+include $(RTE_SDK)/mk/rte.vars.mk\n+\n+#\n+# library name\n+#\n+LIB = librte_pmd_enic.a\n+\n+EXPORT_MAP := rte_pmd_enic_version.map\n+\n+LIBABIVER := 1\n+\n+CFLAGS += -I$(SRCDIR)/vnic/\n+CFLAGS += -I$(SRCDIR)\n+CFLAGS += -O3\n+CFLAGS += $(WERROR_FLAGS) -Wno-strict-aliasing\n+\n+VPATH += $(SRCDIR)/src\n+\n+#\n+# all source are stored in SRCS-y\n+#\n+SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic_ethdev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic_main.c\n+SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic_clsf.c\n+SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic_res.c\n+SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_cq.c\n+SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_wq.c\n+SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_dev.c\n+SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_intr.c\n+SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_rq.c\n+SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_rss.c\n+\n+# this lib depends upon:\n+DEPDIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += lib/librte_eal lib/librte_ether\n+DEPDIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += lib/librte_mempool lib/librte_mbuf\n+DEPDIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += lib/librte_net lib/librte_malloc\n+DEPDIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += lib/librte_hash\n+\n+include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h\nnew file mode 100644\nindex 0000000..1417b0c\n--- /dev/null\n+++ b/drivers/net/enic/enic.h\n@@ -0,0 +1,200 @@\n+/*\n+ * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id$\"\n+\n+#ifndef _ENIC_H_\n+#define _ENIC_H_\n+\n+#include \"vnic_enet.h\"\n+#include \"vnic_dev.h\"\n+#include \"vnic_wq.h\"\n+#include \"vnic_rq.h\"\n+#include \"vnic_cq.h\"\n+#include \"vnic_intr.h\"\n+#include \"vnic_stats.h\"\n+#include \"vnic_nic.h\"\n+#include \"vnic_rss.h\"\n+#include \"enic_res.h\"\n+\n+#define DRV_NAME\t\t\"enic_pmd\"\n+#define DRV_DESCRIPTION\t\t\"Cisco VIC Ethernet NIC Poll-mode Driver\"\n+#define DRV_VERSION\t\t\"1.0.0.5\"\n+#define DRV_COPYRIGHT\t\t\"Copyright 2008-2015 Cisco Systems, Inc\"\n+\n+#define ENIC_WQ_MAX\t\t8\n+#define ENIC_RQ_MAX\t\t8\n+#define ENIC_CQ_MAX\t\t(ENIC_WQ_MAX + ENIC_RQ_MAX)\n+#define ENIC_INTR_MAX\t\t(ENIC_CQ_MAX + 2)\n+\n+#define VLAN_ETH_HLEN           18\n+\n+#define ENICPMD_SETTING(enic, f) ((enic->config.flags & VENETF_##f) ? 1 : 0)\n+\n+#define ENICPMD_BDF_LENGTH      13   /* 0000:00:00.0'\\0' */\n+#define PKT_TX_TCP_UDP_CKSUM    0x6000\n+#define ENIC_CALC_IP_CKSUM      1\n+#define ENIC_CALC_TCP_UDP_CKSUM 2\n+#define ENIC_MAX_MTU            9000\n+#define ENIC_PAGE_SIZE          4096\n+#define PAGE_ROUND_UP(x) \\\n+\t((((unsigned long)(x)) + ENIC_PAGE_SIZE-1) & (~(ENIC_PAGE_SIZE-1)))\n+\n+#define ENICPMD_VFIO_PATH          \"/dev/vfio/vfio\"\n+/*#define ENIC_DESC_COUNT_MAKE_ODD (x) do{if ((~(x)) & 1) { (x)--; } }while(0)*/\n+\n+#define PCI_DEVICE_ID_CISCO_VIC_ENET         0x0043  /* ethernet vnic */\n+#define PCI_DEVICE_ID_CISCO_VIC_ENET_VF      0x0071  /* enet SRIOV VF */\n+\n+\n+#define ENICPMD_FDIR_MAX           64\n+\n+struct enic_fdir_node {\n+\tstruct rte_eth_fdir_filter filter;\n+\tu16 fltr_id;\n+\tu16 rq_index;\n+};\n+\n+struct enic_fdir {\n+\tstruct rte_eth_fdir_stats stats;\n+\tstruct rte_hash *hash;\n+\tstruct enic_fdir_node *nodes[ENICPMD_FDIR_MAX];\n+};\n+\n+/* Per-instance private data structure */\n+struct enic {\n+\tstruct enic *next;\n+\tstruct rte_pci_device *pdev;\n+\tstruct vnic_enet_config config;\n+\tstruct vnic_dev_bar bar0;\n+\tstruct vnic_dev *vdev;\n+\n+\tunsigned int port_id;\n+\tstruct rte_eth_dev *rte_dev;\n+\tstruct enic_fdir fdir;\n+\tchar bdf_name[ENICPMD_BDF_LENGTH];\n+\tint dev_fd;\n+\tint iommu_group_fd;\n+\tint iommu_groupid;\n+\tint eventfd;\n+\tuint8_t mac_addr[ETH_ALEN];\n+\tpthread_t err_intr_thread;\n+\tint promisc;\n+\tint allmulti;\n+\tu8 ig_vlan_strip_en;\n+\tint link_status;\n+\tu8 hw_ip_checksum;\n+\n+\tunsigned int flags;\n+\tunsigned int priv_flags;\n+\n+\t/* work queue */\n+\tstruct vnic_wq wq[ENIC_WQ_MAX];\n+\tunsigned int wq_count;\n+\n+\t/* receive queue */\n+\tstruct vnic_rq rq[ENIC_RQ_MAX];\n+\tunsigned int rq_count;\n+\n+\t/* completion queue */\n+\tstruct vnic_cq cq[ENIC_CQ_MAX];\n+\tunsigned int cq_count;\n+\n+\t/* interrupt resource */\n+\tstruct vnic_intr intr;\n+\tunsigned int intr_count;\n+};\n+\n+static inline unsigned int enic_cq_rq(__rte_unused struct enic *enic, unsigned int rq)\n+{\n+\treturn rq;\n+}\n+\n+static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)\n+{\n+\treturn enic->rq_count + wq;\n+}\n+\n+static inline unsigned int enic_msix_err_intr(__rte_unused struct enic *enic)\n+{\n+\treturn 0;\n+}\n+\n+static inline struct enic *pmd_priv(struct rte_eth_dev *eth_dev)\n+{\n+\treturn (struct enic *)eth_dev->data->dev_private;\n+}\n+\n+extern void enic_fdir_stats_get(struct enic *enic,\n+\tstruct rte_eth_fdir_stats *stats);\n+extern int enic_fdir_add_fltr(struct enic *enic,\n+\tstruct rte_eth_fdir_filter *params);\n+extern int enic_fdir_del_fltr(struct enic *enic,\n+\tstruct rte_eth_fdir_filter *params);\n+extern void enic_free_wq(void *txq);\n+extern int enic_alloc_intr_resources(struct enic *enic);\n+extern int enic_setup_finish(struct enic *enic);\n+extern int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,\n+\tunsigned int socket_id, uint16_t nb_desc);\n+extern void enic_start_wq(struct enic *enic, uint16_t queue_idx);\n+extern int enic_stop_wq(struct enic *enic, uint16_t queue_idx);\n+extern void enic_start_rq(struct enic *enic, uint16_t queue_idx);\n+extern int enic_stop_rq(struct enic *enic, uint16_t queue_idx);\n+extern void enic_free_rq(void *rxq);\n+extern int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,\n+\tunsigned int socket_id, struct rte_mempool *mp,\n+\tuint16_t nb_desc);\n+extern int enic_set_rss_nic_cfg(struct enic *enic);\n+extern int enic_set_vnic_res(struct enic *enic);\n+extern void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size);\n+extern int enic_enable(struct enic *enic);\n+extern int enic_disable(struct enic *enic);\n+extern void enic_remove(struct enic *enic);\n+extern int enic_get_link_status(struct enic *enic);\n+extern void enic_dev_stats_get(struct enic *enic,\n+\tstruct rte_eth_stats *r_stats);\n+extern void enic_dev_stats_clear(struct enic *enic);\n+extern void enic_add_packet_filter(struct enic *enic);\n+extern void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr);\n+extern void enic_del_mac_address(struct enic *enic);\n+extern unsigned int enic_cleanup_wq(struct enic *enic, struct vnic_wq *wq);\n+extern int enic_send_pkt(struct enic *enic, struct vnic_wq *wq,\n+\tstruct rte_mbuf *tx_pkt, unsigned short len,\n+\tuint8_t sop, uint8_t eop,\n+\tuint16_t ol_flags, uint16_t vlan_tag);\n+extern int enic_poll(struct vnic_rq *rq, struct rte_mbuf **rx_pkts,\n+\tunsigned int budget, unsigned int *work_done);\n+extern int enic_probe(struct enic *enic);\n+extern int enic_clsf_init(struct enic *enic);\n+extern void enic_clsf_destroy(struct enic *enic);\n+#endif /* _ENIC_H_ */\ndiff --git a/drivers/net/enic/enic_clsf.c b/drivers/net/enic/enic_clsf.c\nnew file mode 100644\nindex 0000000..ca12d2d\n--- /dev/null\n+++ b/drivers/net/enic/enic_clsf.c\n@@ -0,0 +1,259 @@\n+/*\n+ * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id$\"\n+\n+#include <libgen.h>\n+\n+#include <rte_ethdev.h>\n+#include <rte_malloc.h>\n+#include <rte_hash.h>\n+#include <rte_byteorder.h>\n+\n+#include \"enic_compat.h\"\n+#include \"enic.h\"\n+#include \"wq_enet_desc.h\"\n+#include \"rq_enet_desc.h\"\n+#include \"cq_enet_desc.h\"\n+#include \"vnic_enet.h\"\n+#include \"vnic_dev.h\"\n+#include \"vnic_wq.h\"\n+#include \"vnic_rq.h\"\n+#include \"vnic_cq.h\"\n+#include \"vnic_intr.h\"\n+#include \"vnic_nic.h\"\n+\n+#ifdef RTE_MACHINE_CPUFLAG_SSE4_2\n+#include <rte_hash_crc.h>\n+#define DEFAULT_HASH_FUNC       rte_hash_crc\n+#else\n+#include <rte_jhash.h>\n+#define DEFAULT_HASH_FUNC       rte_jhash\n+#endif\n+\n+#define SOCKET_0                0\n+#define ENICPMD_CLSF_HASH_ENTRIES       ENICPMD_FDIR_MAX\n+#define ENICPMD_CLSF_BUCKET_ENTRIES     4\n+\n+void enic_fdir_stats_get(struct enic *enic, struct rte_eth_fdir_stats *stats)\n+{\n+\t*stats = enic->fdir.stats;\n+}\n+\n+int enic_fdir_del_fltr(struct enic *enic, struct rte_eth_fdir_filter *params)\n+{\n+\tint32_t pos;\n+\tstruct enic_fdir_node *key;\n+\t/* See if the key is in the table */\n+\tpos = rte_hash_del_key(enic->fdir.hash, params);\n+\tswitch (pos) {\n+\tcase -EINVAL:\n+\tcase -ENOENT:\n+\t\tenic->fdir.stats.f_remove++;\n+\t\treturn -EINVAL;\n+\tdefault:\n+\t\t/* The entry is present in the table */\n+\t\tkey = enic->fdir.nodes[pos];\n+\n+\t\t/* Delete the filter */\n+\t\tvnic_dev_classifier(enic->vdev, CLSF_DEL,\n+\t\t\t&key->fltr_id, NULL);\n+\t\trte_free(key);\n+\t\tenic->fdir.nodes[pos] = NULL;\n+\t\tenic->fdir.stats.free++;\n+\t\tenic->fdir.stats.remove++;\n+\t\tbreak;\n+\t}\n+\treturn 0;\n+}\n+\n+int enic_fdir_add_fltr(struct enic *enic, struct rte_eth_fdir_filter *params)\n+{\n+\tstruct enic_fdir_node *key;\n+\tstruct filter fltr = {0};\n+\tint32_t pos;\n+\tu8 do_free = 0;\n+\tu16 old_fltr_id = 0;\n+\tu32 flowtype_supported;\n+\tu16 flex_bytes;\n+\tu16 queue;\n+\n+\tflowtype_supported = (\n+\t\t(RTE_ETH_FLOW_NONFRAG_IPV4_TCP == params->input.flow_type) ||\n+\t\t(RTE_ETH_FLOW_NONFRAG_IPV4_UDP == params->input.flow_type));\n+\n+\tflex_bytes = ((params->input.flow_ext.flexbytes[1] << 8 & 0xFF00) |\n+\t\t(params->input.flow_ext.flexbytes[0] & 0xFF));\n+\n+\tif (!enic->fdir.hash ||\n+\t\t(params->input.flow_ext.vlan_tci & 0xFFF) ||\n+\t\t!flowtype_supported || flex_bytes ||\n+\t\tparams->action.behavior /* drop */) {\n+\t\tenic->fdir.stats.f_add++;\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tqueue = params->action.rx_queue;\n+\t/* See if the key is already there in the table */\n+\tpos = rte_hash_del_key(enic->fdir.hash, params);\n+\tswitch (pos) {\n+\tcase -EINVAL:\n+\t\tenic->fdir.stats.f_add++;\n+\t\treturn -EINVAL;\n+\tcase -ENOENT:\n+\t\t/* Add a new classifier entry */\n+\t\tif (!enic->fdir.stats.free) {\n+\t\t\tenic->fdir.stats.f_add++;\n+\t\t\treturn -ENOSPC;\n+\t\t}\n+\t\tkey = rte_zmalloc(\"enic_fdir_node\",\n+\t\t\t\t  sizeof(struct enic_fdir_node), 0);\n+\t\tif (!key) {\n+\t\t\tenic->fdir.stats.f_add++;\n+\t\t\treturn -ENOMEM;\n+\t\t}\n+\t\tbreak;\n+\tdefault:\n+\t\t/* The entry is already present in the table.\n+\t\t * Check if there is a change in queue\n+\t\t */\n+\t\tkey = enic->fdir.nodes[pos];\n+\t\tenic->fdir.nodes[pos] = NULL;\n+\t\tif (unlikely(key->rq_index == queue)) {\n+\t\t\t/* Nothing to be done */\n+\t\t\tpos = rte_hash_add_key(enic->fdir.hash, params);\n+\t\t\tenic->fdir.nodes[pos] = key;\n+\t\t\tenic->fdir.stats.f_add++;\n+\t\t\tdev_warning(enic,\n+\t\t\t\t\"FDIR rule is already present\\n\");\n+\t\t\treturn 0;\n+\t\t}\n+\n+\t\tif (likely(enic->fdir.stats.free)) {\n+\t\t\t/* Add the filter and then delete the old one.\n+\t\t\t * This is to avoid packets from going into the\n+\t\t\t * default queue during the window between\n+\t\t\t * delete and add\n+\t\t\t */\n+\t\t\tdo_free = 1;\n+\t\t\told_fltr_id = key->fltr_id;\n+\t\t} else {\n+\t\t\t/* No free slots in the classifier.\n+\t\t\t * Delete the filter and add the modified one later\n+\t\t\t */\n+\t\t\tvnic_dev_classifier(enic->vdev, CLSF_DEL,\n+\t\t\t\t&key->fltr_id, NULL);\n+\t\t\tenic->fdir.stats.free++;\n+\t\t}\n+\n+\t\tbreak;\n+\t}\n+\n+\tkey->filter = *params;\n+\tkey->rq_index = queue;\n+\n+\tfltr.type = FILTER_IPV4_5TUPLE;\n+\tfltr.u.ipv4.src_addr = rte_be_to_cpu_32(\n+\t\tparams->input.flow.ip4_flow.src_ip);\n+\tfltr.u.ipv4.dst_addr = rte_be_to_cpu_32(\n+\t\tparams->input.flow.ip4_flow.dst_ip);\n+\tfltr.u.ipv4.src_port = rte_be_to_cpu_16(\n+\t\tparams->input.flow.udp4_flow.src_port);\n+\tfltr.u.ipv4.dst_port = rte_be_to_cpu_16(\n+\t\tparams->input.flow.udp4_flow.dst_port);\n+\n+\tif (RTE_ETH_FLOW_NONFRAG_IPV4_TCP == params->input.flow_type)\n+\t\tfltr.u.ipv4.protocol = PROTO_TCP;\n+\telse\n+\t\tfltr.u.ipv4.protocol = PROTO_UDP;\n+\n+\tfltr.u.ipv4.flags = FILTER_FIELDS_IPV4_5TUPLE;\n+\n+\tif (!vnic_dev_classifier(enic->vdev, CLSF_ADD, &queue, &fltr)) {\n+\t\tkey->fltr_id = queue;\n+\t} else {\n+\t\tdev_err(enic, \"Add classifier entry failed\\n\");\n+\t\tenic->fdir.stats.f_add++;\n+\t\trte_free(key);\n+\t\treturn -1;\n+\t}\n+\n+\tif (do_free)\n+\t\tvnic_dev_classifier(enic->vdev, CLSF_DEL, &old_fltr_id, NULL);\n+\telse{\n+\t\tenic->fdir.stats.free--;\n+\t\tenic->fdir.stats.add++;\n+\t}\n+\n+\tpos = rte_hash_add_key(enic->fdir.hash, (void *)key);\n+\tenic->fdir.nodes[pos] = key;\n+\treturn 0;\n+}\n+\n+void enic_clsf_destroy(struct enic *enic)\n+{\n+\tu32 index;\n+\tstruct enic_fdir_node *key;\n+\t/* delete classifier entries */\n+\tfor (index = 0; index < ENICPMD_FDIR_MAX; index++) {\n+\t\tkey = enic->fdir.nodes[index];\n+\t\tif (key) {\n+\t\t\tvnic_dev_classifier(enic->vdev, CLSF_DEL,\n+\t\t\t\t&key->fltr_id, NULL);\n+\t\t\trte_free(key);\n+\t\t}\n+\t}\n+\n+\tif (enic->fdir.hash) {\n+\t\trte_hash_free(enic->fdir.hash);\n+\t\tenic->fdir.hash = NULL;\n+\t}\n+}\n+\n+int enic_clsf_init(struct enic *enic)\n+{\n+\tstruct rte_hash_parameters hash_params = {\n+\t\t.name = \"enicpmd_clsf_hash\",\n+\t\t.entries = ENICPMD_CLSF_HASH_ENTRIES,\n+\t\t.bucket_entries = ENICPMD_CLSF_BUCKET_ENTRIES,\n+\t\t.key_len = RTE_HASH_KEY_LENGTH_MAX,\n+\t\t.hash_func = DEFAULT_HASH_FUNC,\n+\t\t.hash_func_init_val = 0,\n+\t\t.socket_id = SOCKET_0,\n+\t};\n+\n+\tenic->fdir.hash = rte_hash_create(&hash_params);\n+\tmemset(&enic->fdir.stats, 0, sizeof(enic->fdir.stats));\n+\tenic->fdir.stats.free = ENICPMD_FDIR_MAX;\n+\treturn (NULL == enic->fdir.hash);\n+}\ndiff --git a/drivers/net/enic/enic_compat.h b/drivers/net/enic/enic_compat.h\nnew file mode 100644\nindex 0000000..f3598ed\n--- /dev/null\n+++ b/drivers/net/enic/enic_compat.h\n@@ -0,0 +1,147 @@\n+/*\n+ * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id$\"\n+\n+#ifndef _ENIC_COMPAT_H_\n+#define _ENIC_COMPAT_H_\n+\n+#include <stdio.h>\n+#include <unistd.h>\n+\n+#include <rte_atomic.h>\n+#include <rte_malloc.h>\n+#include <rte_log.h>\n+\n+#define ENIC_PAGE_ALIGN 4096UL\n+#define ENIC_ALIGN      ENIC_PAGE_ALIGN\n+#define NAME_MAX        255\n+#define ETH_ALEN        6\n+\n+#define __iomem\n+\n+#define rmb()     rte_rmb() /* dpdk rte provided rmb */\n+#define wmb()     rte_wmb() /* dpdk rte provided wmb */\n+\n+#define le16_to_cpu\n+#define le32_to_cpu\n+#define le64_to_cpu\n+#define cpu_to_le16\n+#define cpu_to_le32\n+#define cpu_to_le64\n+\n+#ifndef offsetof\n+#define offsetof(t, m) ((size_t) &((t *)0)->m)\n+#endif\n+\n+#define pr_err(y, args...) dev_err(0, y, ##args)\n+#define pr_warn(y, args...) dev_warning(0, y, ##args)\n+#define BUG() pr_err(\"BUG at %s:%d\", __func__, __LINE__)\n+\n+#define VNIC_ALIGN(x, a)         __ALIGN_MASK(x, (typeof(x))(a)-1)\n+#define __ALIGN_MASK(x, mask)    (((x)+(mask))&~(mask))\n+#define udelay usleep\n+#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))\n+\n+#define kzalloc(size, flags) calloc(1, size)\n+#define kfree(x) free(x)\n+\n+#define dev_printk(level, fmt, args...)\t\\\n+\tRTE_LOG(level, PMD, \"rte_enic_pmd: \" fmt, ## args)\n+\n+#define dev_err(x, args...) dev_printk(ERR, args)\n+#define dev_info(x, args...) dev_printk(INFO,  args)\n+#define dev_warning(x, args...) dev_printk(WARNING, args)\n+#define dev_debug(x, args...) dev_printk(DEBUG, args)\n+\n+#define __le16 u16\n+#define __le32 u32\n+#define __le64 u64\n+\n+typedef\t\tunsigned char       u8;\n+typedef\t\tunsigned short      u16;\n+typedef\t\tunsigned int        u32;\n+typedef         unsigned long long  u64;\n+typedef         unsigned long long  dma_addr_t;\n+\n+static inline uint32_t ioread32(volatile void *addr)\n+{\n+\treturn *(volatile uint32_t *)addr;\n+}\n+\n+static inline uint16_t ioread16(volatile void *addr)\n+{\n+\treturn *(volatile uint16_t *)addr;\n+}\n+\n+static inline uint8_t ioread8(volatile void *addr)\n+{\n+\treturn *(volatile uint8_t *)addr;\n+}\n+\n+static inline void iowrite32(uint32_t val, volatile void *addr)\n+{\n+\t*(volatile uint32_t *)addr = val;\n+}\n+\n+static inline void iowrite16(uint16_t val, volatile void *addr)\n+{\n+\t*(volatile uint16_t *)addr = val;\n+}\n+\n+static inline void iowrite8(uint8_t val, volatile void *addr)\n+{\n+\t*(volatile uint8_t *)addr = val;\n+}\n+\n+static inline unsigned int readl(volatile void __iomem *addr)\n+{\n+\treturn *(volatile unsigned int *)addr;\n+}\n+\n+static inline void writel(unsigned int val, volatile void __iomem *addr)\n+{\n+\t*(volatile unsigned int *)addr = val;\n+}\n+\n+#define min_t(type, x, y) ({                    \\\n+\ttype __min1 = (x);                      \\\n+\ttype __min2 = (y);                      \\\n+\t__min1 < __min2 ? __min1 : __min2; })\n+\n+#define max_t(type, x, y) ({                    \\\n+\ttype __max1 = (x);                      \\\n+\ttype __max2 = (y);                      \\\n+\t__max1 > __max2 ? __max1 : __max2; })\n+\n+#endif /* _ENIC_COMPAT_H_ */\ndiff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c\nnew file mode 100644\nindex 0000000..69ad01b\n--- /dev/null\n+++ b/drivers/net/enic/enic_ethdev.c\n@@ -0,0 +1,640 @@\n+/*\n+ * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id$\"\n+\n+#include <stdio.h>\n+#include <stdint.h>\n+\n+#include <rte_dev.h>\n+#include <rte_pci.h>\n+#include <rte_ethdev.h>\n+#include <rte_string_fns.h>\n+\n+#include \"vnic_intr.h\"\n+#include \"vnic_cq.h\"\n+#include \"vnic_wq.h\"\n+#include \"vnic_rq.h\"\n+#include \"vnic_enet.h\"\n+#include \"enic.h\"\n+\n+#ifdef RTE_LIBRTE_ENIC_DEBUG\n+#define ENICPMD_FUNC_TRACE() \\\n+\tRTE_LOG(DEBUG, PMD, \"ENICPMD trace: %s\\n\", __func__)\n+#else\n+#define ENICPMD_FUNC_TRACE() (void)0\n+#endif\n+\n+/*\n+ * The set of PCI devices this driver supports\n+ */\n+static const struct rte_pci_id pci_id_enic_map[] = {\n+#define RTE_PCI_DEV_ID_DECL_ENIC(vend, dev) {RTE_PCI_DEVICE(vend, dev)},\n+#ifndef PCI_VENDOR_ID_CISCO\n+#define PCI_VENDOR_ID_CISCO\t0x1137\n+#endif\n+#include \"rte_pci_dev_ids.h\"\n+RTE_PCI_DEV_ID_DECL_ENIC(PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET)\n+RTE_PCI_DEV_ID_DECL_ENIC(PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF)\n+{.vendor_id = 0, /* Sentinal */},\n+};\n+\n+static int\n+enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev,\n+\t\t\tenum rte_filter_op filter_op, void *arg)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\tint ret = 0;\n+\n+\tENICPMD_FUNC_TRACE();\n+\tif (filter_op == RTE_ETH_FILTER_NOP)\n+\t\treturn 0;\n+\n+\tif (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)\n+\t\treturn -EINVAL;\n+\n+\tswitch (filter_op) {\n+\tcase RTE_ETH_FILTER_ADD:\n+\tcase RTE_ETH_FILTER_UPDATE:\n+\t\tret = enic_fdir_add_fltr(enic,\n+\t\t\t(struct rte_eth_fdir_filter *)arg);\n+\t\tbreak;\n+\n+\tcase RTE_ETH_FILTER_DELETE:\n+\t\tret = enic_fdir_del_fltr(enic,\n+\t\t\t(struct rte_eth_fdir_filter *)arg);\n+\t\tbreak;\n+\n+\tcase RTE_ETH_FILTER_STATS:\n+\t\tenic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg);\n+\t\tbreak;\n+\n+\tcase RTE_ETH_FILTER_FLUSH:\n+\tcase RTE_ETH_FILTER_INFO:\n+\t\tdev_warning(enic, \"unsupported operation %u\", filter_op);\n+\t\tret = -ENOTSUP;\n+\t\tbreak;\n+\tdefault:\n+\t\tdev_err(enic, \"unknown operation %u\", filter_op);\n+\t\tret = -EINVAL;\n+\t\tbreak;\n+\t}\n+\treturn ret;\n+}\n+\n+static int\n+enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev,\n+\t\t     enum rte_filter_type filter_type,\n+\t\t     enum rte_filter_op filter_op,\n+\t\t     void *arg)\n+{\n+\tint ret = -EINVAL;\n+\n+\tif (RTE_ETH_FILTER_FDIR == filter_type)\n+\t\tret = enicpmd_fdir_ctrl_func(dev, filter_op, arg);\n+\telse\n+\t\tdev_warning(enic, \"Filter type (%d) not supported\",\n+\t\t\tfilter_type);\n+\n+\treturn ret;\n+}\n+\n+static void enicpmd_dev_tx_queue_release(void *txq)\n+{\n+\tENICPMD_FUNC_TRACE();\n+\tenic_free_wq(txq);\n+}\n+\n+static int enicpmd_dev_setup_intr(struct enic *enic)\n+{\n+\tint ret;\n+\tunsigned int index;\n+\n+\tENICPMD_FUNC_TRACE();\n+\n+\t/* Are we done with the init of all the queues? */\n+\tfor (index = 0; index < enic->cq_count; index++) {\n+\t\tif (!enic->cq[index].ctrl)\n+\t\t\tbreak;\n+\t}\n+\n+\tif (enic->cq_count != index)\n+\t\treturn 0;\n+\n+\tret = enic_alloc_intr_resources(enic);\n+\tif (ret) {\n+\t\tdev_err(enic, \"alloc intr failed\\n\");\n+\t\treturn ret;\n+\t}\n+\tenic_init_vnic_resources(enic);\n+\n+\tret = enic_setup_finish(enic);\n+\tif (ret)\n+\t\tdev_err(enic, \"setup could not be finished\\n\");\n+\n+\treturn ret;\n+}\n+\n+static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,\n+\tuint16_t queue_idx,\n+\tuint16_t nb_desc,\n+\tunsigned int socket_id,\n+\t__rte_unused const struct rte_eth_txconf *tx_conf)\n+{\n+\tint ret;\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\teth_dev->data->tx_queues[queue_idx] = (void *)&enic->wq[queue_idx];\n+\n+\tret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc);\n+\tif (ret) {\n+\t\tdev_err(enic, \"error in allocating wq\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\treturn enicpmd_dev_setup_intr(enic);\n+}\n+\n+static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev,\n+\tuint16_t queue_idx)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\n+\tenic_start_wq(enic, queue_idx);\n+\n+\treturn 0;\n+}\n+\n+static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,\n+\tuint16_t queue_idx)\n+{\n+\tint ret;\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\n+\tret = enic_stop_wq(enic, queue_idx);\n+\tif (ret)\n+\t\tdev_err(enic, \"error in stopping wq %d\\n\", queue_idx);\n+\n+\treturn ret;\n+}\n+\n+static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev,\n+\tuint16_t queue_idx)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\n+\tenic_start_rq(enic, queue_idx);\n+\n+\treturn 0;\n+}\n+\n+static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,\n+\tuint16_t queue_idx)\n+{\n+\tint ret;\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\n+\tret = enic_stop_rq(enic, queue_idx);\n+\tif (ret)\n+\t\tdev_err(enic, \"error in stopping rq %d\\n\", queue_idx);\n+\n+\treturn ret;\n+}\n+\n+static void enicpmd_dev_rx_queue_release(void *rxq)\n+{\n+\tENICPMD_FUNC_TRACE();\n+\tenic_free_rq(rxq);\n+}\n+\n+static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,\n+\tuint16_t queue_idx,\n+\tuint16_t nb_desc,\n+\tunsigned int socket_id,\n+\t__rte_unused const struct rte_eth_rxconf *rx_conf,\n+\tstruct rte_mempool *mp)\n+{\n+\tint ret;\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\teth_dev->data->rx_queues[queue_idx] = (void *)&enic->rq[queue_idx];\n+\n+\tret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc);\n+\tif (ret) {\n+\t\tdev_err(enic, \"error in allocating rq\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\treturn enicpmd_dev_setup_intr(enic);\n+}\n+\n+static int enicpmd_vlan_filter_set(struct rte_eth_dev *eth_dev,\n+\tuint16_t vlan_id, int on)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tif (on)\n+\t\tenic_add_vlan(enic, vlan_id);\n+\telse\n+\t\tenic_del_vlan(enic, vlan_id);\n+\treturn 0;\n+}\n+\n+static void enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\n+\tif (mask & ETH_VLAN_STRIP_MASK) {\n+\t\tif (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)\n+\t\t\tenic->ig_vlan_strip_en = 1;\n+\t\telse\n+\t\t\tenic->ig_vlan_strip_en = 0;\n+\t}\n+\tenic_set_rss_nic_cfg(enic);\n+\n+\n+\tif (mask & ETH_VLAN_FILTER_MASK) {\n+\t\tdev_warning(enic,\n+\t\t\t\"Configuration of VLAN filter is not supported\\n\");\n+\t}\n+\n+\tif (mask & ETH_VLAN_EXTEND_MASK) {\n+\t\tdev_warning(enic,\n+\t\t\t\"Configuration of extended VLAN is not supported\\n\");\n+\t}\n+}\n+\n+static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev)\n+{\n+\tint ret;\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tret = enic_set_vnic_res(enic);\n+\tif (ret) {\n+\t\tdev_err(enic, \"Set vNIC resource num  failed, aborting\\n\");\n+\t\treturn ret;\n+\t}\n+\n+\tif (eth_dev->data->dev_conf.rxmode.split_hdr_size &&\n+\t\teth_dev->data->dev_conf.rxmode.header_split) {\n+\t\t/* Enable header-data-split */\n+\t\tenic_set_hdr_split_size(enic,\n+\t\t\teth_dev->data->dev_conf.rxmode.split_hdr_size);\n+\t}\n+\n+\tenic->hw_ip_checksum = eth_dev->data->dev_conf.rxmode.hw_ip_checksum;\n+\treturn 0;\n+}\n+\n+/* Start the device.\n+ * It returns 0 on success.\n+ */\n+static int enicpmd_dev_start(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\treturn enic_enable(enic);\n+}\n+\n+/*\n+ * Stop device: disable rx and tx functions to allow for reconfiguring.\n+ */\n+static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct rte_eth_link link;\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tenic_disable(enic);\n+\tmemset(&link, 0, sizeof(link));\n+\trte_atomic64_cmpset((uint64_t *)&eth_dev->data->dev_link,\n+\t\t*(uint64_t *)&eth_dev->data->dev_link,\n+\t\t*(uint64_t *)&link);\n+}\n+\n+/*\n+ * Stop device.\n+ */\n+static void enicpmd_dev_close(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tenic_remove(enic);\n+}\n+\n+static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev,\n+\t__rte_unused int wait_to_complete)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\tint ret;\n+\tint link_status = 0;\n+\n+\tENICPMD_FUNC_TRACE();\n+\tlink_status = enic_get_link_status(enic);\n+\tret = (link_status == enic->link_status);\n+\tenic->link_status = link_status;\n+\teth_dev->data->dev_link.link_status = link_status;\n+\teth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;\n+\teth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);\n+\treturn ret;\n+}\n+\n+static void enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev,\n+\tstruct rte_eth_stats *stats)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tenic_dev_stats_get(enic, stats);\n+}\n+\n+static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tenic_dev_stats_clear(enic);\n+}\n+\n+static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev,\n+\tstruct rte_eth_dev_info *device_info)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tdevice_info->max_rx_queues = enic->rq_count;\n+\tdevice_info->max_tx_queues = enic->wq_count;\n+\tdevice_info->min_rx_bufsize = ENIC_MIN_MTU;\n+\tdevice_info->max_rx_pktlen = enic->config.mtu;\n+\tdevice_info->max_mac_addrs = 1;\n+\tdevice_info->rx_offload_capa =\n+\t\tDEV_RX_OFFLOAD_VLAN_STRIP |\n+\t\tDEV_RX_OFFLOAD_IPV4_CKSUM |\n+\t\tDEV_RX_OFFLOAD_UDP_CKSUM  |\n+\t\tDEV_RX_OFFLOAD_TCP_CKSUM;\n+\tdevice_info->tx_offload_capa =\n+\t\tDEV_TX_OFFLOAD_VLAN_INSERT |\n+\t\tDEV_TX_OFFLOAD_IPV4_CKSUM  |\n+\t\tDEV_TX_OFFLOAD_UDP_CKSUM   |\n+\t\tDEV_TX_OFFLOAD_TCP_CKSUM;\n+}\n+\n+static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tenic->promisc = 1;\n+\tenic_add_packet_filter(enic);\n+}\n+\n+static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tenic->promisc = 0;\n+\tenic_add_packet_filter(enic);\n+}\n+\n+static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tenic->allmulti = 1;\n+\tenic_add_packet_filter(enic);\n+}\n+\n+static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tenic->allmulti = 0;\n+\tenic_add_packet_filter(enic);\n+}\n+\n+static void enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev,\n+\tstruct ether_addr *mac_addr,\n+\t__rte_unused uint32_t index, __rte_unused uint32_t pool)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tenic_set_mac_address(enic, mac_addr->addr_bytes);\n+}\n+\n+static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, __rte_unused uint32_t index)\n+{\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\tenic_del_mac_address(enic);\n+}\n+\n+\n+static uint16_t enicpmd_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\tuint16_t nb_pkts)\n+{\n+\tunsigned int index;\n+\tunsigned int frags;\n+\tunsigned int pkt_len;\n+\tunsigned int seg_len;\n+\tunsigned int inc_len;\n+\tunsigned int nb_segs;\n+\tstruct rte_mbuf *tx_pkt;\n+\tstruct vnic_wq *wq = (struct vnic_wq *)tx_queue;\n+\tstruct enic *enic = vnic_dev_priv(wq->vdev);\n+\tunsigned short vlan_id;\n+\tunsigned short ol_flags;\n+\n+\tfor (index = 0; index < nb_pkts; index++) {\n+\t\ttx_pkt = *tx_pkts++;\n+\t\tinc_len = 0;\n+\t\tnb_segs = tx_pkt->nb_segs;\n+\t\tif (nb_segs > vnic_wq_desc_avail(wq)) {\n+\t\t\t/* wq cleanup and try again */\n+\t\t\tif (!enic_cleanup_wq(enic, wq) ||\n+\t\t\t\t(nb_segs > vnic_wq_desc_avail(wq)))\n+\t\t\t\treturn index;\n+\t\t}\n+\t\tpkt_len = tx_pkt->pkt_len;\n+\t\tvlan_id = tx_pkt->vlan_tci;\n+\t\tol_flags = tx_pkt->ol_flags;\n+\t\tfor (frags = 0; inc_len < pkt_len; frags++) {\n+\t\t\tif (!tx_pkt)\n+\t\t\t\tbreak;\n+\t\t\tseg_len = tx_pkt->data_len;\n+\t\t\tinc_len += seg_len;\n+\t\t\tif (enic_send_pkt(enic, wq, tx_pkt,\n+\t\t\t\t    (unsigned short)seg_len, !frags,\n+\t\t\t\t    (pkt_len == inc_len), ol_flags, vlan_id)) {\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t\ttx_pkt = tx_pkt->next;\n+\t\t}\n+\t}\n+\n+\tenic_cleanup_wq(enic, wq);\n+\treturn index;\n+}\n+\n+static uint16_t enicpmd_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\tuint16_t nb_pkts)\n+{\n+\tstruct vnic_rq *rq = (struct vnic_rq *)rx_queue;\n+\tunsigned int work_done;\n+\n+\tif (enic_poll(rq, rx_pkts, (unsigned int)nb_pkts, &work_done))\n+\t\tdev_err(enic, \"error in enicpmd poll\\n\");\n+\n+\treturn work_done;\n+}\n+\n+static const struct eth_dev_ops enicpmd_eth_dev_ops = {\n+\t.dev_configure        = enicpmd_dev_configure,\n+\t.dev_start            = enicpmd_dev_start,\n+\t.dev_stop             = enicpmd_dev_stop,\n+\t.dev_set_link_up      = NULL,\n+\t.dev_set_link_down    = NULL,\n+\t.dev_close            = enicpmd_dev_close,\n+\t.promiscuous_enable   = enicpmd_dev_promiscuous_enable,\n+\t.promiscuous_disable  = enicpmd_dev_promiscuous_disable,\n+\t.allmulticast_enable  = enicpmd_dev_allmulticast_enable,\n+\t.allmulticast_disable = enicpmd_dev_allmulticast_disable,\n+\t.link_update          = enicpmd_dev_link_update,\n+\t.stats_get            = enicpmd_dev_stats_get,\n+\t.stats_reset          = enicpmd_dev_stats_reset,\n+\t.queue_stats_mapping_set = NULL,\n+\t.dev_infos_get        = enicpmd_dev_info_get,\n+\t.mtu_set              = NULL,\n+\t.vlan_filter_set      = enicpmd_vlan_filter_set,\n+\t.vlan_tpid_set        = NULL,\n+\t.vlan_offload_set     = enicpmd_vlan_offload_set,\n+\t.vlan_strip_queue_set = NULL,\n+\t.rx_queue_start       = enicpmd_dev_rx_queue_start,\n+\t.rx_queue_stop        = enicpmd_dev_rx_queue_stop,\n+\t.tx_queue_start       = enicpmd_dev_tx_queue_start,\n+\t.tx_queue_stop        = enicpmd_dev_tx_queue_stop,\n+\t.rx_queue_setup       = enicpmd_dev_rx_queue_setup,\n+\t.rx_queue_release     = enicpmd_dev_rx_queue_release,\n+\t.rx_queue_count       = NULL,\n+\t.rx_descriptor_done   = NULL,\n+\t.tx_queue_setup       = enicpmd_dev_tx_queue_setup,\n+\t.tx_queue_release     = enicpmd_dev_tx_queue_release,\n+\t.dev_led_on           = NULL,\n+\t.dev_led_off          = NULL,\n+\t.flow_ctrl_get        = NULL,\n+\t.flow_ctrl_set        = NULL,\n+\t.priority_flow_ctrl_set = NULL,\n+\t.mac_addr_add         = enicpmd_add_mac_addr,\n+\t.mac_addr_remove      = enicpmd_remove_mac_addr,\n+\t.fdir_set_masks               = NULL,\n+\t.filter_ctrl          = enicpmd_dev_filter_ctrl,\n+};\n+\n+struct enic *enicpmd_list_head = NULL;\n+/* Initialize the driver\n+ * It returns 0 on success.\n+ */\n+static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev)\n+{\n+\tstruct rte_pci_device *pdev;\n+\tstruct rte_pci_addr *addr;\n+\tstruct enic *enic = pmd_priv(eth_dev);\n+\n+\tENICPMD_FUNC_TRACE();\n+\n+\tenic->port_id = eth_dev->data->port_id;\n+\tenic->rte_dev = eth_dev;\n+\teth_dev->dev_ops = &enicpmd_eth_dev_ops;\n+\teth_dev->rx_pkt_burst = &enicpmd_recv_pkts;\n+\teth_dev->tx_pkt_burst = &enicpmd_xmit_pkts;\n+\n+\tpdev = eth_dev->pci_dev;\n+\tenic->pdev = pdev;\n+\taddr = &pdev->addr;\n+\n+\tsnprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, \"%04x:%02x:%02x.%x\",\n+\t\taddr->domain, addr->bus, addr->devid, addr->function);\n+\n+\treturn enic_probe(enic);\n+}\n+\n+static struct eth_driver rte_enic_pmd = {\n+\t{\n+\t\t.name = \"rte_enic_pmd\",\n+\t\t.id_table = pci_id_enic_map,\n+\t\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING,\n+\t},\n+\t.eth_dev_init = eth_enicpmd_dev_init,\n+\t.dev_private_size = sizeof(struct enic),\n+};\n+\n+/* Driver initialization routine.\n+ * Invoked once at EAL init time.\n+ * Register as the [Poll Mode] Driver of Cisco ENIC device.\n+ */\n+static int\n+rte_enic_pmd_init(const char *name __rte_unused,\n+\tconst char *params __rte_unused)\n+{\n+\tENICPMD_FUNC_TRACE();\n+\n+\trte_eth_driver_register(&rte_enic_pmd);\n+\treturn 0;\n+}\n+\n+static struct rte_driver rte_enic_driver = {\n+\t.type = PMD_PDEV,\n+\t.init = rte_enic_pmd_init,\n+};\n+\n+PMD_REGISTER_DRIVER(rte_enic_driver);\ndiff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c\nnew file mode 100644\nindex 0000000..15313c2\n--- /dev/null\n+++ b/drivers/net/enic/enic_main.c\n@@ -0,0 +1,1117 @@\n+/*\n+ * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id$\"\n+\n+#include <stdio.h>\n+\n+#include <sys/stat.h>\n+#include <sys/mman.h>\n+#include <fcntl.h>\n+#include <libgen.h>\n+\n+#include <rte_pci.h>\n+#include <rte_memzone.h>\n+#include <rte_malloc.h>\n+#include <rte_mbuf.h>\n+#include <rte_string_fns.h>\n+#include <rte_ethdev.h>\n+\n+#include \"enic_compat.h\"\n+#include \"enic.h\"\n+#include \"wq_enet_desc.h\"\n+#include \"rq_enet_desc.h\"\n+#include \"cq_enet_desc.h\"\n+#include \"vnic_enet.h\"\n+#include \"vnic_dev.h\"\n+#include \"vnic_wq.h\"\n+#include \"vnic_rq.h\"\n+#include \"vnic_cq.h\"\n+#include \"vnic_intr.h\"\n+#include \"vnic_nic.h\"\n+\n+static inline int enic_is_sriov_vf(struct enic *enic)\n+{\n+\treturn enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;\n+}\n+\n+static int is_zero_addr(uint8_t *addr)\n+{\n+\treturn !(addr[0] |  addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);\n+}\n+\n+static int is_mcast_addr(uint8_t *addr)\n+{\n+\treturn addr[0] & 1;\n+}\n+\n+static int is_eth_addr_valid(uint8_t *addr)\n+{\n+\treturn !is_mcast_addr(addr) && !is_zero_addr(addr);\n+}\n+\n+static inline struct rte_mbuf *\n+enic_rxmbuf_alloc(struct rte_mempool *mp)\n+{\n+\tstruct rte_mbuf *m;\n+\n+\tm = __rte_mbuf_raw_alloc(mp);\n+\t__rte_mbuf_sanity_check_raw(m, 0);\n+\treturn m;\n+}\n+\n+void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)\n+{\n+\tvnic_set_hdr_split_size(enic->vdev, split_hdr_size);\n+}\n+\n+static void enic_free_wq_buf(__rte_unused struct vnic_wq *wq, struct vnic_wq_buf *buf)\n+{\n+\tstruct rte_mbuf *mbuf = (struct rte_mbuf *)buf->os_buf;\n+\n+\trte_mempool_put(mbuf->pool, mbuf);\n+\tbuf->os_buf = NULL;\n+}\n+\n+static void enic_wq_free_buf(struct vnic_wq *wq,\n+\t__rte_unused struct cq_desc *cq_desc,\n+\tstruct vnic_wq_buf *buf,\n+\t__rte_unused void *opaque)\n+{\n+\tenic_free_wq_buf(wq, buf);\n+}\n+\n+static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,\n+\t__rte_unused u8 type, u16 q_number, u16 completed_index, void *opaque)\n+{\n+\tstruct enic *enic = vnic_dev_priv(vdev);\n+\n+\tvnic_wq_service(&enic->wq[q_number], cq_desc,\n+\t\tcompleted_index, enic_wq_free_buf,\n+\t\topaque);\n+\n+\treturn 0;\n+}\n+\n+static void enic_log_q_error(struct enic *enic)\n+{\n+\tunsigned int i;\n+\tu32 error_status;\n+\n+\tfor (i = 0; i < enic->wq_count; i++) {\n+\t\terror_status = vnic_wq_error_status(&enic->wq[i]);\n+\t\tif (error_status)\n+\t\t\tdev_err(enic, \"WQ[%d] error_status %d\\n\", i,\n+\t\t\t\terror_status);\n+\t}\n+\n+\tfor (i = 0; i < enic->rq_count; i++) {\n+\t\terror_status = vnic_rq_error_status(&enic->rq[i]);\n+\t\tif (error_status)\n+\t\t\tdev_err(enic, \"RQ[%d] error_status %d\\n\", i,\n+\t\t\t\terror_status);\n+\t}\n+}\n+\n+unsigned int enic_cleanup_wq(struct enic *enic, struct vnic_wq *wq)\n+{\n+\tunsigned int cq = enic_cq_wq(enic, wq->index);\n+\n+\t/* Return the work done */\n+\treturn vnic_cq_service(&enic->cq[cq],\n+\t\t-1 /*wq_work_to_do*/, enic_wq_service, NULL);\n+}\n+\n+\n+int enic_send_pkt(struct enic *enic, struct vnic_wq *wq,\n+\tstruct rte_mbuf *tx_pkt, unsigned short len,\n+\tuint8_t sop, uint8_t eop,\n+\tuint16_t ol_flags, uint16_t vlan_tag)\n+{\n+\tstruct wq_enet_desc *desc = vnic_wq_next_desc(wq);\n+\tuint16_t mss = 0;\n+\tuint8_t cq_entry = eop;\n+\tuint8_t vlan_tag_insert = 0;\n+\tuint64_t bus_addr = (dma_addr_t)\n+\t    (tx_pkt->buf_physaddr + RTE_PKTMBUF_HEADROOM);\n+\n+\tif (sop) {\n+\t\tif (ol_flags & PKT_TX_VLAN_PKT)\n+\t\t\tvlan_tag_insert = 1;\n+\n+\t\tif (enic->hw_ip_checksum) {\n+\t\t\tif (ol_flags & PKT_TX_IP_CKSUM)\n+\t\t\t\tmss |= ENIC_CALC_IP_CKSUM;\n+\n+\t\t\tif (ol_flags & PKT_TX_TCP_UDP_CKSUM)\n+\t\t\t\tmss |= ENIC_CALC_TCP_UDP_CKSUM;\n+\t\t}\n+\t}\n+\n+\twq_enet_desc_enc(desc,\n+\t\tbus_addr,\n+\t\tlen,\n+\t\tmss,\n+\t\t0 /* header_length */,\n+\t\t0 /* offload_mode WQ_ENET_OFFLOAD_MODE_CSUM */,\n+\t\teop,\n+\t\tcq_entry,\n+\t\t0 /* fcoe_encap */,\n+\t\tvlan_tag_insert,\n+\t\tvlan_tag,\n+\t\t0 /* loopback */);\n+\n+\tvnic_wq_post(wq, (void *)tx_pkt, bus_addr, len,\n+\t\tsop, eop,\n+\t\t1 /*desc_skip_cnt*/,\n+\t\tcq_entry,\n+\t\t0 /*compressed send*/,\n+\t\t0 /*wrid*/);\n+\n+\treturn 0;\n+}\n+\n+void enic_dev_stats_clear(struct enic *enic)\n+{\n+\tif (vnic_dev_stats_clear(enic->vdev))\n+\t\tdev_err(enic, \"Error in clearing stats\\n\");\n+}\n+\n+void enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)\n+{\n+\tstruct vnic_stats *stats;\n+\n+\tif (vnic_dev_stats_dump(enic->vdev, &stats)) {\n+\t\tdev_err(enic, \"Error in getting stats\\n\");\n+\t\treturn;\n+\t}\n+\n+\tr_stats->ipackets = stats->rx.rx_frames_ok;\n+\tr_stats->opackets = stats->tx.tx_frames_ok;\n+\n+\tr_stats->ibytes = stats->rx.rx_bytes_ok;\n+\tr_stats->obytes = stats->tx.tx_bytes_ok;\n+\n+\tr_stats->ierrors = stats->rx.rx_errors;\n+\tr_stats->oerrors = stats->tx.tx_errors;\n+\n+\tr_stats->imcasts = stats->rx.rx_multicast_frames_ok;\n+\tr_stats->rx_nombuf = stats->rx.rx_no_bufs;\n+}\n+\n+void enic_del_mac_address(struct enic *enic)\n+{\n+\tif (vnic_dev_del_addr(enic->vdev, enic->mac_addr))\n+\t\tdev_err(enic, \"del mac addr failed\\n\");\n+}\n+\n+void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)\n+{\n+\tint err;\n+\n+\tif (!is_eth_addr_valid(mac_addr)) {\n+\t\tdev_err(enic, \"invalid mac address\\n\");\n+\t\treturn;\n+\t}\n+\n+\terr = vnic_dev_del_addr(enic->vdev, mac_addr);\n+\tif (err) {\n+\t\tdev_err(enic, \"del mac addr failed\\n\");\n+\t\treturn;\n+\t}\n+\n+\tether_addr_copy((struct ether_addr *)mac_addr,\n+\t\t(struct ether_addr *)enic->mac_addr);\n+\n+\terr = vnic_dev_add_addr(enic->vdev, mac_addr);\n+\tif (err) {\n+\t\tdev_err(enic, \"add mac addr failed\\n\");\n+\t\treturn;\n+\t}\n+}\n+\n+static void\n+enic_free_rq_buf(__rte_unused struct vnic_rq *rq, struct vnic_rq_buf *buf)\n+{\n+\tif (!buf->os_buf)\n+\t\treturn;\n+\n+\trte_pktmbuf_free((struct rte_mbuf *)buf->os_buf);\n+\tbuf->os_buf = NULL;\n+}\n+\n+void enic_init_vnic_resources(struct enic *enic)\n+{\n+\tunsigned int error_interrupt_enable = 1;\n+\tunsigned int error_interrupt_offset = 0;\n+\tunsigned int index = 0;\n+\n+\tfor (index = 0; index < enic->rq_count; index++) {\n+\t\tvnic_rq_init(&enic->rq[index],\n+\t\t\tenic_cq_rq(enic, index),\n+\t\t\terror_interrupt_enable,\n+\t\t\terror_interrupt_offset);\n+\t}\n+\n+\tfor (index = 0; index < enic->wq_count; index++) {\n+\t\tvnic_wq_init(&enic->wq[index],\n+\t\t\tenic_cq_wq(enic, index),\n+\t\t\terror_interrupt_enable,\n+\t\t\terror_interrupt_offset);\n+\t}\n+\n+\tvnic_dev_stats_clear(enic->vdev);\n+\n+\tfor (index = 0; index < enic->cq_count; index++) {\n+\t\tvnic_cq_init(&enic->cq[index],\n+\t\t\t0 /* flow_control_enable */,\n+\t\t\t1 /* color_enable */,\n+\t\t\t0 /* cq_head */,\n+\t\t\t0 /* cq_tail */,\n+\t\t\t1 /* cq_tail_color */,\n+\t\t\t0 /* interrupt_enable */,\n+\t\t\t1 /* cq_entry_enable */,\n+\t\t\t0 /* cq_message_enable */,\n+\t\t\t0 /* interrupt offset */,\n+\t\t\t0 /* cq_message_addr */);\n+\t}\n+\n+\tvnic_intr_init(&enic->intr,\n+\t\tenic->config.intr_timer_usec,\n+\t\tenic->config.intr_timer_type,\n+\t\t/*mask_on_assertion*/1);\n+}\n+\n+\n+static int enic_rq_alloc_buf(struct vnic_rq *rq)\n+{\n+\tstruct enic *enic = vnic_dev_priv(rq->vdev);\n+\tdma_addr_t dma_addr;\n+\tstruct rq_enet_desc *desc = vnic_rq_next_desc(rq);\n+\tuint8_t type = RQ_ENET_TYPE_ONLY_SOP;\n+\tu16 split_hdr_size = vnic_get_hdr_split_size(enic->vdev);\n+\tstruct rte_mbuf *mbuf = enic_rxmbuf_alloc(rq->mp);\n+\tstruct rte_mbuf *hdr_mbuf = NULL;\n+\n+\tif (!mbuf) {\n+\t\tdev_err(enic, \"mbuf alloc in enic_rq_alloc_buf failed\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tif (unlikely(split_hdr_size)) {\n+\t\tif (vnic_rq_desc_avail(rq) < 2) {\n+\t\t\trte_mempool_put(mbuf->pool, mbuf);\n+\t\t\treturn -1;\n+\t\t}\n+\t\thdr_mbuf = enic_rxmbuf_alloc(rq->mp);\n+\t\tif (!hdr_mbuf) {\n+\t\t\trte_mempool_put(mbuf->pool, mbuf);\n+\t\t\tdev_err(enic,\n+\t\t\t\t\"hdr_mbuf alloc in enic_rq_alloc_buf failed\\n\");\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\thdr_mbuf->data_off = RTE_PKTMBUF_HEADROOM;\n+\n+\t\thdr_mbuf->nb_segs = 2;\n+\t\thdr_mbuf->port = enic->port_id;\n+\t\thdr_mbuf->next = mbuf;\n+\n+\t\tdma_addr = (dma_addr_t)\n+\t\t    (hdr_mbuf->buf_physaddr + hdr_mbuf->data_off);\n+\n+\t\trq_enet_desc_enc(desc, dma_addr, type, split_hdr_size);\n+\n+\t\tvnic_rq_post(rq, (void *)hdr_mbuf, 0 /*os_buf_index*/, dma_addr,\n+\t\t\t(unsigned int)split_hdr_size, 0 /*wrid*/);\n+\n+\t\tdesc = vnic_rq_next_desc(rq);\n+\t\ttype = RQ_ENET_TYPE_NOT_SOP;\n+\t} else {\n+\t\tmbuf->nb_segs = 1;\n+\t\tmbuf->port = enic->port_id;\n+\t}\n+\n+\tmbuf->data_off = RTE_PKTMBUF_HEADROOM;\n+\tmbuf->next = NULL;\n+\n+\tdma_addr = (dma_addr_t)\n+\t    (mbuf->buf_physaddr + mbuf->data_off);\n+\n+\trq_enet_desc_enc(desc, dma_addr, type, mbuf->buf_len);\n+\n+\tvnic_rq_post(rq, (void *)mbuf, 0 /*os_buf_index*/, dma_addr,\n+\t\t(unsigned int)mbuf->buf_len, 0 /*wrid*/);\n+\n+\treturn 0;\n+}\n+\n+static int enic_rq_indicate_buf(struct vnic_rq *rq,\n+\tstruct cq_desc *cq_desc, struct vnic_rq_buf *buf,\n+\tint skipped, void *opaque)\n+{\n+\tstruct enic *enic = vnic_dev_priv(rq->vdev);\n+\tstruct rte_mbuf **rx_pkt_bucket = (struct rte_mbuf **)opaque;\n+\tstruct rte_mbuf *rx_pkt = NULL;\n+\tstruct rte_mbuf *hdr_rx_pkt = NULL;\n+\n+\tu8 type, color, eop, sop, ingress_port, vlan_stripped;\n+\tu8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;\n+\tu8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;\n+\tu8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;\n+\tu8 packet_error;\n+\tu16 q_number, completed_index, bytes_written, vlan_tci, checksum;\n+\tu32 rss_hash;\n+\n+\tcq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,\n+\t\t&type, &color, &q_number, &completed_index,\n+\t\t&ingress_port, &fcoe, &eop, &sop, &rss_type,\n+\t\t&csum_not_calc, &rss_hash, &bytes_written,\n+\t\t&packet_error, &vlan_stripped, &vlan_tci, &checksum,\n+\t\t&fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,\n+\t\t&fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,\n+\t\t&ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,\n+\t\t&fcs_ok);\n+\n+\trx_pkt = (struct rte_mbuf *)buf->os_buf;\n+\tbuf->os_buf = NULL;\n+\n+\tif (unlikely(packet_error)) {\n+\t\tdev_err(enic, \"packet error\\n\");\n+\t\trx_pkt->data_len = 0;\n+\t\treturn 0;\n+\t}\n+\n+\tif (unlikely(skipped)) {\n+\t\trx_pkt->data_len = 0;\n+\t\treturn 0;\n+\t}\n+\n+\tif (likely(!vnic_get_hdr_split_size(enic->vdev))) {\n+\t\t/* No header split configured */\n+\t\t*rx_pkt_bucket = rx_pkt;\n+\t\trx_pkt->pkt_len = bytes_written;\n+\n+\t\tif (ipv4) {\n+\t\t\trx_pkt->ol_flags |= PKT_RX_IPV4_HDR;\n+\t\t\tif (!csum_not_calc) {\n+\t\t\t\tif (unlikely(!ipv4_csum_ok))\n+\t\t\t\t\trx_pkt->ol_flags |= PKT_RX_IP_CKSUM_BAD;\n+\n+\t\t\t\tif ((tcp || udp) && (!tcp_udp_csum_ok))\n+\t\t\t\t\trx_pkt->ol_flags |= PKT_RX_L4_CKSUM_BAD;\n+\t\t\t}\n+\t\t} else if (ipv6)\n+\t\t\trx_pkt->ol_flags |= PKT_RX_IPV6_HDR;\n+\t} else {\n+\t\t/* Header split */\n+\t\tif (sop && !eop) {\n+\t\t\t/* This piece is header */\n+\t\t\t*rx_pkt_bucket = rx_pkt;\n+\t\t\trx_pkt->pkt_len = bytes_written;\n+\t\t} else {\n+\t\t\tif (sop && eop) {\n+\t\t\t\t/* The packet is smaller than split_hdr_size */\n+\t\t\t\t*rx_pkt_bucket = rx_pkt;\n+\t\t\t\trx_pkt->pkt_len = bytes_written;\n+\t\t\t\tif (ipv4) {\n+\t\t\t\t\trx_pkt->ol_flags |= PKT_RX_IPV4_HDR;\n+\t\t\t\t\tif (!csum_not_calc) {\n+\t\t\t\t\t\tif (unlikely(!ipv4_csum_ok))\n+\t\t\t\t\t\t\trx_pkt->ol_flags |=\n+\t\t\t\t\t\t\t    PKT_RX_IP_CKSUM_BAD;\n+\n+\t\t\t\t\t\tif ((tcp || udp) &&\n+\t\t\t\t\t\t    (!tcp_udp_csum_ok))\n+\t\t\t\t\t\t\trx_pkt->ol_flags |=\n+\t\t\t\t\t\t\t    PKT_RX_L4_CKSUM_BAD;\n+\t\t\t\t\t}\n+\t\t\t\t} else if (ipv6)\n+\t\t\t\t\trx_pkt->ol_flags |= PKT_RX_IPV6_HDR;\n+\t\t\t} else {\n+\t\t\t\t/* Payload */\n+\t\t\t\thdr_rx_pkt = *rx_pkt_bucket;\n+\t\t\t\thdr_rx_pkt->pkt_len += bytes_written;\n+\t\t\t\tif (ipv4) {\n+\t\t\t\t\thdr_rx_pkt->ol_flags |= PKT_RX_IPV4_HDR;\n+\t\t\t\t\tif (!csum_not_calc) {\n+\t\t\t\t\t\tif (unlikely(!ipv4_csum_ok))\n+\t\t\t\t\t\t\thdr_rx_pkt->ol_flags |=\n+\t\t\t\t\t\t\t    PKT_RX_IP_CKSUM_BAD;\n+\n+\t\t\t\t\t\tif ((tcp || udp) &&\n+\t\t\t\t\t\t    (!tcp_udp_csum_ok))\n+\t\t\t\t\t\t\thdr_rx_pkt->ol_flags |=\n+\t\t\t\t\t\t\t    PKT_RX_L4_CKSUM_BAD;\n+\t\t\t\t\t}\n+\t\t\t\t} else if (ipv6)\n+\t\t\t\t\thdr_rx_pkt->ol_flags |= PKT_RX_IPV6_HDR;\n+\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\trx_pkt->data_len = bytes_written;\n+\n+\tif (rss_hash) {\n+\t\trx_pkt->ol_flags |= PKT_RX_RSS_HASH;\n+\t\trx_pkt->hash.rss = rss_hash;\n+\t}\n+\n+\tif (vlan_tci) {\n+\t\trx_pkt->ol_flags |= PKT_RX_VLAN_PKT;\n+\t\trx_pkt->vlan_tci = vlan_tci;\n+\t}\n+\n+\treturn eop;\n+}\n+\n+static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,\n+\t__rte_unused u8 type, u16 q_number, u16 completed_index, void *opaque)\n+{\n+\tstruct enic *enic = vnic_dev_priv(vdev);\n+\n+\treturn vnic_rq_service(&enic->rq[q_number], cq_desc,\n+\t\tcompleted_index, VNIC_RQ_RETURN_DESC,\n+\t\tenic_rq_indicate_buf, opaque);\n+\n+}\n+\n+int enic_poll(struct vnic_rq *rq, struct rte_mbuf **rx_pkts,\n+\tunsigned int budget, unsigned int *work_done)\n+{\n+\tstruct enic *enic = vnic_dev_priv(rq->vdev);\n+\tunsigned int cq = enic_cq_rq(enic, rq->index);\n+\tint err = 0;\n+\n+\t*work_done = vnic_cq_service(&enic->cq[cq],\n+\t\tbudget, enic_rq_service, (void *)rx_pkts);\n+\n+\tif (*work_done) {\n+\t\tvnic_rq_fill(rq, enic_rq_alloc_buf);\n+\n+\t\t/* Need at least one buffer on ring to get going */\n+\t\tif (vnic_rq_desc_used(rq) == 0) {\n+\t\t\tdev_err(enic, \"Unable to alloc receive buffers\\n\");\n+\t\t\terr = -1;\n+\t\t}\n+\t}\n+\treturn err;\n+}\n+\n+static void *\n+enic_alloc_consistent(__rte_unused void *priv, size_t size,\n+\tdma_addr_t *dma_handle, u8 *name)\n+{\n+\tvoid *vaddr;\n+\tconst struct rte_memzone *rz;\n+\t*dma_handle = 0;\n+\n+\trz = rte_memzone_reserve_aligned((const char *)name,\n+\t\tsize, 0, 0, ENIC_ALIGN);\n+\tif (!rz) {\n+\t\tpr_err(\"%s : Failed to allocate memory requested for %s\",\n+\t\t\t__func__, name);\n+\t\treturn NULL;\n+\t}\n+\n+\tvaddr = rz->addr;\n+\t*dma_handle = (dma_addr_t)rz->phys_addr;\n+\n+\treturn vaddr;\n+}\n+\n+static void\n+enic_free_consistent(__rte_unused struct rte_pci_device *hwdev,\n+\t__rte_unused size_t size,\n+\t__rte_unused void *vaddr,\n+\t__rte_unused dma_addr_t dma_handle)\n+{\n+\t/* Nothing to be done */\n+}\n+\n+static void\n+enic_intr_handler(__rte_unused struct rte_intr_handle *handle,\n+\tvoid *arg)\n+{\n+\tstruct enic *enic = pmd_priv((struct rte_eth_dev *)arg);\n+\n+\tvnic_intr_return_all_credits(&enic->intr);\n+\n+\tenic_log_q_error(enic);\n+}\n+\n+int enic_enable(struct enic *enic)\n+{\n+\tunsigned int index;\n+\tstruct rte_eth_dev *eth_dev = enic->rte_dev;\n+\n+\teth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);\n+\teth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;\n+\tvnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */\n+\n+\tif (enic_clsf_init(enic))\n+\t\tdev_warning(enic, \"Init of hash table for clsf failed.\"\\\n+\t\t\t\"Flow director feature will not work\\n\");\n+\n+\t/* Fill RQ bufs */\n+\tfor (index = 0; index < enic->rq_count; index++) {\n+\t\tvnic_rq_fill(&enic->rq[index], enic_rq_alloc_buf);\n+\n+\t\t/* Need at least one buffer on ring to get going\n+\t\t*/\n+\t\tif (vnic_rq_desc_used(&enic->rq[index]) == 0) {\n+\t\t\tdev_err(enic, \"Unable to alloc receive buffers\\n\");\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\n+\tfor (index = 0; index < enic->wq_count; index++)\n+\t\tvnic_wq_enable(&enic->wq[index]);\n+\tfor (index = 0; index < enic->rq_count; index++)\n+\t\tvnic_rq_enable(&enic->rq[index]);\n+\n+\tvnic_dev_enable_wait(enic->vdev);\n+\n+\t/* Register and enable error interrupt */\n+\trte_intr_callback_register(&(enic->pdev->intr_handle),\n+\t\tenic_intr_handler, (void *)enic->rte_dev);\n+\n+\trte_intr_enable(&(enic->pdev->intr_handle));\n+\tvnic_intr_unmask(&enic->intr);\n+\n+\treturn 0;\n+}\n+\n+int enic_alloc_intr_resources(struct enic *enic)\n+{\n+\tint err;\n+\n+\tdev_info(enic, \"vNIC resources used:  \"\\\n+\t\t\"wq %d rq %d cq %d intr %d\\n\",\n+\t\tenic->wq_count, enic->rq_count,\n+\t\tenic->cq_count, enic->intr_count);\n+\n+\terr = vnic_intr_alloc(enic->vdev, &enic->intr, 0);\n+\tif (err)\n+\t\tenic_free_vnic_resources(enic);\n+\n+\treturn err;\n+}\n+\n+void enic_free_rq(void *rxq)\n+{\n+\tstruct vnic_rq *rq = (struct vnic_rq *)rxq;\n+\tstruct enic *enic = vnic_dev_priv(rq->vdev);\n+\n+\tvnic_rq_free(rq);\n+\tvnic_cq_free(&enic->cq[rq->index]);\n+}\n+\n+void enic_start_wq(struct enic *enic, uint16_t queue_idx)\n+{\n+\tvnic_wq_enable(&enic->wq[queue_idx]);\n+}\n+\n+int enic_stop_wq(struct enic *enic, uint16_t queue_idx)\n+{\n+\treturn vnic_wq_disable(&enic->wq[queue_idx]);\n+}\n+\n+void enic_start_rq(struct enic *enic, uint16_t queue_idx)\n+{\n+\tvnic_rq_enable(&enic->rq[queue_idx]);\n+}\n+\n+int enic_stop_rq(struct enic *enic, uint16_t queue_idx)\n+{\n+\treturn vnic_rq_disable(&enic->rq[queue_idx]);\n+}\n+\n+int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,\n+\tunsigned int socket_id, struct rte_mempool *mp,\n+\tuint16_t nb_desc)\n+{\n+\tint err;\n+\tstruct vnic_rq *rq = &enic->rq[queue_idx];\n+\n+\trq->socket_id = socket_id;\n+\trq->mp = mp;\n+\n+\tif (nb_desc) {\n+\t\tif (nb_desc > enic->config.rq_desc_count) {\n+\t\t\tdev_warning(enic,\n+\t\t\t\t\"RQ %d - number of rx desc in cmd line (%d)\"\\\n+\t\t\t\t\"is greater than that in the UCSM/CIMC adapter\"\\\n+\t\t\t\t\"policy.  Applying the value in the adapter \"\\\n+\t\t\t\t\"policy (%d).\\n\",\n+\t\t\t\tqueue_idx, nb_desc, enic->config.rq_desc_count);\n+\t\t} else if (nb_desc != enic->config.rq_desc_count) {\n+\t\t\tenic->config.rq_desc_count = nb_desc;\n+\t\t\tdev_info(enic,\n+\t\t\t\t\"RX Queues - effective number of descs:%d\\n\",\n+\t\t\t\tnb_desc);\n+\t\t}\n+\t}\n+\n+\t/* Allocate queue resources */\n+\terr = vnic_rq_alloc(enic->vdev, &enic->rq[queue_idx], queue_idx,\n+\t\tenic->config.rq_desc_count,\n+\t\tsizeof(struct rq_enet_desc));\n+\tif (err) {\n+\t\tdev_err(enic, \"error in allocation of rq\\n\");\n+\t\treturn err;\n+\t}\n+\n+\terr = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,\n+\t\tsocket_id, enic->config.rq_desc_count,\n+\t\tsizeof(struct cq_enet_rq_desc));\n+\tif (err) {\n+\t\tvnic_rq_free(rq);\n+\t\tdev_err(enic, \"error in allocation of cq for rq\\n\");\n+\t}\n+\n+\treturn err;\n+}\n+\n+void enic_free_wq(void *txq)\n+{\n+\tstruct vnic_wq *wq = (struct vnic_wq *)txq;\n+\tstruct enic *enic = vnic_dev_priv(wq->vdev);\n+\n+\tvnic_wq_free(wq);\n+\tvnic_cq_free(&enic->cq[enic->rq_count + wq->index]);\n+}\n+\n+int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,\n+\tunsigned int socket_id, uint16_t nb_desc)\n+{\n+\tint err;\n+\tstruct vnic_wq *wq = &enic->wq[queue_idx];\n+\tunsigned int cq_index = enic_cq_wq(enic, queue_idx);\n+\n+\twq->socket_id = socket_id;\n+\tif (nb_desc) {\n+\t\tif (nb_desc > enic->config.wq_desc_count) {\n+\t\t\tdev_warning(enic,\n+\t\t\t\t\"WQ %d - number of tx desc in cmd line (%d)\"\\\n+\t\t\t\t\"is greater than that in the UCSM/CIMC adapter\"\\\n+\t\t\t\t\"policy.  Applying the value in the adapter \"\\\n+\t\t\t\t\"policy (%d)\\n\",\n+\t\t\t\tqueue_idx, nb_desc, enic->config.wq_desc_count);\n+\t\t} else if (nb_desc != enic->config.wq_desc_count) {\n+\t\t\tenic->config.wq_desc_count = nb_desc;\n+\t\t\tdev_info(enic,\n+\t\t\t\t\"TX Queues - effective number of descs:%d\\n\",\n+\t\t\t\tnb_desc);\n+\t\t}\n+\t}\n+\n+\t/* Allocate queue resources */\n+\terr = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,\n+\t\tenic->config.wq_desc_count,\n+\t\tsizeof(struct wq_enet_desc));\n+\tif (err) {\n+\t\tdev_err(enic, \"error in allocation of wq\\n\");\n+\t\treturn err;\n+\t}\n+\n+\terr = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,\n+\t\tsocket_id, enic->config.wq_desc_count,\n+\t\tsizeof(struct cq_enet_wq_desc));\n+\tif (err) {\n+\t\tvnic_wq_free(wq);\n+\t\tdev_err(enic, \"error in allocation of cq for wq\\n\");\n+\t}\n+\n+\treturn err;\n+}\n+\n+int enic_disable(struct enic *enic)\n+{\n+\tunsigned int i;\n+\tint err;\n+\n+\tvnic_intr_mask(&enic->intr);\n+\t(void)vnic_intr_masked(&enic->intr); /* flush write */\n+\n+\tvnic_dev_disable(enic->vdev);\n+\n+\tenic_clsf_destroy(enic);\n+\n+\tif (!enic_is_sriov_vf(enic))\n+\t\tvnic_dev_del_addr(enic->vdev, enic->mac_addr);\n+\n+\tfor (i = 0; i < enic->wq_count; i++) {\n+\t\terr = vnic_wq_disable(&enic->wq[i]);\n+\t\tif (err)\n+\t\t\treturn err;\n+\t}\n+\tfor (i = 0; i < enic->rq_count; i++) {\n+\t\terr = vnic_rq_disable(&enic->rq[i]);\n+\t\tif (err)\n+\t\t\treturn err;\n+\t}\n+\n+\tvnic_dev_set_reset_flag(enic->vdev, 1);\n+\tvnic_dev_notify_unset(enic->vdev);\n+\n+\tfor (i = 0; i < enic->wq_count; i++)\n+\t\tvnic_wq_clean(&enic->wq[i], enic_free_wq_buf);\n+\tfor (i = 0; i < enic->rq_count; i++)\n+\t\tvnic_rq_clean(&enic->rq[i], enic_free_rq_buf);\n+\tfor (i = 0; i < enic->cq_count; i++)\n+\t\tvnic_cq_clean(&enic->cq[i]);\n+\tvnic_intr_clean(&enic->intr);\n+\n+\treturn 0;\n+}\n+\n+static int enic_dev_wait(struct vnic_dev *vdev,\n+\tint (*start)(struct vnic_dev *, int),\n+\tint (*finished)(struct vnic_dev *, int *),\n+\tint arg)\n+{\n+\tint done;\n+\tint err;\n+\tint i;\n+\n+\terr = start(vdev, arg);\n+\tif (err)\n+\t\treturn err;\n+\n+\t/* Wait for func to complete...2 seconds max */\n+\tfor (i = 0; i < 2000; i++) {\n+\t\terr = finished(vdev, &done);\n+\t\tif (err)\n+\t\t\treturn err;\n+\t\tif (done)\n+\t\t\treturn 0;\n+\t\tusleep(1000);\n+\t}\n+\treturn -ETIMEDOUT;\n+}\n+\n+static int enic_dev_open(struct enic *enic)\n+{\n+\tint err;\n+\n+\terr = enic_dev_wait(enic->vdev, vnic_dev_open,\n+\t\tvnic_dev_open_done, 0);\n+\tif (err)\n+\t\tdev_err(enic_get_dev(enic),\n+\t\t\t\"vNIC device open failed, err %d\\n\", err);\n+\n+\treturn err;\n+}\n+\n+static int enic_set_rsskey(struct enic *enic)\n+{\n+\tdma_addr_t rss_key_buf_pa;\n+\tunion vnic_rss_key *rss_key_buf_va = NULL;\n+\tstatic union vnic_rss_key rss_key = {\n+\t\t.key = {\n+\t\t\t[0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},\n+\t\t\t[1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},\n+\t\t\t[2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},\n+\t\t\t[3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},\n+\t\t}\n+\t};\n+\tint err;\n+\tu8 name[NAME_MAX];\n+\n+\tsnprintf((char *)name, NAME_MAX, \"rss_key-%s\", enic->bdf_name);\n+\trss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),\n+\t\t&rss_key_buf_pa, name);\n+\tif (!rss_key_buf_va)\n+\t\treturn -ENOMEM;\n+\n+\trte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));\n+\n+\terr = enic_set_rss_key(enic,\n+\t\trss_key_buf_pa,\n+\t\tsizeof(union vnic_rss_key));\n+\n+\tenic_free_consistent(enic->pdev, sizeof(union vnic_rss_key),\n+\t\trss_key_buf_va, rss_key_buf_pa);\n+\n+\treturn err;\n+}\n+\n+static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)\n+{\n+\tdma_addr_t rss_cpu_buf_pa;\n+\tunion vnic_rss_cpu *rss_cpu_buf_va = NULL;\n+\tint i;\n+\tint err;\n+\tu8 name[NAME_MAX];\n+\n+\tsnprintf((char *)name, NAME_MAX, \"rss_cpu-%s\", enic->bdf_name);\n+\trss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),\n+\t\t&rss_cpu_buf_pa, name);\n+\tif (!rss_cpu_buf_va)\n+\t\treturn -ENOMEM;\n+\n+\tfor (i = 0; i < (1 << rss_hash_bits); i++)\n+\t\t(*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;\n+\n+\terr = enic_set_rss_cpu(enic,\n+\t\trss_cpu_buf_pa,\n+\t\tsizeof(union vnic_rss_cpu));\n+\n+\tenic_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),\n+\t\trss_cpu_buf_va, rss_cpu_buf_pa);\n+\n+\treturn err;\n+}\n+\n+static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,\n+\tu8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)\n+{\n+\tconst u8 tso_ipid_split_en = 0;\n+\tint err;\n+\n+\t/* Enable VLAN tag stripping */\n+\n+\terr = enic_set_nic_cfg(enic,\n+\t\trss_default_cpu, rss_hash_type,\n+\t\trss_hash_bits, rss_base_cpu,\n+\t\trss_enable, tso_ipid_split_en,\n+\t\tenic->ig_vlan_strip_en);\n+\n+\treturn err;\n+}\n+\n+int enic_set_rss_nic_cfg(struct enic *enic)\n+{\n+\tconst u8 rss_default_cpu = 0;\n+\tconst u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |\n+\t    NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |\n+\t    NIC_CFG_RSS_HASH_TYPE_IPV6 |\n+\t    NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;\n+\tconst u8 rss_hash_bits = 7;\n+\tconst u8 rss_base_cpu = 0;\n+\tu8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);\n+\n+\tif (rss_enable) {\n+\t\tif (!enic_set_rsskey(enic)) {\n+\t\t\tif (enic_set_rsscpu(enic, rss_hash_bits)) {\n+\t\t\t\trss_enable = 0;\n+\t\t\t\tdev_warning(enic, \"RSS disabled, \"\\\n+\t\t\t\t\t\"Failed to set RSS cpu indirection table.\");\n+\t\t\t}\n+\t\t} else {\n+\t\t\trss_enable = 0;\n+\t\t\tdev_warning(enic,\n+\t\t\t\t\"RSS disabled, Failed to set RSS key.\\n\");\n+\t\t}\n+\t}\n+\n+\treturn enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,\n+\t\trss_hash_bits, rss_base_cpu, rss_enable);\n+}\n+\n+int enic_setup_finish(struct enic *enic)\n+{\n+\tint ret;\n+\n+\tret = enic_set_rss_nic_cfg(enic);\n+\tif (ret) {\n+\t\tdev_err(enic, \"Failed to config nic, aborting.\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tvnic_dev_add_addr(enic->vdev, enic->mac_addr);\n+\n+\t/* Default conf */\n+\tvnic_dev_packet_filter(enic->vdev,\n+\t\t1 /* directed  */,\n+\t\t1 /* multicast */,\n+\t\t1 /* broadcast */,\n+\t\t0 /* promisc   */,\n+\t\t1 /* allmulti  */);\n+\n+\tenic->promisc = 0;\n+\tenic->allmulti = 1;\n+\n+\treturn 0;\n+}\n+\n+void enic_add_packet_filter(struct enic *enic)\n+{\n+\t/* Args -> directed, multicast, broadcast, promisc, allmulti */\n+\tvnic_dev_packet_filter(enic->vdev, 1, 1, 1,\n+\t\tenic->promisc, enic->allmulti);\n+}\n+\n+int enic_get_link_status(struct enic *enic)\n+{\n+\treturn vnic_dev_link_status(enic->vdev);\n+}\n+\n+static void enic_dev_deinit(struct enic *enic)\n+{\n+\tstruct rte_eth_dev *eth_dev = enic->rte_dev;\n+\n+\trte_free(eth_dev->data->mac_addrs);\n+}\n+\n+\n+int enic_set_vnic_res(struct enic *enic)\n+{\n+\tstruct rte_eth_dev *eth_dev = enic->rte_dev;\n+\n+\tif ((enic->rq_count < eth_dev->data->nb_rx_queues) ||\n+\t\t(enic->wq_count < eth_dev->data->nb_tx_queues)) {\n+\t\tdev_err(dev, \"Not enough resources configured, aborting\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tenic->rq_count = eth_dev->data->nb_rx_queues;\n+\tenic->wq_count = eth_dev->data->nb_tx_queues;\n+\tif (enic->cq_count < (enic->rq_count + enic->wq_count)) {\n+\t\tdev_err(dev, \"Not enough resources configured, aborting\\n\");\n+\t\treturn -1;\n+\t}\n+\n+\tenic->cq_count = enic->rq_count + enic->wq_count;\n+\treturn 0;\n+}\n+\n+static int enic_dev_init(struct enic *enic)\n+{\n+\tint err;\n+\tstruct rte_eth_dev *eth_dev = enic->rte_dev;\n+\n+\tvnic_dev_intr_coal_timer_info_default(enic->vdev);\n+\n+\t/* Get vNIC configuration\n+\t*/\n+\terr = enic_get_vnic_config(enic);\n+\tif (err) {\n+\t\tdev_err(dev, \"Get vNIC configuration failed, aborting\\n\");\n+\t\treturn err;\n+\t}\n+\n+\teth_dev->data->mac_addrs = rte_zmalloc(\"enic_mac_addr\", ETH_ALEN, 0);\n+\tif (!eth_dev->data->mac_addrs) {\n+\t\tdev_err(enic, \"mac addr storage alloc failed, aborting.\\n\");\n+\t\treturn -1;\n+\t}\n+\tether_addr_copy((struct ether_addr *) enic->mac_addr,\n+\t\t&eth_dev->data->mac_addrs[0]);\n+\n+\n+\t/* Get available resource counts\n+\t*/\n+\tenic_get_res_counts(enic);\n+\n+\tvnic_dev_set_reset_flag(enic->vdev, 0);\n+\n+\treturn 0;\n+\n+}\n+\n+int enic_probe(struct enic *enic)\n+{\n+\tstruct rte_pci_device *pdev = enic->pdev;\n+\tint err = -1;\n+\n+\tdev_debug(enic, \" Initializing ENIC PMD version %s\\n\", DRV_VERSION);\n+\n+\tenic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;\n+\tenic->bar0.len = pdev->mem_resource[0].len;\n+\n+\t/* Register vNIC device */\n+\tenic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);\n+\tif (!enic->vdev) {\n+\t\tdev_err(enic, \"vNIC registration failed, aborting\\n\");\n+\t\tgoto err_out;\n+\t}\n+\n+\tvnic_register_cbacks(enic->vdev,\n+\t\tenic_alloc_consistent,\n+\t\tenic_free_consistent);\n+\n+\t/* Issue device open to get device in known state */\n+\terr = enic_dev_open(enic);\n+\tif (err) {\n+\t\tdev_err(enic, \"vNIC dev open failed, aborting\\n\");\n+\t\tgoto err_out_unregister;\n+\t}\n+\n+\t/* Set ingress vlan rewrite mode before vnic initialization */\n+\terr = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,\n+\t\tIG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN);\n+\tif (err) {\n+\t\tdev_err(enic,\n+\t\t\t\"Failed to set ingress vlan rewrite mode, aborting.\\n\");\n+\t\tgoto err_out_dev_close;\n+\t}\n+\n+\t/* Issue device init to initialize the vnic-to-switch link.\n+\t * We'll start with carrier off and wait for link UP\n+\t * notification later to turn on carrier.  We don't need\n+\t * to wait here for the vnic-to-switch link initialization\n+\t * to complete; link UP notification is the indication that\n+\t * the process is complete.\n+\t */\n+\n+\terr = vnic_dev_init(enic->vdev, 0);\n+\tif (err) {\n+\t\tdev_err(enic, \"vNIC dev init failed, aborting\\n\");\n+\t\tgoto err_out_dev_close;\n+\t}\n+\n+\terr = enic_dev_init(enic);\n+\tif (err) {\n+\t\tdev_err(enic, \"Device initialization failed, aborting\\n\");\n+\t\tgoto err_out_dev_close;\n+\t}\n+\n+\treturn 0;\n+\n+err_out_dev_close:\n+\tvnic_dev_close(enic->vdev);\n+err_out_unregister:\n+\tvnic_dev_unregister(enic->vdev);\n+err_out:\n+\treturn err;\n+}\n+\n+void enic_remove(struct enic *enic)\n+{\n+\tenic_dev_deinit(enic);\n+\tvnic_dev_close(enic->vdev);\n+\tvnic_dev_unregister(enic->vdev);\n+}\ndiff --git a/drivers/net/enic/enic_res.c b/drivers/net/enic/enic_res.c\nnew file mode 100644\nindex 0000000..12a337c\n--- /dev/null\n+++ b/drivers/net/enic/enic_res.c\n@@ -0,0 +1,219 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: enic_res.c 171146 2014-05-02 07:08:20Z ssujith $\"\n+\n+#include \"enic_compat.h\"\n+#include \"rte_ethdev.h\"\n+#include \"wq_enet_desc.h\"\n+#include \"rq_enet_desc.h\"\n+#include \"cq_enet_desc.h\"\n+#include \"vnic_resource.h\"\n+#include \"vnic_enet.h\"\n+#include \"vnic_dev.h\"\n+#include \"vnic_wq.h\"\n+#include \"vnic_rq.h\"\n+#include \"vnic_cq.h\"\n+#include \"vnic_intr.h\"\n+#include \"vnic_stats.h\"\n+#include \"vnic_nic.h\"\n+#include \"vnic_rss.h\"\n+#include \"enic_res.h\"\n+#include \"enic.h\"\n+\n+int enic_get_vnic_config(struct enic *enic)\n+{\n+\tstruct vnic_enet_config *c = &enic->config;\n+\tint err;\n+\n+\terr = vnic_dev_get_mac_addr(enic->vdev, enic->mac_addr);\n+\tif (err) {\n+\t\tdev_err(enic_get_dev(enic),\n+\t\t\t\"Error getting MAC addr, %d\\n\", err);\n+\t\treturn err;\n+\t}\n+\n+#define GET_CONFIG(m) \\\n+\tdo { \\\n+\t\terr = vnic_dev_spec(enic->vdev, \\\n+\t\t\toffsetof(struct vnic_enet_config, m), \\\n+\t\t\tsizeof(c->m), &c->m); \\\n+\t\tif (err) { \\\n+\t\t\tdev_err(enic_get_dev(enic), \\\n+\t\t\t\t\"Error getting %s, %d\\n\", #m, err); \\\n+\t\t\treturn err; \\\n+\t\t} \\\n+\t} while (0)\n+\n+\tGET_CONFIG(flags);\n+\tGET_CONFIG(wq_desc_count);\n+\tGET_CONFIG(rq_desc_count);\n+\tGET_CONFIG(mtu);\n+\tGET_CONFIG(intr_timer_type);\n+\tGET_CONFIG(intr_mode);\n+\tGET_CONFIG(intr_timer_usec);\n+\tGET_CONFIG(loop_tag);\n+\tGET_CONFIG(num_arfs);\n+\n+\tc->wq_desc_count =\n+\t\tmin_t(u32, ENIC_MAX_WQ_DESCS,\n+\t\tmax_t(u32, ENIC_MIN_WQ_DESCS,\n+\t\tc->wq_desc_count));\n+\tc->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */\n+\n+\tc->rq_desc_count =\n+\t\tmin_t(u32, ENIC_MAX_RQ_DESCS,\n+\t\tmax_t(u32, ENIC_MIN_RQ_DESCS,\n+\t\tc->rq_desc_count));\n+\tc->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */\n+\n+\tif (c->mtu == 0)\n+\t\tc->mtu = 1500;\n+\tc->mtu = min_t(u16, ENIC_MAX_MTU,\n+\t\tmax_t(u16, ENIC_MIN_MTU,\n+\t\tc->mtu));\n+\n+\tc->intr_timer_usec = min_t(u32, c->intr_timer_usec,\n+\t\tvnic_dev_get_intr_coal_timer_max(enic->vdev));\n+\n+\tdev_info(enic_get_dev(enic),\n+\t\t\"vNIC MAC addr %02x:%02x:%02x:%02x:%02x:%02x \"\n+\t\t\"wq/rq %d/%d mtu %d\\n\",\n+\t\tenic->mac_addr[0], enic->mac_addr[1], enic->mac_addr[2],\n+\t\tenic->mac_addr[3], enic->mac_addr[4], enic->mac_addr[5],\n+\t\tc->wq_desc_count, c->rq_desc_count, c->mtu);\n+\tdev_info(enic_get_dev(enic), \"vNIC csum tx/rx %s/%s \"\n+\t\t\"rss %s intr mode %s type %s timer %d usec \"\n+\t\t\"loopback tag 0x%04x\\n\",\n+\t\tENIC_SETTING(enic, TXCSUM) ? \"yes\" : \"no\",\n+\t\tENIC_SETTING(enic, RXCSUM) ? \"yes\" : \"no\",\n+\t\tENIC_SETTING(enic, RSS) ? \"yes\" : \"no\",\n+\t\tc->intr_mode == VENET_INTR_MODE_INTX ? \"INTx\" :\n+\t\tc->intr_mode == VENET_INTR_MODE_MSI ? \"MSI\" :\n+\t\tc->intr_mode == VENET_INTR_MODE_ANY ? \"any\" :\n+\t\t\"unknown\",\n+\t\tc->intr_timer_type == VENET_INTR_TYPE_MIN ? \"min\" :\n+\t\tc->intr_timer_type == VENET_INTR_TYPE_IDLE ? \"idle\" :\n+\t\t\"unknown\",\n+\t\tc->intr_timer_usec,\n+\t\tc->loop_tag);\n+\n+\treturn 0;\n+}\n+\n+int enic_add_vlan(struct enic *enic, u16 vlanid)\n+{\n+\tu64 a0 = vlanid, a1 = 0;\n+\tint wait = 1000;\n+\tint err;\n+\n+\terr = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);\n+\tif (err)\n+\t\tdev_err(enic_get_dev(enic), \"Can't add vlan id, %d\\n\", err);\n+\n+\treturn err;\n+}\n+\n+int enic_del_vlan(struct enic *enic, u16 vlanid)\n+{\n+\tu64 a0 = vlanid, a1 = 0;\n+\tint wait = 1000;\n+\tint err;\n+\n+\terr = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);\n+\tif (err)\n+\t\tdev_err(enic_get_dev(enic), \"Can't delete vlan id, %d\\n\", err);\n+\n+\treturn err;\n+}\n+\n+int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,\n+\tu8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,\n+\tu8 ig_vlan_strip_en)\n+{\n+\tu64 a0, a1;\n+\tu32 nic_cfg;\n+\tint wait = 1000;\n+\n+\tvnic_set_nic_cfg(&nic_cfg, rss_default_cpu,\n+\t\trss_hash_type, rss_hash_bits, rss_base_cpu,\n+\t\trss_enable, tso_ipid_split_en, ig_vlan_strip_en);\n+\n+\ta0 = nic_cfg;\n+\ta1 = 0;\n+\n+\treturn vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);\n+}\n+\n+int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)\n+{\n+\tu64 a0 = (u64)key_pa, a1 = len;\n+\tint wait = 1000;\n+\n+\treturn vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);\n+}\n+\n+int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)\n+{\n+\tu64 a0 = (u64)cpu_pa, a1 = len;\n+\tint wait = 1000;\n+\n+\treturn vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);\n+}\n+\n+void enic_free_vnic_resources(struct enic *enic)\n+{\n+\tunsigned int i;\n+\n+\tfor (i = 0; i < enic->wq_count; i++)\n+\t\tvnic_wq_free(&enic->wq[i]);\n+\tfor (i = 0; i < enic->rq_count; i++)\n+\t\tvnic_rq_free(&enic->rq[i]);\n+\tfor (i = 0; i < enic->cq_count; i++)\n+\t\tvnic_cq_free(&enic->cq[i]);\n+\tvnic_intr_free(&enic->intr);\n+}\n+\n+void enic_get_res_counts(struct enic *enic)\n+{\n+\tenic->wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);\n+\tenic->rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);\n+\tenic->cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);\n+\tenic->intr_count = vnic_dev_get_res_count(enic->vdev,\n+\t\tRES_TYPE_INTR_CTRL);\n+\n+\tdev_info(enic_get_dev(enic),\n+\t\t\"vNIC resources avail: wq %d rq %d cq %d intr %d\\n\",\n+\t\tenic->wq_count, enic->rq_count,\n+\t\tenic->cq_count, enic->intr_count);\n+}\ndiff --git a/drivers/net/enic/enic_res.h b/drivers/net/enic/enic_res.h\nnew file mode 100644\nindex 0000000..ea60f6a\n--- /dev/null\n+++ b/drivers/net/enic/enic_res.h\n@@ -0,0 +1,168 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: enic_res.h 173137 2014-05-16 03:27:22Z sanpilla $\"\n+\n+#ifndef _ENIC_RES_H_\n+#define _ENIC_RES_H_\n+\n+#include \"wq_enet_desc.h\"\n+#include \"rq_enet_desc.h\"\n+#include \"vnic_wq.h\"\n+#include \"vnic_rq.h\"\n+\n+#define ENIC_MIN_WQ_DESCS\t\t64\n+#define ENIC_MAX_WQ_DESCS\t\t4096\n+#define ENIC_MIN_RQ_DESCS\t\t64\n+#define ENIC_MAX_RQ_DESCS\t\t4096\n+\n+#define ENIC_MIN_MTU\t\t\t68\n+#define ENIC_MAX_MTU\t\t\t9000\n+\n+#define ENIC_MULTICAST_PERFECT_FILTERS\t32\n+#define ENIC_UNICAST_PERFECT_FILTERS\t32\n+\n+#define ENIC_NON_TSO_MAX_DESC\t\t16\n+\n+#define ENIC_SETTING(enic, f) ((enic->config.flags & VENETF_##f) ? 1 : 0)\n+\n+static inline void enic_queue_wq_desc_ex(struct vnic_wq *wq,\n+\tvoid *os_buf, dma_addr_t dma_addr, unsigned int len,\n+\tunsigned int mss_or_csum_offset, unsigned int hdr_len,\n+\tint vlan_tag_insert, unsigned int vlan_tag,\n+\tint offload_mode, int cq_entry, int sop, int eop, int loopback)\n+{\n+\tstruct wq_enet_desc *desc = vnic_wq_next_desc(wq);\n+\tu8 desc_skip_cnt = 1;\n+\tu8 compressed_send = 0;\n+\tu64 wrid = 0;\n+\n+\twq_enet_desc_enc(desc,\n+\t\t(u64)dma_addr | VNIC_PADDR_TARGET,\n+\t\t(u16)len,\n+\t\t(u16)mss_or_csum_offset,\n+\t\t(u16)hdr_len, (u8)offload_mode,\n+\t\t(u8)eop, (u8)cq_entry,\n+\t\t0, /* fcoe_encap */\n+\t\t(u8)vlan_tag_insert,\n+\t\t(u16)vlan_tag,\n+\t\t(u8)loopback);\n+\n+\tvnic_wq_post(wq, os_buf, dma_addr, len, sop, eop, desc_skip_cnt,\n+\t\t\t(u8)cq_entry, compressed_send, wrid);\n+}\n+\n+static inline void enic_queue_wq_desc_cont(struct vnic_wq *wq,\n+\tvoid *os_buf, dma_addr_t dma_addr, unsigned int len,\n+\tint eop, int loopback)\n+{\n+\tenic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,\n+\t\t0, 0, 0, 0, 0,\n+\t\teop, 0 /* !SOP */, eop, loopback);\n+}\n+\n+static inline void enic_queue_wq_desc(struct vnic_wq *wq, void *os_buf,\n+\tdma_addr_t dma_addr, unsigned int len, int vlan_tag_insert,\n+\tunsigned int vlan_tag, int eop, int loopback)\n+{\n+\tenic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,\n+\t\t0, 0, vlan_tag_insert, vlan_tag,\n+\t\tWQ_ENET_OFFLOAD_MODE_CSUM,\n+\t\teop, 1 /* SOP */, eop, loopback);\n+}\n+\n+static inline void enic_queue_wq_desc_csum(struct vnic_wq *wq,\n+\tvoid *os_buf, dma_addr_t dma_addr, unsigned int len,\n+\tint ip_csum, int tcpudp_csum, int vlan_tag_insert,\n+\tunsigned int vlan_tag, int eop, int loopback)\n+{\n+\tenic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,\n+\t\t(ip_csum ? 1 : 0) + (tcpudp_csum ? 2 : 0),\n+\t\t0, vlan_tag_insert, vlan_tag,\n+\t\tWQ_ENET_OFFLOAD_MODE_CSUM,\n+\t\teop, 1 /* SOP */, eop, loopback);\n+}\n+\n+static inline void enic_queue_wq_desc_csum_l4(struct vnic_wq *wq,\n+\tvoid *os_buf, dma_addr_t dma_addr, unsigned int len,\n+\tunsigned int csum_offset, unsigned int hdr_len,\n+\tint vlan_tag_insert, unsigned int vlan_tag, int eop, int loopback)\n+{\n+\tenic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,\n+\t\tcsum_offset, hdr_len, vlan_tag_insert, vlan_tag,\n+\t\tWQ_ENET_OFFLOAD_MODE_CSUM_L4,\n+\t\teop, 1 /* SOP */, eop, loopback);\n+}\n+\n+static inline void enic_queue_wq_desc_tso(struct vnic_wq *wq,\n+\tvoid *os_buf, dma_addr_t dma_addr, unsigned int len,\n+\tunsigned int mss, unsigned int hdr_len, int vlan_tag_insert,\n+\tunsigned int vlan_tag, int eop, int loopback)\n+{\n+\tenic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,\n+\t\tmss, hdr_len, vlan_tag_insert, vlan_tag,\n+\t\tWQ_ENET_OFFLOAD_MODE_TSO,\n+\t\teop, 1 /* SOP */, eop, loopback);\n+}\n+static inline void enic_queue_rq_desc(struct vnic_rq *rq,\n+\tvoid *os_buf, unsigned int os_buf_index,\n+\tdma_addr_t dma_addr, unsigned int len)\n+{\n+\tstruct rq_enet_desc *desc = vnic_rq_next_desc(rq);\n+\tu64 wrid = 0;\n+\tu8 type = os_buf_index ?\n+\t\tRQ_ENET_TYPE_NOT_SOP : RQ_ENET_TYPE_ONLY_SOP;\n+\n+\trq_enet_desc_enc(desc,\n+\t\t(u64)dma_addr | VNIC_PADDR_TARGET,\n+\t\ttype, (u16)len);\n+\n+\tvnic_rq_post(rq, os_buf, os_buf_index, dma_addr, len, wrid);\n+}\n+\n+struct enic;\n+\n+int enic_get_vnic_config(struct enic *);\n+int enic_add_vlan(struct enic *enic, u16 vlanid);\n+int enic_del_vlan(struct enic *enic, u16 vlanid);\n+int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,\n+\tu8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,\n+\tu8 ig_vlan_strip_en);\n+int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len);\n+int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len);\n+void enic_get_res_counts(struct enic *enic);\n+void enic_init_vnic_resources(struct enic *enic);\n+int enic_alloc_vnic_resources(struct enic *);\n+void enic_free_vnic_resources(struct enic *);\n+\n+#endif /* _ENIC_RES_H_ */\ndiff --git a/drivers/net/enic/rte_pmd_enic_version.map b/drivers/net/enic/rte_pmd_enic_version.map\nnew file mode 100644\nindex 0000000..ef35398\n--- /dev/null\n+++ b/drivers/net/enic/rte_pmd_enic_version.map\n@@ -0,0 +1,4 @@\n+DPDK_2.0 {\n+\n+\tlocal: *;\n+};\ndiff --git a/drivers/net/enic/vnic/cq_desc.h b/drivers/net/enic/vnic/cq_desc.h\nnew file mode 100644\nindex 0000000..c418967\n--- /dev/null\n+++ b/drivers/net/enic/vnic/cq_desc.h\n@@ -0,0 +1,126 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: cq_desc.h 129574 2013-04-26 22:11:14Z rfaucett $\"\n+\n+#ifndef _CQ_DESC_H_\n+#define _CQ_DESC_H_\n+\n+/*\n+ * Completion queue descriptor types\n+ */\n+enum cq_desc_types {\n+\tCQ_DESC_TYPE_WQ_ENET = 0,\n+\tCQ_DESC_TYPE_DESC_COPY = 1,\n+\tCQ_DESC_TYPE_WQ_EXCH = 2,\n+\tCQ_DESC_TYPE_RQ_ENET = 3,\n+\tCQ_DESC_TYPE_RQ_FCP = 4,\n+\tCQ_DESC_TYPE_IOMMU_MISS = 5,\n+\tCQ_DESC_TYPE_SGL = 6,\n+\tCQ_DESC_TYPE_CLASSIFIER = 7,\n+\tCQ_DESC_TYPE_TEST = 127,\n+};\n+\n+/* Completion queue descriptor: 16B\n+ *\n+ * All completion queues have this basic layout.  The\n+ * type_specfic area is unique for each completion\n+ * queue type.\n+ */\n+struct cq_desc {\n+\t__le16 completed_index;\n+\t__le16 q_number;\n+\tu8 type_specfic[11];\n+\tu8 type_color;\n+};\n+\n+#define CQ_DESC_TYPE_BITS        4\n+#define CQ_DESC_TYPE_MASK        ((1 << CQ_DESC_TYPE_BITS) - 1)\n+#define CQ_DESC_COLOR_MASK       1\n+#define CQ_DESC_COLOR_SHIFT      7\n+#define CQ_DESC_Q_NUM_BITS       10\n+#define CQ_DESC_Q_NUM_MASK       ((1 << CQ_DESC_Q_NUM_BITS) - 1)\n+#define CQ_DESC_COMP_NDX_BITS    12\n+#define CQ_DESC_COMP_NDX_MASK    ((1 << CQ_DESC_COMP_NDX_BITS) - 1)\n+\n+static inline void cq_color_enc(struct cq_desc *desc, const u8 color)\n+{\n+\tif (color)\n+\t\tdesc->type_color |=  (1 << CQ_DESC_COLOR_SHIFT);\n+\telse\n+\t\tdesc->type_color &= ~(1 << CQ_DESC_COLOR_SHIFT);\n+}\n+\n+static inline void cq_desc_enc(struct cq_desc *desc,\n+\tconst u8 type, const u8 color, const u16 q_number,\n+\tconst u16 completed_index)\n+{\n+\tdesc->type_color = (type & CQ_DESC_TYPE_MASK) |\n+\t\t((color & CQ_DESC_COLOR_MASK) << CQ_DESC_COLOR_SHIFT);\n+\tdesc->q_number = cpu_to_le16(q_number & CQ_DESC_Q_NUM_MASK);\n+\tdesc->completed_index = cpu_to_le16(completed_index &\n+\t\tCQ_DESC_COMP_NDX_MASK);\n+}\n+\n+static inline void cq_desc_dec(const struct cq_desc *desc_arg,\n+\tu8 *type, u8 *color, u16 *q_number, u16 *completed_index)\n+{\n+\tconst struct cq_desc *desc = desc_arg;\n+\tconst u8 type_color = desc->type_color;\n+\n+\t*color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;\n+\n+\t/*\n+\t * Make sure color bit is read from desc *before* other fields\n+\t * are read from desc.  Hardware guarantees color bit is last\n+\t * bit (byte) written.  Adding the rmb() prevents the compiler\n+\t * and/or CPU from reordering the reads which would potentially\n+\t * result in reading stale values.\n+\t */\n+\n+\trmb();\n+\n+\t*type = type_color & CQ_DESC_TYPE_MASK;\n+\t*q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;\n+\t*completed_index = le16_to_cpu(desc->completed_index) &\n+\t\tCQ_DESC_COMP_NDX_MASK;\n+}\n+\n+static inline void cq_color_dec(const struct cq_desc *desc_arg, u8 *color)\n+{\n+\tvolatile const struct cq_desc *desc = desc_arg;\n+\n+\t*color = (desc->type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;\n+}\n+\n+#endif /* _CQ_DESC_H_ */\ndiff --git a/drivers/net/enic/vnic/cq_enet_desc.h b/drivers/net/enic/vnic/cq_enet_desc.h\nnew file mode 100644\nindex 0000000..669a2b5\n--- /dev/null\n+++ b/drivers/net/enic/vnic/cq_enet_desc.h\n@@ -0,0 +1,261 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: cq_enet_desc.h 160468 2014-02-18 09:50:15Z gvaradar $\"\n+\n+#ifndef _CQ_ENET_DESC_H_\n+#define _CQ_ENET_DESC_H_\n+\n+#include \"cq_desc.h\"\n+\n+/* Ethernet completion queue descriptor: 16B */\n+struct cq_enet_wq_desc {\n+\t__le16 completed_index;\n+\t__le16 q_number;\n+\tu8 reserved[11];\n+\tu8 type_color;\n+};\n+\n+static inline void cq_enet_wq_desc_enc(struct cq_enet_wq_desc *desc,\n+\tu8 type, u8 color, u16 q_number, u16 completed_index)\n+{\n+\tcq_desc_enc((struct cq_desc *)desc, type,\n+\t\tcolor, q_number, completed_index);\n+}\n+\n+static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc,\n+\tu8 *type, u8 *color, u16 *q_number, u16 *completed_index)\n+{\n+\tcq_desc_dec((struct cq_desc *)desc, type,\n+\t\tcolor, q_number, completed_index);\n+}\n+\n+/* Completion queue descriptor: Ethernet receive queue, 16B */\n+struct cq_enet_rq_desc {\n+\t__le16 completed_index_flags;\n+\t__le16 q_number_rss_type_flags;\n+\t__le32 rss_hash;\n+\t__le16 bytes_written_flags;\n+\t__le16 vlan;\n+\t__le16 checksum_fcoe;\n+\tu8 flags;\n+\tu8 type_color;\n+};\n+\n+#define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT          (0x1 << 12)\n+#define CQ_ENET_RQ_DESC_FLAGS_FCOE                  (0x1 << 13)\n+#define CQ_ENET_RQ_DESC_FLAGS_EOP                   (0x1 << 14)\n+#define CQ_ENET_RQ_DESC_FLAGS_SOP                   (0x1 << 15)\n+\n+#define CQ_ENET_RQ_DESC_RSS_TYPE_BITS               4\n+#define CQ_ENET_RQ_DESC_RSS_TYPE_MASK \\\n+\t((1 << CQ_ENET_RQ_DESC_RSS_TYPE_BITS) - 1)\n+#define CQ_ENET_RQ_DESC_RSS_TYPE_NONE               0\n+#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv4               1\n+#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4           2\n+#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6               3\n+#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6           4\n+#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX            5\n+#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX        6\n+\n+#define CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC         (0x1 << 14)\n+\n+#define CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS          14\n+#define CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK \\\n+\t((1 << CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS) - 1)\n+#define CQ_ENET_RQ_DESC_FLAGS_TRUNCATED             (0x1 << 14)\n+#define CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED         (0x1 << 15)\n+\n+#define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS          12\n+#define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK \\\n+\t((1 << CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS) - 1)\n+#define CQ_ENET_RQ_DESC_VLAN_TCI_CFI_MASK           (0x1 << 12)\n+#define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS     3\n+#define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_MASK \\\n+\t((1 << CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS) - 1)\n+#define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_SHIFT    13\n+\n+#define CQ_ENET_RQ_DESC_FCOE_SOF_BITS               8\n+#define CQ_ENET_RQ_DESC_FCOE_SOF_MASK \\\n+\t((1 << CQ_ENET_RQ_DESC_FCOE_SOF_BITS) - 1)\n+#define CQ_ENET_RQ_DESC_FCOE_EOF_BITS               8\n+#define CQ_ENET_RQ_DESC_FCOE_EOF_MASK \\\n+\t((1 << CQ_ENET_RQ_DESC_FCOE_EOF_BITS) - 1)\n+#define CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT              8\n+\n+#define CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK       (0x1 << 0)\n+#define CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK              (0x1 << 0)\n+#define CQ_ENET_RQ_DESC_FLAGS_UDP                   (0x1 << 1)\n+#define CQ_ENET_RQ_DESC_FCOE_ENC_ERROR              (0x1 << 1)\n+#define CQ_ENET_RQ_DESC_FLAGS_TCP                   (0x1 << 2)\n+#define CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK          (0x1 << 3)\n+#define CQ_ENET_RQ_DESC_FLAGS_IPV6                  (0x1 << 4)\n+#define CQ_ENET_RQ_DESC_FLAGS_IPV4                  (0x1 << 5)\n+#define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT         (0x1 << 6)\n+#define CQ_ENET_RQ_DESC_FLAGS_FCS_OK                (0x1 << 7)\n+\n+static inline void cq_enet_rq_desc_enc(struct cq_enet_rq_desc *desc,\n+\tu8 type, u8 color, u16 q_number, u16 completed_index,\n+\tu8 ingress_port, u8 fcoe, u8 eop, u8 sop, u8 rss_type, u8 csum_not_calc,\n+\tu32 rss_hash, u16 bytes_written, u8 packet_error, u8 vlan_stripped,\n+\tu16 vlan, u16 checksum, u8 fcoe_sof, u8 fcoe_fc_crc_ok,\n+\tu8 fcoe_enc_error, u8 fcoe_eof, u8 tcp_udp_csum_ok, u8 udp, u8 tcp,\n+\tu8 ipv4_csum_ok, u8 ipv6, u8 ipv4, u8 ipv4_fragment, u8 fcs_ok)\n+{\n+\tcq_desc_enc((struct cq_desc *)desc, type,\n+\t\tcolor, q_number, completed_index);\n+\n+\tdesc->completed_index_flags |= cpu_to_le16(\n+\t\t(ingress_port ? CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT : 0) |\n+\t\t(fcoe ? CQ_ENET_RQ_DESC_FLAGS_FCOE : 0) |\n+\t\t(eop ? CQ_ENET_RQ_DESC_FLAGS_EOP : 0) |\n+\t\t(sop ? CQ_ENET_RQ_DESC_FLAGS_SOP : 0));\n+\n+\tdesc->q_number_rss_type_flags |= cpu_to_le16(\n+\t\t((rss_type & CQ_ENET_RQ_DESC_RSS_TYPE_MASK) <<\n+\t\tCQ_DESC_Q_NUM_BITS) |\n+\t\t(csum_not_calc ? CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC : 0));\n+\n+\tdesc->rss_hash = cpu_to_le32(rss_hash);\n+\n+\tdesc->bytes_written_flags = cpu_to_le16(\n+\t\t(bytes_written & CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK) |\n+\t\t(packet_error ? CQ_ENET_RQ_DESC_FLAGS_TRUNCATED : 0) |\n+\t\t(vlan_stripped ? CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED : 0));\n+\n+\tdesc->vlan = cpu_to_le16(vlan);\n+\n+\tif (fcoe) {\n+\t\tdesc->checksum_fcoe = cpu_to_le16(\n+\t\t\t(fcoe_sof & CQ_ENET_RQ_DESC_FCOE_SOF_MASK) |\n+\t\t\t((fcoe_eof & CQ_ENET_RQ_DESC_FCOE_EOF_MASK) <<\n+\t\t\t\tCQ_ENET_RQ_DESC_FCOE_EOF_SHIFT));\n+\t} else {\n+\t\tdesc->checksum_fcoe = cpu_to_le16(checksum);\n+\t}\n+\n+\tdesc->flags =\n+\t\t(tcp_udp_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK : 0) |\n+\t\t(udp ? CQ_ENET_RQ_DESC_FLAGS_UDP : 0) |\n+\t\t(tcp ? CQ_ENET_RQ_DESC_FLAGS_TCP : 0) |\n+\t\t(ipv4_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK : 0) |\n+\t\t(ipv6 ? CQ_ENET_RQ_DESC_FLAGS_IPV6 : 0) |\n+\t\t(ipv4 ? CQ_ENET_RQ_DESC_FLAGS_IPV4 : 0) |\n+\t\t(ipv4_fragment ? CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT : 0) |\n+\t\t(fcs_ok ? CQ_ENET_RQ_DESC_FLAGS_FCS_OK : 0) |\n+\t\t(fcoe_fc_crc_ok ? CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK : 0) |\n+\t\t(fcoe_enc_error ? CQ_ENET_RQ_DESC_FCOE_ENC_ERROR : 0);\n+}\n+\n+static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,\n+\tu8 *type, u8 *color, u16 *q_number, u16 *completed_index,\n+\tu8 *ingress_port, u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type,\n+\tu8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error,\n+\tu8 *vlan_stripped, u16 *vlan_tci, u16 *checksum, u8 *fcoe_sof,\n+\tu8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error, u8 *fcoe_eof,\n+\tu8 *tcp_udp_csum_ok, u8 *udp, u8 *tcp, u8 *ipv4_csum_ok,\n+\tu8 *ipv6, u8 *ipv4, u8 *ipv4_fragment, u8 *fcs_ok)\n+{\n+\tu16 completed_index_flags;\n+\tu16 q_number_rss_type_flags;\n+\tu16 bytes_written_flags;\n+\n+\tcq_desc_dec((struct cq_desc *)desc, type,\n+\t\tcolor, q_number, completed_index);\n+\n+\tcompleted_index_flags = le16_to_cpu(desc->completed_index_flags);\n+\tq_number_rss_type_flags =\n+\t\tle16_to_cpu(desc->q_number_rss_type_flags);\n+\tbytes_written_flags = le16_to_cpu(desc->bytes_written_flags);\n+\n+\t*ingress_port = (completed_index_flags &\n+\t\tCQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;\n+\t*fcoe = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ?\n+\t\t1 : 0;\n+\t*eop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ?\n+\t\t1 : 0;\n+\t*sop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ?\n+\t\t1 : 0;\n+\n+\t*rss_type = (u8)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) &\n+\t\tCQ_ENET_RQ_DESC_RSS_TYPE_MASK);\n+\t*csum_not_calc = (q_number_rss_type_flags &\n+\t\tCQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;\n+\n+\t*rss_hash = le32_to_cpu(desc->rss_hash);\n+\n+\t*bytes_written = bytes_written_flags &\n+\t\tCQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;\n+\t*packet_error = (bytes_written_flags &\n+\t\tCQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;\n+\t*vlan_stripped = (bytes_written_flags &\n+\t\tCQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;\n+\n+\t/*\n+\t * Tag Control Information(16) = user_priority(3) + cfi(1) + vlan(12)\n+\t */\n+\t*vlan_tci = le16_to_cpu(desc->vlan);\n+\n+\tif (*fcoe) {\n+\t\t*fcoe_sof = (u8)(le16_to_cpu(desc->checksum_fcoe) &\n+\t\t\tCQ_ENET_RQ_DESC_FCOE_SOF_MASK);\n+\t\t*fcoe_fc_crc_ok = (desc->flags &\n+\t\t\tCQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;\n+\t\t*fcoe_enc_error = (desc->flags &\n+\t\t\tCQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;\n+\t\t*fcoe_eof = (u8)((le16_to_cpu(desc->checksum_fcoe) >>\n+\t\t\tCQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &\n+\t\t\tCQ_ENET_RQ_DESC_FCOE_EOF_MASK);\n+\t\t*checksum = 0;\n+\t} else {\n+\t\t*fcoe_sof = 0;\n+\t\t*fcoe_fc_crc_ok = 0;\n+\t\t*fcoe_enc_error = 0;\n+\t\t*fcoe_eof = 0;\n+\t\t*checksum = le16_to_cpu(desc->checksum_fcoe);\n+\t}\n+\n+\t*tcp_udp_csum_ok =\n+\t\t(desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;\n+\t*udp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;\n+\t*tcp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;\n+\t*ipv4_csum_ok =\n+\t\t(desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;\n+\t*ipv6 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;\n+\t*ipv4 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;\n+\t*ipv4_fragment =\n+\t\t(desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;\n+\t*fcs_ok = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;\n+}\n+\n+#endif /* _CQ_ENET_DESC_H_ */\ndiff --git a/drivers/net/enic/vnic/rq_enet_desc.h b/drivers/net/enic/vnic/rq_enet_desc.h\nnew file mode 100644\nindex 0000000..f38ff2a\n--- /dev/null\n+++ b/drivers/net/enic/vnic/rq_enet_desc.h\n@@ -0,0 +1,76 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: rq_enet_desc.h 59839 2010-09-27 20:36:31Z roprabhu $\"\n+\n+#ifndef _RQ_ENET_DESC_H_\n+#define _RQ_ENET_DESC_H_\n+\n+/* Ethernet receive queue descriptor: 16B */\n+struct rq_enet_desc {\n+\t__le64 address;\n+\t__le16 length_type;\n+\tu8 reserved[6];\n+};\n+\n+enum rq_enet_type_types {\n+\tRQ_ENET_TYPE_ONLY_SOP = 0,\n+\tRQ_ENET_TYPE_NOT_SOP = 1,\n+\tRQ_ENET_TYPE_RESV2 = 2,\n+\tRQ_ENET_TYPE_RESV3 = 3,\n+};\n+\n+#define RQ_ENET_ADDR_BITS\t\t64\n+#define RQ_ENET_LEN_BITS\t\t14\n+#define RQ_ENET_LEN_MASK\t\t((1 << RQ_ENET_LEN_BITS) - 1)\n+#define RQ_ENET_TYPE_BITS\t\t2\n+#define RQ_ENET_TYPE_MASK\t\t((1 << RQ_ENET_TYPE_BITS) - 1)\n+\n+static inline void rq_enet_desc_enc(struct rq_enet_desc *desc,\n+\tu64 address, u8 type, u16 length)\n+{\n+\tdesc->address = cpu_to_le64(address);\n+\tdesc->length_type = cpu_to_le16((length & RQ_ENET_LEN_MASK) |\n+\t\t((type & RQ_ENET_TYPE_MASK) << RQ_ENET_LEN_BITS));\n+}\n+\n+static inline void rq_enet_desc_dec(struct rq_enet_desc *desc,\n+\tu64 *address, u8 *type, u16 *length)\n+{\n+\t*address = le64_to_cpu(desc->address);\n+\t*length = le16_to_cpu(desc->length_type) & RQ_ENET_LEN_MASK;\n+\t*type = (u8)((le16_to_cpu(desc->length_type) >> RQ_ENET_LEN_BITS) &\n+\t\tRQ_ENET_TYPE_MASK);\n+}\n+\n+#endif /* _RQ_ENET_DESC_H_ */\ndiff --git a/drivers/net/enic/vnic/vnic_cq.c b/drivers/net/enic/vnic/vnic_cq.c\nnew file mode 100644\nindex 0000000..cda97e4\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_cq.c\n@@ -0,0 +1,117 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_cq.c 171146 2014-05-02 07:08:20Z ssujith $\"\n+\n+#include \"vnic_dev.h\"\n+#include \"vnic_cq.h\"\n+\n+int vnic_cq_mem_size(struct vnic_cq *cq, unsigned int desc_count,\n+\tunsigned int desc_size)\n+{\n+\tint mem_size;\n+\n+\tmem_size = vnic_dev_desc_ring_size(&cq->ring, desc_count, desc_size);\n+\n+\treturn mem_size;\n+}\n+\n+void vnic_cq_free(struct vnic_cq *cq)\n+{\n+\tvnic_dev_free_desc_ring(cq->vdev, &cq->ring);\n+\n+\tcq->ctrl = NULL;\n+}\n+\n+int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,\n+\tunsigned int socket_id,\n+\tunsigned int desc_count, unsigned int desc_size)\n+{\n+\tint err;\n+\tchar res_name[NAME_MAX];\n+\tstatic int instance;\n+\n+\tcq->index = index;\n+\tcq->vdev = vdev;\n+\n+\tcq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_CQ, index);\n+\tif (!cq->ctrl) {\n+\t\tpr_err(\"Failed to hook CQ[%d] resource\\n\", index);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tsnprintf(res_name, sizeof(res_name), \"%d-cq-%d\", instance++, index);\n+\terr = vnic_dev_alloc_desc_ring(vdev, &cq->ring, desc_count, desc_size,\n+\t\tsocket_id, res_name);\n+\tif (err)\n+\t\treturn err;\n+\n+\treturn 0;\n+}\n+\n+void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,\n+\tunsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,\n+\tunsigned int cq_tail_color, unsigned int interrupt_enable,\n+\tunsigned int cq_entry_enable, unsigned int cq_message_enable,\n+\tunsigned int interrupt_offset, u64 cq_message_addr)\n+{\n+\tu64 paddr;\n+\n+\tpaddr = (u64)cq->ring.base_addr | VNIC_PADDR_TARGET;\n+\twriteq(paddr, &cq->ctrl->ring_base);\n+\tiowrite32(cq->ring.desc_count, &cq->ctrl->ring_size);\n+\tiowrite32(flow_control_enable, &cq->ctrl->flow_control_enable);\n+\tiowrite32(color_enable, &cq->ctrl->color_enable);\n+\tiowrite32(cq_head, &cq->ctrl->cq_head);\n+\tiowrite32(cq_tail, &cq->ctrl->cq_tail);\n+\tiowrite32(cq_tail_color, &cq->ctrl->cq_tail_color);\n+\tiowrite32(interrupt_enable, &cq->ctrl->interrupt_enable);\n+\tiowrite32(cq_entry_enable, &cq->ctrl->cq_entry_enable);\n+\tiowrite32(cq_message_enable, &cq->ctrl->cq_message_enable);\n+\tiowrite32(interrupt_offset, &cq->ctrl->interrupt_offset);\n+\twriteq(cq_message_addr, &cq->ctrl->cq_message_addr);\n+\n+\tcq->interrupt_offset = interrupt_offset;\n+}\n+\n+void vnic_cq_clean(struct vnic_cq *cq)\n+{\n+\tcq->to_clean = 0;\n+\tcq->last_color = 0;\n+\n+\tiowrite32(0, &cq->ctrl->cq_head);\n+\tiowrite32(0, &cq->ctrl->cq_tail);\n+\tiowrite32(1, &cq->ctrl->cq_tail_color);\n+\n+\tvnic_dev_clear_desc_ring(&cq->ring);\n+}\ndiff --git a/drivers/net/enic/vnic/vnic_cq.h b/drivers/net/enic/vnic/vnic_cq.h\nnew file mode 100644\nindex 0000000..0928d72\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_cq.h\n@@ -0,0 +1,151 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_cq.h 173398 2014-05-19 09:17:02Z gvaradar $\"\n+\n+#ifndef _VNIC_CQ_H_\n+#define _VNIC_CQ_H_\n+\n+#include <rte_mbuf.h>\n+\n+#include \"cq_desc.h\"\n+#include \"vnic_dev.h\"\n+\n+/* Completion queue control */\n+struct vnic_cq_ctrl {\n+\tu64 ring_base;\t\t\t/* 0x00 */\n+\tu32 ring_size;\t\t\t/* 0x08 */\n+\tu32 pad0;\n+\tu32 flow_control_enable;\t/* 0x10 */\n+\tu32 pad1;\n+\tu32 color_enable;\t\t/* 0x18 */\n+\tu32 pad2;\n+\tu32 cq_head;\t\t\t/* 0x20 */\n+\tu32 pad3;\n+\tu32 cq_tail;\t\t\t/* 0x28 */\n+\tu32 pad4;\n+\tu32 cq_tail_color;\t\t/* 0x30 */\n+\tu32 pad5;\n+\tu32 interrupt_enable;\t\t/* 0x38 */\n+\tu32 pad6;\n+\tu32 cq_entry_enable;\t\t/* 0x40 */\n+\tu32 pad7;\n+\tu32 cq_message_enable;\t\t/* 0x48 */\n+\tu32 pad8;\n+\tu32 interrupt_offset;\t\t/* 0x50 */\n+\tu32 pad9;\n+\tu64 cq_message_addr;\t\t/* 0x58 */\n+\tu32 pad10;\n+};\n+\n+#ifdef ENIC_AIC\n+struct vnic_rx_bytes_counter {\n+\tunsigned int small_pkt_bytes_cnt;\n+\tunsigned int large_pkt_bytes_cnt;\n+};\n+#endif\n+\n+struct vnic_cq {\n+\tunsigned int index;\n+\tstruct vnic_dev *vdev;\n+\tstruct vnic_cq_ctrl __iomem *ctrl;              /* memory-mapped */\n+\tstruct vnic_dev_ring ring;\n+\tunsigned int to_clean;\n+\tunsigned int last_color;\n+\tunsigned int interrupt_offset;\n+#ifdef ENIC_AIC\n+\tstruct vnic_rx_bytes_counter pkt_size_counter;\n+\tunsigned int cur_rx_coal_timeval;\n+\tunsigned int tobe_rx_coal_timeval;\n+\tktime_t prev_ts;\n+#endif\n+};\n+\n+static inline unsigned int vnic_cq_service(struct vnic_cq *cq,\n+\tunsigned int work_to_do,\n+\tint (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc,\n+\tu8 type, u16 q_number, u16 completed_index, void *opaque),\n+\tvoid *opaque)\n+{\n+\tstruct cq_desc *cq_desc;\n+\tunsigned int work_done = 0;\n+\tu16 q_number, completed_index;\n+\tu8 type, color;\n+\tstruct rte_mbuf **rx_pkts = opaque;\n+\tunsigned int ret;\n+\n+\tcq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +\n+\t\tcq->ring.desc_size * cq->to_clean);\n+\tcq_desc_dec(cq_desc, &type, &color,\n+\t\t&q_number, &completed_index);\n+\n+\twhile (color != cq->last_color) {\n+\t\tif (opaque)\n+\t\t\topaque = (void *)&(rx_pkts[work_done]);\n+\n+\t\tret = (*q_service)(cq->vdev, cq_desc, type,\n+\t\t\tq_number, completed_index, opaque);\n+\t\tcq->to_clean++;\n+\t\tif (cq->to_clean == cq->ring.desc_count) {\n+\t\t\tcq->to_clean = 0;\n+\t\t\tcq->last_color = cq->last_color ? 0 : 1;\n+\t\t}\n+\n+\t\tcq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +\n+\t\t\tcq->ring.desc_size * cq->to_clean);\n+\t\tcq_desc_dec(cq_desc, &type, &color,\n+\t\t\t&q_number, &completed_index);\n+\n+\t\tif (ret)\n+\t\t\twork_done++;\n+\t\tif (work_done >= work_to_do)\n+\t\t\tbreak;\n+\t}\n+\n+\treturn work_done;\n+}\n+\n+void vnic_cq_free(struct vnic_cq *cq);\n+int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,\n+\tunsigned int socket_id,\n+\tunsigned int desc_count, unsigned int desc_size);\n+void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,\n+\tunsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,\n+\tunsigned int cq_tail_color, unsigned int interrupt_enable,\n+\tunsigned int cq_entry_enable, unsigned int message_enable,\n+\tunsigned int interrupt_offset, u64 message_addr);\n+void vnic_cq_clean(struct vnic_cq *cq);\n+int vnic_cq_mem_size(struct vnic_cq *cq, unsigned int desc_count,\n+\tunsigned int desc_size);\n+\n+#endif /* _VNIC_CQ_H_ */\ndiff --git a/drivers/net/enic/vnic/vnic_dev.c b/drivers/net/enic/vnic/vnic_dev.c\nnew file mode 100644\nindex 0000000..f566734\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_dev.c\n@@ -0,0 +1,1054 @@\n+/*\n+ * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id$\"\n+\n+#include <rte_memzone.h>\n+#include <rte_memcpy.h>\n+#include <rte_string_fns.h>\n+\n+#include \"vnic_dev.h\"\n+#include \"vnic_resource.h\"\n+#include \"vnic_devcmd.h\"\n+#include \"vnic_stats.h\"\n+\n+\n+enum vnic_proxy_type {\n+\tPROXY_NONE,\n+\tPROXY_BY_BDF,\n+\tPROXY_BY_INDEX,\n+};\n+\n+struct vnic_res {\n+\tvoid __iomem *vaddr;\n+\tdma_addr_t bus_addr;\n+\tunsigned int count;\n+};\n+\n+struct vnic_intr_coal_timer_info {\n+\tu32 mul;\n+\tu32 div;\n+\tu32 max_usec;\n+};\n+\n+struct vnic_dev {\n+\tvoid *priv;\n+\tstruct rte_pci_device *pdev;\n+\tstruct vnic_res res[RES_TYPE_MAX];\n+\tenum vnic_dev_intr_mode intr_mode;\n+\tstruct vnic_devcmd __iomem *devcmd;\n+\tstruct vnic_devcmd_notify *notify;\n+\tstruct vnic_devcmd_notify notify_copy;\n+\tdma_addr_t notify_pa;\n+\tu32 notify_sz;\n+\tdma_addr_t linkstatus_pa;\n+\tstruct vnic_stats *stats;\n+\tdma_addr_t stats_pa;\n+\tstruct vnic_devcmd_fw_info *fw_info;\n+\tdma_addr_t fw_info_pa;\n+\tenum vnic_proxy_type proxy;\n+\tu32 proxy_index;\n+\tu64 args[VNIC_DEVCMD_NARGS];\n+\tu16 split_hdr_size;\n+\tint in_reset;\n+\tstruct vnic_intr_coal_timer_info intr_coal_timer_info;\n+\tvoid *(*alloc_consistent)(void *priv, size_t size,\n+\t\tdma_addr_t *dma_handle, u8 *name);\n+\tvoid (*free_consistent)(struct rte_pci_device *hwdev,\n+\t\tsize_t size, void *vaddr,\n+\t\tdma_addr_t dma_handle);\n+};\n+\n+#define VNIC_MAX_RES_HDR_SIZE \\\n+\t(sizeof(struct vnic_resource_header) + \\\n+\tsizeof(struct vnic_resource) * RES_TYPE_MAX)\n+#define VNIC_RES_STRIDE\t128\n+\n+void *vnic_dev_priv(struct vnic_dev *vdev)\n+{\n+\treturn vdev->priv;\n+}\n+\n+void vnic_register_cbacks(struct vnic_dev *vdev,\n+\tvoid *(*alloc_consistent)(void *priv, size_t size,\n+\t    dma_addr_t *dma_handle, u8 *name),\n+\tvoid (*free_consistent)(struct rte_pci_device *hwdev,\n+\t    size_t size, void *vaddr,\n+\t    dma_addr_t dma_handle))\n+{\n+\tvdev->alloc_consistent = alloc_consistent;\n+\tvdev->free_consistent = free_consistent;\n+}\n+\n+static int vnic_dev_discover_res(struct vnic_dev *vdev,\n+\tstruct vnic_dev_bar *bar, unsigned int num_bars)\n+{\n+\tstruct vnic_resource_header __iomem *rh;\n+\tstruct mgmt_barmap_hdr __iomem *mrh;\n+\tstruct vnic_resource __iomem *r;\n+\tu8 type;\n+\n+\tif (num_bars == 0)\n+\t\treturn -EINVAL;\n+\n+\tif (bar->len < VNIC_MAX_RES_HDR_SIZE) {\n+\t\tpr_err(\"vNIC BAR0 res hdr length error\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\trh  = bar->vaddr;\n+\tmrh = bar->vaddr;\n+\tif (!rh) {\n+\t\tpr_err(\"vNIC BAR0 res hdr not mem-mapped\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\t/* Check for mgmt vnic in addition to normal vnic */\n+\tif ((ioread32(&rh->magic) != VNIC_RES_MAGIC) ||\n+\t\t(ioread32(&rh->version) != VNIC_RES_VERSION)) {\n+\t\tif ((ioread32(&mrh->magic) != MGMTVNIC_MAGIC) ||\n+\t\t\t(ioread32(&mrh->version) != MGMTVNIC_VERSION)) {\n+\t\t\tpr_err(\"vNIC BAR0 res magic/version error \" \\\n+\t\t\t\t\"exp (%lx/%lx) or (%lx/%lx), curr (%x/%x)\\n\",\n+\t\t\t\tVNIC_RES_MAGIC, VNIC_RES_VERSION,\n+\t\t\t\tMGMTVNIC_MAGIC, MGMTVNIC_VERSION,\n+\t\t\t\tioread32(&rh->magic), ioread32(&rh->version));\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n+\tif (ioread32(&mrh->magic) == MGMTVNIC_MAGIC)\n+\t\tr = (struct vnic_resource __iomem *)(mrh + 1);\n+\telse\n+\t\tr = (struct vnic_resource __iomem *)(rh + 1);\n+\n+\n+\twhile ((type = ioread8(&r->type)) != RES_TYPE_EOL) {\n+\t\tu8 bar_num = ioread8(&r->bar);\n+\t\tu32 bar_offset = ioread32(&r->bar_offset);\n+\t\tu32 count = ioread32(&r->count);\n+\t\tu32 len;\n+\n+\t\tr++;\n+\n+\t\tif (bar_num >= num_bars)\n+\t\t\tcontinue;\n+\n+\t\tif (!bar[bar_num].len || !bar[bar_num].vaddr)\n+\t\t\tcontinue;\n+\n+\t\tswitch (type) {\n+\t\tcase RES_TYPE_WQ:\n+\t\tcase RES_TYPE_RQ:\n+\t\tcase RES_TYPE_CQ:\n+\t\tcase RES_TYPE_INTR_CTRL:\n+\t\t\t/* each count is stride bytes long */\n+\t\t\tlen = count * VNIC_RES_STRIDE;\n+\t\t\tif (len + bar_offset > bar[bar_num].len) {\n+\t\t\t\tpr_err(\"vNIC BAR0 resource %d \" \\\n+\t\t\t\t\t\"out-of-bounds, offset 0x%x + \" \\\n+\t\t\t\t\t\"size 0x%x > bar len 0x%lx\\n\",\n+\t\t\t\t\ttype, bar_offset,\n+\t\t\t\t\tlen,\n+\t\t\t\t\tbar[bar_num].len);\n+\t\t\t\treturn -EINVAL;\n+\t\t\t}\n+\t\t\tbreak;\n+\t\tcase RES_TYPE_INTR_PBA_LEGACY:\n+\t\tcase RES_TYPE_DEVCMD:\n+\t\t\tlen = count;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tcontinue;\n+\t\t}\n+\n+\t\tvdev->res[type].count = count;\n+\t\tvdev->res[type].vaddr = (char __iomem *)bar[bar_num].vaddr +\n+\t\t    bar_offset;\n+\t\tvdev->res[type].bus_addr = bar[bar_num].bus_addr + bar_offset;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,\n+\tenum vnic_res_type type)\n+{\n+\treturn vdev->res[type].count;\n+}\n+\n+void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,\n+\tunsigned int index)\n+{\n+\tif (!vdev->res[type].vaddr)\n+\t\treturn NULL;\n+\n+\tswitch (type) {\n+\tcase RES_TYPE_WQ:\n+\tcase RES_TYPE_RQ:\n+\tcase RES_TYPE_CQ:\n+\tcase RES_TYPE_INTR_CTRL:\n+\t\treturn (char __iomem *)vdev->res[type].vaddr +\n+\t\t\tindex * VNIC_RES_STRIDE;\n+\tdefault:\n+\t\treturn (char __iomem *)vdev->res[type].vaddr;\n+\t}\n+}\n+\n+unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,\n+\tunsigned int desc_count, unsigned int desc_size)\n+{\n+\t/* The base address of the desc rings must be 512 byte aligned.\n+\t * Descriptor count is aligned to groups of 32 descriptors.  A\n+\t * count of 0 means the maximum 4096 descriptors.  Descriptor\n+\t * size is aligned to 16 bytes.\n+\t */\n+\n+\tunsigned int count_align = 32;\n+\tunsigned int desc_align = 16;\n+\n+\tring->base_align = 512;\n+\n+\tif (desc_count == 0)\n+\t\tdesc_count = 4096;\n+\n+\tring->desc_count = VNIC_ALIGN(desc_count, count_align);\n+\n+\tring->desc_size = VNIC_ALIGN(desc_size, desc_align);\n+\n+\tring->size = ring->desc_count * ring->desc_size;\n+\tring->size_unaligned = ring->size + ring->base_align;\n+\n+\treturn ring->size_unaligned;\n+}\n+\n+void vnic_set_hdr_split_size(struct vnic_dev *vdev, u16 size)\n+{\n+\tvdev->split_hdr_size = size;\n+}\n+\n+u16 vnic_get_hdr_split_size(struct vnic_dev *vdev)\n+{\n+\treturn vdev->split_hdr_size;\n+}\n+\n+void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)\n+{\n+\tmemset(ring->descs, 0, ring->size);\n+}\n+\n+int vnic_dev_alloc_desc_ring(__attribute__((unused)) struct vnic_dev *vdev,\n+\tstruct vnic_dev_ring *ring,\n+\tunsigned int desc_count, unsigned int desc_size, unsigned int socket_id,\n+\tchar *z_name)\n+{\n+\tconst struct rte_memzone *rz;\n+\n+\tvnic_dev_desc_ring_size(ring, desc_count, desc_size);\n+\n+\trz = rte_memzone_reserve_aligned(z_name,\n+\t\tring->size_unaligned, socket_id,\n+\t\t0, ENIC_ALIGN);\n+\tif (!rz) {\n+\t\tpr_err(\"Failed to allocate ring (size=%d), aborting\\n\",\n+\t\t\t(int)ring->size);\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tring->descs_unaligned = rz->addr;\n+\tif (!ring->descs_unaligned) {\n+\t\tpr_err(\"Failed to map allocated ring (size=%d), aborting\\n\",\n+\t\t\t(int)ring->size);\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tring->base_addr_unaligned = (dma_addr_t)rz->phys_addr;\n+\n+\tring->base_addr = VNIC_ALIGN(ring->base_addr_unaligned,\n+\t\tring->base_align);\n+\tring->descs = (u8 *)ring->descs_unaligned +\n+\t    (ring->base_addr - ring->base_addr_unaligned);\n+\n+\tvnic_dev_clear_desc_ring(ring);\n+\n+\tring->desc_avail = ring->desc_count - 1;\n+\n+\treturn 0;\n+}\n+\n+void vnic_dev_free_desc_ring(__attribute__((unused))  struct vnic_dev *vdev,\n+\tstruct vnic_dev_ring *ring)\n+{\n+\tif (ring->descs)\n+\t\tring->descs = NULL;\n+}\n+\n+static int _vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,\n+\tint wait)\n+{\n+\tstruct vnic_devcmd __iomem *devcmd = vdev->devcmd;\n+\tunsigned int i;\n+\tint delay;\n+\tu32 status;\n+\tint err;\n+\n+\tstatus = ioread32(&devcmd->status);\n+\tif (status == 0xFFFFFFFF) {\n+\t\t/* PCI-e target device is gone */\n+\t\treturn -ENODEV;\n+\t}\n+\tif (status & STAT_BUSY) {\n+\n+\t\tpr_err(\"Busy devcmd %d\\n\",  _CMD_N(cmd));\n+\t\treturn -EBUSY;\n+\t}\n+\n+\tif (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {\n+\t\tfor (i = 0; i < VNIC_DEVCMD_NARGS; i++)\n+\t\t\twriteq(vdev->args[i], &devcmd->args[i]);\n+\t\twmb(); /* complete all writes initiated till now */\n+\t}\n+\n+\tiowrite32(cmd, &devcmd->cmd);\n+\n+\tif ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))\n+\t\treturn 0;\n+\n+\tfor (delay = 0; delay < wait; delay++) {\n+\n+\t\tudelay(100);\n+\n+\t\tstatus = ioread32(&devcmd->status);\n+\t\tif (status == 0xFFFFFFFF) {\n+\t\t\t/* PCI-e target device is gone */\n+\t\t\treturn -ENODEV;\n+\t\t}\n+\n+\t\tif (!(status & STAT_BUSY)) {\n+\t\t\tif (status & STAT_ERROR) {\n+\t\t\t\terr = -(int)readq(&devcmd->args[0]);\n+\t\t\t\tif (cmd != CMD_CAPABILITY)\n+\t\t\t\t\tpr_err(\"Devcmd %d failed \" \\\n+\t\t\t\t\t\t\"with error code %d\\n\",\n+\t\t\t\t\t\t_CMD_N(cmd), err);\n+\t\t\t\treturn err;\n+\t\t\t}\n+\n+\t\t\tif (_CMD_DIR(cmd) & _CMD_DIR_READ) {\n+\t\t\t\trmb();/* finish all reads initiated till now */\n+\t\t\t\tfor (i = 0; i < VNIC_DEVCMD_NARGS; i++)\n+\t\t\t\t\tvdev->args[i] = readq(&devcmd->args[i]);\n+\t\t\t}\n+\n+\t\t\treturn 0;\n+\t\t}\n+\t}\n+\n+\tpr_err(\"Timedout devcmd %d\\n\", _CMD_N(cmd));\n+\treturn -ETIMEDOUT;\n+}\n+\n+static int vnic_dev_cmd_proxy(struct vnic_dev *vdev,\n+\tenum vnic_devcmd_cmd proxy_cmd, enum vnic_devcmd_cmd cmd,\n+\tu64 *a0, u64 *a1, int wait)\n+{\n+\tu32 status;\n+\tint err;\n+\n+\tmemset(vdev->args, 0, sizeof(vdev->args));\n+\n+\tvdev->args[0] = vdev->proxy_index;\n+\tvdev->args[1] = cmd;\n+\tvdev->args[2] = *a0;\n+\tvdev->args[3] = *a1;\n+\n+\terr = _vnic_dev_cmd(vdev, proxy_cmd, wait);\n+\tif (err)\n+\t\treturn err;\n+\n+\tstatus = (u32)vdev->args[0];\n+\tif (status & STAT_ERROR) {\n+\t\terr = (int)vdev->args[1];\n+\t\tif (err != ERR_ECMDUNKNOWN ||\n+\t\t    cmd != CMD_CAPABILITY)\n+\t\t\tpr_err(\"Error %d proxy devcmd %d\\n\", err, _CMD_N(cmd));\n+\t\treturn err;\n+\t}\n+\n+\t*a0 = vdev->args[1];\n+\t*a1 = vdev->args[2];\n+\n+\treturn 0;\n+}\n+\n+static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,\n+\tenum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)\n+{\n+\tint err;\n+\n+\tvdev->args[0] = *a0;\n+\tvdev->args[1] = *a1;\n+\n+\terr = _vnic_dev_cmd(vdev, cmd, wait);\n+\n+\t*a0 = vdev->args[0];\n+\t*a1 = vdev->args[1];\n+\n+\treturn err;\n+}\n+\n+void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index)\n+{\n+\tvdev->proxy = PROXY_BY_INDEX;\n+\tvdev->proxy_index = index;\n+}\n+\n+void vnic_dev_cmd_proxy_by_bdf_start(struct vnic_dev *vdev, u16 bdf)\n+{\n+\tvdev->proxy = PROXY_BY_BDF;\n+\tvdev->proxy_index = bdf;\n+}\n+\n+void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev)\n+{\n+\tvdev->proxy = PROXY_NONE;\n+\tvdev->proxy_index = 0;\n+}\n+\n+int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,\n+\tu64 *a0, u64 *a1, int wait)\n+{\n+\tmemset(vdev->args, 0, sizeof(vdev->args));\n+\n+\tswitch (vdev->proxy) {\n+\tcase PROXY_BY_INDEX:\n+\t\treturn vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_INDEX, cmd,\n+\t\t\t\ta0, a1, wait);\n+\tcase PROXY_BY_BDF:\n+\t\treturn vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_BDF, cmd,\n+\t\t\t\ta0, a1, wait);\n+\tcase PROXY_NONE:\n+\tdefault:\n+\t\treturn vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);\n+\t}\n+}\n+\n+static int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd)\n+{\n+\tu64 a0 = (u32)cmd, a1 = 0;\n+\tint wait = 1000;\n+\tint err;\n+\n+\terr = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);\n+\n+\treturn !(err || a0);\n+}\n+\n+int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, size_t size,\n+\tvoid *value)\n+{\n+\tu64 a0, a1;\n+\tint wait = 1000;\n+\tint err;\n+\n+\ta0 = offset;\n+\ta1 = size;\n+\n+\terr = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);\n+\n+\tswitch (size) {\n+\tcase 1:\n+\t\t*(u8 *)value = (u8)a0;\n+\t\tbreak;\n+\tcase 2:\n+\t\t*(u16 *)value = (u16)a0;\n+\t\tbreak;\n+\tcase 4:\n+\t\t*(u32 *)value = (u32)a0;\n+\t\tbreak;\n+\tcase 8:\n+\t\t*(u64 *)value = a0;\n+\t\tbreak;\n+\tdefault:\n+\t\tBUG();\n+\t\tbreak;\n+\t}\n+\n+\treturn err;\n+}\n+\n+int vnic_dev_stats_clear(struct vnic_dev *vdev)\n+{\n+\tu64 a0 = 0, a1 = 0;\n+\tint wait = 1000;\n+\n+\treturn vnic_dev_cmd(vdev, CMD_STATS_CLEAR, &a0, &a1, wait);\n+}\n+\n+int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)\n+{\n+\tu64 a0, a1;\n+\tint wait = 1000;\n+\tstatic u32 instance;\n+\tchar name[NAME_MAX];\n+\n+\tif (!vdev->stats) {\n+\t\tsnprintf((char *)name, sizeof(name),\n+\t\t\t\"vnic_stats-%d\", instance++);\n+\t\tvdev->stats = vdev->alloc_consistent(vdev->priv,\n+\t\t\tsizeof(struct vnic_stats), &vdev->stats_pa, (u8 *)name);\n+\t\tif (!vdev->stats)\n+\t\t\treturn -ENOMEM;\n+\t}\n+\n+\t*stats = vdev->stats;\n+\ta0 = vdev->stats_pa;\n+\ta1 = sizeof(struct vnic_stats);\n+\n+\treturn vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);\n+}\n+\n+int vnic_dev_close(struct vnic_dev *vdev)\n+{\n+\tu64 a0 = 0, a1 = 0;\n+\tint wait = 1000;\n+\n+\treturn vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);\n+}\n+\n+/** Deprecated.  @see vnic_dev_enable_wait */\n+int vnic_dev_enable(struct vnic_dev *vdev)\n+{\n+\tu64 a0 = 0, a1 = 0;\n+\tint wait = 1000;\n+\n+\treturn vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);\n+}\n+\n+int vnic_dev_enable_wait(struct vnic_dev *vdev)\n+{\n+\tu64 a0 = 0, a1 = 0;\n+\tint wait = 1000;\n+\n+\tif (vnic_dev_capable(vdev, CMD_ENABLE_WAIT))\n+\t\treturn vnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);\n+\telse\n+\t\treturn vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);\n+}\n+\n+int vnic_dev_disable(struct vnic_dev *vdev)\n+{\n+\tu64 a0 = 0, a1 = 0;\n+\tint wait = 1000;\n+\n+\treturn vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);\n+}\n+\n+int vnic_dev_open(struct vnic_dev *vdev, int arg)\n+{\n+\tu64 a0 = (u32)arg, a1 = 0;\n+\tint wait = 1000;\n+\n+\treturn vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);\n+}\n+\n+int vnic_dev_open_done(struct vnic_dev *vdev, int *done)\n+{\n+\tu64 a0 = 0, a1 = 0;\n+\tint wait = 1000;\n+\tint err;\n+\n+\t*done = 0;\n+\n+\terr = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);\n+\tif (err)\n+\t\treturn err;\n+\n+\t*done = (a0 == 0);\n+\n+\treturn 0;\n+}\n+\n+int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)\n+{\n+\tu64 a0 = (u32)arg, a1 = 0;\n+\tint wait = 1000;\n+\n+\treturn vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);\n+}\n+\n+int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)\n+{\n+\tu64 a0 = 0, a1 = 0;\n+\tint wait = 1000;\n+\tint err;\n+\n+\t*done = 0;\n+\n+\terr = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);\n+\tif (err)\n+\t\treturn err;\n+\n+\t*done = (a0 == 0);\n+\n+\treturn 0;\n+}\n+\n+int vnic_dev_get_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)\n+{\n+\tu64 a0, a1 = 0;\n+\tint wait = 1000;\n+\tint err, i;\n+\n+\tfor (i = 0; i < ETH_ALEN; i++)\n+\t\tmac_addr[i] = 0;\n+\n+\terr = vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);\n+\tif (err)\n+\t\treturn err;\n+\n+\tfor (i = 0; i < ETH_ALEN; i++)\n+\t\tmac_addr[i] = ((u8 *)&a0)[i];\n+\n+\treturn 0;\n+}\n+\n+int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,\n+\tint broadcast, int promisc, int allmulti)\n+{\n+\tu64 a0, a1 = 0;\n+\tint wait = 1000;\n+\tint err;\n+\n+\ta0 = (directed ? CMD_PFILTER_DIRECTED : 0) |\n+\t     (multicast ? CMD_PFILTER_MULTICAST : 0) |\n+\t     (broadcast ? CMD_PFILTER_BROADCAST : 0) |\n+\t     (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |\n+\t     (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);\n+\n+\terr = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);\n+\tif (err)\n+\t\tpr_err(\"Can't set packet filter\\n\");\n+\n+\treturn err;\n+}\n+\n+int vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)\n+{\n+\tu64 a0 = 0, a1 = 0;\n+\tint wait = 1000;\n+\tint err;\n+\tint i;\n+\n+\tfor (i = 0; i < ETH_ALEN; i++)\n+\t\t((u8 *)&a0)[i] = addr[i];\n+\n+\terr = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);\n+\tif (err)\n+\t\tpr_err(\"Can't add addr [%02x:%02x:%02x:%02x:%02x:%02x], %d\\n\",\n+\t\t\taddr[0], addr[1], addr[2], addr[3], addr[4], addr[5],\n+\t\t\terr);\n+\n+\treturn err;\n+}\n+\n+int vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)\n+{\n+\tu64 a0 = 0, a1 = 0;\n+\tint wait = 1000;\n+\tint err;\n+\tint i;\n+\n+\tfor (i = 0; i < ETH_ALEN; i++)\n+\t\t((u8 *)&a0)[i] = addr[i];\n+\n+\terr = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);\n+\tif (err)\n+\t\tpr_err(\"Can't del addr [%02x:%02x:%02x:%02x:%02x:%02x], %d\\n\",\n+\t\t\taddr[0], addr[1], addr[2], addr[3], addr[4], addr[5],\n+\t\t\terr);\n+\n+\treturn err;\n+}\n+\n+int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,\n+\tu8 ig_vlan_rewrite_mode)\n+{\n+\tu64 a0 = ig_vlan_rewrite_mode, a1 = 0;\n+\tint wait = 1000;\n+\n+\tif (vnic_dev_capable(vdev, CMD_IG_VLAN_REWRITE_MODE))\n+\t\treturn vnic_dev_cmd(vdev, CMD_IG_VLAN_REWRITE_MODE,\n+\t\t\t\t&a0, &a1, wait);\n+\telse\n+\t\treturn 0;\n+}\n+\n+int vnic_dev_raise_intr(struct vnic_dev *vdev, u16 intr)\n+{\n+\tu64 a0 = intr, a1 = 0;\n+\tint wait = 1000;\n+\tint err;\n+\n+\terr = vnic_dev_cmd(vdev, CMD_IAR, &a0, &a1, wait);\n+\tif (err)\n+\t\tpr_err(\"Failed to raise INTR[%d], err %d\\n\", intr, err);\n+\n+\treturn err;\n+}\n+\n+void vnic_dev_set_reset_flag(struct vnic_dev *vdev, int state)\n+{\n+\tvdev->in_reset = state;\n+}\n+\n+static inline int vnic_dev_in_reset(struct vnic_dev *vdev)\n+{\n+\treturn vdev->in_reset;\n+}\n+\n+int vnic_dev_notify_setcmd(struct vnic_dev *vdev,\n+\tvoid *notify_addr, dma_addr_t notify_pa, u16 intr)\n+{\n+\tu64 a0, a1;\n+\tint wait = 1000;\n+\tint r;\n+\n+\tmemset(notify_addr, 0, sizeof(struct vnic_devcmd_notify));\n+\tif (!vnic_dev_in_reset(vdev)) {\n+\t\tvdev->notify = notify_addr;\n+\t\tvdev->notify_pa = notify_pa;\n+\t}\n+\n+\ta0 = (u64)notify_pa;\n+\ta1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;\n+\ta1 += sizeof(struct vnic_devcmd_notify);\n+\n+\tr = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);\n+\tif (!vnic_dev_in_reset(vdev))\n+\t\tvdev->notify_sz = (r == 0) ? (u32)a1 : 0;\n+\n+\treturn r;\n+}\n+\n+int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)\n+{\n+\tvoid *notify_addr = NULL;\n+\tdma_addr_t notify_pa = 0;\n+\tchar name[NAME_MAX];\n+\tstatic u32 instance;\n+\n+\tif (vdev->notify || vdev->notify_pa) {\n+\t\tpr_warn(\"notify block %p still allocated.\\n\" \\\n+\t\t\t\"Ignore if restarting port\\n\", vdev->notify);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (!vnic_dev_in_reset(vdev)) {\n+\t\tsnprintf((char *)name, sizeof(name),\n+\t\t\t\"vnic_notify-%d\", instance++);\n+\t\tnotify_addr = vdev->alloc_consistent(vdev->priv,\n+\t\t\tsizeof(struct vnic_devcmd_notify),\n+\t\t\t&notify_pa, (u8 *)name);\n+\t\tif (!notify_addr)\n+\t\t\treturn -ENOMEM;\n+\t}\n+\n+\treturn vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);\n+}\n+\n+int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev)\n+{\n+\tu64 a0, a1;\n+\tint wait = 1000;\n+\tint err;\n+\n+\ta0 = 0;  /* paddr = 0 to unset notify buffer */\n+\ta1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */\n+\ta1 += sizeof(struct vnic_devcmd_notify);\n+\n+\terr = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);\n+\tif (!vnic_dev_in_reset(vdev)) {\n+\t\tvdev->notify = NULL;\n+\t\tvdev->notify_pa = 0;\n+\t\tvdev->notify_sz = 0;\n+\t}\n+\n+\treturn err;\n+}\n+\n+int vnic_dev_notify_unset(struct vnic_dev *vdev)\n+{\n+\tif (vdev->notify && !vnic_dev_in_reset(vdev)) {\n+\t\tvdev->free_consistent(vdev->pdev,\n+\t\t\tsizeof(struct vnic_devcmd_notify),\n+\t\t\tvdev->notify,\n+\t\t\tvdev->notify_pa);\n+\t}\n+\n+\treturn vnic_dev_notify_unsetcmd(vdev);\n+}\n+\n+static int vnic_dev_notify_ready(struct vnic_dev *vdev)\n+{\n+\tu32 *words;\n+\tunsigned int nwords = vdev->notify_sz / 4;\n+\tunsigned int i;\n+\tu32 csum;\n+\n+\tif (!vdev->notify || !vdev->notify_sz)\n+\t\treturn 0;\n+\n+\tdo {\n+\t\tcsum = 0;\n+\t\trte_memcpy(&vdev->notify_copy, vdev->notify, vdev->notify_sz);\n+\t\twords = (u32 *)&vdev->notify_copy;\n+\t\tfor (i = 1; i < nwords; i++)\n+\t\t\tcsum += words[i];\n+\t} while (csum != words[0]);\n+\n+\treturn 1;\n+}\n+\n+int vnic_dev_init(struct vnic_dev *vdev, int arg)\n+{\n+\tu64 a0 = (u32)arg, a1 = 0;\n+\tint wait = 1000;\n+\tint r = 0;\n+\n+\tif (vnic_dev_capable(vdev, CMD_INIT))\n+\t\tr = vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);\n+\telse {\n+\t\tvnic_dev_cmd(vdev, CMD_INIT_v1, &a0, &a1, wait);\n+\t\tif (a0 & CMD_INITF_DEFAULT_MAC) {\n+\t\t\t/* Emulate these for old CMD_INIT_v1 which\n+\t\t\t * didn't pass a0 so no CMD_INITF_*.\n+\t\t\t */\n+\t\t\tvnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);\n+\t\t\tvnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);\n+\t\t}\n+\t}\n+\treturn r;\n+}\n+\n+int vnic_dev_deinit(struct vnic_dev *vdev)\n+{\n+\tu64 a0 = 0, a1 = 0;\n+\tint wait = 1000;\n+\n+\treturn vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);\n+}\n+\n+void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev)\n+{\n+\t/* Default: hardware intr coal timer is in units of 1.5 usecs */\n+\tvdev->intr_coal_timer_info.mul = 2;\n+\tvdev->intr_coal_timer_info.div = 3;\n+\tvdev->intr_coal_timer_info.max_usec =\n+\t\tvnic_dev_intr_coal_timer_hw_to_usec(vdev, 0xffff);\n+}\n+\n+int vnic_dev_link_status(struct vnic_dev *vdev)\n+{\n+\tif (!vnic_dev_notify_ready(vdev))\n+\t\treturn 0;\n+\n+\treturn vdev->notify_copy.link_state;\n+}\n+\n+u32 vnic_dev_port_speed(struct vnic_dev *vdev)\n+{\n+\tif (!vnic_dev_notify_ready(vdev))\n+\t\treturn 0;\n+\n+\treturn vdev->notify_copy.port_speed;\n+}\n+\n+void vnic_dev_set_intr_mode(struct vnic_dev *vdev,\n+\tenum vnic_dev_intr_mode intr_mode)\n+{\n+\tvdev->intr_mode = intr_mode;\n+}\n+\n+enum vnic_dev_intr_mode vnic_dev_get_intr_mode(\n+\tstruct vnic_dev *vdev)\n+{\n+\treturn vdev->intr_mode;\n+}\n+\n+u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec)\n+{\n+\treturn (usec * vdev->intr_coal_timer_info.mul) /\n+\t\tvdev->intr_coal_timer_info.div;\n+}\n+\n+u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles)\n+{\n+\treturn (hw_cycles * vdev->intr_coal_timer_info.div) /\n+\t\tvdev->intr_coal_timer_info.mul;\n+}\n+\n+u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev)\n+{\n+\treturn vdev->intr_coal_timer_info.max_usec;\n+}\n+\n+void vnic_dev_unregister(struct vnic_dev *vdev)\n+{\n+\tif (vdev) {\n+\t\tif (vdev->notify)\n+\t\t\tvdev->free_consistent(vdev->pdev,\n+\t\t\t\tsizeof(struct vnic_devcmd_notify),\n+\t\t\t\tvdev->notify,\n+\t\t\t\tvdev->notify_pa);\n+\t\tif (vdev->stats)\n+\t\t\tvdev->free_consistent(vdev->pdev,\n+\t\t\t\tsizeof(struct vnic_stats),\n+\t\t\t\tvdev->stats, vdev->stats_pa);\n+\t\tif (vdev->fw_info)\n+\t\t\tvdev->free_consistent(vdev->pdev,\n+\t\t\t\tsizeof(struct vnic_devcmd_fw_info),\n+\t\t\t\tvdev->fw_info, vdev->fw_info_pa);\n+\t\tkfree(vdev);\n+\t}\n+}\n+\n+struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,\n+\tvoid *priv, struct rte_pci_device *pdev, struct vnic_dev_bar *bar,\n+\tunsigned int num_bars)\n+{\n+\tif (!vdev) {\n+\t\tvdev = kzalloc(sizeof(struct vnic_dev), GFP_ATOMIC);\n+\t\tif (!vdev)\n+\t\t\treturn NULL;\n+\t}\n+\n+\tvdev->priv = priv;\n+\tvdev->pdev = pdev;\n+\n+\tif (vnic_dev_discover_res(vdev, bar, num_bars))\n+\t\tgoto err_out;\n+\n+\tvdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);\n+\tif (!vdev->devcmd)\n+\t\tgoto err_out;\n+\n+\treturn vdev;\n+\n+err_out:\n+\tvnic_dev_unregister(vdev);\n+\treturn NULL;\n+}\n+\n+struct rte_pci_device *vnic_dev_get_pdev(struct vnic_dev *vdev)\n+{\n+\treturn vdev->pdev;\n+}\n+\n+int vnic_dev_set_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)\n+{\n+\tu64 a0, a1 = 0;\n+\tint wait = 1000;\n+\tint i;\n+\n+\tfor (i = 0; i < ETH_ALEN; i++)\n+\t\t((u8 *)&a0)[i] = mac_addr[i];\n+\n+\treturn vnic_dev_cmd(vdev, CMD_SET_MAC_ADDR, &a0, &a1, wait);\n+}\n+\n+/*\n+ *  vnic_dev_classifier: Add/Delete classifier entries\n+ *  @vdev: vdev of the device\n+ *  @cmd: CLSF_ADD for Add filter\n+ *        CLSF_DEL for Delete filter\n+ *  @entry: In case of ADD filter, the caller passes the RQ number in this\n+ *          variable.\n+ *          This function stores the filter_id returned by the\n+ *          firmware in the same variable before return;\n+ *\n+ *          In case of DEL filter, the caller passes the RQ number. Return\n+ *          value is irrelevant.\n+ * @data: filter data\n+ */\n+int vnic_dev_classifier(struct vnic_dev *vdev, u8 cmd, u16 *entry,\n+\tstruct filter *data)\n+{\n+\tu64 a0, a1;\n+\tint wait = 1000;\n+\tdma_addr_t tlv_pa;\n+\tint ret = -EINVAL;\n+\tstruct filter_tlv *tlv, *tlv_va;\n+\tstruct filter_action *action;\n+\tu64 tlv_size;\n+\tstatic unsigned int unique_id;\n+\tchar z_name[RTE_MEMZONE_NAMESIZE];\n+\n+\tif (cmd == CLSF_ADD) {\n+\t\ttlv_size = sizeof(struct filter) +\n+\t\t    sizeof(struct filter_action) +\n+\t\t    2*sizeof(struct filter_tlv);\n+\t\tsnprintf((char *)z_name, sizeof(z_name),\n+\t\t\t\"vnic_clsf_%d\", unique_id++);\n+\t\ttlv_va = vdev->alloc_consistent(vdev->priv,\n+\t\t\ttlv_size, &tlv_pa, (u8 *)z_name);\n+\t\tif (!tlv_va)\n+\t\t\treturn -ENOMEM;\n+\t\ttlv = tlv_va;\n+\t\ta0 = tlv_pa;\n+\t\ta1 = tlv_size;\n+\t\tmemset(tlv, 0, tlv_size);\n+\t\ttlv->type = CLSF_TLV_FILTER;\n+\t\ttlv->length = sizeof(struct filter);\n+\t\t*(struct filter *)&tlv->val = *data;\n+\n+\t\ttlv = (struct filter_tlv *)((char *)tlv +\n+\t\t\t\t\t sizeof(struct filter_tlv) +\n+\t\t\t\t\t sizeof(struct filter));\n+\n+\t\ttlv->type = CLSF_TLV_ACTION;\n+\t\ttlv->length = sizeof(struct filter_action);\n+\t\taction = (struct filter_action *)&tlv->val;\n+\t\taction->type = FILTER_ACTION_RQ_STEERING;\n+\t\taction->u.rq_idx = *entry;\n+\n+\t\tret = vnic_dev_cmd(vdev, CMD_ADD_FILTER, &a0, &a1, wait);\n+\t\t*entry = (u16)a0;\n+\t\tvdev->free_consistent(vdev->pdev, tlv_size, tlv_va, tlv_pa);\n+\t} else if (cmd == CLSF_DEL) {\n+\t\ta0 = *entry;\n+\t\tret = vnic_dev_cmd(vdev, CMD_DEL_FILTER, &a0, &a1, wait);\n+\t}\n+\n+\treturn ret;\n+}\ndiff --git a/drivers/net/enic/vnic/vnic_dev.h b/drivers/net/enic/vnic/vnic_dev.h\nnew file mode 100644\nindex 0000000..f583357\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_dev.h\n@@ -0,0 +1,212 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_dev.h 196958 2014-11-04 18:23:37Z xuywang $\"\n+\n+#ifndef _VNIC_DEV_H_\n+#define _VNIC_DEV_H_\n+\n+#include \"enic_compat.h\"\n+#include \"rte_pci.h\"\n+#include \"vnic_resource.h\"\n+#include \"vnic_devcmd.h\"\n+\n+#ifndef VNIC_PADDR_TARGET\n+#define VNIC_PADDR_TARGET\t0x0000000000000000ULL\n+#endif\n+\n+#ifndef readq\n+static inline u64 readq(void __iomem *reg)\n+{\n+\treturn ((u64)readl((char *)reg + 0x4UL) << 32) |\n+\t\t(u64)readl(reg);\n+}\n+\n+static inline void writeq(u64 val, void __iomem *reg)\n+{\n+\twritel(val & 0xffffffff, reg);\n+\twritel((u32)(val >> 32), (char *)reg + 0x4UL);\n+}\n+#endif\n+\n+#undef pr_fmt\n+#define pr_fmt(fmt) KBUILD_MODNAME \": \" fmt\n+\n+enum vnic_dev_intr_mode {\n+\tVNIC_DEV_INTR_MODE_UNKNOWN,\n+\tVNIC_DEV_INTR_MODE_INTX,\n+\tVNIC_DEV_INTR_MODE_MSI,\n+\tVNIC_DEV_INTR_MODE_MSIX,\n+};\n+\n+struct vnic_dev_bar {\n+\tvoid __iomem *vaddr;\n+\tdma_addr_t bus_addr;\n+\tunsigned long len;\n+};\n+\n+struct vnic_dev_ring {\n+\tvoid *descs;\n+\tsize_t size;\n+\tdma_addr_t base_addr;\n+\tsize_t base_align;\n+\tvoid *descs_unaligned;\n+\tsize_t size_unaligned;\n+\tdma_addr_t base_addr_unaligned;\n+\tunsigned int desc_size;\n+\tunsigned int desc_count;\n+\tunsigned int desc_avail;\n+};\n+\n+struct vnic_dev_iomap_info {\n+\tdma_addr_t bus_addr;\n+\tunsigned long len;\n+\tvoid __iomem *vaddr;\n+};\n+\n+struct vnic_dev;\n+struct vnic_stats;\n+\n+void *vnic_dev_priv(struct vnic_dev *vdev);\n+unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,\n+\tenum vnic_res_type type);\n+void vnic_register_cbacks(struct vnic_dev *vdev,\n+\tvoid *(*alloc_consistent)(void *priv, size_t size,\n+\t\tdma_addr_t *dma_handle, u8 *name),\n+\tvoid (*free_consistent)(struct rte_pci_device *hwdev,\n+\t\tsize_t size, void *vaddr,\n+\t\tdma_addr_t dma_handle));\n+void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,\n+\tunsigned int index);\n+dma_addr_t vnic_dev_get_res_bus_addr(struct vnic_dev *vdev,\n+\tenum vnic_res_type type, unsigned int index);\n+uint8_t vnic_dev_get_res_bar(struct vnic_dev *vdev,\n+\tenum vnic_res_type type);\n+uint32_t vnic_dev_get_res_offset(struct vnic_dev *vdev,\n+\tenum vnic_res_type type, unsigned int index);\n+unsigned long vnic_dev_get_res_type_len(struct vnic_dev *vdev,\n+\t\t\t\t\tenum vnic_res_type type);\n+unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,\n+\tunsigned int desc_count, unsigned int desc_size);\n+void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring);\n+void vnic_set_hdr_split_size(struct vnic_dev *vdev, u16 size);\n+u16 vnic_get_hdr_split_size(struct vnic_dev *vdev);\n+int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,\n+\tunsigned int desc_count, unsigned int desc_size, unsigned int socket_id,\n+\tchar *z_name);\n+void vnic_dev_free_desc_ring(struct vnic_dev *vdev,\n+\tstruct vnic_dev_ring *ring);\n+int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,\n+\tu64 *a0, u64 *a1, int wait);\n+int vnic_dev_cmd_args(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,\n+\tu64 *args, int nargs, int wait);\n+void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index);\n+void vnic_dev_cmd_proxy_by_bdf_start(struct vnic_dev *vdev, u16 bdf);\n+void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev);\n+int vnic_dev_fw_info(struct vnic_dev *vdev,\n+\tstruct vnic_devcmd_fw_info **fw_info);\n+int vnic_dev_asic_info(struct vnic_dev *vdev, u16 *asic_type, u16 *asic_rev);\n+int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, size_t size,\n+\tvoid *value);\n+int vnic_dev_stats_clear(struct vnic_dev *vdev);\n+int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats);\n+int vnic_dev_hang_notify(struct vnic_dev *vdev);\n+int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,\n+\tint broadcast, int promisc, int allmulti);\n+int vnic_dev_packet_filter_all(struct vnic_dev *vdev, int directed,\n+\tint multicast, int broadcast, int promisc, int allmulti);\n+int vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr);\n+int vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr);\n+int vnic_dev_get_mac_addr(struct vnic_dev *vdev, u8 *mac_addr);\n+int vnic_dev_raise_intr(struct vnic_dev *vdev, u16 intr);\n+int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr);\n+void vnic_dev_set_reset_flag(struct vnic_dev *vdev, int state);\n+int vnic_dev_notify_unset(struct vnic_dev *vdev);\n+int vnic_dev_notify_setcmd(struct vnic_dev *vdev,\n+\tvoid *notify_addr, dma_addr_t notify_pa, u16 intr);\n+int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev);\n+int vnic_dev_link_status(struct vnic_dev *vdev);\n+u32 vnic_dev_port_speed(struct vnic_dev *vdev);\n+u32 vnic_dev_msg_lvl(struct vnic_dev *vdev);\n+u32 vnic_dev_mtu(struct vnic_dev *vdev);\n+u32 vnic_dev_link_down_cnt(struct vnic_dev *vdev);\n+u32 vnic_dev_notify_status(struct vnic_dev *vdev);\n+u32 vnic_dev_uif(struct vnic_dev *vdev);\n+int vnic_dev_close(struct vnic_dev *vdev);\n+int vnic_dev_enable(struct vnic_dev *vdev);\n+int vnic_dev_enable_wait(struct vnic_dev *vdev);\n+int vnic_dev_disable(struct vnic_dev *vdev);\n+int vnic_dev_open(struct vnic_dev *vdev, int arg);\n+int vnic_dev_open_done(struct vnic_dev *vdev, int *done);\n+int vnic_dev_init(struct vnic_dev *vdev, int arg);\n+int vnic_dev_init_done(struct vnic_dev *vdev, int *done, int *err);\n+int vnic_dev_init_prov(struct vnic_dev *vdev, u8 *buf, u32 len);\n+int vnic_dev_deinit(struct vnic_dev *vdev);\n+void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev);\n+int vnic_dev_intr_coal_timer_info(struct vnic_dev *vdev);\n+int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg);\n+int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done);\n+int vnic_dev_hang_reset(struct vnic_dev *vdev, int arg);\n+int vnic_dev_hang_reset_done(struct vnic_dev *vdev, int *done);\n+void vnic_dev_set_intr_mode(struct vnic_dev *vdev,\n+\tenum vnic_dev_intr_mode intr_mode);\n+enum vnic_dev_intr_mode vnic_dev_get_intr_mode(struct vnic_dev *vdev);\n+u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec);\n+u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles);\n+u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev);\n+void vnic_dev_unregister(struct vnic_dev *vdev);\n+int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,\n+\tu8 ig_vlan_rewrite_mode);\n+struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,\n+\tvoid *priv, struct rte_pci_device *pdev, struct vnic_dev_bar *bar,\n+\tunsigned int num_bars);\n+struct rte_pci_device *vnic_dev_get_pdev(struct vnic_dev *vdev);\n+int vnic_dev_cmd_init(struct vnic_dev *vdev, int fallback);\n+int vnic_dev_get_size(void);\n+int vnic_dev_int13(struct vnic_dev *vdev, u64 arg, u32 op);\n+int vnic_dev_perbi(struct vnic_dev *vdev, u64 arg, u32 op);\n+u32 vnic_dev_perbi_rebuild_cnt(struct vnic_dev *vdev);\n+int vnic_dev_init_prov2(struct vnic_dev *vdev, u8 *buf, u32 len);\n+int vnic_dev_enable2(struct vnic_dev *vdev, int active);\n+int vnic_dev_enable2_done(struct vnic_dev *vdev, int *status);\n+int vnic_dev_deinit_done(struct vnic_dev *vdev, int *status);\n+int vnic_dev_set_mac_addr(struct vnic_dev *vdev, u8 *mac_addr);\n+int vnic_dev_classifier(struct vnic_dev *vdev, u8 cmd, u16 *entry,\n+\tstruct filter *data);\n+#ifdef ENIC_VXLAN\n+int vnic_dev_overlay_offload_enable_disable(struct vnic_dev *vdev,\n+\tu8 overlay, u8 config);\n+int vnic_dev_overlay_offload_cfg(struct vnic_dev *vdev, u8 overlay,\n+\tu16 vxlan_udp_port_number);\n+#endif\n+#endif /* _VNIC_DEV_H_ */\ndiff --git a/drivers/net/enic/vnic/vnic_devcmd.h b/drivers/net/enic/vnic/vnic_devcmd.h\nnew file mode 100644\nindex 0000000..e7ecf31\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_devcmd.h\n@@ -0,0 +1,774 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_devcmd.h 173135 2014-05-16 03:14:07Z sanpilla $\"\n+\n+#ifndef _VNIC_DEVCMD_H_\n+#define _VNIC_DEVCMD_H_\n+\n+#define _CMD_NBITS      14\n+#define _CMD_VTYPEBITS\t10\n+#define _CMD_FLAGSBITS  6\n+#define _CMD_DIRBITS\t2\n+\n+#define _CMD_NMASK      ((1 << _CMD_NBITS)-1)\n+#define _CMD_VTYPEMASK  ((1 << _CMD_VTYPEBITS)-1)\n+#define _CMD_FLAGSMASK  ((1 << _CMD_FLAGSBITS)-1)\n+#define _CMD_DIRMASK    ((1 << _CMD_DIRBITS)-1)\n+\n+#define _CMD_NSHIFT     0\n+#define _CMD_VTYPESHIFT (_CMD_NSHIFT+_CMD_NBITS)\n+#define _CMD_FLAGSSHIFT (_CMD_VTYPESHIFT+_CMD_VTYPEBITS)\n+#define _CMD_DIRSHIFT   (_CMD_FLAGSSHIFT+_CMD_FLAGSBITS)\n+\n+/*\n+ * Direction bits (from host perspective).\n+ */\n+#define _CMD_DIR_NONE   0U\n+#define _CMD_DIR_WRITE  1U\n+#define _CMD_DIR_READ   2U\n+#define _CMD_DIR_RW     (_CMD_DIR_WRITE | _CMD_DIR_READ)\n+\n+/*\n+ * Flag bits.\n+ */\n+#define _CMD_FLAGS_NONE 0U\n+#define _CMD_FLAGS_NOWAIT 1U\n+\n+/*\n+ * vNIC type bits.\n+ */\n+#define _CMD_VTYPE_NONE  0U\n+#define _CMD_VTYPE_ENET  1U\n+#define _CMD_VTYPE_FC    2U\n+#define _CMD_VTYPE_SCSI  4U\n+#define _CMD_VTYPE_ALL   (_CMD_VTYPE_ENET | _CMD_VTYPE_FC | _CMD_VTYPE_SCSI)\n+\n+/*\n+ * Used to create cmds..\n+ */\n+#define _CMDCF(dir, flags, vtype, nr)  \\\n+\t(((dir)   << _CMD_DIRSHIFT) | \\\n+\t((flags) << _CMD_FLAGSSHIFT) | \\\n+\t((vtype) << _CMD_VTYPESHIFT) | \\\n+\t((nr)    << _CMD_NSHIFT))\n+#define _CMDC(dir, vtype, nr)    _CMDCF(dir, 0, vtype, nr)\n+#define _CMDCNW(dir, vtype, nr)  _CMDCF(dir, _CMD_FLAGS_NOWAIT, vtype, nr)\n+\n+/*\n+ * Used to decode cmds..\n+ */\n+#define _CMD_DIR(cmd)            (((cmd) >> _CMD_DIRSHIFT) & _CMD_DIRMASK)\n+#define _CMD_FLAGS(cmd)          (((cmd) >> _CMD_FLAGSSHIFT) & _CMD_FLAGSMASK)\n+#define _CMD_VTYPE(cmd)          (((cmd) >> _CMD_VTYPESHIFT) & _CMD_VTYPEMASK)\n+#define _CMD_N(cmd)              (((cmd) >> _CMD_NSHIFT) & _CMD_NMASK)\n+\n+enum vnic_devcmd_cmd {\n+\tCMD_NONE                = _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_NONE, 0),\n+\n+\t/*\n+\t * mcpu fw info in mem:\n+\t * in:\n+\t *   (u64)a0=paddr to struct vnic_devcmd_fw_info\n+\t * action:\n+\t *   Fills in struct vnic_devcmd_fw_info (128 bytes)\n+\t * note:\n+\t *   An old definition of CMD_MCPU_FW_INFO\n+\t */\n+\tCMD_MCPU_FW_INFO_OLD    = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 1),\n+\n+\t/*\n+\t * mcpu fw info in mem:\n+\t * in:\n+\t *   (u64)a0=paddr to struct vnic_devcmd_fw_info\n+\t *   (u16)a1=size of the structure\n+\t * out:\n+\t *\t (u16)a1=0                          for in:a1 = 0,\n+\t *\t         data size actually written for other values.\n+\t * action:\n+\t *   Fills in first 128 bytes of vnic_devcmd_fw_info for in:a1 = 0,\n+\t *            first in:a1 bytes               for 0 < in:a1 <= 132,\n+\t *            132 bytes                       for other values of in:a1.\n+\t * note:\n+\t *   CMD_MCPU_FW_INFO and CMD_MCPU_FW_INFO_OLD have the same enum 1\n+\t *   for source compatibility.\n+\t */\n+\tCMD_MCPU_FW_INFO        = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 1),\n+\n+\t/* dev-specific block member:\n+\t *    in: (u16)a0=offset,(u8)a1=size\n+\t *    out: a0=value */\n+\tCMD_DEV_SPEC            = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 2),\n+\n+\t/* stats clear */\n+\tCMD_STATS_CLEAR         = _CMDCNW(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 3),\n+\n+\t/* stats dump in mem: (u64)a0=paddr to stats area,\n+\t *                    (u16)a1=sizeof stats area */\n+\tCMD_STATS_DUMP          = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 4),\n+\n+\t/* set Rx packet filter: (u32)a0=filters (see CMD_PFILTER_*) */\n+\tCMD_PACKET_FILTER\t= _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 7),\n+\n+\t/* set Rx packet filter for all: (u32)a0=filters (see CMD_PFILTER_*) */\n+\tCMD_PACKET_FILTER_ALL   = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 7),\n+\n+\t/* hang detection notification */\n+\tCMD_HANG_NOTIFY         = _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 8),\n+\n+\t/* MAC address in (u48)a0 */\n+\tCMD_GET_MAC_ADDR\t= _CMDC(_CMD_DIR_READ,\n+\t\t\t\t\t_CMD_VTYPE_ENET | _CMD_VTYPE_FC, 9),\n+\n+\t/* add addr from (u48)a0 */\n+\tCMD_ADDR_ADD            = _CMDCNW(_CMD_DIR_WRITE,\n+\t\t\t\t\t_CMD_VTYPE_ENET | _CMD_VTYPE_FC, 12),\n+\n+\t/* del addr from (u48)a0 */\n+\tCMD_ADDR_DEL            = _CMDCNW(_CMD_DIR_WRITE,\n+\t\t\t\t\t_CMD_VTYPE_ENET | _CMD_VTYPE_FC, 13),\n+\n+\t/* add VLAN id in (u16)a0 */\n+\tCMD_VLAN_ADD            = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 14),\n+\n+\t/* del VLAN id in (u16)a0 */\n+\tCMD_VLAN_DEL            = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 15),\n+\n+\t/* nic_cfg in (u32)a0 */\n+\tCMD_NIC_CFG             = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 16),\n+\n+\t/* union vnic_rss_key in mem: (u64)a0=paddr, (u16)a1=len */\n+\tCMD_RSS_KEY             = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 17),\n+\n+\t/* union vnic_rss_cpu in mem: (u64)a0=paddr, (u16)a1=len */\n+\tCMD_RSS_CPU             = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 18),\n+\n+\t/* initiate softreset */\n+\tCMD_SOFT_RESET          = _CMDCNW(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 19),\n+\n+\t/* softreset status:\n+\t *    out: a0=0 reset complete, a0=1 reset in progress */\n+\tCMD_SOFT_RESET_STATUS   = _CMDC(_CMD_DIR_READ, _CMD_VTYPE_ALL, 20),\n+\n+\t/* set struct vnic_devcmd_notify buffer in mem:\n+\t * in:\n+\t *   (u64)a0=paddr to notify (set paddr=0 to unset)\n+\t *   (u32)a1 & 0x00000000ffffffff=sizeof(struct vnic_devcmd_notify)\n+\t *   (u16)a1 & 0x0000ffff00000000=intr num (-1 for no intr)\n+\t * out:\n+\t *   (u32)a1 = effective size\n+\t */\n+\tCMD_NOTIFY              = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 21),\n+\n+\t/* UNDI API: (u64)a0=paddr to s_PXENV_UNDI_ struct,\n+\t *           (u8)a1=PXENV_UNDI_xxx */\n+\tCMD_UNDI                = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 22),\n+\n+\t/* initiate open sequence (u32)a0=flags (see CMD_OPENF_*) */\n+\tCMD_OPEN\t\t= _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 23),\n+\n+\t/* open status:\n+\t *    out: a0=0 open complete, a0=1 open in progress */\n+\tCMD_OPEN_STATUS\t\t= _CMDC(_CMD_DIR_READ, _CMD_VTYPE_ALL, 24),\n+\n+\t/* close vnic */\n+\tCMD_CLOSE\t\t= _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 25),\n+\n+\t/* initialize virtual link: (u32)a0=flags (see CMD_INITF_*) */\n+/***** Replaced by CMD_INIT *****/\n+\tCMD_INIT_v1\t\t= _CMDCNW(_CMD_DIR_READ, _CMD_VTYPE_ALL, 26),\n+\n+\t/* variant of CMD_INIT, with provisioning info\n+\t *     (u64)a0=paddr of vnic_devcmd_provinfo\n+\t *     (u32)a1=sizeof provision info */\n+\tCMD_INIT_PROV_INFO\t= _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 27),\n+\n+\t/* enable virtual link */\n+\tCMD_ENABLE\t\t= _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 28),\n+\n+\t/* enable virtual link, waiting variant. */\n+\tCMD_ENABLE_WAIT\t\t= _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 28),\n+\n+\t/* disable virtual link */\n+\tCMD_DISABLE\t\t= _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 29),\n+\n+\t/* stats dump sum of all vnic stats on same uplink in mem:\n+\t *     (u64)a0=paddr\n+\t *     (u16)a1=sizeof stats area */\n+\tCMD_STATS_DUMP_ALL\t= _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 30),\n+\n+\t/* init status:\n+\t *    out: a0=0 init complete, a0=1 init in progress\n+\t *         if a0=0, a1=errno */\n+\tCMD_INIT_STATUS\t\t= _CMDC(_CMD_DIR_READ, _CMD_VTYPE_ALL, 31),\n+\n+\t/* INT13 API: (u64)a0=paddr to vnic_int13_params struct\n+\t *            (u32)a1=INT13_CMD_xxx */\n+\tCMD_INT13               = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_FC, 32),\n+\n+\t/* logical uplink enable/disable: (u64)a0: 0/1=disable/enable */\n+\tCMD_LOGICAL_UPLINK      = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 33),\n+\n+\t/* undo initialize of virtual link */\n+\tCMD_DEINIT\t\t= _CMDCNW(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 34),\n+\n+\t/* initialize virtual link: (u32)a0=flags (see CMD_INITF_*) */\n+\tCMD_INIT\t\t= _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 35),\n+\n+\t/* check fw capability of a cmd:\n+\t * in:  (u32)a0=cmd\n+\t * out: (u32)a0=errno, 0:valid cmd, a1=supported VNIC_STF_* bits */\n+\tCMD_CAPABILITY\t\t= _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 36),\n+\n+\t/* persistent binding info\n+\t * in:  (u64)a0=paddr of arg\n+\t *      (u32)a1=CMD_PERBI_XXX */\n+\tCMD_PERBI\t\t= _CMDC(_CMD_DIR_RW, _CMD_VTYPE_FC, 37),\n+\n+\t/* Interrupt Assert Register functionality\n+\t * in: (u16)a0=interrupt number to assert\n+\t */\n+\tCMD_IAR\t\t\t= _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 38),\n+\n+\t/* initiate hangreset, like softreset after hang detected */\n+\tCMD_HANG_RESET\t\t= _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 39),\n+\n+\t/* hangreset status:\n+\t *    out: a0=0 reset complete, a0=1 reset in progress */\n+\tCMD_HANG_RESET_STATUS   = _CMDC(_CMD_DIR_READ, _CMD_VTYPE_ALL, 40),\n+\n+\t/*\n+\t * Set hw ingress packet vlan rewrite mode:\n+\t * in:  (u32)a0=new vlan rewrite mode\n+\t * out: (u32)a0=old vlan rewrite mode */\n+\tCMD_IG_VLAN_REWRITE_MODE = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ENET, 41),\n+\n+\t/*\n+\t * in:  (u16)a0=bdf of target vnic\n+\t *      (u32)a1=cmd to proxy\n+\t *      a2-a15=args to cmd in a1\n+\t * out: (u32)a0=status of proxied cmd\n+\t *      a1-a15=out args of proxied cmd */\n+\tCMD_PROXY_BY_BDF =\t_CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 42),\n+\n+\t/*\n+\t * As for BY_BDF except a0 is index of hvnlink subordinate vnic\n+\t * or SR-IOV virtual vnic\n+\t */\n+\tCMD_PROXY_BY_INDEX =    _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 43),\n+\n+\t/*\n+\t * For HPP toggle:\n+\t * adapter-info-get\n+\t * in:  (u64)a0=phsical address of buffer passed in from caller.\n+\t *      (u16)a1=size of buffer specified in a0.\n+\t * out: (u64)a0=phsical address of buffer passed in from caller.\n+\t *      (u16)a1=actual bytes from VIF-CONFIG-INFO TLV, or\n+\t *              0 if no VIF-CONFIG-INFO TLV was ever received. */\n+\tCMD_CONFIG_INFO_GET = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 44),\n+\n+\t/*\n+\t * INT13 API: (u64)a0=paddr to vnic_int13_params struct\n+\t *            (u32)a1=INT13_CMD_xxx\n+\t */\n+\tCMD_INT13_ALL = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 45),\n+\n+\t/*\n+\t * Set default vlan:\n+\t * in: (u16)a0=new default vlan\n+\t *     (u16)a1=zero for overriding vlan with param a0,\n+\t *\t\t       non-zero for resetting vlan to the default\n+\t * out: (u16)a0=old default vlan\n+\t */\n+\tCMD_SET_DEFAULT_VLAN = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 46),\n+\n+\t/* init_prov_info2:\n+\t * Variant of CMD_INIT_PROV_INFO, where it will not try to enable\n+\t * the vnic until CMD_ENABLE2 is issued.\n+\t *     (u64)a0=paddr of vnic_devcmd_provinfo\n+\t *     (u32)a1=sizeof provision info */\n+\tCMD_INIT_PROV_INFO2  = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 47),\n+\n+\t/* enable2:\n+\t *      (u32)a0=0                  ==> standby\n+\t *             =CMD_ENABLE2_ACTIVE ==> active\n+\t */\n+\tCMD_ENABLE2 = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 48),\n+\n+\t/*\n+\t * cmd_status:\n+\t *     Returns the status of the specified command\n+\t * Input:\n+\t *     a0 = command for which status is being queried.\n+\t *          Possible values are:\n+\t *              CMD_SOFT_RESET\n+\t *              CMD_HANG_RESET\n+\t *              CMD_OPEN\n+\t *              CMD_INIT\n+\t *              CMD_INIT_PROV_INFO\n+\t *              CMD_DEINIT\n+\t *              CMD_INIT_PROV_INFO2\n+\t *              CMD_ENABLE2\n+\t * Output:\n+\t *     if status == STAT_ERROR\n+\t *        a0 = ERR_ENOTSUPPORTED - status for command in a0 is\n+\t *                                 not supported\n+\t *     if status == STAT_NONE\n+\t *        a0 = status of the devcmd specified in a0 as follows.\n+\t *             ERR_SUCCESS   - command in a0 completed successfully\n+\t *             ERR_EINPROGRESS - command in a0 is still in progress\n+\t */\n+\tCMD_STATUS = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 49),\n+\n+\t/*\n+\t * Returns interrupt coalescing timer conversion factors.\n+\t * After calling this devcmd, ENIC driver can convert\n+\t * interrupt coalescing timer in usec into CPU cycles as follows:\n+\t *\n+\t *   intr_timer_cycles = intr_timer_usec * multiplier / divisor\n+\t *\n+\t * Interrupt coalescing timer in usecs can be be converted/obtained\n+\t * from CPU cycles as follows:\n+\t *\n+\t *   intr_timer_usec = intr_timer_cycles * divisor / multiplier\n+\t *\n+\t * in: none\n+\t * out: (u32)a0 = multiplier\n+\t *      (u32)a1 = divisor\n+\t *      (u32)a2 = maximum timer value in usec\n+\t */\n+\tCMD_INTR_COAL_CONVERT = _CMDC(_CMD_DIR_READ, _CMD_VTYPE_ALL, 50),\n+\n+\t/*\n+\t * ISCSI DUMP API:\n+\t * in: (u64)a0=paddr of the param or param itself\n+\t *     (u32)a1=ISCSI_CMD_xxx\n+\t */\n+\tCMD_ISCSI_DUMP_REQ = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 51),\n+\n+\t/*\n+\t * ISCSI DUMP STATUS API:\n+\t * in: (u32)a0=cmd tag\n+\t * in: (u32)a1=ISCSI_CMD_xxx\n+\t * out: (u32)a0=cmd status\n+\t */\n+\tCMD_ISCSI_DUMP_STATUS = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 52),\n+\n+\t/*\n+\t * Subvnic migration from MQ <--> VF.\n+\t * Enable the LIF migration from MQ to VF and vice versa. MQ and VF\n+\t * indexes are statically bound at the time of initialization.\n+\t * Based on the\n+\t * direction of migration, the resources of either MQ or the VF shall\n+\t * be attached to the LIF.\n+\t * in:        (u32)a0=Direction of Migration\n+\t *\t\t\t\t\t0=> Migrate to VF\n+\t *\t\t\t\t\t1=> Migrate to MQ\n+\t *            (u32)a1=VF index (MQ index)\n+\t */\n+\tCMD_MIGRATE_SUBVNIC = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 53),\n+\n+\n+\t/*\n+\t * Register / Deregister the notification block for MQ subvnics\n+\t * in:\n+\t *   (u64)a0=paddr to notify (set paddr=0 to unset)\n+\t *   (u32)a1 & 0x00000000ffffffff=sizeof(struct vnic_devcmd_notify)\n+\t *   (u16)a1 & 0x0000ffff00000000=intr num (-1 for no intr)\n+\t * out:\n+\t *   (u32)a1 = effective size\n+\t */\n+\tCMD_SUBVNIC_NOTIFY = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 54),\n+\n+\t/*\n+\t * Set the predefined mac address as default\n+\t * in:\n+\t *   (u48)a0=mac addr\n+\t */\n+\tCMD_SET_MAC_ADDR = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 55),\n+\n+\t/* Update the provisioning info of the given VIF\n+\t *     (u64)a0=paddr of vnic_devcmd_provinfo\n+\t *     (u32)a1=sizeof provision info */\n+\tCMD_PROV_INFO_UPDATE = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 56),\n+\n+\t/*\n+\t * Initialization for the devcmd2 interface.\n+\t * in: (u64) a0=host result buffer physical address\n+\t * in: (u16) a1=number of entries in result buffer\n+\t */\n+\tCMD_INITIALIZE_DEVCMD2 = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 57),\n+\n+\t/*\n+\t * Add a filter.\n+\t * in: (u64) a0= filter address\n+\t *     (u32) a1= size of filter\n+\t * out: (u32) a0=filter identifier\n+\t */\n+\tCMD_ADD_FILTER = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ENET, 58),\n+\n+\t/*\n+\t * Delete a filter.\n+\t * in: (u32) a0=filter identifier\n+\t */\n+\tCMD_DEL_FILTER = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 59),\n+\n+\t/*\n+\t * Enable a Queue Pair in User space NIC\n+\t * in: (u32) a0=Queue Pair number\n+\t *     (u32) a1= command\n+\t */\n+\tCMD_QP_ENABLE = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 60),\n+\n+\t/*\n+\t * Disable a Queue Pair in User space NIC\n+\t * in: (u32) a0=Queue Pair number\n+\t *     (u32) a1= command\n+\t */\n+\tCMD_QP_DISABLE = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 61),\n+\n+\t/*\n+\t * Stats dump Queue Pair in User space NIC\n+\t * in: (u32) a0=Queue Pair number\n+\t *     (u64) a1=host buffer addr for status dump\n+\t *     (u32) a2=length of the buffer\n+\t */\n+\tCMD_QP_STATS_DUMP = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 62),\n+\n+\t/*\n+\t * Clear stats for Queue Pair in User space NIC\n+\t * in: (u32) a0=Queue Pair number\n+\t */\n+\tCMD_QP_STATS_CLEAR = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 63),\n+\n+\t/*\n+\t * Enable/Disable overlay offloads on the given vnic\n+\t * in: (u8) a0 = OVERLAY_FEATURE_NVGRE : NVGRE\n+\t *          a0 = OVERLAY_FEATURE_VXLAN : VxLAN\n+\t * in: (u8) a1 = OVERLAY_OFFLOAD_ENABLE : Enable\n+\t *          a1 = OVERLAY_OFFLOAD_DISABLE : Disable\n+\t */\n+\tCMD_OVERLAY_OFFLOAD_ENABLE_DISABLE =\n+\t\t_CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 72),\n+\n+\t/*\n+\t * Configuration of overlay offloads feature on a given vNIC\n+\t * in: (u8) a0 = DEVCMD_OVERLAY_NVGRE : NVGRE\n+\t *          a0 = DEVCMD_OVERLAY_VXLAN : VxLAN\n+\t * in: (u8) a1 = VXLAN_PORT_UPDATE : VxLAN\n+\t * in: (u16) a2 = unsigned short int port information\n+\t */\n+\tCMD_OVERLAY_OFFLOAD_CFG = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 73),\n+};\n+\n+/* CMD_ENABLE2 flags */\n+#define CMD_ENABLE2_STANDBY 0x0\n+#define CMD_ENABLE2_ACTIVE  0x1\n+\n+/* flags for CMD_OPEN */\n+#define CMD_OPENF_OPROM\t\t0x1\t/* open coming from option rom */\n+\n+/* flags for CMD_INIT */\n+#define CMD_INITF_DEFAULT_MAC\t0x1\t/* init with default mac addr */\n+\n+/* flags for CMD_PACKET_FILTER */\n+#define CMD_PFILTER_DIRECTED\t\t0x01\n+#define CMD_PFILTER_MULTICAST\t\t0x02\n+#define CMD_PFILTER_BROADCAST\t\t0x04\n+#define CMD_PFILTER_PROMISCUOUS\t\t0x08\n+#define CMD_PFILTER_ALL_MULTICAST\t0x10\n+\n+/* Commands for CMD_QP_ENABLE/CM_QP_DISABLE */\n+#define CMD_QP_RQWQ                     0x0\n+\n+/* rewrite modes for CMD_IG_VLAN_REWRITE_MODE */\n+#define IG_VLAN_REWRITE_MODE_DEFAULT_TRUNK              0\n+#define IG_VLAN_REWRITE_MODE_UNTAG_DEFAULT_VLAN         1\n+#define IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN  2\n+#define IG_VLAN_REWRITE_MODE_PASS_THRU                  3\n+\n+enum vnic_devcmd_status {\n+\tSTAT_NONE = 0,\n+\tSTAT_BUSY = 1 << 0,\t/* cmd in progress */\n+\tSTAT_ERROR = 1 << 1,\t/* last cmd caused error (code in a0) */\n+};\n+\n+enum vnic_devcmd_error {\n+\tERR_SUCCESS = 0,\n+\tERR_EINVAL = 1,\n+\tERR_EFAULT = 2,\n+\tERR_EPERM = 3,\n+\tERR_EBUSY = 4,\n+\tERR_ECMDUNKNOWN = 5,\n+\tERR_EBADSTATE = 6,\n+\tERR_ENOMEM = 7,\n+\tERR_ETIMEDOUT = 8,\n+\tERR_ELINKDOWN = 9,\n+\tERR_EMAXRES = 10,\n+\tERR_ENOTSUPPORTED = 11,\n+\tERR_EINPROGRESS = 12,\n+\tERR_MAX\n+};\n+\n+/*\n+ * note: hw_version and asic_rev refer to the same thing,\n+ *       but have different formats. hw_version is\n+ *       a 32-byte string (e.g. \"A2\") and asic_rev is\n+ *       a 16-bit integer (e.g. 0xA2).\n+ */\n+struct vnic_devcmd_fw_info {\n+\tchar fw_version[32];\n+\tchar fw_build[32];\n+\tchar hw_version[32];\n+\tchar hw_serial_number[32];\n+\tu16 asic_type;\n+\tu16 asic_rev;\n+};\n+\n+enum fwinfo_asic_type {\n+\tFWINFO_ASIC_TYPE_UNKNOWN,\n+\tFWINFO_ASIC_TYPE_PALO,\n+\tFWINFO_ASIC_TYPE_SERENO,\n+};\n+\n+\n+struct vnic_devcmd_notify {\n+\tu32 csum;\t\t/* checksum over following words */\n+\n+\tu32 link_state;\t\t/* link up == 1 */\n+\tu32 port_speed;\t\t/* effective port speed (rate limit) */\n+\tu32 mtu;\t\t/* MTU */\n+\tu32 msglvl;\t\t/* requested driver msg lvl */\n+\tu32 uif;\t\t/* uplink interface */\n+\tu32 status;\t\t/* status bits (see VNIC_STF_*) */\n+\tu32 error;\t\t/* error code (see ERR_*) for first ERR */\n+\tu32 link_down_cnt;\t/* running count of link down transitions */\n+\tu32 perbi_rebuild_cnt;\t/* running count of perbi rebuilds */\n+};\n+#define VNIC_STF_FATAL_ERR\t0x0001\t/* fatal fw error */\n+#define VNIC_STF_STD_PAUSE\t0x0002\t/* standard link-level pause on */\n+#define VNIC_STF_PFC_PAUSE\t0x0004\t/* priority flow control pause on */\n+/* all supported status flags */\n+#define VNIC_STF_ALL\t\t(VNIC_STF_FATAL_ERR |\\\n+\t\t\t\t VNIC_STF_STD_PAUSE |\\\n+\t\t\t\t VNIC_STF_PFC_PAUSE |\\\n+\t\t\t\t 0)\n+\n+struct vnic_devcmd_provinfo {\n+\tu8 oui[3];\n+\tu8 type;\n+\tu8 data[0];\n+};\n+\n+/*\n+ * These are used in flags field of different filters to denote\n+ * valid fields used.\n+ */\n+#define FILTER_FIELD_VALID(fld) (1 << (fld - 1))\n+\n+#define FILTER_FIELDS_USNIC (FILTER_FIELD_VALID(1) | \\\n+\t\t\t     FILTER_FIELD_VALID(2) | \\\n+\t\t\t     FILTER_FIELD_VALID(3) | \\\n+\t\t\t     FILTER_FIELD_VALID(4))\n+\n+#define FILTER_FIELDS_IPV4_5TUPLE (FILTER_FIELD_VALID(1) | \\\n+\t\t\t\t   FILTER_FIELD_VALID(2) | \\\n+\t\t\t\t   FILTER_FIELD_VALID(3) | \\\n+\t\t\t\t   FILTER_FIELD_VALID(4) | \\\n+\t\t\t\t   FILTER_FIELD_VALID(5))\n+\n+#define FILTER_FIELDS_MAC_VLAN (FILTER_FIELD_VALID(1) | \\\n+\t\t\t\tFILTER_FIELD_VALID(2))\n+\n+#define FILTER_FIELD_USNIC_VLAN    FILTER_FIELD_VALID(1)\n+#define FILTER_FIELD_USNIC_ETHTYPE FILTER_FIELD_VALID(2)\n+#define FILTER_FIELD_USNIC_PROTO   FILTER_FIELD_VALID(3)\n+#define FILTER_FIELD_USNIC_ID      FILTER_FIELD_VALID(4)\n+\n+struct filter_usnic_id {\n+\tu32 flags;\n+\tu16 vlan;\n+\tu16 ethtype;\n+\tu8 proto_version;\n+\tu32 usnic_id;\n+} __attribute__((packed));\n+\n+#define FILTER_FIELD_5TUP_PROTO  FILTER_FIELD_VALID(1)\n+#define FILTER_FIELD_5TUP_SRC_AD FILTER_FIELD_VALID(2)\n+#define FILTER_FIELD_5TUP_DST_AD FILTER_FIELD_VALID(3)\n+#define FILTER_FIELD_5TUP_SRC_PT FILTER_FIELD_VALID(4)\n+#define FILTER_FIELD_5TUP_DST_PT FILTER_FIELD_VALID(5)\n+\n+/* Enums for the protocol field. */\n+enum protocol_e {\n+\tPROTO_UDP = 0,\n+\tPROTO_TCP = 1,\n+};\n+\n+struct filter_ipv4_5tuple {\n+\tu32 flags;\n+\tu32 protocol;\n+\tu32 src_addr;\n+\tu32 dst_addr;\n+\tu16 src_port;\n+\tu16 dst_port;\n+} __attribute__((packed));\n+\n+#define FILTER_FIELD_VMQ_VLAN   FILTER_FIELD_VALID(1)\n+#define FILTER_FIELD_VMQ_MAC    FILTER_FIELD_VALID(2)\n+\n+struct filter_mac_vlan {\n+\tu32 flags;\n+\tu16 vlan;\n+\tu8 mac_addr[6];\n+} __attribute__((packed));\n+\n+/* Specifies the filter_action type. */\n+enum {\n+\tFILTER_ACTION_RQ_STEERING = 0,\n+\tFILTER_ACTION_MAX\n+};\n+\n+struct filter_action {\n+\tu32 type;\n+\tunion {\n+\t\tu32 rq_idx;\n+\t} u;\n+} __attribute__((packed));\n+\n+/* Specifies the filter type. */\n+enum filter_type {\n+\tFILTER_USNIC_ID = 0,\n+\tFILTER_IPV4_5TUPLE = 1,\n+\tFILTER_MAC_VLAN = 2,\n+\tFILTER_MAX\n+};\n+\n+struct filter {\n+\tu32 type;\n+\tunion {\n+\t\tstruct filter_usnic_id usnic;\n+\t\tstruct filter_ipv4_5tuple ipv4;\n+\t\tstruct filter_mac_vlan mac_vlan;\n+\t} u;\n+} __attribute__((packed));\n+\n+enum {\n+\tCLSF_TLV_FILTER = 0,\n+\tCLSF_TLV_ACTION = 1,\n+};\n+\n+#define FILTER_MAX_BUF_SIZE 100  /* Maximum size of buffer to CMD_ADD_FILTER */\n+\n+struct filter_tlv {\n+\tuint32_t type;\n+\tuint32_t length;\n+\tuint32_t val[0];\n+};\n+\n+enum {\n+\tCLSF_ADD = 0,\n+\tCLSF_DEL = 1,\n+};\n+\n+/*\n+ * Writing cmd register causes STAT_BUSY to get set in status register.\n+ * When cmd completes, STAT_BUSY will be cleared.\n+ *\n+ * If cmd completed successfully STAT_ERROR will be clear\n+ * and args registers contain cmd-specific results.\n+ *\n+ * If cmd error, STAT_ERROR will be set and args[0] contains error code.\n+ *\n+ * status register is read-only.  While STAT_BUSY is set,\n+ * all other register contents are read-only.\n+ */\n+\n+/* Make sizeof(vnic_devcmd) a power-of-2 for I/O BAR. */\n+#define VNIC_DEVCMD_NARGS 15\n+struct vnic_devcmd {\n+\tu32 status;\t\t\t/* RO */\n+\tu32 cmd;\t\t\t/* RW */\n+\tu64 args[VNIC_DEVCMD_NARGS];\t/* RW cmd args (little-endian) */\n+};\n+\n+/*\n+ * Version 2 of the interface.\n+ *\n+ * Some things are carried over, notably the vnic_devcmd_cmd enum.\n+ */\n+\n+/*\n+ * Flags for vnic_devcmd2.flags\n+ */\n+\n+#define DEVCMD2_FNORESULT       0x1     /* Don't copy result to host */\n+\n+#define VNIC_DEVCMD2_NARGS      VNIC_DEVCMD_NARGS\n+struct vnic_devcmd2 {\n+\tu16 pad;\n+\tu16 flags;\n+\tu32 cmd;                /* same command #defines as original */\n+\tu64 args[VNIC_DEVCMD2_NARGS];\n+};\n+\n+#define VNIC_DEVCMD2_NRESULTS   VNIC_DEVCMD_NARGS\n+struct devcmd2_result {\n+\tu64 results[VNIC_DEVCMD2_NRESULTS];\n+\tu32 pad;\n+\tu16 completed_index;    /* into copy WQ */\n+\tu8  error;              /* same error codes as original */\n+\tu8  color;              /* 0 or 1 as with completion queues */\n+};\n+\n+#define DEVCMD2_RING_SIZE   32\n+#define DEVCMD2_DESC_SIZE   128\n+\n+#define DEVCMD2_RESULTS_SIZE_MAX   ((1 << 16) - 1)\n+\n+/* Overlay related definitions */\n+\n+/*\n+ * This enum lists the flag associated with each of the overlay features\n+ */\n+typedef enum {\n+\tOVERLAY_FEATURE_NVGRE = 1,\n+\tOVERLAY_FEATURE_VXLAN,\n+\tOVERLAY_FEATURE_MAX,\n+} overlay_feature_t;\n+\n+#define OVERLAY_OFFLOAD_ENABLE 0\n+#define OVERLAY_OFFLOAD_DISABLE 1\n+\n+#define OVERLAY_CFG_VXLAN_PORT_UPDATE 0\n+#endif /* _VNIC_DEVCMD_H_ */\ndiff --git a/drivers/net/enic/vnic/vnic_enet.h b/drivers/net/enic/vnic/vnic_enet.h\nnew file mode 100644\nindex 0000000..9d3cc07\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_enet.h\n@@ -0,0 +1,78 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_enet.h 175806 2014-06-04 19:31:17Z rfaucett $\"\n+\n+#ifndef _VNIC_ENIC_H_\n+#define _VNIC_ENIC_H_\n+\n+/* Device-specific region: enet configuration */\n+struct vnic_enet_config {\n+\tu32 flags;\n+\tu32 wq_desc_count;\n+\tu32 rq_desc_count;\n+\tu16 mtu;\n+\tu16 intr_timer_deprecated;\n+\tu8 intr_timer_type;\n+\tu8 intr_mode;\n+\tchar devname[16];\n+\tu32 intr_timer_usec;\n+\tu16 loop_tag;\n+\tu16 vf_rq_count;\n+\tu16 num_arfs;\n+\tu64 mem_paddr;\n+};\n+\n+#define VENETF_TSO\t\t0x1\t/* TSO enabled */\n+#define VENETF_LRO\t\t0x2\t/* LRO enabled */\n+#define VENETF_RXCSUM\t\t0x4\t/* RX csum enabled */\n+#define VENETF_TXCSUM\t\t0x8\t/* TX csum enabled */\n+#define VENETF_RSS\t\t0x10\t/* RSS enabled */\n+#define VENETF_RSSHASH_IPV4\t0x20\t/* Hash on IPv4 fields */\n+#define VENETF_RSSHASH_TCPIPV4\t0x40\t/* Hash on TCP + IPv4 fields */\n+#define VENETF_RSSHASH_IPV6\t0x80\t/* Hash on IPv6 fields */\n+#define VENETF_RSSHASH_TCPIPV6\t0x100\t/* Hash on TCP + IPv6 fields */\n+#define VENETF_RSSHASH_IPV6_EX\t0x200\t/* Hash on IPv6 extended fields */\n+#define VENETF_RSSHASH_TCPIPV6_EX 0x400\t/* Hash on TCP + IPv6 ext. fields */\n+#define VENETF_LOOP\t\t0x800\t/* Loopback enabled */\n+#define VENETF_VMQ\t\t0x4000  /* using VMQ flag for VMware NETQ */\n+#define VENETF_VXLAN    0x10000 /* VxLAN offload */\n+#define VENETF_NVGRE    0x20000 /* NVGRE offload */\n+#define VENET_INTR_TYPE_MIN\t0\t/* Timer specs min interrupt spacing */\n+#define VENET_INTR_TYPE_IDLE\t1\t/* Timer specs idle time before irq */\n+\n+#define VENET_INTR_MODE_ANY\t0\t/* Try MSI-X, then MSI, then INTx */\n+#define VENET_INTR_MODE_MSI\t1\t/* Try MSI then INTx */\n+#define VENET_INTR_MODE_INTX\t2\t/* Try INTx only */\n+\n+#endif /* _VNIC_ENIC_H_ */\ndiff --git a/drivers/net/enic/vnic/vnic_intr.c b/drivers/net/enic/vnic/vnic_intr.c\nnew file mode 100644\nindex 0000000..84368af\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_intr.c\n@@ -0,0 +1,78 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_intr.c 171146 2014-05-02 07:08:20Z ssujith $\"\n+\n+#include \"vnic_dev.h\"\n+#include \"vnic_intr.h\"\n+\n+void vnic_intr_free(struct vnic_intr *intr)\n+{\n+\tintr->ctrl = NULL;\n+}\n+\n+int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,\n+\tunsigned int index)\n+{\n+\tintr->index = index;\n+\tintr->vdev = vdev;\n+\n+\tintr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index);\n+\tif (!intr->ctrl) {\n+\t\tpr_err(\"Failed to hook INTR[%d].ctrl resource\\n\", index);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer,\n+\tunsigned int coalescing_type, unsigned int mask_on_assertion)\n+{\n+\tvnic_intr_coalescing_timer_set(intr, coalescing_timer);\n+\tiowrite32(coalescing_type, &intr->ctrl->coalescing_type);\n+\tiowrite32(mask_on_assertion, &intr->ctrl->mask_on_assertion);\n+\tiowrite32(0, &intr->ctrl->int_credits);\n+}\n+\n+void vnic_intr_coalescing_timer_set(struct vnic_intr *intr,\n+\tu32 coalescing_timer)\n+{\n+\tiowrite32(vnic_dev_intr_coal_timer_usec_to_hw(intr->vdev,\n+\t\tcoalescing_timer), &intr->ctrl->coalescing_timer);\n+}\n+\n+void vnic_intr_clean(struct vnic_intr *intr)\n+{\n+\tiowrite32(0, &intr->ctrl->int_credits);\n+}\ndiff --git a/drivers/net/enic/vnic/vnic_intr.h b/drivers/net/enic/vnic/vnic_intr.h\nnew file mode 100644\nindex 0000000..ecb82bf\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_intr.h\n@@ -0,0 +1,126 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_intr.h 171146 2014-05-02 07:08:20Z ssujith $\"\n+\n+#ifndef _VNIC_INTR_H_\n+#define _VNIC_INTR_H_\n+\n+\n+#include \"vnic_dev.h\"\n+\n+#define VNIC_INTR_TIMER_TYPE_ABS\t0\n+#define VNIC_INTR_TIMER_TYPE_QUIET\t1\n+\n+/* Interrupt control */\n+struct vnic_intr_ctrl {\n+\tu32 coalescing_timer;\t\t/* 0x00 */\n+\tu32 pad0;\n+\tu32 coalescing_value;\t\t/* 0x08 */\n+\tu32 pad1;\n+\tu32 coalescing_type;\t\t/* 0x10 */\n+\tu32 pad2;\n+\tu32 mask_on_assertion;\t\t/* 0x18 */\n+\tu32 pad3;\n+\tu32 mask;\t\t\t/* 0x20 */\n+\tu32 pad4;\n+\tu32 int_credits;\t\t/* 0x28 */\n+\tu32 pad5;\n+\tu32 int_credit_return;\t\t/* 0x30 */\n+\tu32 pad6;\n+};\n+\n+struct vnic_intr {\n+\tunsigned int index;\n+\tstruct vnic_dev *vdev;\n+\tstruct vnic_intr_ctrl __iomem *ctrl;\t\t/* memory-mapped */\n+};\n+\n+static inline void vnic_intr_unmask(struct vnic_intr *intr)\n+{\n+\tiowrite32(0, &intr->ctrl->mask);\n+}\n+\n+static inline void vnic_intr_mask(struct vnic_intr *intr)\n+{\n+\tiowrite32(1, &intr->ctrl->mask);\n+}\n+\n+static inline int vnic_intr_masked(struct vnic_intr *intr)\n+{\n+\treturn ioread32(&intr->ctrl->mask);\n+}\n+\n+static inline void vnic_intr_return_credits(struct vnic_intr *intr,\n+\tunsigned int credits, int unmask, int reset_timer)\n+{\n+#define VNIC_INTR_UNMASK_SHIFT\t\t16\n+#define VNIC_INTR_RESET_TIMER_SHIFT\t17\n+\n+\tu32 int_credit_return = (credits & 0xffff) |\n+\t\t(unmask ? (1 << VNIC_INTR_UNMASK_SHIFT) : 0) |\n+\t\t(reset_timer ? (1 << VNIC_INTR_RESET_TIMER_SHIFT) : 0);\n+\n+\tiowrite32(int_credit_return, &intr->ctrl->int_credit_return);\n+}\n+\n+static inline unsigned int vnic_intr_credits(struct vnic_intr *intr)\n+{\n+\treturn ioread32(&intr->ctrl->int_credits);\n+}\n+\n+static inline void vnic_intr_return_all_credits(struct vnic_intr *intr)\n+{\n+\tunsigned int credits = vnic_intr_credits(intr);\n+\tint unmask = 1;\n+\tint reset_timer = 1;\n+\n+\tvnic_intr_return_credits(intr, credits, unmask, reset_timer);\n+}\n+\n+static inline u32 vnic_intr_legacy_pba(u32 __iomem *legacy_pba)\n+{\n+\t/* read PBA without clearing */\n+\treturn ioread32(legacy_pba);\n+}\n+\n+void vnic_intr_free(struct vnic_intr *intr);\n+int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,\n+\tunsigned int index);\n+void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer,\n+\tunsigned int coalescing_type, unsigned int mask_on_assertion);\n+void vnic_intr_coalescing_timer_set(struct vnic_intr *intr,\n+\tu32 coalescing_timer);\n+void vnic_intr_clean(struct vnic_intr *intr);\n+\n+#endif /* _VNIC_INTR_H_ */\ndiff --git a/drivers/net/enic/vnic/vnic_nic.h b/drivers/net/enic/vnic/vnic_nic.h\nnew file mode 100644\nindex 0000000..332cfb4\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_nic.h\n@@ -0,0 +1,88 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_nic.h 59839 2010-09-27 20:36:31Z roprabhu $\"\n+\n+#ifndef _VNIC_NIC_H_\n+#define _VNIC_NIC_H_\n+\n+#define NIC_CFG_RSS_DEFAULT_CPU_MASK_FIELD\t0xffUL\n+#define NIC_CFG_RSS_DEFAULT_CPU_SHIFT\t\t0\n+#define NIC_CFG_RSS_HASH_TYPE\t\t\t(0xffUL << 8)\n+#define NIC_CFG_RSS_HASH_TYPE_MASK_FIELD\t0xffUL\n+#define NIC_CFG_RSS_HASH_TYPE_SHIFT\t\t8\n+#define NIC_CFG_RSS_HASH_BITS\t\t\t(7UL << 16)\n+#define NIC_CFG_RSS_HASH_BITS_MASK_FIELD\t7UL\n+#define NIC_CFG_RSS_HASH_BITS_SHIFT\t\t16\n+#define NIC_CFG_RSS_BASE_CPU\t\t\t(7UL << 19)\n+#define NIC_CFG_RSS_BASE_CPU_MASK_FIELD\t\t7UL\n+#define NIC_CFG_RSS_BASE_CPU_SHIFT\t\t19\n+#define NIC_CFG_RSS_ENABLE\t\t\t(1UL << 22)\n+#define NIC_CFG_RSS_ENABLE_MASK_FIELD\t\t1UL\n+#define NIC_CFG_RSS_ENABLE_SHIFT\t\t22\n+#define NIC_CFG_TSO_IPID_SPLIT_EN\t\t(1UL << 23)\n+#define NIC_CFG_TSO_IPID_SPLIT_EN_MASK_FIELD\t1UL\n+#define NIC_CFG_TSO_IPID_SPLIT_EN_SHIFT\t\t23\n+#define NIC_CFG_IG_VLAN_STRIP_EN\t\t(1UL << 24)\n+#define NIC_CFG_IG_VLAN_STRIP_EN_MASK_FIELD\t1UL\n+#define NIC_CFG_IG_VLAN_STRIP_EN_SHIFT\t\t24\n+\n+#define NIC_CFG_RSS_HASH_TYPE_IPV4\t\t(1 << 1)\n+#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV4\t\t(1 << 2)\n+#define NIC_CFG_RSS_HASH_TYPE_IPV6\t\t(1 << 3)\n+#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV6\t\t(1 << 4)\n+#define NIC_CFG_RSS_HASH_TYPE_IPV6_EX\t\t(1 << 5)\n+#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX\t(1 << 6)\n+\n+static inline void vnic_set_nic_cfg(u32 *nic_cfg,\n+\tu8 rss_default_cpu, u8 rss_hash_type,\n+\tu8 rss_hash_bits, u8 rss_base_cpu,\n+\tu8 rss_enable, u8 tso_ipid_split_en,\n+\tu8 ig_vlan_strip_en)\n+{\n+\t*nic_cfg = (rss_default_cpu & NIC_CFG_RSS_DEFAULT_CPU_MASK_FIELD) |\n+\t\t((rss_hash_type & NIC_CFG_RSS_HASH_TYPE_MASK_FIELD)\n+\t\t\t<< NIC_CFG_RSS_HASH_TYPE_SHIFT) |\n+\t\t((rss_hash_bits & NIC_CFG_RSS_HASH_BITS_MASK_FIELD)\n+\t\t\t<< NIC_CFG_RSS_HASH_BITS_SHIFT) |\n+\t\t((rss_base_cpu & NIC_CFG_RSS_BASE_CPU_MASK_FIELD)\n+\t\t\t<< NIC_CFG_RSS_BASE_CPU_SHIFT) |\n+\t\t((rss_enable & NIC_CFG_RSS_ENABLE_MASK_FIELD)\n+\t\t\t<< NIC_CFG_RSS_ENABLE_SHIFT) |\n+\t\t((tso_ipid_split_en & NIC_CFG_TSO_IPID_SPLIT_EN_MASK_FIELD)\n+\t\t\t<< NIC_CFG_TSO_IPID_SPLIT_EN_SHIFT) |\n+\t\t((ig_vlan_strip_en & NIC_CFG_IG_VLAN_STRIP_EN_MASK_FIELD)\n+\t\t\t<< NIC_CFG_IG_VLAN_STRIP_EN_SHIFT);\n+}\n+\n+#endif /* _VNIC_NIC_H_ */\ndiff --git a/drivers/net/enic/vnic/vnic_resource.h b/drivers/net/enic/vnic/vnic_resource.h\nnew file mode 100644\nindex 0000000..2512712\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_resource.h\n@@ -0,0 +1,97 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_resource.h 196958 2014-11-04 18:23:37Z xuywang $\"\n+\n+#ifndef _VNIC_RESOURCE_H_\n+#define _VNIC_RESOURCE_H_\n+\n+#define VNIC_RES_MAGIC\t\t0x766E6963L\t/* 'vnic' */\n+#define VNIC_RES_VERSION\t0x00000000L\n+#define MGMTVNIC_MAGIC\t\t0x544d474dL\t/* 'MGMT' */\n+#define MGMTVNIC_VERSION\t0x00000000L\n+\n+/* The MAC address assigned to the CFG vNIC is fixed. */\n+#define MGMTVNIC_MAC\t\t{ 0x02, 0x00, 0x54, 0x4d, 0x47, 0x4d }\n+\n+/* vNIC resource types */\n+enum vnic_res_type {\n+\tRES_TYPE_EOL,\t\t\t/* End-of-list */\n+\tRES_TYPE_WQ,\t\t\t/* Work queues */\n+\tRES_TYPE_RQ,\t\t\t/* Receive queues */\n+\tRES_TYPE_CQ,\t\t\t/* Completion queues */\n+\tRES_TYPE_MEM,\t\t\t/* Window to dev memory */\n+\tRES_TYPE_NIC_CFG,\t\t/* Enet NIC config registers */\n+\tRES_TYPE_RSS_KEY,\t\t/* Enet RSS secret key */\n+\tRES_TYPE_RSS_CPU,\t\t/* Enet RSS indirection table */\n+\tRES_TYPE_TX_STATS,\t\t/* Netblock Tx statistic regs */\n+\tRES_TYPE_RX_STATS,\t\t/* Netblock Rx statistic regs */\n+\tRES_TYPE_INTR_CTRL,\t\t/* Interrupt ctrl table */\n+\tRES_TYPE_INTR_TABLE,\t\t/* MSI/MSI-X Interrupt table */\n+\tRES_TYPE_INTR_PBA,\t\t/* MSI/MSI-X PBA table */\n+\tRES_TYPE_INTR_PBA_LEGACY,\t/* Legacy intr status */\n+\tRES_TYPE_DEBUG,\t\t\t/* Debug-only info */\n+\tRES_TYPE_DEV,\t\t\t/* Device-specific region */\n+\tRES_TYPE_DEVCMD,\t\t/* Device command region */\n+\tRES_TYPE_PASS_THRU_PAGE,\t/* Pass-thru page */\n+\tRES_TYPE_SUBVNIC,               /* subvnic resource type */\n+\tRES_TYPE_MQ_WQ,                 /* MQ Work queues */\n+\tRES_TYPE_MQ_RQ,                 /* MQ Receive queues */\n+\tRES_TYPE_MQ_CQ,                 /* MQ Completion queues */\n+\tRES_TYPE_DEPRECATED1,           /* Old version of devcmd 2 */\n+\tRES_TYPE_DEVCMD2,               /* Device control region */\n+\tRES_TYPE_MAX,\t\t\t/* Count of resource types */\n+};\n+\n+struct vnic_resource_header {\n+\tu32 magic;\n+\tu32 version;\n+};\n+\n+struct mgmt_barmap_hdr {\n+\tu32 magic;\t\t\t/* magic number */\n+\tu32 version;\t\t\t/* header format version */\n+\tu16 lif;\t\t\t/* loopback lif for mgmt frames */\n+\tu16 pci_slot;\t\t\t/* installed pci slot */\n+\tchar serial[16];\t\t/* card serial number */\n+};\n+\n+struct vnic_resource {\n+\tu8 type;\n+\tu8 bar;\n+\tu8 pad[2];\n+\tu32 bar_offset;\n+\tu32 count;\n+};\n+\n+#endif /* _VNIC_RESOURCE_H_ */\ndiff --git a/drivers/net/enic/vnic/vnic_rq.c b/drivers/net/enic/vnic/vnic_rq.c\nnew file mode 100644\nindex 0000000..3a4b65a\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_rq.c\n@@ -0,0 +1,245 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_rq.c 171146 2014-05-02 07:08:20Z ssujith $\"\n+\n+#include \"vnic_dev.h\"\n+#include \"vnic_rq.h\"\n+\n+static int vnic_rq_alloc_bufs(struct vnic_rq *rq)\n+{\n+\tstruct vnic_rq_buf *buf;\n+\tunsigned int i, j, count = rq->ring.desc_count;\n+\tunsigned int blks = VNIC_RQ_BUF_BLKS_NEEDED(count);\n+\n+\tfor (i = 0; i < blks; i++) {\n+\t\trq->bufs[i] = kzalloc(VNIC_RQ_BUF_BLK_SZ(count), GFP_ATOMIC);\n+\t\tif (!rq->bufs[i])\n+\t\t\treturn -ENOMEM;\n+\t}\n+\n+\tfor (i = 0; i < blks; i++) {\n+\t\tbuf = rq->bufs[i];\n+\t\tfor (j = 0; j < VNIC_RQ_BUF_BLK_ENTRIES(count); j++) {\n+\t\t\tbuf->index = i * VNIC_RQ_BUF_BLK_ENTRIES(count) + j;\n+\t\t\tbuf->desc = (u8 *)rq->ring.descs +\n+\t\t\t\trq->ring.desc_size * buf->index;\n+\t\t\tif (buf->index + 1 == count) {\n+\t\t\t\tbuf->next = rq->bufs[0];\n+\t\t\t\tbreak;\n+\t\t\t} else if (j + 1 == VNIC_RQ_BUF_BLK_ENTRIES(count)) {\n+\t\t\t\tbuf->next = rq->bufs[i + 1];\n+\t\t\t} else {\n+\t\t\t\tbuf->next = buf + 1;\n+\t\t\t\tbuf++;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\trq->to_use = rq->to_clean = rq->bufs[0];\n+\n+\treturn 0;\n+}\n+\n+int vnic_rq_mem_size(struct vnic_rq *rq, unsigned int desc_count,\n+\tunsigned int desc_size)\n+{\n+\tint mem_size = 0;\n+\n+\tmem_size += vnic_dev_desc_ring_size(&rq->ring, desc_count, desc_size);\n+\n+\tmem_size += VNIC_RQ_BUF_BLKS_NEEDED(rq->ring.desc_count) *\n+\t\tVNIC_RQ_BUF_BLK_SZ(rq->ring.desc_count);\n+\n+\treturn mem_size;\n+}\n+\n+void vnic_rq_free(struct vnic_rq *rq)\n+{\n+\tstruct vnic_dev *vdev;\n+\tunsigned int i;\n+\n+\tvdev = rq->vdev;\n+\n+\tvnic_dev_free_desc_ring(vdev, &rq->ring);\n+\n+\tfor (i = 0; i < VNIC_RQ_BUF_BLKS_MAX; i++) {\n+\t\tif (rq->bufs[i]) {\n+\t\t\tkfree(rq->bufs[i]);\n+\t\t\trq->bufs[i] = NULL;\n+\t\t}\n+\t}\n+\n+\trq->ctrl = NULL;\n+}\n+\n+int vnic_rq_alloc(struct vnic_dev *vdev, struct vnic_rq *rq, unsigned int index,\n+\tunsigned int desc_count, unsigned int desc_size)\n+{\n+\tint err;\n+\tchar res_name[NAME_MAX];\n+\tstatic int instance;\n+\n+\trq->index = index;\n+\trq->vdev = vdev;\n+\n+\trq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_RQ, index);\n+\tif (!rq->ctrl) {\n+\t\tpr_err(\"Failed to hook RQ[%d] resource\\n\", index);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tvnic_rq_disable(rq);\n+\n+\tsnprintf(res_name, sizeof(res_name), \"%d-rq-%d\", instance++, index);\n+\terr = vnic_dev_alloc_desc_ring(vdev, &rq->ring, desc_count, desc_size,\n+\t\trq->socket_id, res_name);\n+\tif (err)\n+\t\treturn err;\n+\n+\terr = vnic_rq_alloc_bufs(rq);\n+\tif (err) {\n+\t\tvnic_rq_free(rq);\n+\t\treturn err;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+void vnic_rq_init_start(struct vnic_rq *rq, unsigned int cq_index,\n+\tunsigned int fetch_index, unsigned int posted_index,\n+\tunsigned int error_interrupt_enable,\n+\tunsigned int error_interrupt_offset)\n+{\n+\tu64 paddr;\n+\tunsigned int count = rq->ring.desc_count;\n+\n+\tpaddr = (u64)rq->ring.base_addr | VNIC_PADDR_TARGET;\n+\twriteq(paddr, &rq->ctrl->ring_base);\n+\tiowrite32(count, &rq->ctrl->ring_size);\n+\tiowrite32(cq_index, &rq->ctrl->cq_index);\n+\tiowrite32(error_interrupt_enable, &rq->ctrl->error_interrupt_enable);\n+\tiowrite32(error_interrupt_offset, &rq->ctrl->error_interrupt_offset);\n+\tiowrite32(0, &rq->ctrl->dropped_packet_count);\n+\tiowrite32(0, &rq->ctrl->error_status);\n+\tiowrite32(fetch_index, &rq->ctrl->fetch_index);\n+\tiowrite32(posted_index, &rq->ctrl->posted_index);\n+\n+\trq->to_use = rq->to_clean =\n+\t\t&rq->bufs[fetch_index / VNIC_RQ_BUF_BLK_ENTRIES(count)]\n+\t\t\t[fetch_index % VNIC_RQ_BUF_BLK_ENTRIES(count)];\n+}\n+\n+void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,\n+\tunsigned int error_interrupt_enable,\n+\tunsigned int error_interrupt_offset)\n+{\n+\tu32 fetch_index = 0;\n+\t/* Use current fetch_index as the ring starting point */\n+\tfetch_index = ioread32(&rq->ctrl->fetch_index);\n+\n+\tif (fetch_index == 0xFFFFFFFF) { /* check for hardware gone  */\n+\t\t/* Hardware surprise removal: reset fetch_index */\n+\t\tfetch_index = 0;\n+\t}\n+\n+\tvnic_rq_init_start(rq, cq_index,\n+\t\tfetch_index, fetch_index,\n+\t\terror_interrupt_enable,\n+\t\terror_interrupt_offset);\n+}\n+\n+void vnic_rq_error_out(struct vnic_rq *rq, unsigned int error)\n+{\n+\tiowrite32(error, &rq->ctrl->error_status);\n+}\n+\n+unsigned int vnic_rq_error_status(struct vnic_rq *rq)\n+{\n+\treturn ioread32(&rq->ctrl->error_status);\n+}\n+\n+void vnic_rq_enable(struct vnic_rq *rq)\n+{\n+\tiowrite32(1, &rq->ctrl->enable);\n+}\n+\n+int vnic_rq_disable(struct vnic_rq *rq)\n+{\n+\tunsigned int wait;\n+\n+\tiowrite32(0, &rq->ctrl->enable);\n+\n+\t/* Wait for HW to ACK disable request */\n+\tfor (wait = 0; wait < 1000; wait++) {\n+\t\tif (!(ioread32(&rq->ctrl->running)))\n+\t\t\treturn 0;\n+\t\tudelay(10);\n+\t}\n+\n+\tpr_err(\"Failed to disable RQ[%d]\\n\", rq->index);\n+\n+\treturn -ETIMEDOUT;\n+}\n+\n+void vnic_rq_clean(struct vnic_rq *rq,\n+\tvoid (*buf_clean)(struct vnic_rq *rq, struct vnic_rq_buf *buf))\n+{\n+\tstruct vnic_rq_buf *buf;\n+\tu32 fetch_index;\n+\tunsigned int count = rq->ring.desc_count;\n+\n+\tbuf = rq->to_clean;\n+\n+\twhile (vnic_rq_desc_used(rq) > 0) {\n+\n+\t\t(*buf_clean)(rq, buf);\n+\n+\t\tbuf = rq->to_clean = buf->next;\n+\t\trq->ring.desc_avail++;\n+\t}\n+\n+\t/* Use current fetch_index as the ring starting point */\n+\tfetch_index = ioread32(&rq->ctrl->fetch_index);\n+\n+\tif (fetch_index == 0xFFFFFFFF) { /* check for hardware gone  */\n+\t\t/* Hardware surprise removal: reset fetch_index */\n+\t\tfetch_index = 0;\n+\t}\n+\trq->to_use = rq->to_clean =\n+\t\t&rq->bufs[fetch_index / VNIC_RQ_BUF_BLK_ENTRIES(count)]\n+\t\t\t[fetch_index % VNIC_RQ_BUF_BLK_ENTRIES(count)];\n+\tiowrite32(fetch_index, &rq->ctrl->posted_index);\n+\n+\tvnic_dev_clear_desc_ring(&rq->ring);\n+}\ndiff --git a/drivers/net/enic/vnic/vnic_rq.h b/drivers/net/enic/vnic/vnic_rq.h\nnew file mode 100644\nindex 0000000..54b6612\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_rq.h\n@@ -0,0 +1,282 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_rq.h 180262 2014-07-02 07:57:43Z gvaradar $\"\n+\n+#ifndef _VNIC_RQ_H_\n+#define _VNIC_RQ_H_\n+\n+\n+#include \"vnic_dev.h\"\n+#include \"vnic_cq.h\"\n+\n+/* Receive queue control */\n+struct vnic_rq_ctrl {\n+\tu64 ring_base;\t\t\t/* 0x00 */\n+\tu32 ring_size;\t\t\t/* 0x08 */\n+\tu32 pad0;\n+\tu32 posted_index;\t\t/* 0x10 */\n+\tu32 pad1;\n+\tu32 cq_index;\t\t\t/* 0x18 */\n+\tu32 pad2;\n+\tu32 enable;\t\t\t/* 0x20 */\n+\tu32 pad3;\n+\tu32 running;\t\t\t/* 0x28 */\n+\tu32 pad4;\n+\tu32 fetch_index;\t\t/* 0x30 */\n+\tu32 pad5;\n+\tu32 error_interrupt_enable;\t/* 0x38 */\n+\tu32 pad6;\n+\tu32 error_interrupt_offset;\t/* 0x40 */\n+\tu32 pad7;\n+\tu32 error_status;\t\t/* 0x48 */\n+\tu32 pad8;\n+\tu32 dropped_packet_count;\t/* 0x50 */\n+\tu32 pad9;\n+\tu32 dropped_packet_count_rc;\t/* 0x58 */\n+\tu32 pad10;\n+};\n+\n+/* Break the vnic_rq_buf allocations into blocks of 32/64 entries */\n+#define VNIC_RQ_BUF_MIN_BLK_ENTRIES 32\n+#define VNIC_RQ_BUF_DFLT_BLK_ENTRIES 64\n+#define VNIC_RQ_BUF_BLK_ENTRIES(entries) \\\n+\t((unsigned int)((entries < VNIC_RQ_BUF_DFLT_BLK_ENTRIES) ? \\\n+\tVNIC_RQ_BUF_MIN_BLK_ENTRIES : VNIC_RQ_BUF_DFLT_BLK_ENTRIES))\n+#define VNIC_RQ_BUF_BLK_SZ(entries) \\\n+\t(VNIC_RQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_rq_buf))\n+#define VNIC_RQ_BUF_BLKS_NEEDED(entries) \\\n+\tDIV_ROUND_UP(entries, VNIC_RQ_BUF_BLK_ENTRIES(entries))\n+#define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(4096)\n+\n+struct vnic_rq_buf {\n+\tstruct vnic_rq_buf *next;\n+\tdma_addr_t dma_addr;\n+\tvoid *os_buf;\n+\tunsigned int os_buf_index;\n+\tunsigned int len;\n+\tunsigned int index;\n+\tvoid *desc;\n+\tuint64_t wr_id;\n+};\n+\n+struct vnic_rq {\n+\tunsigned int index;\n+\tstruct vnic_dev *vdev;\n+\tstruct vnic_rq_ctrl __iomem *ctrl;              /* memory-mapped */\n+\tstruct vnic_dev_ring ring;\n+\tstruct vnic_rq_buf *bufs[VNIC_RQ_BUF_BLKS_MAX];\n+\tstruct vnic_rq_buf *to_use;\n+\tstruct vnic_rq_buf *to_clean;\n+\tvoid *os_buf_head;\n+\tunsigned int pkts_outstanding;\n+\n+\tunsigned int socket_id;\n+\tstruct rte_mempool *mp;\n+};\n+\n+static inline unsigned int vnic_rq_desc_avail(struct vnic_rq *rq)\n+{\n+\t/* how many does SW own? */\n+\treturn rq->ring.desc_avail;\n+}\n+\n+static inline unsigned int vnic_rq_desc_used(struct vnic_rq *rq)\n+{\n+\t/* how many does HW own? */\n+\treturn rq->ring.desc_count - rq->ring.desc_avail - 1;\n+}\n+\n+static inline void *vnic_rq_next_desc(struct vnic_rq *rq)\n+{\n+\treturn rq->to_use->desc;\n+}\n+\n+static inline unsigned int vnic_rq_next_index(struct vnic_rq *rq)\n+{\n+\treturn rq->to_use->index;\n+}\n+\n+static inline void vnic_rq_post(struct vnic_rq *rq,\n+\tvoid *os_buf, unsigned int os_buf_index,\n+\tdma_addr_t dma_addr, unsigned int len,\n+\tuint64_t wrid)\n+{\n+\tstruct vnic_rq_buf *buf = rq->to_use;\n+\n+\tbuf->os_buf = os_buf;\n+\tbuf->os_buf_index = os_buf_index;\n+\tbuf->dma_addr = dma_addr;\n+\tbuf->len = len;\n+\tbuf->wr_id = wrid;\n+\n+\tbuf = buf->next;\n+\trq->to_use = buf;\n+\trq->ring.desc_avail--;\n+\n+\t/* Move the posted_index every nth descriptor\n+\t */\n+\n+#ifndef VNIC_RQ_RETURN_RATE\n+#define VNIC_RQ_RETURN_RATE\t\t0xf\t/* keep 2^n - 1 */\n+#endif\n+\n+\tif ((buf->index & VNIC_RQ_RETURN_RATE) == 0) {\n+\t\t/* Adding write memory barrier prevents compiler and/or CPU\n+\t\t * reordering, thus avoiding descriptor posting before\n+\t\t * descriptor is initialized. Otherwise, hardware can read\n+\t\t * stale descriptor fields.\n+\t\t */\n+\t\twmb();\n+\t\tiowrite32(buf->index, &rq->ctrl->posted_index);\n+\t}\n+}\n+\n+static inline void vnic_rq_post_commit(struct vnic_rq *rq,\n+\tvoid *os_buf, unsigned int os_buf_index,\n+\tdma_addr_t dma_addr, unsigned int len)\n+{\n+\tstruct vnic_rq_buf *buf = rq->to_use;\n+\n+\tbuf->os_buf = os_buf;\n+\tbuf->os_buf_index = os_buf_index;\n+\tbuf->dma_addr = dma_addr;\n+\tbuf->len = len;\n+\n+\tbuf = buf->next;\n+\trq->to_use = buf;\n+\trq->ring.desc_avail--;\n+\n+\t/* Move the posted_index every descriptor\n+\t */\n+\n+\t/* Adding write memory barrier prevents compiler and/or CPU\n+\t * reordering, thus avoiding descriptor posting before\n+\t * descriptor is initialized. Otherwise, hardware can read\n+\t * stale descriptor fields.\n+\t */\n+\twmb();\n+\tiowrite32(buf->index, &rq->ctrl->posted_index);\n+}\n+\n+static inline void vnic_rq_return_descs(struct vnic_rq *rq, unsigned int count)\n+{\n+\trq->ring.desc_avail += count;\n+}\n+\n+enum desc_return_options {\n+\tVNIC_RQ_RETURN_DESC,\n+\tVNIC_RQ_DEFER_RETURN_DESC,\n+};\n+\n+static inline int vnic_rq_service(struct vnic_rq *rq,\n+\tstruct cq_desc *cq_desc, u16 completed_index,\n+\tint desc_return, int (*buf_service)(struct vnic_rq *rq,\n+\tstruct cq_desc *cq_desc, struct vnic_rq_buf *buf,\n+\tint skipped, void *opaque), void *opaque)\n+{\n+\tstruct vnic_rq_buf *buf;\n+\tint skipped;\n+\tint eop = 0;\n+\n+\tbuf = rq->to_clean;\n+\twhile (1) {\n+\n+\t\tskipped = (buf->index != completed_index);\n+\n+\t\tif ((*buf_service)(rq, cq_desc, buf, skipped, opaque))\n+\t\t\teop++;\n+\n+\t\tif (desc_return == VNIC_RQ_RETURN_DESC)\n+\t\t\trq->ring.desc_avail++;\n+\n+\t\trq->to_clean = buf->next;\n+\n+\t\tif (!skipped)\n+\t\t\tbreak;\n+\n+\t\tbuf = rq->to_clean;\n+\t}\n+\treturn eop;\n+}\n+\n+static inline int vnic_rq_fill(struct vnic_rq *rq,\n+\tint (*buf_fill)(struct vnic_rq *rq))\n+{\n+\tint err;\n+\n+\twhile (vnic_rq_desc_avail(rq) > 0) {\n+\n+\t\terr = (*buf_fill)(rq);\n+\t\tif (err)\n+\t\t\treturn err;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static inline int vnic_rq_fill_count(struct vnic_rq *rq,\n+\tint (*buf_fill)(struct vnic_rq *rq), unsigned int count)\n+{\n+\tint err;\n+\n+\twhile ((vnic_rq_desc_avail(rq) > 0) && (count--)) {\n+\n+\t\terr = (*buf_fill)(rq);\n+\t\tif (err)\n+\t\t\treturn err;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+void vnic_rq_free(struct vnic_rq *rq);\n+int vnic_rq_alloc(struct vnic_dev *vdev, struct vnic_rq *rq, unsigned int index,\n+\tunsigned int desc_count, unsigned int desc_size);\n+void vnic_rq_init_start(struct vnic_rq *rq, unsigned int cq_index,\n+\tunsigned int fetch_index, unsigned int posted_index,\n+\tunsigned int error_interrupt_enable,\n+\tunsigned int error_interrupt_offset);\n+void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,\n+\tunsigned int error_interrupt_enable,\n+\tunsigned int error_interrupt_offset);\n+void vnic_rq_error_out(struct vnic_rq *rq, unsigned int error);\n+unsigned int vnic_rq_error_status(struct vnic_rq *rq);\n+void vnic_rq_enable(struct vnic_rq *rq);\n+int vnic_rq_disable(struct vnic_rq *rq);\n+void vnic_rq_clean(struct vnic_rq *rq,\n+\tvoid (*buf_clean)(struct vnic_rq *rq, struct vnic_rq_buf *buf));\n+int vnic_rq_mem_size(struct vnic_rq *rq, unsigned int desc_count,\n+\tunsigned int desc_size);\n+\n+#endif /* _VNIC_RQ_H_ */\ndiff --git a/drivers/net/enic/vnic/vnic_rss.c b/drivers/net/enic/vnic/vnic_rss.c\nnew file mode 100644\nindex 0000000..5ff76b1\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_rss.c\n@@ -0,0 +1,85 @@\n+/*\n+ * Copyright 2008 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id$\"\n+\n+#include \"enic_compat.h\"\n+#include \"vnic_rss.h\"\n+\n+void vnic_set_rss_key(union vnic_rss_key *rss_key, u8 *key)\n+{\n+\tu32 i;\n+\tu32 *p;\n+\tu16 *q;\n+\n+\tfor (i = 0; i < 4; ++i) {\n+\t\tp = (u32 *)(key + (10 * i));\n+\t\tiowrite32(*p++, &rss_key->key[i].b[0]);\n+\t\tiowrite32(*p++, &rss_key->key[i].b[4]);\n+\t\tq = (u16 *)p;\n+\t\tiowrite32(*q, &rss_key->key[i].b[8]);\n+\t}\n+}\n+\n+void vnic_set_rss_cpu(union vnic_rss_cpu *rss_cpu, u8 *cpu)\n+{\n+\tu32 i;\n+\tu32 *p = (u32 *)cpu;\n+\n+\tfor (i = 0; i < 32; ++i)\n+\t\tiowrite32(*p++, &rss_cpu->cpu[i].b[0]);\n+}\n+\n+void vnic_get_rss_key(union vnic_rss_key *rss_key, u8 *key)\n+{\n+\tu32 i;\n+\tu32 *p;\n+\tu16 *q;\n+\n+\tfor (i = 0; i < 4; ++i) {\n+\t\tp = (u32 *)(key + (10 * i));\n+\t\t*p++ = ioread32(&rss_key->key[i].b[0]);\n+\t\t*p++ = ioread32(&rss_key->key[i].b[4]);\n+\t\tq = (u16 *)p;\n+\t\t*q = (u16)ioread32(&rss_key->key[i].b[8]);\n+\t}\n+}\n+\n+void vnic_get_rss_cpu(union vnic_rss_cpu *rss_cpu, u8 *cpu)\n+{\n+\tu32 i;\n+\tu32 *p = (u32 *)cpu;\n+\n+\tfor (i = 0; i < 32; ++i)\n+\t\t*p++ = ioread32(&rss_cpu->cpu[i].b[0]);\n+}\ndiff --git a/drivers/net/enic/vnic/vnic_rss.h b/drivers/net/enic/vnic/vnic_rss.h\nnew file mode 100644\nindex 0000000..45ed3d2\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_rss.h\n@@ -0,0 +1,61 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ */\n+#ident \"$Id: vnic_rss.h 64224 2010-11-09 19:43:13Z vkolluri $\"\n+\n+#ifndef _VNIC_RSS_H_\n+#define _VNIC_RSS_H_\n+\n+/* RSS key array */\n+union vnic_rss_key {\n+\tstruct {\n+\t\tu8 b[10];\n+\t\tu8 b_pad[6];\n+\t} key[4];\n+\tu64 raw[8];\n+};\n+\n+/* RSS cpu array */\n+union vnic_rss_cpu {\n+\tstruct {\n+\t\tu8 b[4];\n+\t\tu8 b_pad[4];\n+\t} cpu[32];\n+\tu64 raw[32];\n+};\n+\n+void vnic_set_rss_key(union vnic_rss_key *rss_key, u8 *key);\n+void vnic_set_rss_cpu(union vnic_rss_cpu *rss_cpu, u8 *cpu);\n+void vnic_get_rss_key(union vnic_rss_key *rss_key, u8 *key);\n+void vnic_get_rss_cpu(union vnic_rss_cpu *rss_cpu, u8 *cpu);\n+\n+#endif /* _VNIC_RSS_H_ */\ndiff --git a/drivers/net/enic/vnic/vnic_stats.h b/drivers/net/enic/vnic/vnic_stats.h\nnew file mode 100644\nindex 0000000..ac5aa72\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_stats.h\n@@ -0,0 +1,86 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_stats.h 84040 2011-08-09 23:38:43Z dwang2 $\"\n+\n+#ifndef _VNIC_STATS_H_\n+#define _VNIC_STATS_H_\n+\n+/* Tx statistics */\n+struct vnic_tx_stats {\n+\tu64 tx_frames_ok;\n+\tu64 tx_unicast_frames_ok;\n+\tu64 tx_multicast_frames_ok;\n+\tu64 tx_broadcast_frames_ok;\n+\tu64 tx_bytes_ok;\n+\tu64 tx_unicast_bytes_ok;\n+\tu64 tx_multicast_bytes_ok;\n+\tu64 tx_broadcast_bytes_ok;\n+\tu64 tx_drops;\n+\tu64 tx_errors;\n+\tu64 tx_tso;\n+\tu64 rsvd[16];\n+};\n+\n+/* Rx statistics */\n+struct vnic_rx_stats {\n+\tu64 rx_frames_ok;\n+\tu64 rx_frames_total;\n+\tu64 rx_unicast_frames_ok;\n+\tu64 rx_multicast_frames_ok;\n+\tu64 rx_broadcast_frames_ok;\n+\tu64 rx_bytes_ok;\n+\tu64 rx_unicast_bytes_ok;\n+\tu64 rx_multicast_bytes_ok;\n+\tu64 rx_broadcast_bytes_ok;\n+\tu64 rx_drop;\n+\tu64 rx_no_bufs;\n+\tu64 rx_errors;\n+\tu64 rx_rss;\n+\tu64 rx_crc_errors;\n+\tu64 rx_frames_64;\n+\tu64 rx_frames_127;\n+\tu64 rx_frames_255;\n+\tu64 rx_frames_511;\n+\tu64 rx_frames_1023;\n+\tu64 rx_frames_1518;\n+\tu64 rx_frames_to_max;\n+\tu64 rsvd[16];\n+};\n+\n+struct vnic_stats {\n+\tstruct vnic_tx_stats tx;\n+\tstruct vnic_rx_stats rx;\n+};\n+\n+#endif /* _VNIC_STATS_H_ */\ndiff --git a/drivers/net/enic/vnic/vnic_wq.c b/drivers/net/enic/vnic/vnic_wq.c\nnew file mode 100644\nindex 0000000..e52cef0\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_wq.c\n@@ -0,0 +1,245 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_wq.c 183023 2014-07-22 23:47:25Z xuywang $\"\n+\n+#include \"vnic_dev.h\"\n+#include \"vnic_wq.h\"\n+\n+static inline\n+int vnic_wq_get_ctrl(struct vnic_dev *vdev, struct vnic_wq *wq,\n+\t\t\t\tunsigned int index, enum vnic_res_type res_type)\n+{\n+\twq->ctrl = vnic_dev_get_res(vdev, res_type, index);\n+\tif (!wq->ctrl)\n+\t\treturn -EINVAL;\n+\treturn 0;\n+}\n+\n+static inline\n+int vnic_wq_alloc_ring(struct vnic_dev *vdev, struct vnic_wq *wq,\n+\t\t\t\tunsigned int desc_count, unsigned int desc_size)\n+{\n+\tchar res_name[NAME_MAX];\n+\tstatic int instance;\n+\n+\tsnprintf(res_name, sizeof(res_name), \"%d-wq-%d\", instance++, wq->index);\n+\treturn vnic_dev_alloc_desc_ring(vdev, &wq->ring, desc_count, desc_size,\n+\t\twq->socket_id, res_name);\n+}\n+\n+static int vnic_wq_alloc_bufs(struct vnic_wq *wq)\n+{\n+\tstruct vnic_wq_buf *buf;\n+\tunsigned int i, j, count = wq->ring.desc_count;\n+\tunsigned int blks = VNIC_WQ_BUF_BLKS_NEEDED(count);\n+\n+\tfor (i = 0; i < blks; i++) {\n+\t\twq->bufs[i] = kzalloc(VNIC_WQ_BUF_BLK_SZ(count), GFP_ATOMIC);\n+\t\tif (!wq->bufs[i])\n+\t\t\treturn -ENOMEM;\n+\t}\n+\n+\tfor (i = 0; i < blks; i++) {\n+\t\tbuf = wq->bufs[i];\n+\t\tfor (j = 0; j < VNIC_WQ_BUF_BLK_ENTRIES(count); j++) {\n+\t\t\tbuf->index = i * VNIC_WQ_BUF_BLK_ENTRIES(count) + j;\n+\t\t\tbuf->desc = (u8 *)wq->ring.descs +\n+\t\t\t\twq->ring.desc_size * buf->index;\n+\t\t\tif (buf->index + 1 == count) {\n+\t\t\t\tbuf->next = wq->bufs[0];\n+\t\t\t\tbreak;\n+\t\t\t} else if (j + 1 == VNIC_WQ_BUF_BLK_ENTRIES(count)) {\n+\t\t\t\tbuf->next = wq->bufs[i + 1];\n+\t\t\t} else {\n+\t\t\t\tbuf->next = buf + 1;\n+\t\t\t\tbuf++;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\twq->to_use = wq->to_clean = wq->bufs[0];\n+\n+\treturn 0;\n+}\n+\n+void vnic_wq_free(struct vnic_wq *wq)\n+{\n+\tstruct vnic_dev *vdev;\n+\tunsigned int i;\n+\n+\tvdev = wq->vdev;\n+\n+\tvnic_dev_free_desc_ring(vdev, &wq->ring);\n+\n+\tfor (i = 0; i < VNIC_WQ_BUF_BLKS_MAX; i++) {\n+\t\tif (wq->bufs[i]) {\n+\t\t\tkfree(wq->bufs[i]);\n+\t\t\twq->bufs[i] = NULL;\n+\t\t}\n+\t}\n+\n+\twq->ctrl = NULL;\n+}\n+\n+int vnic_wq_mem_size(struct vnic_wq *wq, unsigned int desc_count,\n+\tunsigned int desc_size)\n+{\n+\tint mem_size = 0;\n+\n+\tmem_size += vnic_dev_desc_ring_size(&wq->ring, desc_count, desc_size);\n+\n+\tmem_size += VNIC_WQ_BUF_BLKS_NEEDED(wq->ring.desc_count) *\n+\t\tVNIC_WQ_BUF_BLK_SZ(wq->ring.desc_count);\n+\n+\treturn mem_size;\n+}\n+\n+\n+int vnic_wq_alloc(struct vnic_dev *vdev, struct vnic_wq *wq, unsigned int index,\n+\tunsigned int desc_count, unsigned int desc_size)\n+{\n+\tint err;\n+\n+\twq->index = index;\n+\twq->vdev = vdev;\n+\n+\terr = vnic_wq_get_ctrl(vdev, wq, index, RES_TYPE_WQ);\n+\tif (err) {\n+\t\tpr_err(\"Failed to hook WQ[%d] resource, err %d\\n\", index, err);\n+\t\treturn err;\n+\t}\n+\n+\tvnic_wq_disable(wq);\n+\n+\terr = vnic_wq_alloc_ring(vdev, wq, desc_count, desc_size);\n+\tif (err)\n+\t\treturn err;\n+\n+\terr = vnic_wq_alloc_bufs(wq);\n+\tif (err) {\n+\t\tvnic_wq_free(wq);\n+\t\treturn err;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+void vnic_wq_init_start(struct vnic_wq *wq, unsigned int cq_index,\n+\tunsigned int fetch_index, unsigned int posted_index,\n+\tunsigned int error_interrupt_enable,\n+\tunsigned int error_interrupt_offset)\n+{\n+\tu64 paddr;\n+\tunsigned int count = wq->ring.desc_count;\n+\n+\tpaddr = (u64)wq->ring.base_addr | VNIC_PADDR_TARGET;\n+\twriteq(paddr, &wq->ctrl->ring_base);\n+\tiowrite32(count, &wq->ctrl->ring_size);\n+\tiowrite32(fetch_index, &wq->ctrl->fetch_index);\n+\tiowrite32(posted_index, &wq->ctrl->posted_index);\n+\tiowrite32(cq_index, &wq->ctrl->cq_index);\n+\tiowrite32(error_interrupt_enable, &wq->ctrl->error_interrupt_enable);\n+\tiowrite32(error_interrupt_offset, &wq->ctrl->error_interrupt_offset);\n+\tiowrite32(0, &wq->ctrl->error_status);\n+\n+\twq->to_use = wq->to_clean =\n+\t\t&wq->bufs[fetch_index / VNIC_WQ_BUF_BLK_ENTRIES(count)]\n+\t\t\t[fetch_index % VNIC_WQ_BUF_BLK_ENTRIES(count)];\n+}\n+\n+void vnic_wq_init(struct vnic_wq *wq, unsigned int cq_index,\n+\tunsigned int error_interrupt_enable,\n+\tunsigned int error_interrupt_offset)\n+{\n+\tvnic_wq_init_start(wq, cq_index, 0, 0,\n+\t\terror_interrupt_enable,\n+\t\terror_interrupt_offset);\n+}\n+\n+void vnic_wq_error_out(struct vnic_wq *wq, unsigned int error)\n+{\n+\tiowrite32(error, &wq->ctrl->error_status);\n+}\n+\n+unsigned int vnic_wq_error_status(struct vnic_wq *wq)\n+{\n+\treturn ioread32(&wq->ctrl->error_status);\n+}\n+\n+void vnic_wq_enable(struct vnic_wq *wq)\n+{\n+\tiowrite32(1, &wq->ctrl->enable);\n+}\n+\n+int vnic_wq_disable(struct vnic_wq *wq)\n+{\n+\tunsigned int wait;\n+\n+\tiowrite32(0, &wq->ctrl->enable);\n+\n+\t/* Wait for HW to ACK disable request */\n+\tfor (wait = 0; wait < 1000; wait++) {\n+\t\tif (!(ioread32(&wq->ctrl->running)))\n+\t\t\treturn 0;\n+\t\tudelay(10);\n+\t}\n+\n+\tpr_err(\"Failed to disable WQ[%d]\\n\", wq->index);\n+\n+\treturn -ETIMEDOUT;\n+}\n+\n+void vnic_wq_clean(struct vnic_wq *wq,\n+\tvoid (*buf_clean)(struct vnic_wq *wq, struct vnic_wq_buf *buf))\n+{\n+\tstruct vnic_wq_buf *buf;\n+\n+\tbuf = wq->to_clean;\n+\n+\twhile (vnic_wq_desc_used(wq) > 0) {\n+\n+\t\t(*buf_clean)(wq, buf);\n+\n+\t\tbuf = wq->to_clean = buf->next;\n+\t\twq->ring.desc_avail++;\n+\t}\n+\n+\twq->to_use = wq->to_clean = wq->bufs[0];\n+\n+\tiowrite32(0, &wq->ctrl->fetch_index);\n+\tiowrite32(0, &wq->ctrl->posted_index);\n+\tiowrite32(0, &wq->ctrl->error_status);\n+\n+\tvnic_dev_clear_desc_ring(&wq->ring);\n+}\ndiff --git a/drivers/net/enic/vnic/vnic_wq.h b/drivers/net/enic/vnic/vnic_wq.h\nnew file mode 100644\nindex 0000000..f8219ad\n--- /dev/null\n+++ b/drivers/net/enic/vnic/vnic_wq.h\n@@ -0,0 +1,283 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: vnic_wq.h 183023 2014-07-22 23:47:25Z xuywang $\"\n+\n+#ifndef _VNIC_WQ_H_\n+#define _VNIC_WQ_H_\n+\n+\n+#include \"vnic_dev.h\"\n+#include \"vnic_cq.h\"\n+\n+/* Work queue control */\n+struct vnic_wq_ctrl {\n+\tu64 ring_base;\t\t\t/* 0x00 */\n+\tu32 ring_size;\t\t\t/* 0x08 */\n+\tu32 pad0;\n+\tu32 posted_index;\t\t/* 0x10 */\n+\tu32 pad1;\n+\tu32 cq_index;\t\t\t/* 0x18 */\n+\tu32 pad2;\n+\tu32 enable;\t\t\t/* 0x20 */\n+\tu32 pad3;\n+\tu32 running;\t\t\t/* 0x28 */\n+\tu32 pad4;\n+\tu32 fetch_index;\t\t/* 0x30 */\n+\tu32 pad5;\n+\tu32 dca_value;\t\t\t/* 0x38 */\n+\tu32 pad6;\n+\tu32 error_interrupt_enable;\t/* 0x40 */\n+\tu32 pad7;\n+\tu32 error_interrupt_offset;\t/* 0x48 */\n+\tu32 pad8;\n+\tu32 error_status;\t\t/* 0x50 */\n+\tu32 pad9;\n+};\n+\n+struct vnic_wq_buf {\n+\tstruct vnic_wq_buf *next;\n+\tdma_addr_t dma_addr;\n+\tvoid *os_buf;\n+\tunsigned int len;\n+\tunsigned int index;\n+\tint sop;\n+\tvoid *desc;\n+\tuint64_t wr_id; /* Cookie */\n+\tuint8_t cq_entry; /* Gets completion event from hw */\n+\tuint8_t desc_skip_cnt; /* Num descs to occupy */\n+\tuint8_t compressed_send; /* Both hdr and payload in one desc */\n+};\n+\n+/* Break the vnic_wq_buf allocations into blocks of 32/64 entries */\n+#define VNIC_WQ_BUF_MIN_BLK_ENTRIES 32\n+#define VNIC_WQ_BUF_DFLT_BLK_ENTRIES 64\n+#define VNIC_WQ_BUF_BLK_ENTRIES(entries) \\\n+\t((unsigned int)((entries < VNIC_WQ_BUF_DFLT_BLK_ENTRIES) ? \\\n+\tVNIC_WQ_BUF_MIN_BLK_ENTRIES : VNIC_WQ_BUF_DFLT_BLK_ENTRIES))\n+#define VNIC_WQ_BUF_BLK_SZ(entries) \\\n+\t(VNIC_WQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_wq_buf))\n+#define VNIC_WQ_BUF_BLKS_NEEDED(entries) \\\n+\tDIV_ROUND_UP(entries, VNIC_WQ_BUF_BLK_ENTRIES(entries))\n+#define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(4096)\n+\n+struct vnic_wq {\n+\tunsigned int index;\n+\tstruct vnic_dev *vdev;\n+\tstruct vnic_wq_ctrl __iomem *ctrl;              /* memory-mapped */\n+\tstruct vnic_dev_ring ring;\n+\tstruct vnic_wq_buf *bufs[VNIC_WQ_BUF_BLKS_MAX];\n+\tstruct vnic_wq_buf *to_use;\n+\tstruct vnic_wq_buf *to_clean;\n+\tunsigned int pkts_outstanding;\n+\tunsigned int socket_id;\n+};\n+\n+static inline unsigned int vnic_wq_desc_avail(struct vnic_wq *wq)\n+{\n+\t/* how many does SW own? */\n+\treturn wq->ring.desc_avail;\n+}\n+\n+static inline unsigned int vnic_wq_desc_used(struct vnic_wq *wq)\n+{\n+\t/* how many does HW own? */\n+\treturn wq->ring.desc_count - wq->ring.desc_avail - 1;\n+}\n+\n+static inline void *vnic_wq_next_desc(struct vnic_wq *wq)\n+{\n+\treturn wq->to_use->desc;\n+}\n+\n+#define PI_LOG2_CACHE_LINE_SIZE        5\n+#define PI_INDEX_BITS            12\n+#define PI_INDEX_MASK ((1U << PI_INDEX_BITS) - 1)\n+#define PI_PREFETCH_LEN_MASK ((1U << PI_LOG2_CACHE_LINE_SIZE) - 1)\n+#define PI_PREFETCH_LEN_OFF 16\n+#define PI_PREFETCH_ADDR_BITS 43\n+#define PI_PREFETCH_ADDR_MASK ((1ULL << PI_PREFETCH_ADDR_BITS) - 1)\n+#define PI_PREFETCH_ADDR_OFF 21\n+\n+/** How many cache lines are touched by buffer (addr, len). */\n+static inline unsigned int num_cache_lines_touched(dma_addr_t addr,\n+\t\t\t\t\t\t\tunsigned int len)\n+{\n+\tconst unsigned long mask = PI_PREFETCH_LEN_MASK;\n+\tconst unsigned long laddr = (unsigned long)addr;\n+\tunsigned long lines, equiv_len;\n+\t/* A. If addr is aligned, our solution is just to round up len to the\n+\tnext boundary.\n+\n+\te.g. addr = 0, len = 48\n+\t+--------------------+\n+\t|XXXXXXXXXXXXXXXXXXXX|    32-byte cacheline a\n+\t+--------------------+\n+\t|XXXXXXXXXX          |    cacheline b\n+\t+--------------------+\n+\n+\tB. If addr is not aligned, however, we may use an extra\n+\tcacheline.  e.g. addr = 12, len = 22\n+\n+\t+--------------------+\n+\t|       XXXXXXXXXXXXX|\n+\t+--------------------+\n+\t|XX                  |\n+\t+--------------------+\n+\n+\tOur solution is to make the problem equivalent to case A\n+\tabove by adding the empty space in the first cacheline to the length:\n+\tunsigned long len;\n+\n+\t+--------------------+\n+\t|eeeeeeeXXXXXXXXXXXXX|    \"e\" is empty space, which we add to len\n+\t+--------------------+\n+\t|XX                  |\n+\t+--------------------+\n+\n+\t*/\n+\tequiv_len = len + (laddr & mask);\n+\n+\t/* Now we can just round up this len to the next 32-byte boundary. */\n+\tlines = (equiv_len + mask) & (~mask);\n+\n+\t/* Scale bytes -> cachelines. */\n+\treturn lines >> PI_LOG2_CACHE_LINE_SIZE;\n+}\n+\n+static inline u64 vnic_cached_posted_index(dma_addr_t addr, unsigned int len,\n+\t\t\t\t\t\tunsigned int index)\n+{\n+\tunsigned int num_cache_lines = num_cache_lines_touched(addr, len);\n+\t/* Wish we could avoid a branch here.  We could have separate\n+\t * vnic_wq_post() and vinc_wq_post_inline(), the latter\n+\t * only supporting < 1k (2^5 * 2^5) sends, I suppose.  This would\n+\t * eliminate the if (eop) branch as well.\n+\t */\n+\tif (num_cache_lines > PI_PREFETCH_LEN_MASK)\n+\t\tnum_cache_lines = 0;\n+\treturn (index & PI_INDEX_MASK) |\n+\t((num_cache_lines & PI_PREFETCH_LEN_MASK) << PI_PREFETCH_LEN_OFF) |\n+\t\t(((addr >> PI_LOG2_CACHE_LINE_SIZE) &\n+\tPI_PREFETCH_ADDR_MASK) << PI_PREFETCH_ADDR_OFF);\n+}\n+\n+static inline void vnic_wq_post(struct vnic_wq *wq,\n+\tvoid *os_buf, dma_addr_t dma_addr,\n+\tunsigned int len, int sop, int eop,\n+\tuint8_t desc_skip_cnt, uint8_t cq_entry,\n+\tuint8_t compressed_send, uint64_t wrid)\n+{\n+\tstruct vnic_wq_buf *buf = wq->to_use;\n+\n+\tbuf->sop = sop;\n+\tbuf->cq_entry = cq_entry;\n+\tbuf->compressed_send = compressed_send;\n+\tbuf->desc_skip_cnt = desc_skip_cnt;\n+\tbuf->os_buf = os_buf;\n+\tbuf->dma_addr = dma_addr;\n+\tbuf->len = len;\n+\tbuf->wr_id = wrid;\n+\n+\tbuf = buf->next;\n+\tif (eop) {\n+#ifdef DO_PREFETCH\n+\t\tuint64_t wr = vnic_cached_posted_index(dma_addr, len,\n+\t\t\t\t\t\t\tbuf->index);\n+#endif\n+\t\t/* Adding write memory barrier prevents compiler and/or CPU\n+\t\t * reordering, thus avoiding descriptor posting before\n+\t\t * descriptor is initialized. Otherwise, hardware can read\n+\t\t * stale descriptor fields.\n+\t\t */\n+\t\twmb();\n+#ifdef DO_PREFETCH\n+\t\t/* Intel chipsets seem to limit the rate of PIOs that we can\n+\t\t * push on the bus.  Thus, it is very important to do a single\n+\t\t * 64 bit write here.  With two 32-bit writes, my maximum\n+\t\t * pkt/sec rate was cut almost in half. -AJF\n+\t\t */\n+\t\tiowrite64((uint64_t)wr, &wq->ctrl->posted_index);\n+#else\n+\t\tiowrite32(buf->index, &wq->ctrl->posted_index);\n+#endif\n+\t}\n+\twq->to_use = buf;\n+\n+\twq->ring.desc_avail -= desc_skip_cnt;\n+}\n+\n+static inline void vnic_wq_service(struct vnic_wq *wq,\n+\tstruct cq_desc *cq_desc, u16 completed_index,\n+\tvoid (*buf_service)(struct vnic_wq *wq,\n+\tstruct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque),\n+\tvoid *opaque)\n+{\n+\tstruct vnic_wq_buf *buf;\n+\n+\tbuf = wq->to_clean;\n+\twhile (1) {\n+\n+\t\t(*buf_service)(wq, cq_desc, buf, opaque);\n+\n+\t\twq->ring.desc_avail++;\n+\n+\t\twq->to_clean = buf->next;\n+\n+\t\tif (buf->index == completed_index)\n+\t\t\tbreak;\n+\n+\t\tbuf = wq->to_clean;\n+\t}\n+}\n+\n+void vnic_wq_free(struct vnic_wq *wq);\n+int vnic_wq_alloc(struct vnic_dev *vdev, struct vnic_wq *wq, unsigned int index,\n+\tunsigned int desc_count, unsigned int desc_size);\n+void vnic_wq_init_start(struct vnic_wq *wq, unsigned int cq_index,\n+\tunsigned int fetch_index, unsigned int posted_index,\n+\tunsigned int error_interrupt_enable,\n+\tunsigned int error_interrupt_offset);\n+void vnic_wq_init(struct vnic_wq *wq, unsigned int cq_index,\n+\tunsigned int error_interrupt_enable,\n+\tunsigned int error_interrupt_offset);\n+void vnic_wq_error_out(struct vnic_wq *wq, unsigned int error);\n+unsigned int vnic_wq_error_status(struct vnic_wq *wq);\n+void vnic_wq_enable(struct vnic_wq *wq);\n+int vnic_wq_disable(struct vnic_wq *wq);\n+void vnic_wq_clean(struct vnic_wq *wq,\n+\tvoid (*buf_clean)(struct vnic_wq *wq, struct vnic_wq_buf *buf));\n+int vnic_wq_mem_size(struct vnic_wq *wq, unsigned int desc_count,\n+\tunsigned int desc_size);\n+\n+#endif /* _VNIC_WQ_H_ */\ndiff --git a/drivers/net/enic/vnic/wq_enet_desc.h b/drivers/net/enic/vnic/wq_enet_desc.h\nnew file mode 100644\nindex 0000000..ff2b768\n--- /dev/null\n+++ b/drivers/net/enic/vnic/wq_enet_desc.h\n@@ -0,0 +1,114 @@\n+/*\n+ * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n+ * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n+ *\n+ * Copyright (c) 2014, Cisco Systems, Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ *\n+ * 2. Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n+ * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n+ * POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ */\n+#ident \"$Id: wq_enet_desc.h 59839 2010-09-27 20:36:31Z roprabhu $\"\n+\n+#ifndef _WQ_ENET_DESC_H_\n+#define _WQ_ENET_DESC_H_\n+\n+/* Ethernet work queue descriptor: 16B */\n+struct wq_enet_desc {\n+\t__le64 address;\n+\t__le16 length;\n+\t__le16 mss_loopback;\n+\t__le16 header_length_flags;\n+\t__le16 vlan_tag;\n+};\n+\n+#define WQ_ENET_ADDR_BITS\t\t64\n+#define WQ_ENET_LEN_BITS\t\t14\n+#define WQ_ENET_LEN_MASK\t\t((1 << WQ_ENET_LEN_BITS) - 1)\n+#define WQ_ENET_MSS_BITS\t\t14\n+#define WQ_ENET_MSS_MASK\t\t((1 << WQ_ENET_MSS_BITS) - 1)\n+#define WQ_ENET_MSS_SHIFT\t\t2\n+#define WQ_ENET_LOOPBACK_SHIFT\t\t1\n+#define WQ_ENET_HDRLEN_BITS\t\t10\n+#define WQ_ENET_HDRLEN_MASK\t\t((1 << WQ_ENET_HDRLEN_BITS) - 1)\n+#define WQ_ENET_FLAGS_OM_BITS\t\t2\n+#define WQ_ENET_FLAGS_OM_MASK\t\t((1 << WQ_ENET_FLAGS_OM_BITS) - 1)\n+#define WQ_ENET_FLAGS_EOP_SHIFT\t\t12\n+#define WQ_ENET_FLAGS_CQ_ENTRY_SHIFT\t13\n+#define WQ_ENET_FLAGS_FCOE_ENCAP_SHIFT\t14\n+#define WQ_ENET_FLAGS_VLAN_TAG_INSERT_SHIFT\t15\n+\n+#define WQ_ENET_OFFLOAD_MODE_CSUM\t0\n+#define WQ_ENET_OFFLOAD_MODE_RESERVED\t1\n+#define WQ_ENET_OFFLOAD_MODE_CSUM_L4\t2\n+#define WQ_ENET_OFFLOAD_MODE_TSO\t3\n+\n+static inline void wq_enet_desc_enc(struct wq_enet_desc *desc,\n+\tu64 address, u16 length, u16 mss, u16 header_length,\n+\tu8 offload_mode, u8 eop, u8 cq_entry, u8 fcoe_encap,\n+\tu8 vlan_tag_insert, u16 vlan_tag, u8 loopback)\n+{\n+\tdesc->address = cpu_to_le64(address);\n+\tdesc->length = cpu_to_le16(length & WQ_ENET_LEN_MASK);\n+\tdesc->mss_loopback = cpu_to_le16((mss & WQ_ENET_MSS_MASK) <<\n+\t\tWQ_ENET_MSS_SHIFT | (loopback & 1) << WQ_ENET_LOOPBACK_SHIFT);\n+\tdesc->header_length_flags = cpu_to_le16(\n+\t\t(header_length & WQ_ENET_HDRLEN_MASK) |\n+\t\t(offload_mode & WQ_ENET_FLAGS_OM_MASK) << WQ_ENET_HDRLEN_BITS |\n+\t\t(eop & 1) << WQ_ENET_FLAGS_EOP_SHIFT |\n+\t\t(cq_entry & 1) << WQ_ENET_FLAGS_CQ_ENTRY_SHIFT |\n+\t\t(fcoe_encap & 1) << WQ_ENET_FLAGS_FCOE_ENCAP_SHIFT |\n+\t\t(vlan_tag_insert & 1) << WQ_ENET_FLAGS_VLAN_TAG_INSERT_SHIFT);\n+\tdesc->vlan_tag = cpu_to_le16(vlan_tag);\n+}\n+\n+static inline void wq_enet_desc_dec(struct wq_enet_desc *desc,\n+\tu64 *address, u16 *length, u16 *mss, u16 *header_length,\n+\tu8 *offload_mode, u8 *eop, u8 *cq_entry, u8 *fcoe_encap,\n+\tu8 *vlan_tag_insert, u16 *vlan_tag, u8 *loopback)\n+{\n+\t*address = le64_to_cpu(desc->address);\n+\t*length = le16_to_cpu(desc->length) & WQ_ENET_LEN_MASK;\n+\t*mss = (le16_to_cpu(desc->mss_loopback) >> WQ_ENET_MSS_SHIFT) &\n+\t\tWQ_ENET_MSS_MASK;\n+\t*loopback = (u8)((le16_to_cpu(desc->mss_loopback) >>\n+\t\tWQ_ENET_LOOPBACK_SHIFT) & 1);\n+\t*header_length = le16_to_cpu(desc->header_length_flags) &\n+\t\tWQ_ENET_HDRLEN_MASK;\n+\t*offload_mode = (u8)((le16_to_cpu(desc->header_length_flags) >>\n+\t\tWQ_ENET_HDRLEN_BITS) & WQ_ENET_FLAGS_OM_MASK);\n+\t*eop = (u8)((le16_to_cpu(desc->header_length_flags) >>\n+\t\tWQ_ENET_FLAGS_EOP_SHIFT) & 1);\n+\t*cq_entry = (u8)((le16_to_cpu(desc->header_length_flags) >>\n+\t\tWQ_ENET_FLAGS_CQ_ENTRY_SHIFT) & 1);\n+\t*fcoe_encap = (u8)((le16_to_cpu(desc->header_length_flags) >>\n+\t\tWQ_ENET_FLAGS_FCOE_ENCAP_SHIFT) & 1);\n+\t*vlan_tag_insert = (u8)((le16_to_cpu(desc->header_length_flags) >>\n+\t\tWQ_ENET_FLAGS_VLAN_TAG_INSERT_SHIFT) & 1);\n+\t*vlan_tag = le16_to_cpu(desc->vlan_tag);\n+}\n+\n+#endif /* _WQ_ENET_DESC_H_ */\ndiff --git a/lib/Makefile b/lib/Makefile\nindex 3350e99..ca4238d 100644\n--- a/lib/Makefile\n+++ b/lib/Makefile\n@@ -45,7 +45,6 @@ DIRS-$(CONFIG_RTE_LIBRTE_IXGBE_PMD) += librte_pmd_ixgbe\n DIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += librte_pmd_i40e\n DIRS-$(CONFIG_RTE_LIBRTE_FM10K_PMD) += librte_pmd_fm10k\n DIRS-$(CONFIG_RTE_LIBRTE_MLX4_PMD) += librte_pmd_mlx4\n-DIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += librte_pmd_enic\n DIRS-$(CONFIG_RTE_LIBRTE_PMD_RING) += librte_pmd_ring\n DIRS-$(CONFIG_RTE_LIBRTE_PMD_PCAP) += librte_pmd_pcap\n DIRS-$(CONFIG_RTE_LIBRTE_VIRTIO_PMD) += librte_pmd_virtio\ndiff --git a/lib/librte_pmd_enic/LICENSE b/lib/librte_pmd_enic/LICENSE\ndeleted file mode 100644\nindex 46a27a4..0000000\n--- a/lib/librte_pmd_enic/LICENSE\n+++ /dev/null\n@@ -1,27 +0,0 @@\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\ndiff --git a/lib/librte_pmd_enic/Makefile b/lib/librte_pmd_enic/Makefile\ndeleted file mode 100644\nindex bfc0994..0000000\n--- a/lib/librte_pmd_enic/Makefile\n+++ /dev/null\n@@ -1,71 +0,0 @@\n-#\n-# Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n-# Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n-#\n-# Copyright (c) 2014, Cisco Systems, Inc.\n-# All rights reserved.\n-#\n-# Redistribution and use in source and binary forms, with or without\n-# modification, are permitted provided that the following conditions\n-# are met:\n-#\n-# 1. Redistributions of source code must retain the above copyright\n-# notice, this list of conditions and the following disclaimer.\n-#\n-# 2. Redistributions in binary form must reproduce the above copyright\n-# notice, this list of conditions and the following disclaimer in\n-# the documentation and/or other materials provided with the\n-# distribution.\n-#\n-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n-# \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n-# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n-# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n-# COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n-# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n-# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n-# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n-# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n-# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n-# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n-# POSSIBILITY OF SUCH DAMAGE.\n-\n-include $(RTE_SDK)/mk/rte.vars.mk\n-\n-#\n-# library name\n-#\n-LIB = librte_pmd_enic.a\n-\n-EXPORT_MAP := rte_pmd_enic_version.map\n-\n-LIBABIVER := 1\n-\n-CFLAGS += -I$(SRCDIR)/vnic/\n-CFLAGS += -I$(SRCDIR)\n-CFLAGS += -O3\n-CFLAGS += $(WERROR_FLAGS) -Wno-strict-aliasing\n-\n-VPATH += $(SRCDIR)/src\n-\n-#\n-# all source are stored in SRCS-y\n-#\n-SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic_ethdev.c\n-SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic_main.c\n-SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic_clsf.c\n-SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += enic_res.c\n-SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_cq.c\n-SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_wq.c\n-SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_dev.c\n-SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_intr.c\n-SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_rq.c\n-SRCS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += vnic/vnic_rss.c\n-\n-# this lib depends upon:\n-DEPDIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += lib/librte_eal lib/librte_ether\n-DEPDIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += lib/librte_mempool lib/librte_mbuf\n-DEPDIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += lib/librte_net lib/librte_malloc\n-DEPDIRS-$(CONFIG_RTE_LIBRTE_ENIC_PMD) += lib/librte_hash\n-\n-include $(RTE_SDK)/mk/rte.lib.mk\ndiff --git a/lib/librte_pmd_enic/enic.h b/lib/librte_pmd_enic/enic.h\ndeleted file mode 100644\nindex 1417b0c..0000000\n--- a/lib/librte_pmd_enic/enic.h\n+++ /dev/null\n@@ -1,200 +0,0 @@\n-/*\n- * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id$\"\n-\n-#ifndef _ENIC_H_\n-#define _ENIC_H_\n-\n-#include \"vnic_enet.h\"\n-#include \"vnic_dev.h\"\n-#include \"vnic_wq.h\"\n-#include \"vnic_rq.h\"\n-#include \"vnic_cq.h\"\n-#include \"vnic_intr.h\"\n-#include \"vnic_stats.h\"\n-#include \"vnic_nic.h\"\n-#include \"vnic_rss.h\"\n-#include \"enic_res.h\"\n-\n-#define DRV_NAME\t\t\"enic_pmd\"\n-#define DRV_DESCRIPTION\t\t\"Cisco VIC Ethernet NIC Poll-mode Driver\"\n-#define DRV_VERSION\t\t\"1.0.0.5\"\n-#define DRV_COPYRIGHT\t\t\"Copyright 2008-2015 Cisco Systems, Inc\"\n-\n-#define ENIC_WQ_MAX\t\t8\n-#define ENIC_RQ_MAX\t\t8\n-#define ENIC_CQ_MAX\t\t(ENIC_WQ_MAX + ENIC_RQ_MAX)\n-#define ENIC_INTR_MAX\t\t(ENIC_CQ_MAX + 2)\n-\n-#define VLAN_ETH_HLEN           18\n-\n-#define ENICPMD_SETTING(enic, f) ((enic->config.flags & VENETF_##f) ? 1 : 0)\n-\n-#define ENICPMD_BDF_LENGTH      13   /* 0000:00:00.0'\\0' */\n-#define PKT_TX_TCP_UDP_CKSUM    0x6000\n-#define ENIC_CALC_IP_CKSUM      1\n-#define ENIC_CALC_TCP_UDP_CKSUM 2\n-#define ENIC_MAX_MTU            9000\n-#define ENIC_PAGE_SIZE          4096\n-#define PAGE_ROUND_UP(x) \\\n-\t((((unsigned long)(x)) + ENIC_PAGE_SIZE-1) & (~(ENIC_PAGE_SIZE-1)))\n-\n-#define ENICPMD_VFIO_PATH          \"/dev/vfio/vfio\"\n-/*#define ENIC_DESC_COUNT_MAKE_ODD (x) do{if ((~(x)) & 1) { (x)--; } }while(0)*/\n-\n-#define PCI_DEVICE_ID_CISCO_VIC_ENET         0x0043  /* ethernet vnic */\n-#define PCI_DEVICE_ID_CISCO_VIC_ENET_VF      0x0071  /* enet SRIOV VF */\n-\n-\n-#define ENICPMD_FDIR_MAX           64\n-\n-struct enic_fdir_node {\n-\tstruct rte_eth_fdir_filter filter;\n-\tu16 fltr_id;\n-\tu16 rq_index;\n-};\n-\n-struct enic_fdir {\n-\tstruct rte_eth_fdir_stats stats;\n-\tstruct rte_hash *hash;\n-\tstruct enic_fdir_node *nodes[ENICPMD_FDIR_MAX];\n-};\n-\n-/* Per-instance private data structure */\n-struct enic {\n-\tstruct enic *next;\n-\tstruct rte_pci_device *pdev;\n-\tstruct vnic_enet_config config;\n-\tstruct vnic_dev_bar bar0;\n-\tstruct vnic_dev *vdev;\n-\n-\tunsigned int port_id;\n-\tstruct rte_eth_dev *rte_dev;\n-\tstruct enic_fdir fdir;\n-\tchar bdf_name[ENICPMD_BDF_LENGTH];\n-\tint dev_fd;\n-\tint iommu_group_fd;\n-\tint iommu_groupid;\n-\tint eventfd;\n-\tuint8_t mac_addr[ETH_ALEN];\n-\tpthread_t err_intr_thread;\n-\tint promisc;\n-\tint allmulti;\n-\tu8 ig_vlan_strip_en;\n-\tint link_status;\n-\tu8 hw_ip_checksum;\n-\n-\tunsigned int flags;\n-\tunsigned int priv_flags;\n-\n-\t/* work queue */\n-\tstruct vnic_wq wq[ENIC_WQ_MAX];\n-\tunsigned int wq_count;\n-\n-\t/* receive queue */\n-\tstruct vnic_rq rq[ENIC_RQ_MAX];\n-\tunsigned int rq_count;\n-\n-\t/* completion queue */\n-\tstruct vnic_cq cq[ENIC_CQ_MAX];\n-\tunsigned int cq_count;\n-\n-\t/* interrupt resource */\n-\tstruct vnic_intr intr;\n-\tunsigned int intr_count;\n-};\n-\n-static inline unsigned int enic_cq_rq(__rte_unused struct enic *enic, unsigned int rq)\n-{\n-\treturn rq;\n-}\n-\n-static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)\n-{\n-\treturn enic->rq_count + wq;\n-}\n-\n-static inline unsigned int enic_msix_err_intr(__rte_unused struct enic *enic)\n-{\n-\treturn 0;\n-}\n-\n-static inline struct enic *pmd_priv(struct rte_eth_dev *eth_dev)\n-{\n-\treturn (struct enic *)eth_dev->data->dev_private;\n-}\n-\n-extern void enic_fdir_stats_get(struct enic *enic,\n-\tstruct rte_eth_fdir_stats *stats);\n-extern int enic_fdir_add_fltr(struct enic *enic,\n-\tstruct rte_eth_fdir_filter *params);\n-extern int enic_fdir_del_fltr(struct enic *enic,\n-\tstruct rte_eth_fdir_filter *params);\n-extern void enic_free_wq(void *txq);\n-extern int enic_alloc_intr_resources(struct enic *enic);\n-extern int enic_setup_finish(struct enic *enic);\n-extern int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,\n-\tunsigned int socket_id, uint16_t nb_desc);\n-extern void enic_start_wq(struct enic *enic, uint16_t queue_idx);\n-extern int enic_stop_wq(struct enic *enic, uint16_t queue_idx);\n-extern void enic_start_rq(struct enic *enic, uint16_t queue_idx);\n-extern int enic_stop_rq(struct enic *enic, uint16_t queue_idx);\n-extern void enic_free_rq(void *rxq);\n-extern int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,\n-\tunsigned int socket_id, struct rte_mempool *mp,\n-\tuint16_t nb_desc);\n-extern int enic_set_rss_nic_cfg(struct enic *enic);\n-extern int enic_set_vnic_res(struct enic *enic);\n-extern void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size);\n-extern int enic_enable(struct enic *enic);\n-extern int enic_disable(struct enic *enic);\n-extern void enic_remove(struct enic *enic);\n-extern int enic_get_link_status(struct enic *enic);\n-extern void enic_dev_stats_get(struct enic *enic,\n-\tstruct rte_eth_stats *r_stats);\n-extern void enic_dev_stats_clear(struct enic *enic);\n-extern void enic_add_packet_filter(struct enic *enic);\n-extern void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr);\n-extern void enic_del_mac_address(struct enic *enic);\n-extern unsigned int enic_cleanup_wq(struct enic *enic, struct vnic_wq *wq);\n-extern int enic_send_pkt(struct enic *enic, struct vnic_wq *wq,\n-\tstruct rte_mbuf *tx_pkt, unsigned short len,\n-\tuint8_t sop, uint8_t eop,\n-\tuint16_t ol_flags, uint16_t vlan_tag);\n-extern int enic_poll(struct vnic_rq *rq, struct rte_mbuf **rx_pkts,\n-\tunsigned int budget, unsigned int *work_done);\n-extern int enic_probe(struct enic *enic);\n-extern int enic_clsf_init(struct enic *enic);\n-extern void enic_clsf_destroy(struct enic *enic);\n-#endif /* _ENIC_H_ */\ndiff --git a/lib/librte_pmd_enic/enic_clsf.c b/lib/librte_pmd_enic/enic_clsf.c\ndeleted file mode 100644\nindex ca12d2d..0000000\n--- a/lib/librte_pmd_enic/enic_clsf.c\n+++ /dev/null\n@@ -1,259 +0,0 @@\n-/*\n- * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id$\"\n-\n-#include <libgen.h>\n-\n-#include <rte_ethdev.h>\n-#include <rte_malloc.h>\n-#include <rte_hash.h>\n-#include <rte_byteorder.h>\n-\n-#include \"enic_compat.h\"\n-#include \"enic.h\"\n-#include \"wq_enet_desc.h\"\n-#include \"rq_enet_desc.h\"\n-#include \"cq_enet_desc.h\"\n-#include \"vnic_enet.h\"\n-#include \"vnic_dev.h\"\n-#include \"vnic_wq.h\"\n-#include \"vnic_rq.h\"\n-#include \"vnic_cq.h\"\n-#include \"vnic_intr.h\"\n-#include \"vnic_nic.h\"\n-\n-#ifdef RTE_MACHINE_CPUFLAG_SSE4_2\n-#include <rte_hash_crc.h>\n-#define DEFAULT_HASH_FUNC       rte_hash_crc\n-#else\n-#include <rte_jhash.h>\n-#define DEFAULT_HASH_FUNC       rte_jhash\n-#endif\n-\n-#define SOCKET_0                0\n-#define ENICPMD_CLSF_HASH_ENTRIES       ENICPMD_FDIR_MAX\n-#define ENICPMD_CLSF_BUCKET_ENTRIES     4\n-\n-void enic_fdir_stats_get(struct enic *enic, struct rte_eth_fdir_stats *stats)\n-{\n-\t*stats = enic->fdir.stats;\n-}\n-\n-int enic_fdir_del_fltr(struct enic *enic, struct rte_eth_fdir_filter *params)\n-{\n-\tint32_t pos;\n-\tstruct enic_fdir_node *key;\n-\t/* See if the key is in the table */\n-\tpos = rte_hash_del_key(enic->fdir.hash, params);\n-\tswitch (pos) {\n-\tcase -EINVAL:\n-\tcase -ENOENT:\n-\t\tenic->fdir.stats.f_remove++;\n-\t\treturn -EINVAL;\n-\tdefault:\n-\t\t/* The entry is present in the table */\n-\t\tkey = enic->fdir.nodes[pos];\n-\n-\t\t/* Delete the filter */\n-\t\tvnic_dev_classifier(enic->vdev, CLSF_DEL,\n-\t\t\t&key->fltr_id, NULL);\n-\t\trte_free(key);\n-\t\tenic->fdir.nodes[pos] = NULL;\n-\t\tenic->fdir.stats.free++;\n-\t\tenic->fdir.stats.remove++;\n-\t\tbreak;\n-\t}\n-\treturn 0;\n-}\n-\n-int enic_fdir_add_fltr(struct enic *enic, struct rte_eth_fdir_filter *params)\n-{\n-\tstruct enic_fdir_node *key;\n-\tstruct filter fltr = {0};\n-\tint32_t pos;\n-\tu8 do_free = 0;\n-\tu16 old_fltr_id = 0;\n-\tu32 flowtype_supported;\n-\tu16 flex_bytes;\n-\tu16 queue;\n-\n-\tflowtype_supported = (\n-\t\t(RTE_ETH_FLOW_NONFRAG_IPV4_TCP == params->input.flow_type) ||\n-\t\t(RTE_ETH_FLOW_NONFRAG_IPV4_UDP == params->input.flow_type));\n-\n-\tflex_bytes = ((params->input.flow_ext.flexbytes[1] << 8 & 0xFF00) |\n-\t\t(params->input.flow_ext.flexbytes[0] & 0xFF));\n-\n-\tif (!enic->fdir.hash ||\n-\t\t(params->input.flow_ext.vlan_tci & 0xFFF) ||\n-\t\t!flowtype_supported || flex_bytes ||\n-\t\tparams->action.behavior /* drop */) {\n-\t\tenic->fdir.stats.f_add++;\n-\t\treturn -ENOTSUP;\n-\t}\n-\n-\tqueue = params->action.rx_queue;\n-\t/* See if the key is already there in the table */\n-\tpos = rte_hash_del_key(enic->fdir.hash, params);\n-\tswitch (pos) {\n-\tcase -EINVAL:\n-\t\tenic->fdir.stats.f_add++;\n-\t\treturn -EINVAL;\n-\tcase -ENOENT:\n-\t\t/* Add a new classifier entry */\n-\t\tif (!enic->fdir.stats.free) {\n-\t\t\tenic->fdir.stats.f_add++;\n-\t\t\treturn -ENOSPC;\n-\t\t}\n-\t\tkey = rte_zmalloc(\"enic_fdir_node\",\n-\t\t\t\t  sizeof(struct enic_fdir_node), 0);\n-\t\tif (!key) {\n-\t\t\tenic->fdir.stats.f_add++;\n-\t\t\treturn -ENOMEM;\n-\t\t}\n-\t\tbreak;\n-\tdefault:\n-\t\t/* The entry is already present in the table.\n-\t\t * Check if there is a change in queue\n-\t\t */\n-\t\tkey = enic->fdir.nodes[pos];\n-\t\tenic->fdir.nodes[pos] = NULL;\n-\t\tif (unlikely(key->rq_index == queue)) {\n-\t\t\t/* Nothing to be done */\n-\t\t\tpos = rte_hash_add_key(enic->fdir.hash, params);\n-\t\t\tenic->fdir.nodes[pos] = key;\n-\t\t\tenic->fdir.stats.f_add++;\n-\t\t\tdev_warning(enic,\n-\t\t\t\t\"FDIR rule is already present\\n\");\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\tif (likely(enic->fdir.stats.free)) {\n-\t\t\t/* Add the filter and then delete the old one.\n-\t\t\t * This is to avoid packets from going into the\n-\t\t\t * default queue during the window between\n-\t\t\t * delete and add\n-\t\t\t */\n-\t\t\tdo_free = 1;\n-\t\t\told_fltr_id = key->fltr_id;\n-\t\t} else {\n-\t\t\t/* No free slots in the classifier.\n-\t\t\t * Delete the filter and add the modified one later\n-\t\t\t */\n-\t\t\tvnic_dev_classifier(enic->vdev, CLSF_DEL,\n-\t\t\t\t&key->fltr_id, NULL);\n-\t\t\tenic->fdir.stats.free++;\n-\t\t}\n-\n-\t\tbreak;\n-\t}\n-\n-\tkey->filter = *params;\n-\tkey->rq_index = queue;\n-\n-\tfltr.type = FILTER_IPV4_5TUPLE;\n-\tfltr.u.ipv4.src_addr = rte_be_to_cpu_32(\n-\t\tparams->input.flow.ip4_flow.src_ip);\n-\tfltr.u.ipv4.dst_addr = rte_be_to_cpu_32(\n-\t\tparams->input.flow.ip4_flow.dst_ip);\n-\tfltr.u.ipv4.src_port = rte_be_to_cpu_16(\n-\t\tparams->input.flow.udp4_flow.src_port);\n-\tfltr.u.ipv4.dst_port = rte_be_to_cpu_16(\n-\t\tparams->input.flow.udp4_flow.dst_port);\n-\n-\tif (RTE_ETH_FLOW_NONFRAG_IPV4_TCP == params->input.flow_type)\n-\t\tfltr.u.ipv4.protocol = PROTO_TCP;\n-\telse\n-\t\tfltr.u.ipv4.protocol = PROTO_UDP;\n-\n-\tfltr.u.ipv4.flags = FILTER_FIELDS_IPV4_5TUPLE;\n-\n-\tif (!vnic_dev_classifier(enic->vdev, CLSF_ADD, &queue, &fltr)) {\n-\t\tkey->fltr_id = queue;\n-\t} else {\n-\t\tdev_err(enic, \"Add classifier entry failed\\n\");\n-\t\tenic->fdir.stats.f_add++;\n-\t\trte_free(key);\n-\t\treturn -1;\n-\t}\n-\n-\tif (do_free)\n-\t\tvnic_dev_classifier(enic->vdev, CLSF_DEL, &old_fltr_id, NULL);\n-\telse{\n-\t\tenic->fdir.stats.free--;\n-\t\tenic->fdir.stats.add++;\n-\t}\n-\n-\tpos = rte_hash_add_key(enic->fdir.hash, (void *)key);\n-\tenic->fdir.nodes[pos] = key;\n-\treturn 0;\n-}\n-\n-void enic_clsf_destroy(struct enic *enic)\n-{\n-\tu32 index;\n-\tstruct enic_fdir_node *key;\n-\t/* delete classifier entries */\n-\tfor (index = 0; index < ENICPMD_FDIR_MAX; index++) {\n-\t\tkey = enic->fdir.nodes[index];\n-\t\tif (key) {\n-\t\t\tvnic_dev_classifier(enic->vdev, CLSF_DEL,\n-\t\t\t\t&key->fltr_id, NULL);\n-\t\t\trte_free(key);\n-\t\t}\n-\t}\n-\n-\tif (enic->fdir.hash) {\n-\t\trte_hash_free(enic->fdir.hash);\n-\t\tenic->fdir.hash = NULL;\n-\t}\n-}\n-\n-int enic_clsf_init(struct enic *enic)\n-{\n-\tstruct rte_hash_parameters hash_params = {\n-\t\t.name = \"enicpmd_clsf_hash\",\n-\t\t.entries = ENICPMD_CLSF_HASH_ENTRIES,\n-\t\t.bucket_entries = ENICPMD_CLSF_BUCKET_ENTRIES,\n-\t\t.key_len = RTE_HASH_KEY_LENGTH_MAX,\n-\t\t.hash_func = DEFAULT_HASH_FUNC,\n-\t\t.hash_func_init_val = 0,\n-\t\t.socket_id = SOCKET_0,\n-\t};\n-\n-\tenic->fdir.hash = rte_hash_create(&hash_params);\n-\tmemset(&enic->fdir.stats, 0, sizeof(enic->fdir.stats));\n-\tenic->fdir.stats.free = ENICPMD_FDIR_MAX;\n-\treturn (NULL == enic->fdir.hash);\n-}\ndiff --git a/lib/librte_pmd_enic/enic_compat.h b/lib/librte_pmd_enic/enic_compat.h\ndeleted file mode 100644\nindex f3598ed..0000000\n--- a/lib/librte_pmd_enic/enic_compat.h\n+++ /dev/null\n@@ -1,147 +0,0 @@\n-/*\n- * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id$\"\n-\n-#ifndef _ENIC_COMPAT_H_\n-#define _ENIC_COMPAT_H_\n-\n-#include <stdio.h>\n-#include <unistd.h>\n-\n-#include <rte_atomic.h>\n-#include <rte_malloc.h>\n-#include <rte_log.h>\n-\n-#define ENIC_PAGE_ALIGN 4096UL\n-#define ENIC_ALIGN      ENIC_PAGE_ALIGN\n-#define NAME_MAX        255\n-#define ETH_ALEN        6\n-\n-#define __iomem\n-\n-#define rmb()     rte_rmb() /* dpdk rte provided rmb */\n-#define wmb()     rte_wmb() /* dpdk rte provided wmb */\n-\n-#define le16_to_cpu\n-#define le32_to_cpu\n-#define le64_to_cpu\n-#define cpu_to_le16\n-#define cpu_to_le32\n-#define cpu_to_le64\n-\n-#ifndef offsetof\n-#define offsetof(t, m) ((size_t) &((t *)0)->m)\n-#endif\n-\n-#define pr_err(y, args...) dev_err(0, y, ##args)\n-#define pr_warn(y, args...) dev_warning(0, y, ##args)\n-#define BUG() pr_err(\"BUG at %s:%d\", __func__, __LINE__)\n-\n-#define VNIC_ALIGN(x, a)         __ALIGN_MASK(x, (typeof(x))(a)-1)\n-#define __ALIGN_MASK(x, mask)    (((x)+(mask))&~(mask))\n-#define udelay usleep\n-#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))\n-\n-#define kzalloc(size, flags) calloc(1, size)\n-#define kfree(x) free(x)\n-\n-#define dev_printk(level, fmt, args...)\t\\\n-\tRTE_LOG(level, PMD, \"rte_enic_pmd: \" fmt, ## args)\n-\n-#define dev_err(x, args...) dev_printk(ERR, args)\n-#define dev_info(x, args...) dev_printk(INFO,  args)\n-#define dev_warning(x, args...) dev_printk(WARNING, args)\n-#define dev_debug(x, args...) dev_printk(DEBUG, args)\n-\n-#define __le16 u16\n-#define __le32 u32\n-#define __le64 u64\n-\n-typedef\t\tunsigned char       u8;\n-typedef\t\tunsigned short      u16;\n-typedef\t\tunsigned int        u32;\n-typedef         unsigned long long  u64;\n-typedef         unsigned long long  dma_addr_t;\n-\n-static inline uint32_t ioread32(volatile void *addr)\n-{\n-\treturn *(volatile uint32_t *)addr;\n-}\n-\n-static inline uint16_t ioread16(volatile void *addr)\n-{\n-\treturn *(volatile uint16_t *)addr;\n-}\n-\n-static inline uint8_t ioread8(volatile void *addr)\n-{\n-\treturn *(volatile uint8_t *)addr;\n-}\n-\n-static inline void iowrite32(uint32_t val, volatile void *addr)\n-{\n-\t*(volatile uint32_t *)addr = val;\n-}\n-\n-static inline void iowrite16(uint16_t val, volatile void *addr)\n-{\n-\t*(volatile uint16_t *)addr = val;\n-}\n-\n-static inline void iowrite8(uint8_t val, volatile void *addr)\n-{\n-\t*(volatile uint8_t *)addr = val;\n-}\n-\n-static inline unsigned int readl(volatile void __iomem *addr)\n-{\n-\treturn *(volatile unsigned int *)addr;\n-}\n-\n-static inline void writel(unsigned int val, volatile void __iomem *addr)\n-{\n-\t*(volatile unsigned int *)addr = val;\n-}\n-\n-#define min_t(type, x, y) ({                    \\\n-\ttype __min1 = (x);                      \\\n-\ttype __min2 = (y);                      \\\n-\t__min1 < __min2 ? __min1 : __min2; })\n-\n-#define max_t(type, x, y) ({                    \\\n-\ttype __max1 = (x);                      \\\n-\ttype __max2 = (y);                      \\\n-\t__max1 > __max2 ? __max1 : __max2; })\n-\n-#endif /* _ENIC_COMPAT_H_ */\ndiff --git a/lib/librte_pmd_enic/enic_ethdev.c b/lib/librte_pmd_enic/enic_ethdev.c\ndeleted file mode 100644\nindex 69ad01b..0000000\n--- a/lib/librte_pmd_enic/enic_ethdev.c\n+++ /dev/null\n@@ -1,640 +0,0 @@\n-/*\n- * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id$\"\n-\n-#include <stdio.h>\n-#include <stdint.h>\n-\n-#include <rte_dev.h>\n-#include <rte_pci.h>\n-#include <rte_ethdev.h>\n-#include <rte_string_fns.h>\n-\n-#include \"vnic_intr.h\"\n-#include \"vnic_cq.h\"\n-#include \"vnic_wq.h\"\n-#include \"vnic_rq.h\"\n-#include \"vnic_enet.h\"\n-#include \"enic.h\"\n-\n-#ifdef RTE_LIBRTE_ENIC_DEBUG\n-#define ENICPMD_FUNC_TRACE() \\\n-\tRTE_LOG(DEBUG, PMD, \"ENICPMD trace: %s\\n\", __func__)\n-#else\n-#define ENICPMD_FUNC_TRACE() (void)0\n-#endif\n-\n-/*\n- * The set of PCI devices this driver supports\n- */\n-static const struct rte_pci_id pci_id_enic_map[] = {\n-#define RTE_PCI_DEV_ID_DECL_ENIC(vend, dev) {RTE_PCI_DEVICE(vend, dev)},\n-#ifndef PCI_VENDOR_ID_CISCO\n-#define PCI_VENDOR_ID_CISCO\t0x1137\n-#endif\n-#include \"rte_pci_dev_ids.h\"\n-RTE_PCI_DEV_ID_DECL_ENIC(PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET)\n-RTE_PCI_DEV_ID_DECL_ENIC(PCI_VENDOR_ID_CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF)\n-{.vendor_id = 0, /* Sentinal */},\n-};\n-\n-static int\n-enicpmd_fdir_ctrl_func(struct rte_eth_dev *eth_dev,\n-\t\t\tenum rte_filter_op filter_op, void *arg)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\tint ret = 0;\n-\n-\tENICPMD_FUNC_TRACE();\n-\tif (filter_op == RTE_ETH_FILTER_NOP)\n-\t\treturn 0;\n-\n-\tif (arg == NULL && filter_op != RTE_ETH_FILTER_FLUSH)\n-\t\treturn -EINVAL;\n-\n-\tswitch (filter_op) {\n-\tcase RTE_ETH_FILTER_ADD:\n-\tcase RTE_ETH_FILTER_UPDATE:\n-\t\tret = enic_fdir_add_fltr(enic,\n-\t\t\t(struct rte_eth_fdir_filter *)arg);\n-\t\tbreak;\n-\n-\tcase RTE_ETH_FILTER_DELETE:\n-\t\tret = enic_fdir_del_fltr(enic,\n-\t\t\t(struct rte_eth_fdir_filter *)arg);\n-\t\tbreak;\n-\n-\tcase RTE_ETH_FILTER_STATS:\n-\t\tenic_fdir_stats_get(enic, (struct rte_eth_fdir_stats *)arg);\n-\t\tbreak;\n-\n-\tcase RTE_ETH_FILTER_FLUSH:\n-\tcase RTE_ETH_FILTER_INFO:\n-\t\tdev_warning(enic, \"unsupported operation %u\", filter_op);\n-\t\tret = -ENOTSUP;\n-\t\tbreak;\n-\tdefault:\n-\t\tdev_err(enic, \"unknown operation %u\", filter_op);\n-\t\tret = -EINVAL;\n-\t\tbreak;\n-\t}\n-\treturn ret;\n-}\n-\n-static int\n-enicpmd_dev_filter_ctrl(struct rte_eth_dev *dev,\n-\t\t     enum rte_filter_type filter_type,\n-\t\t     enum rte_filter_op filter_op,\n-\t\t     void *arg)\n-{\n-\tint ret = -EINVAL;\n-\n-\tif (RTE_ETH_FILTER_FDIR == filter_type)\n-\t\tret = enicpmd_fdir_ctrl_func(dev, filter_op, arg);\n-\telse\n-\t\tdev_warning(enic, \"Filter type (%d) not supported\",\n-\t\t\tfilter_type);\n-\n-\treturn ret;\n-}\n-\n-static void enicpmd_dev_tx_queue_release(void *txq)\n-{\n-\tENICPMD_FUNC_TRACE();\n-\tenic_free_wq(txq);\n-}\n-\n-static int enicpmd_dev_setup_intr(struct enic *enic)\n-{\n-\tint ret;\n-\tunsigned int index;\n-\n-\tENICPMD_FUNC_TRACE();\n-\n-\t/* Are we done with the init of all the queues? */\n-\tfor (index = 0; index < enic->cq_count; index++) {\n-\t\tif (!enic->cq[index].ctrl)\n-\t\t\tbreak;\n-\t}\n-\n-\tif (enic->cq_count != index)\n-\t\treturn 0;\n-\n-\tret = enic_alloc_intr_resources(enic);\n-\tif (ret) {\n-\t\tdev_err(enic, \"alloc intr failed\\n\");\n-\t\treturn ret;\n-\t}\n-\tenic_init_vnic_resources(enic);\n-\n-\tret = enic_setup_finish(enic);\n-\tif (ret)\n-\t\tdev_err(enic, \"setup could not be finished\\n\");\n-\n-\treturn ret;\n-}\n-\n-static int enicpmd_dev_tx_queue_setup(struct rte_eth_dev *eth_dev,\n-\tuint16_t queue_idx,\n-\tuint16_t nb_desc,\n-\tunsigned int socket_id,\n-\t__rte_unused const struct rte_eth_txconf *tx_conf)\n-{\n-\tint ret;\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\teth_dev->data->tx_queues[queue_idx] = (void *)&enic->wq[queue_idx];\n-\n-\tret = enic_alloc_wq(enic, queue_idx, socket_id, nb_desc);\n-\tif (ret) {\n-\t\tdev_err(enic, \"error in allocating wq\\n\");\n-\t\treturn ret;\n-\t}\n-\n-\treturn enicpmd_dev_setup_intr(enic);\n-}\n-\n-static int enicpmd_dev_tx_queue_start(struct rte_eth_dev *eth_dev,\n-\tuint16_t queue_idx)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\n-\tenic_start_wq(enic, queue_idx);\n-\n-\treturn 0;\n-}\n-\n-static int enicpmd_dev_tx_queue_stop(struct rte_eth_dev *eth_dev,\n-\tuint16_t queue_idx)\n-{\n-\tint ret;\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\n-\tret = enic_stop_wq(enic, queue_idx);\n-\tif (ret)\n-\t\tdev_err(enic, \"error in stopping wq %d\\n\", queue_idx);\n-\n-\treturn ret;\n-}\n-\n-static int enicpmd_dev_rx_queue_start(struct rte_eth_dev *eth_dev,\n-\tuint16_t queue_idx)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\n-\tenic_start_rq(enic, queue_idx);\n-\n-\treturn 0;\n-}\n-\n-static int enicpmd_dev_rx_queue_stop(struct rte_eth_dev *eth_dev,\n-\tuint16_t queue_idx)\n-{\n-\tint ret;\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\n-\tret = enic_stop_rq(enic, queue_idx);\n-\tif (ret)\n-\t\tdev_err(enic, \"error in stopping rq %d\\n\", queue_idx);\n-\n-\treturn ret;\n-}\n-\n-static void enicpmd_dev_rx_queue_release(void *rxq)\n-{\n-\tENICPMD_FUNC_TRACE();\n-\tenic_free_rq(rxq);\n-}\n-\n-static int enicpmd_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,\n-\tuint16_t queue_idx,\n-\tuint16_t nb_desc,\n-\tunsigned int socket_id,\n-\t__rte_unused const struct rte_eth_rxconf *rx_conf,\n-\tstruct rte_mempool *mp)\n-{\n-\tint ret;\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\teth_dev->data->rx_queues[queue_idx] = (void *)&enic->rq[queue_idx];\n-\n-\tret = enic_alloc_rq(enic, queue_idx, socket_id, mp, nb_desc);\n-\tif (ret) {\n-\t\tdev_err(enic, \"error in allocating rq\\n\");\n-\t\treturn ret;\n-\t}\n-\n-\treturn enicpmd_dev_setup_intr(enic);\n-}\n-\n-static int enicpmd_vlan_filter_set(struct rte_eth_dev *eth_dev,\n-\tuint16_t vlan_id, int on)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tif (on)\n-\t\tenic_add_vlan(enic, vlan_id);\n-\telse\n-\t\tenic_del_vlan(enic, vlan_id);\n-\treturn 0;\n-}\n-\n-static void enicpmd_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\n-\tif (mask & ETH_VLAN_STRIP_MASK) {\n-\t\tif (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)\n-\t\t\tenic->ig_vlan_strip_en = 1;\n-\t\telse\n-\t\t\tenic->ig_vlan_strip_en = 0;\n-\t}\n-\tenic_set_rss_nic_cfg(enic);\n-\n-\n-\tif (mask & ETH_VLAN_FILTER_MASK) {\n-\t\tdev_warning(enic,\n-\t\t\t\"Configuration of VLAN filter is not supported\\n\");\n-\t}\n-\n-\tif (mask & ETH_VLAN_EXTEND_MASK) {\n-\t\tdev_warning(enic,\n-\t\t\t\"Configuration of extended VLAN is not supported\\n\");\n-\t}\n-}\n-\n-static int enicpmd_dev_configure(struct rte_eth_dev *eth_dev)\n-{\n-\tint ret;\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tret = enic_set_vnic_res(enic);\n-\tif (ret) {\n-\t\tdev_err(enic, \"Set vNIC resource num  failed, aborting\\n\");\n-\t\treturn ret;\n-\t}\n-\n-\tif (eth_dev->data->dev_conf.rxmode.split_hdr_size &&\n-\t\teth_dev->data->dev_conf.rxmode.header_split) {\n-\t\t/* Enable header-data-split */\n-\t\tenic_set_hdr_split_size(enic,\n-\t\t\teth_dev->data->dev_conf.rxmode.split_hdr_size);\n-\t}\n-\n-\tenic->hw_ip_checksum = eth_dev->data->dev_conf.rxmode.hw_ip_checksum;\n-\treturn 0;\n-}\n-\n-/* Start the device.\n- * It returns 0 on success.\n- */\n-static int enicpmd_dev_start(struct rte_eth_dev *eth_dev)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\treturn enic_enable(enic);\n-}\n-\n-/*\n- * Stop device: disable rx and tx functions to allow for reconfiguring.\n- */\n-static void enicpmd_dev_stop(struct rte_eth_dev *eth_dev)\n-{\n-\tstruct rte_eth_link link;\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tenic_disable(enic);\n-\tmemset(&link, 0, sizeof(link));\n-\trte_atomic64_cmpset((uint64_t *)&eth_dev->data->dev_link,\n-\t\t*(uint64_t *)&eth_dev->data->dev_link,\n-\t\t*(uint64_t *)&link);\n-}\n-\n-/*\n- * Stop device.\n- */\n-static void enicpmd_dev_close(struct rte_eth_dev *eth_dev)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tenic_remove(enic);\n-}\n-\n-static int enicpmd_dev_link_update(struct rte_eth_dev *eth_dev,\n-\t__rte_unused int wait_to_complete)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\tint ret;\n-\tint link_status = 0;\n-\n-\tENICPMD_FUNC_TRACE();\n-\tlink_status = enic_get_link_status(enic);\n-\tret = (link_status == enic->link_status);\n-\tenic->link_status = link_status;\n-\teth_dev->data->dev_link.link_status = link_status;\n-\teth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;\n-\teth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);\n-\treturn ret;\n-}\n-\n-static void enicpmd_dev_stats_get(struct rte_eth_dev *eth_dev,\n-\tstruct rte_eth_stats *stats)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tenic_dev_stats_get(enic, stats);\n-}\n-\n-static void enicpmd_dev_stats_reset(struct rte_eth_dev *eth_dev)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tenic_dev_stats_clear(enic);\n-}\n-\n-static void enicpmd_dev_info_get(struct rte_eth_dev *eth_dev,\n-\tstruct rte_eth_dev_info *device_info)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tdevice_info->max_rx_queues = enic->rq_count;\n-\tdevice_info->max_tx_queues = enic->wq_count;\n-\tdevice_info->min_rx_bufsize = ENIC_MIN_MTU;\n-\tdevice_info->max_rx_pktlen = enic->config.mtu;\n-\tdevice_info->max_mac_addrs = 1;\n-\tdevice_info->rx_offload_capa =\n-\t\tDEV_RX_OFFLOAD_VLAN_STRIP |\n-\t\tDEV_RX_OFFLOAD_IPV4_CKSUM |\n-\t\tDEV_RX_OFFLOAD_UDP_CKSUM  |\n-\t\tDEV_RX_OFFLOAD_TCP_CKSUM;\n-\tdevice_info->tx_offload_capa =\n-\t\tDEV_TX_OFFLOAD_VLAN_INSERT |\n-\t\tDEV_TX_OFFLOAD_IPV4_CKSUM  |\n-\t\tDEV_TX_OFFLOAD_UDP_CKSUM   |\n-\t\tDEV_TX_OFFLOAD_TCP_CKSUM;\n-}\n-\n-static void enicpmd_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tenic->promisc = 1;\n-\tenic_add_packet_filter(enic);\n-}\n-\n-static void enicpmd_dev_promiscuous_disable(struct rte_eth_dev *eth_dev)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tenic->promisc = 0;\n-\tenic_add_packet_filter(enic);\n-}\n-\n-static void enicpmd_dev_allmulticast_enable(struct rte_eth_dev *eth_dev)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tenic->allmulti = 1;\n-\tenic_add_packet_filter(enic);\n-}\n-\n-static void enicpmd_dev_allmulticast_disable(struct rte_eth_dev *eth_dev)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tenic->allmulti = 0;\n-\tenic_add_packet_filter(enic);\n-}\n-\n-static void enicpmd_add_mac_addr(struct rte_eth_dev *eth_dev,\n-\tstruct ether_addr *mac_addr,\n-\t__rte_unused uint32_t index, __rte_unused uint32_t pool)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tenic_set_mac_address(enic, mac_addr->addr_bytes);\n-}\n-\n-static void enicpmd_remove_mac_addr(struct rte_eth_dev *eth_dev, __rte_unused uint32_t index)\n-{\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\tenic_del_mac_address(enic);\n-}\n-\n-\n-static uint16_t enicpmd_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n-\tuint16_t nb_pkts)\n-{\n-\tunsigned int index;\n-\tunsigned int frags;\n-\tunsigned int pkt_len;\n-\tunsigned int seg_len;\n-\tunsigned int inc_len;\n-\tunsigned int nb_segs;\n-\tstruct rte_mbuf *tx_pkt;\n-\tstruct vnic_wq *wq = (struct vnic_wq *)tx_queue;\n-\tstruct enic *enic = vnic_dev_priv(wq->vdev);\n-\tunsigned short vlan_id;\n-\tunsigned short ol_flags;\n-\n-\tfor (index = 0; index < nb_pkts; index++) {\n-\t\ttx_pkt = *tx_pkts++;\n-\t\tinc_len = 0;\n-\t\tnb_segs = tx_pkt->nb_segs;\n-\t\tif (nb_segs > vnic_wq_desc_avail(wq)) {\n-\t\t\t/* wq cleanup and try again */\n-\t\t\tif (!enic_cleanup_wq(enic, wq) ||\n-\t\t\t\t(nb_segs > vnic_wq_desc_avail(wq)))\n-\t\t\t\treturn index;\n-\t\t}\n-\t\tpkt_len = tx_pkt->pkt_len;\n-\t\tvlan_id = tx_pkt->vlan_tci;\n-\t\tol_flags = tx_pkt->ol_flags;\n-\t\tfor (frags = 0; inc_len < pkt_len; frags++) {\n-\t\t\tif (!tx_pkt)\n-\t\t\t\tbreak;\n-\t\t\tseg_len = tx_pkt->data_len;\n-\t\t\tinc_len += seg_len;\n-\t\t\tif (enic_send_pkt(enic, wq, tx_pkt,\n-\t\t\t\t    (unsigned short)seg_len, !frags,\n-\t\t\t\t    (pkt_len == inc_len), ol_flags, vlan_id)) {\n-\t\t\t\tbreak;\n-\t\t\t}\n-\t\t\ttx_pkt = tx_pkt->next;\n-\t\t}\n-\t}\n-\n-\tenic_cleanup_wq(enic, wq);\n-\treturn index;\n-}\n-\n-static uint16_t enicpmd_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n-\tuint16_t nb_pkts)\n-{\n-\tstruct vnic_rq *rq = (struct vnic_rq *)rx_queue;\n-\tunsigned int work_done;\n-\n-\tif (enic_poll(rq, rx_pkts, (unsigned int)nb_pkts, &work_done))\n-\t\tdev_err(enic, \"error in enicpmd poll\\n\");\n-\n-\treturn work_done;\n-}\n-\n-static const struct eth_dev_ops enicpmd_eth_dev_ops = {\n-\t.dev_configure        = enicpmd_dev_configure,\n-\t.dev_start            = enicpmd_dev_start,\n-\t.dev_stop             = enicpmd_dev_stop,\n-\t.dev_set_link_up      = NULL,\n-\t.dev_set_link_down    = NULL,\n-\t.dev_close            = enicpmd_dev_close,\n-\t.promiscuous_enable   = enicpmd_dev_promiscuous_enable,\n-\t.promiscuous_disable  = enicpmd_dev_promiscuous_disable,\n-\t.allmulticast_enable  = enicpmd_dev_allmulticast_enable,\n-\t.allmulticast_disable = enicpmd_dev_allmulticast_disable,\n-\t.link_update          = enicpmd_dev_link_update,\n-\t.stats_get            = enicpmd_dev_stats_get,\n-\t.stats_reset          = enicpmd_dev_stats_reset,\n-\t.queue_stats_mapping_set = NULL,\n-\t.dev_infos_get        = enicpmd_dev_info_get,\n-\t.mtu_set              = NULL,\n-\t.vlan_filter_set      = enicpmd_vlan_filter_set,\n-\t.vlan_tpid_set        = NULL,\n-\t.vlan_offload_set     = enicpmd_vlan_offload_set,\n-\t.vlan_strip_queue_set = NULL,\n-\t.rx_queue_start       = enicpmd_dev_rx_queue_start,\n-\t.rx_queue_stop        = enicpmd_dev_rx_queue_stop,\n-\t.tx_queue_start       = enicpmd_dev_tx_queue_start,\n-\t.tx_queue_stop        = enicpmd_dev_tx_queue_stop,\n-\t.rx_queue_setup       = enicpmd_dev_rx_queue_setup,\n-\t.rx_queue_release     = enicpmd_dev_rx_queue_release,\n-\t.rx_queue_count       = NULL,\n-\t.rx_descriptor_done   = NULL,\n-\t.tx_queue_setup       = enicpmd_dev_tx_queue_setup,\n-\t.tx_queue_release     = enicpmd_dev_tx_queue_release,\n-\t.dev_led_on           = NULL,\n-\t.dev_led_off          = NULL,\n-\t.flow_ctrl_get        = NULL,\n-\t.flow_ctrl_set        = NULL,\n-\t.priority_flow_ctrl_set = NULL,\n-\t.mac_addr_add         = enicpmd_add_mac_addr,\n-\t.mac_addr_remove      = enicpmd_remove_mac_addr,\n-\t.fdir_set_masks               = NULL,\n-\t.filter_ctrl          = enicpmd_dev_filter_ctrl,\n-};\n-\n-struct enic *enicpmd_list_head = NULL;\n-/* Initialize the driver\n- * It returns 0 on success.\n- */\n-static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev)\n-{\n-\tstruct rte_pci_device *pdev;\n-\tstruct rte_pci_addr *addr;\n-\tstruct enic *enic = pmd_priv(eth_dev);\n-\n-\tENICPMD_FUNC_TRACE();\n-\n-\tenic->port_id = eth_dev->data->port_id;\n-\tenic->rte_dev = eth_dev;\n-\teth_dev->dev_ops = &enicpmd_eth_dev_ops;\n-\teth_dev->rx_pkt_burst = &enicpmd_recv_pkts;\n-\teth_dev->tx_pkt_burst = &enicpmd_xmit_pkts;\n-\n-\tpdev = eth_dev->pci_dev;\n-\tenic->pdev = pdev;\n-\taddr = &pdev->addr;\n-\n-\tsnprintf(enic->bdf_name, ENICPMD_BDF_LENGTH, \"%04x:%02x:%02x.%x\",\n-\t\taddr->domain, addr->bus, addr->devid, addr->function);\n-\n-\treturn enic_probe(enic);\n-}\n-\n-static struct eth_driver rte_enic_pmd = {\n-\t{\n-\t\t.name = \"rte_enic_pmd\",\n-\t\t.id_table = pci_id_enic_map,\n-\t\t.drv_flags = RTE_PCI_DRV_NEED_MAPPING,\n-\t},\n-\t.eth_dev_init = eth_enicpmd_dev_init,\n-\t.dev_private_size = sizeof(struct enic),\n-};\n-\n-/* Driver initialization routine.\n- * Invoked once at EAL init time.\n- * Register as the [Poll Mode] Driver of Cisco ENIC device.\n- */\n-static int\n-rte_enic_pmd_init(const char *name __rte_unused,\n-\tconst char *params __rte_unused)\n-{\n-\tENICPMD_FUNC_TRACE();\n-\n-\trte_eth_driver_register(&rte_enic_pmd);\n-\treturn 0;\n-}\n-\n-static struct rte_driver rte_enic_driver = {\n-\t.type = PMD_PDEV,\n-\t.init = rte_enic_pmd_init,\n-};\n-\n-PMD_REGISTER_DRIVER(rte_enic_driver);\ndiff --git a/lib/librte_pmd_enic/enic_main.c b/lib/librte_pmd_enic/enic_main.c\ndeleted file mode 100644\nindex 15313c2..0000000\n--- a/lib/librte_pmd_enic/enic_main.c\n+++ /dev/null\n@@ -1,1117 +0,0 @@\n-/*\n- * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id$\"\n-\n-#include <stdio.h>\n-\n-#include <sys/stat.h>\n-#include <sys/mman.h>\n-#include <fcntl.h>\n-#include <libgen.h>\n-\n-#include <rte_pci.h>\n-#include <rte_memzone.h>\n-#include <rte_malloc.h>\n-#include <rte_mbuf.h>\n-#include <rte_string_fns.h>\n-#include <rte_ethdev.h>\n-\n-#include \"enic_compat.h\"\n-#include \"enic.h\"\n-#include \"wq_enet_desc.h\"\n-#include \"rq_enet_desc.h\"\n-#include \"cq_enet_desc.h\"\n-#include \"vnic_enet.h\"\n-#include \"vnic_dev.h\"\n-#include \"vnic_wq.h\"\n-#include \"vnic_rq.h\"\n-#include \"vnic_cq.h\"\n-#include \"vnic_intr.h\"\n-#include \"vnic_nic.h\"\n-\n-static inline int enic_is_sriov_vf(struct enic *enic)\n-{\n-\treturn enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;\n-}\n-\n-static int is_zero_addr(uint8_t *addr)\n-{\n-\treturn !(addr[0] |  addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);\n-}\n-\n-static int is_mcast_addr(uint8_t *addr)\n-{\n-\treturn addr[0] & 1;\n-}\n-\n-static int is_eth_addr_valid(uint8_t *addr)\n-{\n-\treturn !is_mcast_addr(addr) && !is_zero_addr(addr);\n-}\n-\n-static inline struct rte_mbuf *\n-enic_rxmbuf_alloc(struct rte_mempool *mp)\n-{\n-\tstruct rte_mbuf *m;\n-\n-\tm = __rte_mbuf_raw_alloc(mp);\n-\t__rte_mbuf_sanity_check_raw(m, 0);\n-\treturn m;\n-}\n-\n-void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)\n-{\n-\tvnic_set_hdr_split_size(enic->vdev, split_hdr_size);\n-}\n-\n-static void enic_free_wq_buf(__rte_unused struct vnic_wq *wq, struct vnic_wq_buf *buf)\n-{\n-\tstruct rte_mbuf *mbuf = (struct rte_mbuf *)buf->os_buf;\n-\n-\trte_mempool_put(mbuf->pool, mbuf);\n-\tbuf->os_buf = NULL;\n-}\n-\n-static void enic_wq_free_buf(struct vnic_wq *wq,\n-\t__rte_unused struct cq_desc *cq_desc,\n-\tstruct vnic_wq_buf *buf,\n-\t__rte_unused void *opaque)\n-{\n-\tenic_free_wq_buf(wq, buf);\n-}\n-\n-static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,\n-\t__rte_unused u8 type, u16 q_number, u16 completed_index, void *opaque)\n-{\n-\tstruct enic *enic = vnic_dev_priv(vdev);\n-\n-\tvnic_wq_service(&enic->wq[q_number], cq_desc,\n-\t\tcompleted_index, enic_wq_free_buf,\n-\t\topaque);\n-\n-\treturn 0;\n-}\n-\n-static void enic_log_q_error(struct enic *enic)\n-{\n-\tunsigned int i;\n-\tu32 error_status;\n-\n-\tfor (i = 0; i < enic->wq_count; i++) {\n-\t\terror_status = vnic_wq_error_status(&enic->wq[i]);\n-\t\tif (error_status)\n-\t\t\tdev_err(enic, \"WQ[%d] error_status %d\\n\", i,\n-\t\t\t\terror_status);\n-\t}\n-\n-\tfor (i = 0; i < enic->rq_count; i++) {\n-\t\terror_status = vnic_rq_error_status(&enic->rq[i]);\n-\t\tif (error_status)\n-\t\t\tdev_err(enic, \"RQ[%d] error_status %d\\n\", i,\n-\t\t\t\terror_status);\n-\t}\n-}\n-\n-unsigned int enic_cleanup_wq(struct enic *enic, struct vnic_wq *wq)\n-{\n-\tunsigned int cq = enic_cq_wq(enic, wq->index);\n-\n-\t/* Return the work done */\n-\treturn vnic_cq_service(&enic->cq[cq],\n-\t\t-1 /*wq_work_to_do*/, enic_wq_service, NULL);\n-}\n-\n-\n-int enic_send_pkt(struct enic *enic, struct vnic_wq *wq,\n-\tstruct rte_mbuf *tx_pkt, unsigned short len,\n-\tuint8_t sop, uint8_t eop,\n-\tuint16_t ol_flags, uint16_t vlan_tag)\n-{\n-\tstruct wq_enet_desc *desc = vnic_wq_next_desc(wq);\n-\tuint16_t mss = 0;\n-\tuint8_t cq_entry = eop;\n-\tuint8_t vlan_tag_insert = 0;\n-\tuint64_t bus_addr = (dma_addr_t)\n-\t    (tx_pkt->buf_physaddr + RTE_PKTMBUF_HEADROOM);\n-\n-\tif (sop) {\n-\t\tif (ol_flags & PKT_TX_VLAN_PKT)\n-\t\t\tvlan_tag_insert = 1;\n-\n-\t\tif (enic->hw_ip_checksum) {\n-\t\t\tif (ol_flags & PKT_TX_IP_CKSUM)\n-\t\t\t\tmss |= ENIC_CALC_IP_CKSUM;\n-\n-\t\t\tif (ol_flags & PKT_TX_TCP_UDP_CKSUM)\n-\t\t\t\tmss |= ENIC_CALC_TCP_UDP_CKSUM;\n-\t\t}\n-\t}\n-\n-\twq_enet_desc_enc(desc,\n-\t\tbus_addr,\n-\t\tlen,\n-\t\tmss,\n-\t\t0 /* header_length */,\n-\t\t0 /* offload_mode WQ_ENET_OFFLOAD_MODE_CSUM */,\n-\t\teop,\n-\t\tcq_entry,\n-\t\t0 /* fcoe_encap */,\n-\t\tvlan_tag_insert,\n-\t\tvlan_tag,\n-\t\t0 /* loopback */);\n-\n-\tvnic_wq_post(wq, (void *)tx_pkt, bus_addr, len,\n-\t\tsop, eop,\n-\t\t1 /*desc_skip_cnt*/,\n-\t\tcq_entry,\n-\t\t0 /*compressed send*/,\n-\t\t0 /*wrid*/);\n-\n-\treturn 0;\n-}\n-\n-void enic_dev_stats_clear(struct enic *enic)\n-{\n-\tif (vnic_dev_stats_clear(enic->vdev))\n-\t\tdev_err(enic, \"Error in clearing stats\\n\");\n-}\n-\n-void enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)\n-{\n-\tstruct vnic_stats *stats;\n-\n-\tif (vnic_dev_stats_dump(enic->vdev, &stats)) {\n-\t\tdev_err(enic, \"Error in getting stats\\n\");\n-\t\treturn;\n-\t}\n-\n-\tr_stats->ipackets = stats->rx.rx_frames_ok;\n-\tr_stats->opackets = stats->tx.tx_frames_ok;\n-\n-\tr_stats->ibytes = stats->rx.rx_bytes_ok;\n-\tr_stats->obytes = stats->tx.tx_bytes_ok;\n-\n-\tr_stats->ierrors = stats->rx.rx_errors;\n-\tr_stats->oerrors = stats->tx.tx_errors;\n-\n-\tr_stats->imcasts = stats->rx.rx_multicast_frames_ok;\n-\tr_stats->rx_nombuf = stats->rx.rx_no_bufs;\n-}\n-\n-void enic_del_mac_address(struct enic *enic)\n-{\n-\tif (vnic_dev_del_addr(enic->vdev, enic->mac_addr))\n-\t\tdev_err(enic, \"del mac addr failed\\n\");\n-}\n-\n-void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)\n-{\n-\tint err;\n-\n-\tif (!is_eth_addr_valid(mac_addr)) {\n-\t\tdev_err(enic, \"invalid mac address\\n\");\n-\t\treturn;\n-\t}\n-\n-\terr = vnic_dev_del_addr(enic->vdev, mac_addr);\n-\tif (err) {\n-\t\tdev_err(enic, \"del mac addr failed\\n\");\n-\t\treturn;\n-\t}\n-\n-\tether_addr_copy((struct ether_addr *)mac_addr,\n-\t\t(struct ether_addr *)enic->mac_addr);\n-\n-\terr = vnic_dev_add_addr(enic->vdev, mac_addr);\n-\tif (err) {\n-\t\tdev_err(enic, \"add mac addr failed\\n\");\n-\t\treturn;\n-\t}\n-}\n-\n-static void\n-enic_free_rq_buf(__rte_unused struct vnic_rq *rq, struct vnic_rq_buf *buf)\n-{\n-\tif (!buf->os_buf)\n-\t\treturn;\n-\n-\trte_pktmbuf_free((struct rte_mbuf *)buf->os_buf);\n-\tbuf->os_buf = NULL;\n-}\n-\n-void enic_init_vnic_resources(struct enic *enic)\n-{\n-\tunsigned int error_interrupt_enable = 1;\n-\tunsigned int error_interrupt_offset = 0;\n-\tunsigned int index = 0;\n-\n-\tfor (index = 0; index < enic->rq_count; index++) {\n-\t\tvnic_rq_init(&enic->rq[index],\n-\t\t\tenic_cq_rq(enic, index),\n-\t\t\terror_interrupt_enable,\n-\t\t\terror_interrupt_offset);\n-\t}\n-\n-\tfor (index = 0; index < enic->wq_count; index++) {\n-\t\tvnic_wq_init(&enic->wq[index],\n-\t\t\tenic_cq_wq(enic, index),\n-\t\t\terror_interrupt_enable,\n-\t\t\terror_interrupt_offset);\n-\t}\n-\n-\tvnic_dev_stats_clear(enic->vdev);\n-\n-\tfor (index = 0; index < enic->cq_count; index++) {\n-\t\tvnic_cq_init(&enic->cq[index],\n-\t\t\t0 /* flow_control_enable */,\n-\t\t\t1 /* color_enable */,\n-\t\t\t0 /* cq_head */,\n-\t\t\t0 /* cq_tail */,\n-\t\t\t1 /* cq_tail_color */,\n-\t\t\t0 /* interrupt_enable */,\n-\t\t\t1 /* cq_entry_enable */,\n-\t\t\t0 /* cq_message_enable */,\n-\t\t\t0 /* interrupt offset */,\n-\t\t\t0 /* cq_message_addr */);\n-\t}\n-\n-\tvnic_intr_init(&enic->intr,\n-\t\tenic->config.intr_timer_usec,\n-\t\tenic->config.intr_timer_type,\n-\t\t/*mask_on_assertion*/1);\n-}\n-\n-\n-static int enic_rq_alloc_buf(struct vnic_rq *rq)\n-{\n-\tstruct enic *enic = vnic_dev_priv(rq->vdev);\n-\tdma_addr_t dma_addr;\n-\tstruct rq_enet_desc *desc = vnic_rq_next_desc(rq);\n-\tuint8_t type = RQ_ENET_TYPE_ONLY_SOP;\n-\tu16 split_hdr_size = vnic_get_hdr_split_size(enic->vdev);\n-\tstruct rte_mbuf *mbuf = enic_rxmbuf_alloc(rq->mp);\n-\tstruct rte_mbuf *hdr_mbuf = NULL;\n-\n-\tif (!mbuf) {\n-\t\tdev_err(enic, \"mbuf alloc in enic_rq_alloc_buf failed\\n\");\n-\t\treturn -1;\n-\t}\n-\n-\tif (unlikely(split_hdr_size)) {\n-\t\tif (vnic_rq_desc_avail(rq) < 2) {\n-\t\t\trte_mempool_put(mbuf->pool, mbuf);\n-\t\t\treturn -1;\n-\t\t}\n-\t\thdr_mbuf = enic_rxmbuf_alloc(rq->mp);\n-\t\tif (!hdr_mbuf) {\n-\t\t\trte_mempool_put(mbuf->pool, mbuf);\n-\t\t\tdev_err(enic,\n-\t\t\t\t\"hdr_mbuf alloc in enic_rq_alloc_buf failed\\n\");\n-\t\t\treturn -1;\n-\t\t}\n-\n-\t\thdr_mbuf->data_off = RTE_PKTMBUF_HEADROOM;\n-\n-\t\thdr_mbuf->nb_segs = 2;\n-\t\thdr_mbuf->port = enic->port_id;\n-\t\thdr_mbuf->next = mbuf;\n-\n-\t\tdma_addr = (dma_addr_t)\n-\t\t    (hdr_mbuf->buf_physaddr + hdr_mbuf->data_off);\n-\n-\t\trq_enet_desc_enc(desc, dma_addr, type, split_hdr_size);\n-\n-\t\tvnic_rq_post(rq, (void *)hdr_mbuf, 0 /*os_buf_index*/, dma_addr,\n-\t\t\t(unsigned int)split_hdr_size, 0 /*wrid*/);\n-\n-\t\tdesc = vnic_rq_next_desc(rq);\n-\t\ttype = RQ_ENET_TYPE_NOT_SOP;\n-\t} else {\n-\t\tmbuf->nb_segs = 1;\n-\t\tmbuf->port = enic->port_id;\n-\t}\n-\n-\tmbuf->data_off = RTE_PKTMBUF_HEADROOM;\n-\tmbuf->next = NULL;\n-\n-\tdma_addr = (dma_addr_t)\n-\t    (mbuf->buf_physaddr + mbuf->data_off);\n-\n-\trq_enet_desc_enc(desc, dma_addr, type, mbuf->buf_len);\n-\n-\tvnic_rq_post(rq, (void *)mbuf, 0 /*os_buf_index*/, dma_addr,\n-\t\t(unsigned int)mbuf->buf_len, 0 /*wrid*/);\n-\n-\treturn 0;\n-}\n-\n-static int enic_rq_indicate_buf(struct vnic_rq *rq,\n-\tstruct cq_desc *cq_desc, struct vnic_rq_buf *buf,\n-\tint skipped, void *opaque)\n-{\n-\tstruct enic *enic = vnic_dev_priv(rq->vdev);\n-\tstruct rte_mbuf **rx_pkt_bucket = (struct rte_mbuf **)opaque;\n-\tstruct rte_mbuf *rx_pkt = NULL;\n-\tstruct rte_mbuf *hdr_rx_pkt = NULL;\n-\n-\tu8 type, color, eop, sop, ingress_port, vlan_stripped;\n-\tu8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;\n-\tu8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;\n-\tu8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;\n-\tu8 packet_error;\n-\tu16 q_number, completed_index, bytes_written, vlan_tci, checksum;\n-\tu32 rss_hash;\n-\n-\tcq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,\n-\t\t&type, &color, &q_number, &completed_index,\n-\t\t&ingress_port, &fcoe, &eop, &sop, &rss_type,\n-\t\t&csum_not_calc, &rss_hash, &bytes_written,\n-\t\t&packet_error, &vlan_stripped, &vlan_tci, &checksum,\n-\t\t&fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,\n-\t\t&fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,\n-\t\t&ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,\n-\t\t&fcs_ok);\n-\n-\trx_pkt = (struct rte_mbuf *)buf->os_buf;\n-\tbuf->os_buf = NULL;\n-\n-\tif (unlikely(packet_error)) {\n-\t\tdev_err(enic, \"packet error\\n\");\n-\t\trx_pkt->data_len = 0;\n-\t\treturn 0;\n-\t}\n-\n-\tif (unlikely(skipped)) {\n-\t\trx_pkt->data_len = 0;\n-\t\treturn 0;\n-\t}\n-\n-\tif (likely(!vnic_get_hdr_split_size(enic->vdev))) {\n-\t\t/* No header split configured */\n-\t\t*rx_pkt_bucket = rx_pkt;\n-\t\trx_pkt->pkt_len = bytes_written;\n-\n-\t\tif (ipv4) {\n-\t\t\trx_pkt->ol_flags |= PKT_RX_IPV4_HDR;\n-\t\t\tif (!csum_not_calc) {\n-\t\t\t\tif (unlikely(!ipv4_csum_ok))\n-\t\t\t\t\trx_pkt->ol_flags |= PKT_RX_IP_CKSUM_BAD;\n-\n-\t\t\t\tif ((tcp || udp) && (!tcp_udp_csum_ok))\n-\t\t\t\t\trx_pkt->ol_flags |= PKT_RX_L4_CKSUM_BAD;\n-\t\t\t}\n-\t\t} else if (ipv6)\n-\t\t\trx_pkt->ol_flags |= PKT_RX_IPV6_HDR;\n-\t} else {\n-\t\t/* Header split */\n-\t\tif (sop && !eop) {\n-\t\t\t/* This piece is header */\n-\t\t\t*rx_pkt_bucket = rx_pkt;\n-\t\t\trx_pkt->pkt_len = bytes_written;\n-\t\t} else {\n-\t\t\tif (sop && eop) {\n-\t\t\t\t/* The packet is smaller than split_hdr_size */\n-\t\t\t\t*rx_pkt_bucket = rx_pkt;\n-\t\t\t\trx_pkt->pkt_len = bytes_written;\n-\t\t\t\tif (ipv4) {\n-\t\t\t\t\trx_pkt->ol_flags |= PKT_RX_IPV4_HDR;\n-\t\t\t\t\tif (!csum_not_calc) {\n-\t\t\t\t\t\tif (unlikely(!ipv4_csum_ok))\n-\t\t\t\t\t\t\trx_pkt->ol_flags |=\n-\t\t\t\t\t\t\t    PKT_RX_IP_CKSUM_BAD;\n-\n-\t\t\t\t\t\tif ((tcp || udp) &&\n-\t\t\t\t\t\t    (!tcp_udp_csum_ok))\n-\t\t\t\t\t\t\trx_pkt->ol_flags |=\n-\t\t\t\t\t\t\t    PKT_RX_L4_CKSUM_BAD;\n-\t\t\t\t\t}\n-\t\t\t\t} else if (ipv6)\n-\t\t\t\t\trx_pkt->ol_flags |= PKT_RX_IPV6_HDR;\n-\t\t\t} else {\n-\t\t\t\t/* Payload */\n-\t\t\t\thdr_rx_pkt = *rx_pkt_bucket;\n-\t\t\t\thdr_rx_pkt->pkt_len += bytes_written;\n-\t\t\t\tif (ipv4) {\n-\t\t\t\t\thdr_rx_pkt->ol_flags |= PKT_RX_IPV4_HDR;\n-\t\t\t\t\tif (!csum_not_calc) {\n-\t\t\t\t\t\tif (unlikely(!ipv4_csum_ok))\n-\t\t\t\t\t\t\thdr_rx_pkt->ol_flags |=\n-\t\t\t\t\t\t\t    PKT_RX_IP_CKSUM_BAD;\n-\n-\t\t\t\t\t\tif ((tcp || udp) &&\n-\t\t\t\t\t\t    (!tcp_udp_csum_ok))\n-\t\t\t\t\t\t\thdr_rx_pkt->ol_flags |=\n-\t\t\t\t\t\t\t    PKT_RX_L4_CKSUM_BAD;\n-\t\t\t\t\t}\n-\t\t\t\t} else if (ipv6)\n-\t\t\t\t\thdr_rx_pkt->ol_flags |= PKT_RX_IPV6_HDR;\n-\n-\t\t\t}\n-\t\t}\n-\t}\n-\n-\trx_pkt->data_len = bytes_written;\n-\n-\tif (rss_hash) {\n-\t\trx_pkt->ol_flags |= PKT_RX_RSS_HASH;\n-\t\trx_pkt->hash.rss = rss_hash;\n-\t}\n-\n-\tif (vlan_tci) {\n-\t\trx_pkt->ol_flags |= PKT_RX_VLAN_PKT;\n-\t\trx_pkt->vlan_tci = vlan_tci;\n-\t}\n-\n-\treturn eop;\n-}\n-\n-static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,\n-\t__rte_unused u8 type, u16 q_number, u16 completed_index, void *opaque)\n-{\n-\tstruct enic *enic = vnic_dev_priv(vdev);\n-\n-\treturn vnic_rq_service(&enic->rq[q_number], cq_desc,\n-\t\tcompleted_index, VNIC_RQ_RETURN_DESC,\n-\t\tenic_rq_indicate_buf, opaque);\n-\n-}\n-\n-int enic_poll(struct vnic_rq *rq, struct rte_mbuf **rx_pkts,\n-\tunsigned int budget, unsigned int *work_done)\n-{\n-\tstruct enic *enic = vnic_dev_priv(rq->vdev);\n-\tunsigned int cq = enic_cq_rq(enic, rq->index);\n-\tint err = 0;\n-\n-\t*work_done = vnic_cq_service(&enic->cq[cq],\n-\t\tbudget, enic_rq_service, (void *)rx_pkts);\n-\n-\tif (*work_done) {\n-\t\tvnic_rq_fill(rq, enic_rq_alloc_buf);\n-\n-\t\t/* Need at least one buffer on ring to get going */\n-\t\tif (vnic_rq_desc_used(rq) == 0) {\n-\t\t\tdev_err(enic, \"Unable to alloc receive buffers\\n\");\n-\t\t\terr = -1;\n-\t\t}\n-\t}\n-\treturn err;\n-}\n-\n-static void *\n-enic_alloc_consistent(__rte_unused void *priv, size_t size,\n-\tdma_addr_t *dma_handle, u8 *name)\n-{\n-\tvoid *vaddr;\n-\tconst struct rte_memzone *rz;\n-\t*dma_handle = 0;\n-\n-\trz = rte_memzone_reserve_aligned((const char *)name,\n-\t\tsize, 0, 0, ENIC_ALIGN);\n-\tif (!rz) {\n-\t\tpr_err(\"%s : Failed to allocate memory requested for %s\",\n-\t\t\t__func__, name);\n-\t\treturn NULL;\n-\t}\n-\n-\tvaddr = rz->addr;\n-\t*dma_handle = (dma_addr_t)rz->phys_addr;\n-\n-\treturn vaddr;\n-}\n-\n-static void\n-enic_free_consistent(__rte_unused struct rte_pci_device *hwdev,\n-\t__rte_unused size_t size,\n-\t__rte_unused void *vaddr,\n-\t__rte_unused dma_addr_t dma_handle)\n-{\n-\t/* Nothing to be done */\n-}\n-\n-static void\n-enic_intr_handler(__rte_unused struct rte_intr_handle *handle,\n-\tvoid *arg)\n-{\n-\tstruct enic *enic = pmd_priv((struct rte_eth_dev *)arg);\n-\n-\tvnic_intr_return_all_credits(&enic->intr);\n-\n-\tenic_log_q_error(enic);\n-}\n-\n-int enic_enable(struct enic *enic)\n-{\n-\tunsigned int index;\n-\tstruct rte_eth_dev *eth_dev = enic->rte_dev;\n-\n-\teth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);\n-\teth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;\n-\tvnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */\n-\n-\tif (enic_clsf_init(enic))\n-\t\tdev_warning(enic, \"Init of hash table for clsf failed.\"\\\n-\t\t\t\"Flow director feature will not work\\n\");\n-\n-\t/* Fill RQ bufs */\n-\tfor (index = 0; index < enic->rq_count; index++) {\n-\t\tvnic_rq_fill(&enic->rq[index], enic_rq_alloc_buf);\n-\n-\t\t/* Need at least one buffer on ring to get going\n-\t\t*/\n-\t\tif (vnic_rq_desc_used(&enic->rq[index]) == 0) {\n-\t\t\tdev_err(enic, \"Unable to alloc receive buffers\\n\");\n-\t\t\treturn -1;\n-\t\t}\n-\t}\n-\n-\tfor (index = 0; index < enic->wq_count; index++)\n-\t\tvnic_wq_enable(&enic->wq[index]);\n-\tfor (index = 0; index < enic->rq_count; index++)\n-\t\tvnic_rq_enable(&enic->rq[index]);\n-\n-\tvnic_dev_enable_wait(enic->vdev);\n-\n-\t/* Register and enable error interrupt */\n-\trte_intr_callback_register(&(enic->pdev->intr_handle),\n-\t\tenic_intr_handler, (void *)enic->rte_dev);\n-\n-\trte_intr_enable(&(enic->pdev->intr_handle));\n-\tvnic_intr_unmask(&enic->intr);\n-\n-\treturn 0;\n-}\n-\n-int enic_alloc_intr_resources(struct enic *enic)\n-{\n-\tint err;\n-\n-\tdev_info(enic, \"vNIC resources used:  \"\\\n-\t\t\"wq %d rq %d cq %d intr %d\\n\",\n-\t\tenic->wq_count, enic->rq_count,\n-\t\tenic->cq_count, enic->intr_count);\n-\n-\terr = vnic_intr_alloc(enic->vdev, &enic->intr, 0);\n-\tif (err)\n-\t\tenic_free_vnic_resources(enic);\n-\n-\treturn err;\n-}\n-\n-void enic_free_rq(void *rxq)\n-{\n-\tstruct vnic_rq *rq = (struct vnic_rq *)rxq;\n-\tstruct enic *enic = vnic_dev_priv(rq->vdev);\n-\n-\tvnic_rq_free(rq);\n-\tvnic_cq_free(&enic->cq[rq->index]);\n-}\n-\n-void enic_start_wq(struct enic *enic, uint16_t queue_idx)\n-{\n-\tvnic_wq_enable(&enic->wq[queue_idx]);\n-}\n-\n-int enic_stop_wq(struct enic *enic, uint16_t queue_idx)\n-{\n-\treturn vnic_wq_disable(&enic->wq[queue_idx]);\n-}\n-\n-void enic_start_rq(struct enic *enic, uint16_t queue_idx)\n-{\n-\tvnic_rq_enable(&enic->rq[queue_idx]);\n-}\n-\n-int enic_stop_rq(struct enic *enic, uint16_t queue_idx)\n-{\n-\treturn vnic_rq_disable(&enic->rq[queue_idx]);\n-}\n-\n-int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,\n-\tunsigned int socket_id, struct rte_mempool *mp,\n-\tuint16_t nb_desc)\n-{\n-\tint err;\n-\tstruct vnic_rq *rq = &enic->rq[queue_idx];\n-\n-\trq->socket_id = socket_id;\n-\trq->mp = mp;\n-\n-\tif (nb_desc) {\n-\t\tif (nb_desc > enic->config.rq_desc_count) {\n-\t\t\tdev_warning(enic,\n-\t\t\t\t\"RQ %d - number of rx desc in cmd line (%d)\"\\\n-\t\t\t\t\"is greater than that in the UCSM/CIMC adapter\"\\\n-\t\t\t\t\"policy.  Applying the value in the adapter \"\\\n-\t\t\t\t\"policy (%d).\\n\",\n-\t\t\t\tqueue_idx, nb_desc, enic->config.rq_desc_count);\n-\t\t} else if (nb_desc != enic->config.rq_desc_count) {\n-\t\t\tenic->config.rq_desc_count = nb_desc;\n-\t\t\tdev_info(enic,\n-\t\t\t\t\"RX Queues - effective number of descs:%d\\n\",\n-\t\t\t\tnb_desc);\n-\t\t}\n-\t}\n-\n-\t/* Allocate queue resources */\n-\terr = vnic_rq_alloc(enic->vdev, &enic->rq[queue_idx], queue_idx,\n-\t\tenic->config.rq_desc_count,\n-\t\tsizeof(struct rq_enet_desc));\n-\tif (err) {\n-\t\tdev_err(enic, \"error in allocation of rq\\n\");\n-\t\treturn err;\n-\t}\n-\n-\terr = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,\n-\t\tsocket_id, enic->config.rq_desc_count,\n-\t\tsizeof(struct cq_enet_rq_desc));\n-\tif (err) {\n-\t\tvnic_rq_free(rq);\n-\t\tdev_err(enic, \"error in allocation of cq for rq\\n\");\n-\t}\n-\n-\treturn err;\n-}\n-\n-void enic_free_wq(void *txq)\n-{\n-\tstruct vnic_wq *wq = (struct vnic_wq *)txq;\n-\tstruct enic *enic = vnic_dev_priv(wq->vdev);\n-\n-\tvnic_wq_free(wq);\n-\tvnic_cq_free(&enic->cq[enic->rq_count + wq->index]);\n-}\n-\n-int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,\n-\tunsigned int socket_id, uint16_t nb_desc)\n-{\n-\tint err;\n-\tstruct vnic_wq *wq = &enic->wq[queue_idx];\n-\tunsigned int cq_index = enic_cq_wq(enic, queue_idx);\n-\n-\twq->socket_id = socket_id;\n-\tif (nb_desc) {\n-\t\tif (nb_desc > enic->config.wq_desc_count) {\n-\t\t\tdev_warning(enic,\n-\t\t\t\t\"WQ %d - number of tx desc in cmd line (%d)\"\\\n-\t\t\t\t\"is greater than that in the UCSM/CIMC adapter\"\\\n-\t\t\t\t\"policy.  Applying the value in the adapter \"\\\n-\t\t\t\t\"policy (%d)\\n\",\n-\t\t\t\tqueue_idx, nb_desc, enic->config.wq_desc_count);\n-\t\t} else if (nb_desc != enic->config.wq_desc_count) {\n-\t\t\tenic->config.wq_desc_count = nb_desc;\n-\t\t\tdev_info(enic,\n-\t\t\t\t\"TX Queues - effective number of descs:%d\\n\",\n-\t\t\t\tnb_desc);\n-\t\t}\n-\t}\n-\n-\t/* Allocate queue resources */\n-\terr = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,\n-\t\tenic->config.wq_desc_count,\n-\t\tsizeof(struct wq_enet_desc));\n-\tif (err) {\n-\t\tdev_err(enic, \"error in allocation of wq\\n\");\n-\t\treturn err;\n-\t}\n-\n-\terr = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,\n-\t\tsocket_id, enic->config.wq_desc_count,\n-\t\tsizeof(struct cq_enet_wq_desc));\n-\tif (err) {\n-\t\tvnic_wq_free(wq);\n-\t\tdev_err(enic, \"error in allocation of cq for wq\\n\");\n-\t}\n-\n-\treturn err;\n-}\n-\n-int enic_disable(struct enic *enic)\n-{\n-\tunsigned int i;\n-\tint err;\n-\n-\tvnic_intr_mask(&enic->intr);\n-\t(void)vnic_intr_masked(&enic->intr); /* flush write */\n-\n-\tvnic_dev_disable(enic->vdev);\n-\n-\tenic_clsf_destroy(enic);\n-\n-\tif (!enic_is_sriov_vf(enic))\n-\t\tvnic_dev_del_addr(enic->vdev, enic->mac_addr);\n-\n-\tfor (i = 0; i < enic->wq_count; i++) {\n-\t\terr = vnic_wq_disable(&enic->wq[i]);\n-\t\tif (err)\n-\t\t\treturn err;\n-\t}\n-\tfor (i = 0; i < enic->rq_count; i++) {\n-\t\terr = vnic_rq_disable(&enic->rq[i]);\n-\t\tif (err)\n-\t\t\treturn err;\n-\t}\n-\n-\tvnic_dev_set_reset_flag(enic->vdev, 1);\n-\tvnic_dev_notify_unset(enic->vdev);\n-\n-\tfor (i = 0; i < enic->wq_count; i++)\n-\t\tvnic_wq_clean(&enic->wq[i], enic_free_wq_buf);\n-\tfor (i = 0; i < enic->rq_count; i++)\n-\t\tvnic_rq_clean(&enic->rq[i], enic_free_rq_buf);\n-\tfor (i = 0; i < enic->cq_count; i++)\n-\t\tvnic_cq_clean(&enic->cq[i]);\n-\tvnic_intr_clean(&enic->intr);\n-\n-\treturn 0;\n-}\n-\n-static int enic_dev_wait(struct vnic_dev *vdev,\n-\tint (*start)(struct vnic_dev *, int),\n-\tint (*finished)(struct vnic_dev *, int *),\n-\tint arg)\n-{\n-\tint done;\n-\tint err;\n-\tint i;\n-\n-\terr = start(vdev, arg);\n-\tif (err)\n-\t\treturn err;\n-\n-\t/* Wait for func to complete...2 seconds max */\n-\tfor (i = 0; i < 2000; i++) {\n-\t\terr = finished(vdev, &done);\n-\t\tif (err)\n-\t\t\treturn err;\n-\t\tif (done)\n-\t\t\treturn 0;\n-\t\tusleep(1000);\n-\t}\n-\treturn -ETIMEDOUT;\n-}\n-\n-static int enic_dev_open(struct enic *enic)\n-{\n-\tint err;\n-\n-\terr = enic_dev_wait(enic->vdev, vnic_dev_open,\n-\t\tvnic_dev_open_done, 0);\n-\tif (err)\n-\t\tdev_err(enic_get_dev(enic),\n-\t\t\t\"vNIC device open failed, err %d\\n\", err);\n-\n-\treturn err;\n-}\n-\n-static int enic_set_rsskey(struct enic *enic)\n-{\n-\tdma_addr_t rss_key_buf_pa;\n-\tunion vnic_rss_key *rss_key_buf_va = NULL;\n-\tstatic union vnic_rss_key rss_key = {\n-\t\t.key = {\n-\t\t\t[0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},\n-\t\t\t[1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},\n-\t\t\t[2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},\n-\t\t\t[3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},\n-\t\t}\n-\t};\n-\tint err;\n-\tu8 name[NAME_MAX];\n-\n-\tsnprintf((char *)name, NAME_MAX, \"rss_key-%s\", enic->bdf_name);\n-\trss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),\n-\t\t&rss_key_buf_pa, name);\n-\tif (!rss_key_buf_va)\n-\t\treturn -ENOMEM;\n-\n-\trte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));\n-\n-\terr = enic_set_rss_key(enic,\n-\t\trss_key_buf_pa,\n-\t\tsizeof(union vnic_rss_key));\n-\n-\tenic_free_consistent(enic->pdev, sizeof(union vnic_rss_key),\n-\t\trss_key_buf_va, rss_key_buf_pa);\n-\n-\treturn err;\n-}\n-\n-static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)\n-{\n-\tdma_addr_t rss_cpu_buf_pa;\n-\tunion vnic_rss_cpu *rss_cpu_buf_va = NULL;\n-\tint i;\n-\tint err;\n-\tu8 name[NAME_MAX];\n-\n-\tsnprintf((char *)name, NAME_MAX, \"rss_cpu-%s\", enic->bdf_name);\n-\trss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),\n-\t\t&rss_cpu_buf_pa, name);\n-\tif (!rss_cpu_buf_va)\n-\t\treturn -ENOMEM;\n-\n-\tfor (i = 0; i < (1 << rss_hash_bits); i++)\n-\t\t(*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;\n-\n-\terr = enic_set_rss_cpu(enic,\n-\t\trss_cpu_buf_pa,\n-\t\tsizeof(union vnic_rss_cpu));\n-\n-\tenic_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),\n-\t\trss_cpu_buf_va, rss_cpu_buf_pa);\n-\n-\treturn err;\n-}\n-\n-static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,\n-\tu8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)\n-{\n-\tconst u8 tso_ipid_split_en = 0;\n-\tint err;\n-\n-\t/* Enable VLAN tag stripping */\n-\n-\terr = enic_set_nic_cfg(enic,\n-\t\trss_default_cpu, rss_hash_type,\n-\t\trss_hash_bits, rss_base_cpu,\n-\t\trss_enable, tso_ipid_split_en,\n-\t\tenic->ig_vlan_strip_en);\n-\n-\treturn err;\n-}\n-\n-int enic_set_rss_nic_cfg(struct enic *enic)\n-{\n-\tconst u8 rss_default_cpu = 0;\n-\tconst u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |\n-\t    NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |\n-\t    NIC_CFG_RSS_HASH_TYPE_IPV6 |\n-\t    NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;\n-\tconst u8 rss_hash_bits = 7;\n-\tconst u8 rss_base_cpu = 0;\n-\tu8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);\n-\n-\tif (rss_enable) {\n-\t\tif (!enic_set_rsskey(enic)) {\n-\t\t\tif (enic_set_rsscpu(enic, rss_hash_bits)) {\n-\t\t\t\trss_enable = 0;\n-\t\t\t\tdev_warning(enic, \"RSS disabled, \"\\\n-\t\t\t\t\t\"Failed to set RSS cpu indirection table.\");\n-\t\t\t}\n-\t\t} else {\n-\t\t\trss_enable = 0;\n-\t\t\tdev_warning(enic,\n-\t\t\t\t\"RSS disabled, Failed to set RSS key.\\n\");\n-\t\t}\n-\t}\n-\n-\treturn enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,\n-\t\trss_hash_bits, rss_base_cpu, rss_enable);\n-}\n-\n-int enic_setup_finish(struct enic *enic)\n-{\n-\tint ret;\n-\n-\tret = enic_set_rss_nic_cfg(enic);\n-\tif (ret) {\n-\t\tdev_err(enic, \"Failed to config nic, aborting.\\n\");\n-\t\treturn -1;\n-\t}\n-\n-\tvnic_dev_add_addr(enic->vdev, enic->mac_addr);\n-\n-\t/* Default conf */\n-\tvnic_dev_packet_filter(enic->vdev,\n-\t\t1 /* directed  */,\n-\t\t1 /* multicast */,\n-\t\t1 /* broadcast */,\n-\t\t0 /* promisc   */,\n-\t\t1 /* allmulti  */);\n-\n-\tenic->promisc = 0;\n-\tenic->allmulti = 1;\n-\n-\treturn 0;\n-}\n-\n-void enic_add_packet_filter(struct enic *enic)\n-{\n-\t/* Args -> directed, multicast, broadcast, promisc, allmulti */\n-\tvnic_dev_packet_filter(enic->vdev, 1, 1, 1,\n-\t\tenic->promisc, enic->allmulti);\n-}\n-\n-int enic_get_link_status(struct enic *enic)\n-{\n-\treturn vnic_dev_link_status(enic->vdev);\n-}\n-\n-static void enic_dev_deinit(struct enic *enic)\n-{\n-\tstruct rte_eth_dev *eth_dev = enic->rte_dev;\n-\n-\trte_free(eth_dev->data->mac_addrs);\n-}\n-\n-\n-int enic_set_vnic_res(struct enic *enic)\n-{\n-\tstruct rte_eth_dev *eth_dev = enic->rte_dev;\n-\n-\tif ((enic->rq_count < eth_dev->data->nb_rx_queues) ||\n-\t\t(enic->wq_count < eth_dev->data->nb_tx_queues)) {\n-\t\tdev_err(dev, \"Not enough resources configured, aborting\\n\");\n-\t\treturn -1;\n-\t}\n-\n-\tenic->rq_count = eth_dev->data->nb_rx_queues;\n-\tenic->wq_count = eth_dev->data->nb_tx_queues;\n-\tif (enic->cq_count < (enic->rq_count + enic->wq_count)) {\n-\t\tdev_err(dev, \"Not enough resources configured, aborting\\n\");\n-\t\treturn -1;\n-\t}\n-\n-\tenic->cq_count = enic->rq_count + enic->wq_count;\n-\treturn 0;\n-}\n-\n-static int enic_dev_init(struct enic *enic)\n-{\n-\tint err;\n-\tstruct rte_eth_dev *eth_dev = enic->rte_dev;\n-\n-\tvnic_dev_intr_coal_timer_info_default(enic->vdev);\n-\n-\t/* Get vNIC configuration\n-\t*/\n-\terr = enic_get_vnic_config(enic);\n-\tif (err) {\n-\t\tdev_err(dev, \"Get vNIC configuration failed, aborting\\n\");\n-\t\treturn err;\n-\t}\n-\n-\teth_dev->data->mac_addrs = rte_zmalloc(\"enic_mac_addr\", ETH_ALEN, 0);\n-\tif (!eth_dev->data->mac_addrs) {\n-\t\tdev_err(enic, \"mac addr storage alloc failed, aborting.\\n\");\n-\t\treturn -1;\n-\t}\n-\tether_addr_copy((struct ether_addr *) enic->mac_addr,\n-\t\t&eth_dev->data->mac_addrs[0]);\n-\n-\n-\t/* Get available resource counts\n-\t*/\n-\tenic_get_res_counts(enic);\n-\n-\tvnic_dev_set_reset_flag(enic->vdev, 0);\n-\n-\treturn 0;\n-\n-}\n-\n-int enic_probe(struct enic *enic)\n-{\n-\tstruct rte_pci_device *pdev = enic->pdev;\n-\tint err = -1;\n-\n-\tdev_debug(enic, \" Initializing ENIC PMD version %s\\n\", DRV_VERSION);\n-\n-\tenic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;\n-\tenic->bar0.len = pdev->mem_resource[0].len;\n-\n-\t/* Register vNIC device */\n-\tenic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);\n-\tif (!enic->vdev) {\n-\t\tdev_err(enic, \"vNIC registration failed, aborting\\n\");\n-\t\tgoto err_out;\n-\t}\n-\n-\tvnic_register_cbacks(enic->vdev,\n-\t\tenic_alloc_consistent,\n-\t\tenic_free_consistent);\n-\n-\t/* Issue device open to get device in known state */\n-\terr = enic_dev_open(enic);\n-\tif (err) {\n-\t\tdev_err(enic, \"vNIC dev open failed, aborting\\n\");\n-\t\tgoto err_out_unregister;\n-\t}\n-\n-\t/* Set ingress vlan rewrite mode before vnic initialization */\n-\terr = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,\n-\t\tIG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN);\n-\tif (err) {\n-\t\tdev_err(enic,\n-\t\t\t\"Failed to set ingress vlan rewrite mode, aborting.\\n\");\n-\t\tgoto err_out_dev_close;\n-\t}\n-\n-\t/* Issue device init to initialize the vnic-to-switch link.\n-\t * We'll start with carrier off and wait for link UP\n-\t * notification later to turn on carrier.  We don't need\n-\t * to wait here for the vnic-to-switch link initialization\n-\t * to complete; link UP notification is the indication that\n-\t * the process is complete.\n-\t */\n-\n-\terr = vnic_dev_init(enic->vdev, 0);\n-\tif (err) {\n-\t\tdev_err(enic, \"vNIC dev init failed, aborting\\n\");\n-\t\tgoto err_out_dev_close;\n-\t}\n-\n-\terr = enic_dev_init(enic);\n-\tif (err) {\n-\t\tdev_err(enic, \"Device initialization failed, aborting\\n\");\n-\t\tgoto err_out_dev_close;\n-\t}\n-\n-\treturn 0;\n-\n-err_out_dev_close:\n-\tvnic_dev_close(enic->vdev);\n-err_out_unregister:\n-\tvnic_dev_unregister(enic->vdev);\n-err_out:\n-\treturn err;\n-}\n-\n-void enic_remove(struct enic *enic)\n-{\n-\tenic_dev_deinit(enic);\n-\tvnic_dev_close(enic->vdev);\n-\tvnic_dev_unregister(enic->vdev);\n-}\ndiff --git a/lib/librte_pmd_enic/enic_res.c b/lib/librte_pmd_enic/enic_res.c\ndeleted file mode 100644\nindex 12a337c..0000000\n--- a/lib/librte_pmd_enic/enic_res.c\n+++ /dev/null\n@@ -1,219 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: enic_res.c 171146 2014-05-02 07:08:20Z ssujith $\"\n-\n-#include \"enic_compat.h\"\n-#include \"rte_ethdev.h\"\n-#include \"wq_enet_desc.h\"\n-#include \"rq_enet_desc.h\"\n-#include \"cq_enet_desc.h\"\n-#include \"vnic_resource.h\"\n-#include \"vnic_enet.h\"\n-#include \"vnic_dev.h\"\n-#include \"vnic_wq.h\"\n-#include \"vnic_rq.h\"\n-#include \"vnic_cq.h\"\n-#include \"vnic_intr.h\"\n-#include \"vnic_stats.h\"\n-#include \"vnic_nic.h\"\n-#include \"vnic_rss.h\"\n-#include \"enic_res.h\"\n-#include \"enic.h\"\n-\n-int enic_get_vnic_config(struct enic *enic)\n-{\n-\tstruct vnic_enet_config *c = &enic->config;\n-\tint err;\n-\n-\terr = vnic_dev_get_mac_addr(enic->vdev, enic->mac_addr);\n-\tif (err) {\n-\t\tdev_err(enic_get_dev(enic),\n-\t\t\t\"Error getting MAC addr, %d\\n\", err);\n-\t\treturn err;\n-\t}\n-\n-#define GET_CONFIG(m) \\\n-\tdo { \\\n-\t\terr = vnic_dev_spec(enic->vdev, \\\n-\t\t\toffsetof(struct vnic_enet_config, m), \\\n-\t\t\tsizeof(c->m), &c->m); \\\n-\t\tif (err) { \\\n-\t\t\tdev_err(enic_get_dev(enic), \\\n-\t\t\t\t\"Error getting %s, %d\\n\", #m, err); \\\n-\t\t\treturn err; \\\n-\t\t} \\\n-\t} while (0)\n-\n-\tGET_CONFIG(flags);\n-\tGET_CONFIG(wq_desc_count);\n-\tGET_CONFIG(rq_desc_count);\n-\tGET_CONFIG(mtu);\n-\tGET_CONFIG(intr_timer_type);\n-\tGET_CONFIG(intr_mode);\n-\tGET_CONFIG(intr_timer_usec);\n-\tGET_CONFIG(loop_tag);\n-\tGET_CONFIG(num_arfs);\n-\n-\tc->wq_desc_count =\n-\t\tmin_t(u32, ENIC_MAX_WQ_DESCS,\n-\t\tmax_t(u32, ENIC_MIN_WQ_DESCS,\n-\t\tc->wq_desc_count));\n-\tc->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */\n-\n-\tc->rq_desc_count =\n-\t\tmin_t(u32, ENIC_MAX_RQ_DESCS,\n-\t\tmax_t(u32, ENIC_MIN_RQ_DESCS,\n-\t\tc->rq_desc_count));\n-\tc->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */\n-\n-\tif (c->mtu == 0)\n-\t\tc->mtu = 1500;\n-\tc->mtu = min_t(u16, ENIC_MAX_MTU,\n-\t\tmax_t(u16, ENIC_MIN_MTU,\n-\t\tc->mtu));\n-\n-\tc->intr_timer_usec = min_t(u32, c->intr_timer_usec,\n-\t\tvnic_dev_get_intr_coal_timer_max(enic->vdev));\n-\n-\tdev_info(enic_get_dev(enic),\n-\t\t\"vNIC MAC addr %02x:%02x:%02x:%02x:%02x:%02x \"\n-\t\t\"wq/rq %d/%d mtu %d\\n\",\n-\t\tenic->mac_addr[0], enic->mac_addr[1], enic->mac_addr[2],\n-\t\tenic->mac_addr[3], enic->mac_addr[4], enic->mac_addr[5],\n-\t\tc->wq_desc_count, c->rq_desc_count, c->mtu);\n-\tdev_info(enic_get_dev(enic), \"vNIC csum tx/rx %s/%s \"\n-\t\t\"rss %s intr mode %s type %s timer %d usec \"\n-\t\t\"loopback tag 0x%04x\\n\",\n-\t\tENIC_SETTING(enic, TXCSUM) ? \"yes\" : \"no\",\n-\t\tENIC_SETTING(enic, RXCSUM) ? \"yes\" : \"no\",\n-\t\tENIC_SETTING(enic, RSS) ? \"yes\" : \"no\",\n-\t\tc->intr_mode == VENET_INTR_MODE_INTX ? \"INTx\" :\n-\t\tc->intr_mode == VENET_INTR_MODE_MSI ? \"MSI\" :\n-\t\tc->intr_mode == VENET_INTR_MODE_ANY ? \"any\" :\n-\t\t\"unknown\",\n-\t\tc->intr_timer_type == VENET_INTR_TYPE_MIN ? \"min\" :\n-\t\tc->intr_timer_type == VENET_INTR_TYPE_IDLE ? \"idle\" :\n-\t\t\"unknown\",\n-\t\tc->intr_timer_usec,\n-\t\tc->loop_tag);\n-\n-\treturn 0;\n-}\n-\n-int enic_add_vlan(struct enic *enic, u16 vlanid)\n-{\n-\tu64 a0 = vlanid, a1 = 0;\n-\tint wait = 1000;\n-\tint err;\n-\n-\terr = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);\n-\tif (err)\n-\t\tdev_err(enic_get_dev(enic), \"Can't add vlan id, %d\\n\", err);\n-\n-\treturn err;\n-}\n-\n-int enic_del_vlan(struct enic *enic, u16 vlanid)\n-{\n-\tu64 a0 = vlanid, a1 = 0;\n-\tint wait = 1000;\n-\tint err;\n-\n-\terr = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);\n-\tif (err)\n-\t\tdev_err(enic_get_dev(enic), \"Can't delete vlan id, %d\\n\", err);\n-\n-\treturn err;\n-}\n-\n-int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,\n-\tu8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,\n-\tu8 ig_vlan_strip_en)\n-{\n-\tu64 a0, a1;\n-\tu32 nic_cfg;\n-\tint wait = 1000;\n-\n-\tvnic_set_nic_cfg(&nic_cfg, rss_default_cpu,\n-\t\trss_hash_type, rss_hash_bits, rss_base_cpu,\n-\t\trss_enable, tso_ipid_split_en, ig_vlan_strip_en);\n-\n-\ta0 = nic_cfg;\n-\ta1 = 0;\n-\n-\treturn vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);\n-}\n-\n-int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)\n-{\n-\tu64 a0 = (u64)key_pa, a1 = len;\n-\tint wait = 1000;\n-\n-\treturn vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);\n-}\n-\n-int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)\n-{\n-\tu64 a0 = (u64)cpu_pa, a1 = len;\n-\tint wait = 1000;\n-\n-\treturn vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);\n-}\n-\n-void enic_free_vnic_resources(struct enic *enic)\n-{\n-\tunsigned int i;\n-\n-\tfor (i = 0; i < enic->wq_count; i++)\n-\t\tvnic_wq_free(&enic->wq[i]);\n-\tfor (i = 0; i < enic->rq_count; i++)\n-\t\tvnic_rq_free(&enic->rq[i]);\n-\tfor (i = 0; i < enic->cq_count; i++)\n-\t\tvnic_cq_free(&enic->cq[i]);\n-\tvnic_intr_free(&enic->intr);\n-}\n-\n-void enic_get_res_counts(struct enic *enic)\n-{\n-\tenic->wq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ);\n-\tenic->rq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ);\n-\tenic->cq_count = vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ);\n-\tenic->intr_count = vnic_dev_get_res_count(enic->vdev,\n-\t\tRES_TYPE_INTR_CTRL);\n-\n-\tdev_info(enic_get_dev(enic),\n-\t\t\"vNIC resources avail: wq %d rq %d cq %d intr %d\\n\",\n-\t\tenic->wq_count, enic->rq_count,\n-\t\tenic->cq_count, enic->intr_count);\n-}\ndiff --git a/lib/librte_pmd_enic/enic_res.h b/lib/librte_pmd_enic/enic_res.h\ndeleted file mode 100644\nindex ea60f6a..0000000\n--- a/lib/librte_pmd_enic/enic_res.h\n+++ /dev/null\n@@ -1,168 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: enic_res.h 173137 2014-05-16 03:27:22Z sanpilla $\"\n-\n-#ifndef _ENIC_RES_H_\n-#define _ENIC_RES_H_\n-\n-#include \"wq_enet_desc.h\"\n-#include \"rq_enet_desc.h\"\n-#include \"vnic_wq.h\"\n-#include \"vnic_rq.h\"\n-\n-#define ENIC_MIN_WQ_DESCS\t\t64\n-#define ENIC_MAX_WQ_DESCS\t\t4096\n-#define ENIC_MIN_RQ_DESCS\t\t64\n-#define ENIC_MAX_RQ_DESCS\t\t4096\n-\n-#define ENIC_MIN_MTU\t\t\t68\n-#define ENIC_MAX_MTU\t\t\t9000\n-\n-#define ENIC_MULTICAST_PERFECT_FILTERS\t32\n-#define ENIC_UNICAST_PERFECT_FILTERS\t32\n-\n-#define ENIC_NON_TSO_MAX_DESC\t\t16\n-\n-#define ENIC_SETTING(enic, f) ((enic->config.flags & VENETF_##f) ? 1 : 0)\n-\n-static inline void enic_queue_wq_desc_ex(struct vnic_wq *wq,\n-\tvoid *os_buf, dma_addr_t dma_addr, unsigned int len,\n-\tunsigned int mss_or_csum_offset, unsigned int hdr_len,\n-\tint vlan_tag_insert, unsigned int vlan_tag,\n-\tint offload_mode, int cq_entry, int sop, int eop, int loopback)\n-{\n-\tstruct wq_enet_desc *desc = vnic_wq_next_desc(wq);\n-\tu8 desc_skip_cnt = 1;\n-\tu8 compressed_send = 0;\n-\tu64 wrid = 0;\n-\n-\twq_enet_desc_enc(desc,\n-\t\t(u64)dma_addr | VNIC_PADDR_TARGET,\n-\t\t(u16)len,\n-\t\t(u16)mss_or_csum_offset,\n-\t\t(u16)hdr_len, (u8)offload_mode,\n-\t\t(u8)eop, (u8)cq_entry,\n-\t\t0, /* fcoe_encap */\n-\t\t(u8)vlan_tag_insert,\n-\t\t(u16)vlan_tag,\n-\t\t(u8)loopback);\n-\n-\tvnic_wq_post(wq, os_buf, dma_addr, len, sop, eop, desc_skip_cnt,\n-\t\t\t(u8)cq_entry, compressed_send, wrid);\n-}\n-\n-static inline void enic_queue_wq_desc_cont(struct vnic_wq *wq,\n-\tvoid *os_buf, dma_addr_t dma_addr, unsigned int len,\n-\tint eop, int loopback)\n-{\n-\tenic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,\n-\t\t0, 0, 0, 0, 0,\n-\t\teop, 0 /* !SOP */, eop, loopback);\n-}\n-\n-static inline void enic_queue_wq_desc(struct vnic_wq *wq, void *os_buf,\n-\tdma_addr_t dma_addr, unsigned int len, int vlan_tag_insert,\n-\tunsigned int vlan_tag, int eop, int loopback)\n-{\n-\tenic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,\n-\t\t0, 0, vlan_tag_insert, vlan_tag,\n-\t\tWQ_ENET_OFFLOAD_MODE_CSUM,\n-\t\teop, 1 /* SOP */, eop, loopback);\n-}\n-\n-static inline void enic_queue_wq_desc_csum(struct vnic_wq *wq,\n-\tvoid *os_buf, dma_addr_t dma_addr, unsigned int len,\n-\tint ip_csum, int tcpudp_csum, int vlan_tag_insert,\n-\tunsigned int vlan_tag, int eop, int loopback)\n-{\n-\tenic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,\n-\t\t(ip_csum ? 1 : 0) + (tcpudp_csum ? 2 : 0),\n-\t\t0, vlan_tag_insert, vlan_tag,\n-\t\tWQ_ENET_OFFLOAD_MODE_CSUM,\n-\t\teop, 1 /* SOP */, eop, loopback);\n-}\n-\n-static inline void enic_queue_wq_desc_csum_l4(struct vnic_wq *wq,\n-\tvoid *os_buf, dma_addr_t dma_addr, unsigned int len,\n-\tunsigned int csum_offset, unsigned int hdr_len,\n-\tint vlan_tag_insert, unsigned int vlan_tag, int eop, int loopback)\n-{\n-\tenic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,\n-\t\tcsum_offset, hdr_len, vlan_tag_insert, vlan_tag,\n-\t\tWQ_ENET_OFFLOAD_MODE_CSUM_L4,\n-\t\teop, 1 /* SOP */, eop, loopback);\n-}\n-\n-static inline void enic_queue_wq_desc_tso(struct vnic_wq *wq,\n-\tvoid *os_buf, dma_addr_t dma_addr, unsigned int len,\n-\tunsigned int mss, unsigned int hdr_len, int vlan_tag_insert,\n-\tunsigned int vlan_tag, int eop, int loopback)\n-{\n-\tenic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,\n-\t\tmss, hdr_len, vlan_tag_insert, vlan_tag,\n-\t\tWQ_ENET_OFFLOAD_MODE_TSO,\n-\t\teop, 1 /* SOP */, eop, loopback);\n-}\n-static inline void enic_queue_rq_desc(struct vnic_rq *rq,\n-\tvoid *os_buf, unsigned int os_buf_index,\n-\tdma_addr_t dma_addr, unsigned int len)\n-{\n-\tstruct rq_enet_desc *desc = vnic_rq_next_desc(rq);\n-\tu64 wrid = 0;\n-\tu8 type = os_buf_index ?\n-\t\tRQ_ENET_TYPE_NOT_SOP : RQ_ENET_TYPE_ONLY_SOP;\n-\n-\trq_enet_desc_enc(desc,\n-\t\t(u64)dma_addr | VNIC_PADDR_TARGET,\n-\t\ttype, (u16)len);\n-\n-\tvnic_rq_post(rq, os_buf, os_buf_index, dma_addr, len, wrid);\n-}\n-\n-struct enic;\n-\n-int enic_get_vnic_config(struct enic *);\n-int enic_add_vlan(struct enic *enic, u16 vlanid);\n-int enic_del_vlan(struct enic *enic, u16 vlanid);\n-int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,\n-\tu8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,\n-\tu8 ig_vlan_strip_en);\n-int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len);\n-int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len);\n-void enic_get_res_counts(struct enic *enic);\n-void enic_init_vnic_resources(struct enic *enic);\n-int enic_alloc_vnic_resources(struct enic *);\n-void enic_free_vnic_resources(struct enic *);\n-\n-#endif /* _ENIC_RES_H_ */\ndiff --git a/lib/librte_pmd_enic/rte_pmd_enic_version.map b/lib/librte_pmd_enic/rte_pmd_enic_version.map\ndeleted file mode 100644\nindex ef35398..0000000\n--- a/lib/librte_pmd_enic/rte_pmd_enic_version.map\n+++ /dev/null\n@@ -1,4 +0,0 @@\n-DPDK_2.0 {\n-\n-\tlocal: *;\n-};\ndiff --git a/lib/librte_pmd_enic/vnic/cq_desc.h b/lib/librte_pmd_enic/vnic/cq_desc.h\ndeleted file mode 100644\nindex c418967..0000000\n--- a/lib/librte_pmd_enic/vnic/cq_desc.h\n+++ /dev/null\n@@ -1,126 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: cq_desc.h 129574 2013-04-26 22:11:14Z rfaucett $\"\n-\n-#ifndef _CQ_DESC_H_\n-#define _CQ_DESC_H_\n-\n-/*\n- * Completion queue descriptor types\n- */\n-enum cq_desc_types {\n-\tCQ_DESC_TYPE_WQ_ENET = 0,\n-\tCQ_DESC_TYPE_DESC_COPY = 1,\n-\tCQ_DESC_TYPE_WQ_EXCH = 2,\n-\tCQ_DESC_TYPE_RQ_ENET = 3,\n-\tCQ_DESC_TYPE_RQ_FCP = 4,\n-\tCQ_DESC_TYPE_IOMMU_MISS = 5,\n-\tCQ_DESC_TYPE_SGL = 6,\n-\tCQ_DESC_TYPE_CLASSIFIER = 7,\n-\tCQ_DESC_TYPE_TEST = 127,\n-};\n-\n-/* Completion queue descriptor: 16B\n- *\n- * All completion queues have this basic layout.  The\n- * type_specfic area is unique for each completion\n- * queue type.\n- */\n-struct cq_desc {\n-\t__le16 completed_index;\n-\t__le16 q_number;\n-\tu8 type_specfic[11];\n-\tu8 type_color;\n-};\n-\n-#define CQ_DESC_TYPE_BITS        4\n-#define CQ_DESC_TYPE_MASK        ((1 << CQ_DESC_TYPE_BITS) - 1)\n-#define CQ_DESC_COLOR_MASK       1\n-#define CQ_DESC_COLOR_SHIFT      7\n-#define CQ_DESC_Q_NUM_BITS       10\n-#define CQ_DESC_Q_NUM_MASK       ((1 << CQ_DESC_Q_NUM_BITS) - 1)\n-#define CQ_DESC_COMP_NDX_BITS    12\n-#define CQ_DESC_COMP_NDX_MASK    ((1 << CQ_DESC_COMP_NDX_BITS) - 1)\n-\n-static inline void cq_color_enc(struct cq_desc *desc, const u8 color)\n-{\n-\tif (color)\n-\t\tdesc->type_color |=  (1 << CQ_DESC_COLOR_SHIFT);\n-\telse\n-\t\tdesc->type_color &= ~(1 << CQ_DESC_COLOR_SHIFT);\n-}\n-\n-static inline void cq_desc_enc(struct cq_desc *desc,\n-\tconst u8 type, const u8 color, const u16 q_number,\n-\tconst u16 completed_index)\n-{\n-\tdesc->type_color = (type & CQ_DESC_TYPE_MASK) |\n-\t\t((color & CQ_DESC_COLOR_MASK) << CQ_DESC_COLOR_SHIFT);\n-\tdesc->q_number = cpu_to_le16(q_number & CQ_DESC_Q_NUM_MASK);\n-\tdesc->completed_index = cpu_to_le16(completed_index &\n-\t\tCQ_DESC_COMP_NDX_MASK);\n-}\n-\n-static inline void cq_desc_dec(const struct cq_desc *desc_arg,\n-\tu8 *type, u8 *color, u16 *q_number, u16 *completed_index)\n-{\n-\tconst struct cq_desc *desc = desc_arg;\n-\tconst u8 type_color = desc->type_color;\n-\n-\t*color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;\n-\n-\t/*\n-\t * Make sure color bit is read from desc *before* other fields\n-\t * are read from desc.  Hardware guarantees color bit is last\n-\t * bit (byte) written.  Adding the rmb() prevents the compiler\n-\t * and/or CPU from reordering the reads which would potentially\n-\t * result in reading stale values.\n-\t */\n-\n-\trmb();\n-\n-\t*type = type_color & CQ_DESC_TYPE_MASK;\n-\t*q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;\n-\t*completed_index = le16_to_cpu(desc->completed_index) &\n-\t\tCQ_DESC_COMP_NDX_MASK;\n-}\n-\n-static inline void cq_color_dec(const struct cq_desc *desc_arg, u8 *color)\n-{\n-\tvolatile const struct cq_desc *desc = desc_arg;\n-\n-\t*color = (desc->type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;\n-}\n-\n-#endif /* _CQ_DESC_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/cq_enet_desc.h b/lib/librte_pmd_enic/vnic/cq_enet_desc.h\ndeleted file mode 100644\nindex 669a2b5..0000000\n--- a/lib/librte_pmd_enic/vnic/cq_enet_desc.h\n+++ /dev/null\n@@ -1,261 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: cq_enet_desc.h 160468 2014-02-18 09:50:15Z gvaradar $\"\n-\n-#ifndef _CQ_ENET_DESC_H_\n-#define _CQ_ENET_DESC_H_\n-\n-#include \"cq_desc.h\"\n-\n-/* Ethernet completion queue descriptor: 16B */\n-struct cq_enet_wq_desc {\n-\t__le16 completed_index;\n-\t__le16 q_number;\n-\tu8 reserved[11];\n-\tu8 type_color;\n-};\n-\n-static inline void cq_enet_wq_desc_enc(struct cq_enet_wq_desc *desc,\n-\tu8 type, u8 color, u16 q_number, u16 completed_index)\n-{\n-\tcq_desc_enc((struct cq_desc *)desc, type,\n-\t\tcolor, q_number, completed_index);\n-}\n-\n-static inline void cq_enet_wq_desc_dec(struct cq_enet_wq_desc *desc,\n-\tu8 *type, u8 *color, u16 *q_number, u16 *completed_index)\n-{\n-\tcq_desc_dec((struct cq_desc *)desc, type,\n-\t\tcolor, q_number, completed_index);\n-}\n-\n-/* Completion queue descriptor: Ethernet receive queue, 16B */\n-struct cq_enet_rq_desc {\n-\t__le16 completed_index_flags;\n-\t__le16 q_number_rss_type_flags;\n-\t__le32 rss_hash;\n-\t__le16 bytes_written_flags;\n-\t__le16 vlan;\n-\t__le16 checksum_fcoe;\n-\tu8 flags;\n-\tu8 type_color;\n-};\n-\n-#define CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT          (0x1 << 12)\n-#define CQ_ENET_RQ_DESC_FLAGS_FCOE                  (0x1 << 13)\n-#define CQ_ENET_RQ_DESC_FLAGS_EOP                   (0x1 << 14)\n-#define CQ_ENET_RQ_DESC_FLAGS_SOP                   (0x1 << 15)\n-\n-#define CQ_ENET_RQ_DESC_RSS_TYPE_BITS               4\n-#define CQ_ENET_RQ_DESC_RSS_TYPE_MASK \\\n-\t((1 << CQ_ENET_RQ_DESC_RSS_TYPE_BITS) - 1)\n-#define CQ_ENET_RQ_DESC_RSS_TYPE_NONE               0\n-#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv4               1\n-#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv4           2\n-#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6               3\n-#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6           4\n-#define CQ_ENET_RQ_DESC_RSS_TYPE_IPv6_EX            5\n-#define CQ_ENET_RQ_DESC_RSS_TYPE_TCP_IPv6_EX        6\n-\n-#define CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC         (0x1 << 14)\n-\n-#define CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS          14\n-#define CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK \\\n-\t((1 << CQ_ENET_RQ_DESC_BYTES_WRITTEN_BITS) - 1)\n-#define CQ_ENET_RQ_DESC_FLAGS_TRUNCATED             (0x1 << 14)\n-#define CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED         (0x1 << 15)\n-\n-#define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS          12\n-#define CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK \\\n-\t((1 << CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_BITS) - 1)\n-#define CQ_ENET_RQ_DESC_VLAN_TCI_CFI_MASK           (0x1 << 12)\n-#define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS     3\n-#define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_MASK \\\n-\t((1 << CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_BITS) - 1)\n-#define CQ_ENET_RQ_DESC_VLAN_TCI_USER_PRIO_SHIFT    13\n-\n-#define CQ_ENET_RQ_DESC_FCOE_SOF_BITS               8\n-#define CQ_ENET_RQ_DESC_FCOE_SOF_MASK \\\n-\t((1 << CQ_ENET_RQ_DESC_FCOE_SOF_BITS) - 1)\n-#define CQ_ENET_RQ_DESC_FCOE_EOF_BITS               8\n-#define CQ_ENET_RQ_DESC_FCOE_EOF_MASK \\\n-\t((1 << CQ_ENET_RQ_DESC_FCOE_EOF_BITS) - 1)\n-#define CQ_ENET_RQ_DESC_FCOE_EOF_SHIFT              8\n-\n-#define CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK       (0x1 << 0)\n-#define CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK              (0x1 << 0)\n-#define CQ_ENET_RQ_DESC_FLAGS_UDP                   (0x1 << 1)\n-#define CQ_ENET_RQ_DESC_FCOE_ENC_ERROR              (0x1 << 1)\n-#define CQ_ENET_RQ_DESC_FLAGS_TCP                   (0x1 << 2)\n-#define CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK          (0x1 << 3)\n-#define CQ_ENET_RQ_DESC_FLAGS_IPV6                  (0x1 << 4)\n-#define CQ_ENET_RQ_DESC_FLAGS_IPV4                  (0x1 << 5)\n-#define CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT         (0x1 << 6)\n-#define CQ_ENET_RQ_DESC_FLAGS_FCS_OK                (0x1 << 7)\n-\n-static inline void cq_enet_rq_desc_enc(struct cq_enet_rq_desc *desc,\n-\tu8 type, u8 color, u16 q_number, u16 completed_index,\n-\tu8 ingress_port, u8 fcoe, u8 eop, u8 sop, u8 rss_type, u8 csum_not_calc,\n-\tu32 rss_hash, u16 bytes_written, u8 packet_error, u8 vlan_stripped,\n-\tu16 vlan, u16 checksum, u8 fcoe_sof, u8 fcoe_fc_crc_ok,\n-\tu8 fcoe_enc_error, u8 fcoe_eof, u8 tcp_udp_csum_ok, u8 udp, u8 tcp,\n-\tu8 ipv4_csum_ok, u8 ipv6, u8 ipv4, u8 ipv4_fragment, u8 fcs_ok)\n-{\n-\tcq_desc_enc((struct cq_desc *)desc, type,\n-\t\tcolor, q_number, completed_index);\n-\n-\tdesc->completed_index_flags |= cpu_to_le16(\n-\t\t(ingress_port ? CQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT : 0) |\n-\t\t(fcoe ? CQ_ENET_RQ_DESC_FLAGS_FCOE : 0) |\n-\t\t(eop ? CQ_ENET_RQ_DESC_FLAGS_EOP : 0) |\n-\t\t(sop ? CQ_ENET_RQ_DESC_FLAGS_SOP : 0));\n-\n-\tdesc->q_number_rss_type_flags |= cpu_to_le16(\n-\t\t((rss_type & CQ_ENET_RQ_DESC_RSS_TYPE_MASK) <<\n-\t\tCQ_DESC_Q_NUM_BITS) |\n-\t\t(csum_not_calc ? CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC : 0));\n-\n-\tdesc->rss_hash = cpu_to_le32(rss_hash);\n-\n-\tdesc->bytes_written_flags = cpu_to_le16(\n-\t\t(bytes_written & CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK) |\n-\t\t(packet_error ? CQ_ENET_RQ_DESC_FLAGS_TRUNCATED : 0) |\n-\t\t(vlan_stripped ? CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED : 0));\n-\n-\tdesc->vlan = cpu_to_le16(vlan);\n-\n-\tif (fcoe) {\n-\t\tdesc->checksum_fcoe = cpu_to_le16(\n-\t\t\t(fcoe_sof & CQ_ENET_RQ_DESC_FCOE_SOF_MASK) |\n-\t\t\t((fcoe_eof & CQ_ENET_RQ_DESC_FCOE_EOF_MASK) <<\n-\t\t\t\tCQ_ENET_RQ_DESC_FCOE_EOF_SHIFT));\n-\t} else {\n-\t\tdesc->checksum_fcoe = cpu_to_le16(checksum);\n-\t}\n-\n-\tdesc->flags =\n-\t\t(tcp_udp_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK : 0) |\n-\t\t(udp ? CQ_ENET_RQ_DESC_FLAGS_UDP : 0) |\n-\t\t(tcp ? CQ_ENET_RQ_DESC_FLAGS_TCP : 0) |\n-\t\t(ipv4_csum_ok ? CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK : 0) |\n-\t\t(ipv6 ? CQ_ENET_RQ_DESC_FLAGS_IPV6 : 0) |\n-\t\t(ipv4 ? CQ_ENET_RQ_DESC_FLAGS_IPV4 : 0) |\n-\t\t(ipv4_fragment ? CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT : 0) |\n-\t\t(fcs_ok ? CQ_ENET_RQ_DESC_FLAGS_FCS_OK : 0) |\n-\t\t(fcoe_fc_crc_ok ? CQ_ENET_RQ_DESC_FCOE_FC_CRC_OK : 0) |\n-\t\t(fcoe_enc_error ? CQ_ENET_RQ_DESC_FCOE_ENC_ERROR : 0);\n-}\n-\n-static inline void cq_enet_rq_desc_dec(struct cq_enet_rq_desc *desc,\n-\tu8 *type, u8 *color, u16 *q_number, u16 *completed_index,\n-\tu8 *ingress_port, u8 *fcoe, u8 *eop, u8 *sop, u8 *rss_type,\n-\tu8 *csum_not_calc, u32 *rss_hash, u16 *bytes_written, u8 *packet_error,\n-\tu8 *vlan_stripped, u16 *vlan_tci, u16 *checksum, u8 *fcoe_sof,\n-\tu8 *fcoe_fc_crc_ok, u8 *fcoe_enc_error, u8 *fcoe_eof,\n-\tu8 *tcp_udp_csum_ok, u8 *udp, u8 *tcp, u8 *ipv4_csum_ok,\n-\tu8 *ipv6, u8 *ipv4, u8 *ipv4_fragment, u8 *fcs_ok)\n-{\n-\tu16 completed_index_flags;\n-\tu16 q_number_rss_type_flags;\n-\tu16 bytes_written_flags;\n-\n-\tcq_desc_dec((struct cq_desc *)desc, type,\n-\t\tcolor, q_number, completed_index);\n-\n-\tcompleted_index_flags = le16_to_cpu(desc->completed_index_flags);\n-\tq_number_rss_type_flags =\n-\t\tle16_to_cpu(desc->q_number_rss_type_flags);\n-\tbytes_written_flags = le16_to_cpu(desc->bytes_written_flags);\n-\n-\t*ingress_port = (completed_index_flags &\n-\t\tCQ_ENET_RQ_DESC_FLAGS_INGRESS_PORT) ? 1 : 0;\n-\t*fcoe = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_FCOE) ?\n-\t\t1 : 0;\n-\t*eop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_EOP) ?\n-\t\t1 : 0;\n-\t*sop = (completed_index_flags & CQ_ENET_RQ_DESC_FLAGS_SOP) ?\n-\t\t1 : 0;\n-\n-\t*rss_type = (u8)((q_number_rss_type_flags >> CQ_DESC_Q_NUM_BITS) &\n-\t\tCQ_ENET_RQ_DESC_RSS_TYPE_MASK);\n-\t*csum_not_calc = (q_number_rss_type_flags &\n-\t\tCQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ? 1 : 0;\n-\n-\t*rss_hash = le32_to_cpu(desc->rss_hash);\n-\n-\t*bytes_written = bytes_written_flags &\n-\t\tCQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;\n-\t*packet_error = (bytes_written_flags &\n-\t\tCQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ? 1 : 0;\n-\t*vlan_stripped = (bytes_written_flags &\n-\t\tCQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) ? 1 : 0;\n-\n-\t/*\n-\t * Tag Control Information(16) = user_priority(3) + cfi(1) + vlan(12)\n-\t */\n-\t*vlan_tci = le16_to_cpu(desc->vlan);\n-\n-\tif (*fcoe) {\n-\t\t*fcoe_sof = (u8)(le16_to_cpu(desc->checksum_fcoe) &\n-\t\t\tCQ_ENET_RQ_DESC_FCOE_SOF_MASK);\n-\t\t*fcoe_fc_crc_ok = (desc->flags &\n-\t\t\tCQ_ENET_RQ_DESC_FCOE_FC_CRC_OK) ? 1 : 0;\n-\t\t*fcoe_enc_error = (desc->flags &\n-\t\t\tCQ_ENET_RQ_DESC_FCOE_ENC_ERROR) ? 1 : 0;\n-\t\t*fcoe_eof = (u8)((le16_to_cpu(desc->checksum_fcoe) >>\n-\t\t\tCQ_ENET_RQ_DESC_FCOE_EOF_SHIFT) &\n-\t\t\tCQ_ENET_RQ_DESC_FCOE_EOF_MASK);\n-\t\t*checksum = 0;\n-\t} else {\n-\t\t*fcoe_sof = 0;\n-\t\t*fcoe_fc_crc_ok = 0;\n-\t\t*fcoe_enc_error = 0;\n-\t\t*fcoe_eof = 0;\n-\t\t*checksum = le16_to_cpu(desc->checksum_fcoe);\n-\t}\n-\n-\t*tcp_udp_csum_ok =\n-\t\t(desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ? 1 : 0;\n-\t*udp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_UDP) ? 1 : 0;\n-\t*tcp = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_TCP) ? 1 : 0;\n-\t*ipv4_csum_ok =\n-\t\t(desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ? 1 : 0;\n-\t*ipv6 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV6) ? 1 : 0;\n-\t*ipv4 = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4) ? 1 : 0;\n-\t*ipv4_fragment =\n-\t\t(desc->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT) ? 1 : 0;\n-\t*fcs_ok = (desc->flags & CQ_ENET_RQ_DESC_FLAGS_FCS_OK) ? 1 : 0;\n-}\n-\n-#endif /* _CQ_ENET_DESC_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/rq_enet_desc.h b/lib/librte_pmd_enic/vnic/rq_enet_desc.h\ndeleted file mode 100644\nindex f38ff2a..0000000\n--- a/lib/librte_pmd_enic/vnic/rq_enet_desc.h\n+++ /dev/null\n@@ -1,76 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: rq_enet_desc.h 59839 2010-09-27 20:36:31Z roprabhu $\"\n-\n-#ifndef _RQ_ENET_DESC_H_\n-#define _RQ_ENET_DESC_H_\n-\n-/* Ethernet receive queue descriptor: 16B */\n-struct rq_enet_desc {\n-\t__le64 address;\n-\t__le16 length_type;\n-\tu8 reserved[6];\n-};\n-\n-enum rq_enet_type_types {\n-\tRQ_ENET_TYPE_ONLY_SOP = 0,\n-\tRQ_ENET_TYPE_NOT_SOP = 1,\n-\tRQ_ENET_TYPE_RESV2 = 2,\n-\tRQ_ENET_TYPE_RESV3 = 3,\n-};\n-\n-#define RQ_ENET_ADDR_BITS\t\t64\n-#define RQ_ENET_LEN_BITS\t\t14\n-#define RQ_ENET_LEN_MASK\t\t((1 << RQ_ENET_LEN_BITS) - 1)\n-#define RQ_ENET_TYPE_BITS\t\t2\n-#define RQ_ENET_TYPE_MASK\t\t((1 << RQ_ENET_TYPE_BITS) - 1)\n-\n-static inline void rq_enet_desc_enc(struct rq_enet_desc *desc,\n-\tu64 address, u8 type, u16 length)\n-{\n-\tdesc->address = cpu_to_le64(address);\n-\tdesc->length_type = cpu_to_le16((length & RQ_ENET_LEN_MASK) |\n-\t\t((type & RQ_ENET_TYPE_MASK) << RQ_ENET_LEN_BITS));\n-}\n-\n-static inline void rq_enet_desc_dec(struct rq_enet_desc *desc,\n-\tu64 *address, u8 *type, u16 *length)\n-{\n-\t*address = le64_to_cpu(desc->address);\n-\t*length = le16_to_cpu(desc->length_type) & RQ_ENET_LEN_MASK;\n-\t*type = (u8)((le16_to_cpu(desc->length_type) >> RQ_ENET_LEN_BITS) &\n-\t\tRQ_ENET_TYPE_MASK);\n-}\n-\n-#endif /* _RQ_ENET_DESC_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_cq.c b/lib/librte_pmd_enic/vnic/vnic_cq.c\ndeleted file mode 100644\nindex cda97e4..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_cq.c\n+++ /dev/null\n@@ -1,117 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_cq.c 171146 2014-05-02 07:08:20Z ssujith $\"\n-\n-#include \"vnic_dev.h\"\n-#include \"vnic_cq.h\"\n-\n-int vnic_cq_mem_size(struct vnic_cq *cq, unsigned int desc_count,\n-\tunsigned int desc_size)\n-{\n-\tint mem_size;\n-\n-\tmem_size = vnic_dev_desc_ring_size(&cq->ring, desc_count, desc_size);\n-\n-\treturn mem_size;\n-}\n-\n-void vnic_cq_free(struct vnic_cq *cq)\n-{\n-\tvnic_dev_free_desc_ring(cq->vdev, &cq->ring);\n-\n-\tcq->ctrl = NULL;\n-}\n-\n-int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,\n-\tunsigned int socket_id,\n-\tunsigned int desc_count, unsigned int desc_size)\n-{\n-\tint err;\n-\tchar res_name[NAME_MAX];\n-\tstatic int instance;\n-\n-\tcq->index = index;\n-\tcq->vdev = vdev;\n-\n-\tcq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_CQ, index);\n-\tif (!cq->ctrl) {\n-\t\tpr_err(\"Failed to hook CQ[%d] resource\\n\", index);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tsnprintf(res_name, sizeof(res_name), \"%d-cq-%d\", instance++, index);\n-\terr = vnic_dev_alloc_desc_ring(vdev, &cq->ring, desc_count, desc_size,\n-\t\tsocket_id, res_name);\n-\tif (err)\n-\t\treturn err;\n-\n-\treturn 0;\n-}\n-\n-void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,\n-\tunsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,\n-\tunsigned int cq_tail_color, unsigned int interrupt_enable,\n-\tunsigned int cq_entry_enable, unsigned int cq_message_enable,\n-\tunsigned int interrupt_offset, u64 cq_message_addr)\n-{\n-\tu64 paddr;\n-\n-\tpaddr = (u64)cq->ring.base_addr | VNIC_PADDR_TARGET;\n-\twriteq(paddr, &cq->ctrl->ring_base);\n-\tiowrite32(cq->ring.desc_count, &cq->ctrl->ring_size);\n-\tiowrite32(flow_control_enable, &cq->ctrl->flow_control_enable);\n-\tiowrite32(color_enable, &cq->ctrl->color_enable);\n-\tiowrite32(cq_head, &cq->ctrl->cq_head);\n-\tiowrite32(cq_tail, &cq->ctrl->cq_tail);\n-\tiowrite32(cq_tail_color, &cq->ctrl->cq_tail_color);\n-\tiowrite32(interrupt_enable, &cq->ctrl->interrupt_enable);\n-\tiowrite32(cq_entry_enable, &cq->ctrl->cq_entry_enable);\n-\tiowrite32(cq_message_enable, &cq->ctrl->cq_message_enable);\n-\tiowrite32(interrupt_offset, &cq->ctrl->interrupt_offset);\n-\twriteq(cq_message_addr, &cq->ctrl->cq_message_addr);\n-\n-\tcq->interrupt_offset = interrupt_offset;\n-}\n-\n-void vnic_cq_clean(struct vnic_cq *cq)\n-{\n-\tcq->to_clean = 0;\n-\tcq->last_color = 0;\n-\n-\tiowrite32(0, &cq->ctrl->cq_head);\n-\tiowrite32(0, &cq->ctrl->cq_tail);\n-\tiowrite32(1, &cq->ctrl->cq_tail_color);\n-\n-\tvnic_dev_clear_desc_ring(&cq->ring);\n-}\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_cq.h b/lib/librte_pmd_enic/vnic/vnic_cq.h\ndeleted file mode 100644\nindex 0928d72..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_cq.h\n+++ /dev/null\n@@ -1,151 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_cq.h 173398 2014-05-19 09:17:02Z gvaradar $\"\n-\n-#ifndef _VNIC_CQ_H_\n-#define _VNIC_CQ_H_\n-\n-#include <rte_mbuf.h>\n-\n-#include \"cq_desc.h\"\n-#include \"vnic_dev.h\"\n-\n-/* Completion queue control */\n-struct vnic_cq_ctrl {\n-\tu64 ring_base;\t\t\t/* 0x00 */\n-\tu32 ring_size;\t\t\t/* 0x08 */\n-\tu32 pad0;\n-\tu32 flow_control_enable;\t/* 0x10 */\n-\tu32 pad1;\n-\tu32 color_enable;\t\t/* 0x18 */\n-\tu32 pad2;\n-\tu32 cq_head;\t\t\t/* 0x20 */\n-\tu32 pad3;\n-\tu32 cq_tail;\t\t\t/* 0x28 */\n-\tu32 pad4;\n-\tu32 cq_tail_color;\t\t/* 0x30 */\n-\tu32 pad5;\n-\tu32 interrupt_enable;\t\t/* 0x38 */\n-\tu32 pad6;\n-\tu32 cq_entry_enable;\t\t/* 0x40 */\n-\tu32 pad7;\n-\tu32 cq_message_enable;\t\t/* 0x48 */\n-\tu32 pad8;\n-\tu32 interrupt_offset;\t\t/* 0x50 */\n-\tu32 pad9;\n-\tu64 cq_message_addr;\t\t/* 0x58 */\n-\tu32 pad10;\n-};\n-\n-#ifdef ENIC_AIC\n-struct vnic_rx_bytes_counter {\n-\tunsigned int small_pkt_bytes_cnt;\n-\tunsigned int large_pkt_bytes_cnt;\n-};\n-#endif\n-\n-struct vnic_cq {\n-\tunsigned int index;\n-\tstruct vnic_dev *vdev;\n-\tstruct vnic_cq_ctrl __iomem *ctrl;              /* memory-mapped */\n-\tstruct vnic_dev_ring ring;\n-\tunsigned int to_clean;\n-\tunsigned int last_color;\n-\tunsigned int interrupt_offset;\n-#ifdef ENIC_AIC\n-\tstruct vnic_rx_bytes_counter pkt_size_counter;\n-\tunsigned int cur_rx_coal_timeval;\n-\tunsigned int tobe_rx_coal_timeval;\n-\tktime_t prev_ts;\n-#endif\n-};\n-\n-static inline unsigned int vnic_cq_service(struct vnic_cq *cq,\n-\tunsigned int work_to_do,\n-\tint (*q_service)(struct vnic_dev *vdev, struct cq_desc *cq_desc,\n-\tu8 type, u16 q_number, u16 completed_index, void *opaque),\n-\tvoid *opaque)\n-{\n-\tstruct cq_desc *cq_desc;\n-\tunsigned int work_done = 0;\n-\tu16 q_number, completed_index;\n-\tu8 type, color;\n-\tstruct rte_mbuf **rx_pkts = opaque;\n-\tunsigned int ret;\n-\n-\tcq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +\n-\t\tcq->ring.desc_size * cq->to_clean);\n-\tcq_desc_dec(cq_desc, &type, &color,\n-\t\t&q_number, &completed_index);\n-\n-\twhile (color != cq->last_color) {\n-\t\tif (opaque)\n-\t\t\topaque = (void *)&(rx_pkts[work_done]);\n-\n-\t\tret = (*q_service)(cq->vdev, cq_desc, type,\n-\t\t\tq_number, completed_index, opaque);\n-\t\tcq->to_clean++;\n-\t\tif (cq->to_clean == cq->ring.desc_count) {\n-\t\t\tcq->to_clean = 0;\n-\t\t\tcq->last_color = cq->last_color ? 0 : 1;\n-\t\t}\n-\n-\t\tcq_desc = (struct cq_desc *)((u8 *)cq->ring.descs +\n-\t\t\tcq->ring.desc_size * cq->to_clean);\n-\t\tcq_desc_dec(cq_desc, &type, &color,\n-\t\t\t&q_number, &completed_index);\n-\n-\t\tif (ret)\n-\t\t\twork_done++;\n-\t\tif (work_done >= work_to_do)\n-\t\t\tbreak;\n-\t}\n-\n-\treturn work_done;\n-}\n-\n-void vnic_cq_free(struct vnic_cq *cq);\n-int vnic_cq_alloc(struct vnic_dev *vdev, struct vnic_cq *cq, unsigned int index,\n-\tunsigned int socket_id,\n-\tunsigned int desc_count, unsigned int desc_size);\n-void vnic_cq_init(struct vnic_cq *cq, unsigned int flow_control_enable,\n-\tunsigned int color_enable, unsigned int cq_head, unsigned int cq_tail,\n-\tunsigned int cq_tail_color, unsigned int interrupt_enable,\n-\tunsigned int cq_entry_enable, unsigned int message_enable,\n-\tunsigned int interrupt_offset, u64 message_addr);\n-void vnic_cq_clean(struct vnic_cq *cq);\n-int vnic_cq_mem_size(struct vnic_cq *cq, unsigned int desc_count,\n-\tunsigned int desc_size);\n-\n-#endif /* _VNIC_CQ_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_dev.c b/lib/librte_pmd_enic/vnic/vnic_dev.c\ndeleted file mode 100644\nindex f566734..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_dev.c\n+++ /dev/null\n@@ -1,1054 +0,0 @@\n-/*\n- * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id$\"\n-\n-#include <rte_memzone.h>\n-#include <rte_memcpy.h>\n-#include <rte_string_fns.h>\n-\n-#include \"vnic_dev.h\"\n-#include \"vnic_resource.h\"\n-#include \"vnic_devcmd.h\"\n-#include \"vnic_stats.h\"\n-\n-\n-enum vnic_proxy_type {\n-\tPROXY_NONE,\n-\tPROXY_BY_BDF,\n-\tPROXY_BY_INDEX,\n-};\n-\n-struct vnic_res {\n-\tvoid __iomem *vaddr;\n-\tdma_addr_t bus_addr;\n-\tunsigned int count;\n-};\n-\n-struct vnic_intr_coal_timer_info {\n-\tu32 mul;\n-\tu32 div;\n-\tu32 max_usec;\n-};\n-\n-struct vnic_dev {\n-\tvoid *priv;\n-\tstruct rte_pci_device *pdev;\n-\tstruct vnic_res res[RES_TYPE_MAX];\n-\tenum vnic_dev_intr_mode intr_mode;\n-\tstruct vnic_devcmd __iomem *devcmd;\n-\tstruct vnic_devcmd_notify *notify;\n-\tstruct vnic_devcmd_notify notify_copy;\n-\tdma_addr_t notify_pa;\n-\tu32 notify_sz;\n-\tdma_addr_t linkstatus_pa;\n-\tstruct vnic_stats *stats;\n-\tdma_addr_t stats_pa;\n-\tstruct vnic_devcmd_fw_info *fw_info;\n-\tdma_addr_t fw_info_pa;\n-\tenum vnic_proxy_type proxy;\n-\tu32 proxy_index;\n-\tu64 args[VNIC_DEVCMD_NARGS];\n-\tu16 split_hdr_size;\n-\tint in_reset;\n-\tstruct vnic_intr_coal_timer_info intr_coal_timer_info;\n-\tvoid *(*alloc_consistent)(void *priv, size_t size,\n-\t\tdma_addr_t *dma_handle, u8 *name);\n-\tvoid (*free_consistent)(struct rte_pci_device *hwdev,\n-\t\tsize_t size, void *vaddr,\n-\t\tdma_addr_t dma_handle);\n-};\n-\n-#define VNIC_MAX_RES_HDR_SIZE \\\n-\t(sizeof(struct vnic_resource_header) + \\\n-\tsizeof(struct vnic_resource) * RES_TYPE_MAX)\n-#define VNIC_RES_STRIDE\t128\n-\n-void *vnic_dev_priv(struct vnic_dev *vdev)\n-{\n-\treturn vdev->priv;\n-}\n-\n-void vnic_register_cbacks(struct vnic_dev *vdev,\n-\tvoid *(*alloc_consistent)(void *priv, size_t size,\n-\t    dma_addr_t *dma_handle, u8 *name),\n-\tvoid (*free_consistent)(struct rte_pci_device *hwdev,\n-\t    size_t size, void *vaddr,\n-\t    dma_addr_t dma_handle))\n-{\n-\tvdev->alloc_consistent = alloc_consistent;\n-\tvdev->free_consistent = free_consistent;\n-}\n-\n-static int vnic_dev_discover_res(struct vnic_dev *vdev,\n-\tstruct vnic_dev_bar *bar, unsigned int num_bars)\n-{\n-\tstruct vnic_resource_header __iomem *rh;\n-\tstruct mgmt_barmap_hdr __iomem *mrh;\n-\tstruct vnic_resource __iomem *r;\n-\tu8 type;\n-\n-\tif (num_bars == 0)\n-\t\treturn -EINVAL;\n-\n-\tif (bar->len < VNIC_MAX_RES_HDR_SIZE) {\n-\t\tpr_err(\"vNIC BAR0 res hdr length error\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\trh  = bar->vaddr;\n-\tmrh = bar->vaddr;\n-\tif (!rh) {\n-\t\tpr_err(\"vNIC BAR0 res hdr not mem-mapped\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\t/* Check for mgmt vnic in addition to normal vnic */\n-\tif ((ioread32(&rh->magic) != VNIC_RES_MAGIC) ||\n-\t\t(ioread32(&rh->version) != VNIC_RES_VERSION)) {\n-\t\tif ((ioread32(&mrh->magic) != MGMTVNIC_MAGIC) ||\n-\t\t\t(ioread32(&mrh->version) != MGMTVNIC_VERSION)) {\n-\t\t\tpr_err(\"vNIC BAR0 res magic/version error \" \\\n-\t\t\t\t\"exp (%lx/%lx) or (%lx/%lx), curr (%x/%x)\\n\",\n-\t\t\t\tVNIC_RES_MAGIC, VNIC_RES_VERSION,\n-\t\t\t\tMGMTVNIC_MAGIC, MGMTVNIC_VERSION,\n-\t\t\t\tioread32(&rh->magic), ioread32(&rh->version));\n-\t\t\treturn -EINVAL;\n-\t\t}\n-\t}\n-\n-\tif (ioread32(&mrh->magic) == MGMTVNIC_MAGIC)\n-\t\tr = (struct vnic_resource __iomem *)(mrh + 1);\n-\telse\n-\t\tr = (struct vnic_resource __iomem *)(rh + 1);\n-\n-\n-\twhile ((type = ioread8(&r->type)) != RES_TYPE_EOL) {\n-\t\tu8 bar_num = ioread8(&r->bar);\n-\t\tu32 bar_offset = ioread32(&r->bar_offset);\n-\t\tu32 count = ioread32(&r->count);\n-\t\tu32 len;\n-\n-\t\tr++;\n-\n-\t\tif (bar_num >= num_bars)\n-\t\t\tcontinue;\n-\n-\t\tif (!bar[bar_num].len || !bar[bar_num].vaddr)\n-\t\t\tcontinue;\n-\n-\t\tswitch (type) {\n-\t\tcase RES_TYPE_WQ:\n-\t\tcase RES_TYPE_RQ:\n-\t\tcase RES_TYPE_CQ:\n-\t\tcase RES_TYPE_INTR_CTRL:\n-\t\t\t/* each count is stride bytes long */\n-\t\t\tlen = count * VNIC_RES_STRIDE;\n-\t\t\tif (len + bar_offset > bar[bar_num].len) {\n-\t\t\t\tpr_err(\"vNIC BAR0 resource %d \" \\\n-\t\t\t\t\t\"out-of-bounds, offset 0x%x + \" \\\n-\t\t\t\t\t\"size 0x%x > bar len 0x%lx\\n\",\n-\t\t\t\t\ttype, bar_offset,\n-\t\t\t\t\tlen,\n-\t\t\t\t\tbar[bar_num].len);\n-\t\t\t\treturn -EINVAL;\n-\t\t\t}\n-\t\t\tbreak;\n-\t\tcase RES_TYPE_INTR_PBA_LEGACY:\n-\t\tcase RES_TYPE_DEVCMD:\n-\t\t\tlen = count;\n-\t\t\tbreak;\n-\t\tdefault:\n-\t\t\tcontinue;\n-\t\t}\n-\n-\t\tvdev->res[type].count = count;\n-\t\tvdev->res[type].vaddr = (char __iomem *)bar[bar_num].vaddr +\n-\t\t    bar_offset;\n-\t\tvdev->res[type].bus_addr = bar[bar_num].bus_addr + bar_offset;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,\n-\tenum vnic_res_type type)\n-{\n-\treturn vdev->res[type].count;\n-}\n-\n-void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,\n-\tunsigned int index)\n-{\n-\tif (!vdev->res[type].vaddr)\n-\t\treturn NULL;\n-\n-\tswitch (type) {\n-\tcase RES_TYPE_WQ:\n-\tcase RES_TYPE_RQ:\n-\tcase RES_TYPE_CQ:\n-\tcase RES_TYPE_INTR_CTRL:\n-\t\treturn (char __iomem *)vdev->res[type].vaddr +\n-\t\t\tindex * VNIC_RES_STRIDE;\n-\tdefault:\n-\t\treturn (char __iomem *)vdev->res[type].vaddr;\n-\t}\n-}\n-\n-unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,\n-\tunsigned int desc_count, unsigned int desc_size)\n-{\n-\t/* The base address of the desc rings must be 512 byte aligned.\n-\t * Descriptor count is aligned to groups of 32 descriptors.  A\n-\t * count of 0 means the maximum 4096 descriptors.  Descriptor\n-\t * size is aligned to 16 bytes.\n-\t */\n-\n-\tunsigned int count_align = 32;\n-\tunsigned int desc_align = 16;\n-\n-\tring->base_align = 512;\n-\n-\tif (desc_count == 0)\n-\t\tdesc_count = 4096;\n-\n-\tring->desc_count = VNIC_ALIGN(desc_count, count_align);\n-\n-\tring->desc_size = VNIC_ALIGN(desc_size, desc_align);\n-\n-\tring->size = ring->desc_count * ring->desc_size;\n-\tring->size_unaligned = ring->size + ring->base_align;\n-\n-\treturn ring->size_unaligned;\n-}\n-\n-void vnic_set_hdr_split_size(struct vnic_dev *vdev, u16 size)\n-{\n-\tvdev->split_hdr_size = size;\n-}\n-\n-u16 vnic_get_hdr_split_size(struct vnic_dev *vdev)\n-{\n-\treturn vdev->split_hdr_size;\n-}\n-\n-void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring)\n-{\n-\tmemset(ring->descs, 0, ring->size);\n-}\n-\n-int vnic_dev_alloc_desc_ring(__attribute__((unused)) struct vnic_dev *vdev,\n-\tstruct vnic_dev_ring *ring,\n-\tunsigned int desc_count, unsigned int desc_size, unsigned int socket_id,\n-\tchar *z_name)\n-{\n-\tconst struct rte_memzone *rz;\n-\n-\tvnic_dev_desc_ring_size(ring, desc_count, desc_size);\n-\n-\trz = rte_memzone_reserve_aligned(z_name,\n-\t\tring->size_unaligned, socket_id,\n-\t\t0, ENIC_ALIGN);\n-\tif (!rz) {\n-\t\tpr_err(\"Failed to allocate ring (size=%d), aborting\\n\",\n-\t\t\t(int)ring->size);\n-\t\treturn -ENOMEM;\n-\t}\n-\n-\tring->descs_unaligned = rz->addr;\n-\tif (!ring->descs_unaligned) {\n-\t\tpr_err(\"Failed to map allocated ring (size=%d), aborting\\n\",\n-\t\t\t(int)ring->size);\n-\t\treturn -ENOMEM;\n-\t}\n-\n-\tring->base_addr_unaligned = (dma_addr_t)rz->phys_addr;\n-\n-\tring->base_addr = VNIC_ALIGN(ring->base_addr_unaligned,\n-\t\tring->base_align);\n-\tring->descs = (u8 *)ring->descs_unaligned +\n-\t    (ring->base_addr - ring->base_addr_unaligned);\n-\n-\tvnic_dev_clear_desc_ring(ring);\n-\n-\tring->desc_avail = ring->desc_count - 1;\n-\n-\treturn 0;\n-}\n-\n-void vnic_dev_free_desc_ring(__attribute__((unused))  struct vnic_dev *vdev,\n-\tstruct vnic_dev_ring *ring)\n-{\n-\tif (ring->descs)\n-\t\tring->descs = NULL;\n-}\n-\n-static int _vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,\n-\tint wait)\n-{\n-\tstruct vnic_devcmd __iomem *devcmd = vdev->devcmd;\n-\tunsigned int i;\n-\tint delay;\n-\tu32 status;\n-\tint err;\n-\n-\tstatus = ioread32(&devcmd->status);\n-\tif (status == 0xFFFFFFFF) {\n-\t\t/* PCI-e target device is gone */\n-\t\treturn -ENODEV;\n-\t}\n-\tif (status & STAT_BUSY) {\n-\n-\t\tpr_err(\"Busy devcmd %d\\n\",  _CMD_N(cmd));\n-\t\treturn -EBUSY;\n-\t}\n-\n-\tif (_CMD_DIR(cmd) & _CMD_DIR_WRITE) {\n-\t\tfor (i = 0; i < VNIC_DEVCMD_NARGS; i++)\n-\t\t\twriteq(vdev->args[i], &devcmd->args[i]);\n-\t\twmb(); /* complete all writes initiated till now */\n-\t}\n-\n-\tiowrite32(cmd, &devcmd->cmd);\n-\n-\tif ((_CMD_FLAGS(cmd) & _CMD_FLAGS_NOWAIT))\n-\t\treturn 0;\n-\n-\tfor (delay = 0; delay < wait; delay++) {\n-\n-\t\tudelay(100);\n-\n-\t\tstatus = ioread32(&devcmd->status);\n-\t\tif (status == 0xFFFFFFFF) {\n-\t\t\t/* PCI-e target device is gone */\n-\t\t\treturn -ENODEV;\n-\t\t}\n-\n-\t\tif (!(status & STAT_BUSY)) {\n-\t\t\tif (status & STAT_ERROR) {\n-\t\t\t\terr = -(int)readq(&devcmd->args[0]);\n-\t\t\t\tif (cmd != CMD_CAPABILITY)\n-\t\t\t\t\tpr_err(\"Devcmd %d failed \" \\\n-\t\t\t\t\t\t\"with error code %d\\n\",\n-\t\t\t\t\t\t_CMD_N(cmd), err);\n-\t\t\t\treturn err;\n-\t\t\t}\n-\n-\t\t\tif (_CMD_DIR(cmd) & _CMD_DIR_READ) {\n-\t\t\t\trmb();/* finish all reads initiated till now */\n-\t\t\t\tfor (i = 0; i < VNIC_DEVCMD_NARGS; i++)\n-\t\t\t\t\tvdev->args[i] = readq(&devcmd->args[i]);\n-\t\t\t}\n-\n-\t\t\treturn 0;\n-\t\t}\n-\t}\n-\n-\tpr_err(\"Timedout devcmd %d\\n\", _CMD_N(cmd));\n-\treturn -ETIMEDOUT;\n-}\n-\n-static int vnic_dev_cmd_proxy(struct vnic_dev *vdev,\n-\tenum vnic_devcmd_cmd proxy_cmd, enum vnic_devcmd_cmd cmd,\n-\tu64 *a0, u64 *a1, int wait)\n-{\n-\tu32 status;\n-\tint err;\n-\n-\tmemset(vdev->args, 0, sizeof(vdev->args));\n-\n-\tvdev->args[0] = vdev->proxy_index;\n-\tvdev->args[1] = cmd;\n-\tvdev->args[2] = *a0;\n-\tvdev->args[3] = *a1;\n-\n-\terr = _vnic_dev_cmd(vdev, proxy_cmd, wait);\n-\tif (err)\n-\t\treturn err;\n-\n-\tstatus = (u32)vdev->args[0];\n-\tif (status & STAT_ERROR) {\n-\t\terr = (int)vdev->args[1];\n-\t\tif (err != ERR_ECMDUNKNOWN ||\n-\t\t    cmd != CMD_CAPABILITY)\n-\t\t\tpr_err(\"Error %d proxy devcmd %d\\n\", err, _CMD_N(cmd));\n-\t\treturn err;\n-\t}\n-\n-\t*a0 = vdev->args[1];\n-\t*a1 = vdev->args[2];\n-\n-\treturn 0;\n-}\n-\n-static int vnic_dev_cmd_no_proxy(struct vnic_dev *vdev,\n-\tenum vnic_devcmd_cmd cmd, u64 *a0, u64 *a1, int wait)\n-{\n-\tint err;\n-\n-\tvdev->args[0] = *a0;\n-\tvdev->args[1] = *a1;\n-\n-\terr = _vnic_dev_cmd(vdev, cmd, wait);\n-\n-\t*a0 = vdev->args[0];\n-\t*a1 = vdev->args[1];\n-\n-\treturn err;\n-}\n-\n-void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index)\n-{\n-\tvdev->proxy = PROXY_BY_INDEX;\n-\tvdev->proxy_index = index;\n-}\n-\n-void vnic_dev_cmd_proxy_by_bdf_start(struct vnic_dev *vdev, u16 bdf)\n-{\n-\tvdev->proxy = PROXY_BY_BDF;\n-\tvdev->proxy_index = bdf;\n-}\n-\n-void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev)\n-{\n-\tvdev->proxy = PROXY_NONE;\n-\tvdev->proxy_index = 0;\n-}\n-\n-int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,\n-\tu64 *a0, u64 *a1, int wait)\n-{\n-\tmemset(vdev->args, 0, sizeof(vdev->args));\n-\n-\tswitch (vdev->proxy) {\n-\tcase PROXY_BY_INDEX:\n-\t\treturn vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_INDEX, cmd,\n-\t\t\t\ta0, a1, wait);\n-\tcase PROXY_BY_BDF:\n-\t\treturn vnic_dev_cmd_proxy(vdev, CMD_PROXY_BY_BDF, cmd,\n-\t\t\t\ta0, a1, wait);\n-\tcase PROXY_NONE:\n-\tdefault:\n-\t\treturn vnic_dev_cmd_no_proxy(vdev, cmd, a0, a1, wait);\n-\t}\n-}\n-\n-static int vnic_dev_capable(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd)\n-{\n-\tu64 a0 = (u32)cmd, a1 = 0;\n-\tint wait = 1000;\n-\tint err;\n-\n-\terr = vnic_dev_cmd(vdev, CMD_CAPABILITY, &a0, &a1, wait);\n-\n-\treturn !(err || a0);\n-}\n-\n-int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, size_t size,\n-\tvoid *value)\n-{\n-\tu64 a0, a1;\n-\tint wait = 1000;\n-\tint err;\n-\n-\ta0 = offset;\n-\ta1 = size;\n-\n-\terr = vnic_dev_cmd(vdev, CMD_DEV_SPEC, &a0, &a1, wait);\n-\n-\tswitch (size) {\n-\tcase 1:\n-\t\t*(u8 *)value = (u8)a0;\n-\t\tbreak;\n-\tcase 2:\n-\t\t*(u16 *)value = (u16)a0;\n-\t\tbreak;\n-\tcase 4:\n-\t\t*(u32 *)value = (u32)a0;\n-\t\tbreak;\n-\tcase 8:\n-\t\t*(u64 *)value = a0;\n-\t\tbreak;\n-\tdefault:\n-\t\tBUG();\n-\t\tbreak;\n-\t}\n-\n-\treturn err;\n-}\n-\n-int vnic_dev_stats_clear(struct vnic_dev *vdev)\n-{\n-\tu64 a0 = 0, a1 = 0;\n-\tint wait = 1000;\n-\n-\treturn vnic_dev_cmd(vdev, CMD_STATS_CLEAR, &a0, &a1, wait);\n-}\n-\n-int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats)\n-{\n-\tu64 a0, a1;\n-\tint wait = 1000;\n-\tstatic u32 instance;\n-\tchar name[NAME_MAX];\n-\n-\tif (!vdev->stats) {\n-\t\tsnprintf((char *)name, sizeof(name),\n-\t\t\t\"vnic_stats-%d\", instance++);\n-\t\tvdev->stats = vdev->alloc_consistent(vdev->priv,\n-\t\t\tsizeof(struct vnic_stats), &vdev->stats_pa, (u8 *)name);\n-\t\tif (!vdev->stats)\n-\t\t\treturn -ENOMEM;\n-\t}\n-\n-\t*stats = vdev->stats;\n-\ta0 = vdev->stats_pa;\n-\ta1 = sizeof(struct vnic_stats);\n-\n-\treturn vnic_dev_cmd(vdev, CMD_STATS_DUMP, &a0, &a1, wait);\n-}\n-\n-int vnic_dev_close(struct vnic_dev *vdev)\n-{\n-\tu64 a0 = 0, a1 = 0;\n-\tint wait = 1000;\n-\n-\treturn vnic_dev_cmd(vdev, CMD_CLOSE, &a0, &a1, wait);\n-}\n-\n-/** Deprecated.  @see vnic_dev_enable_wait */\n-int vnic_dev_enable(struct vnic_dev *vdev)\n-{\n-\tu64 a0 = 0, a1 = 0;\n-\tint wait = 1000;\n-\n-\treturn vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);\n-}\n-\n-int vnic_dev_enable_wait(struct vnic_dev *vdev)\n-{\n-\tu64 a0 = 0, a1 = 0;\n-\tint wait = 1000;\n-\n-\tif (vnic_dev_capable(vdev, CMD_ENABLE_WAIT))\n-\t\treturn vnic_dev_cmd(vdev, CMD_ENABLE_WAIT, &a0, &a1, wait);\n-\telse\n-\t\treturn vnic_dev_cmd(vdev, CMD_ENABLE, &a0, &a1, wait);\n-}\n-\n-int vnic_dev_disable(struct vnic_dev *vdev)\n-{\n-\tu64 a0 = 0, a1 = 0;\n-\tint wait = 1000;\n-\n-\treturn vnic_dev_cmd(vdev, CMD_DISABLE, &a0, &a1, wait);\n-}\n-\n-int vnic_dev_open(struct vnic_dev *vdev, int arg)\n-{\n-\tu64 a0 = (u32)arg, a1 = 0;\n-\tint wait = 1000;\n-\n-\treturn vnic_dev_cmd(vdev, CMD_OPEN, &a0, &a1, wait);\n-}\n-\n-int vnic_dev_open_done(struct vnic_dev *vdev, int *done)\n-{\n-\tu64 a0 = 0, a1 = 0;\n-\tint wait = 1000;\n-\tint err;\n-\n-\t*done = 0;\n-\n-\terr = vnic_dev_cmd(vdev, CMD_OPEN_STATUS, &a0, &a1, wait);\n-\tif (err)\n-\t\treturn err;\n-\n-\t*done = (a0 == 0);\n-\n-\treturn 0;\n-}\n-\n-int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg)\n-{\n-\tu64 a0 = (u32)arg, a1 = 0;\n-\tint wait = 1000;\n-\n-\treturn vnic_dev_cmd(vdev, CMD_SOFT_RESET, &a0, &a1, wait);\n-}\n-\n-int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done)\n-{\n-\tu64 a0 = 0, a1 = 0;\n-\tint wait = 1000;\n-\tint err;\n-\n-\t*done = 0;\n-\n-\terr = vnic_dev_cmd(vdev, CMD_SOFT_RESET_STATUS, &a0, &a1, wait);\n-\tif (err)\n-\t\treturn err;\n-\n-\t*done = (a0 == 0);\n-\n-\treturn 0;\n-}\n-\n-int vnic_dev_get_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)\n-{\n-\tu64 a0, a1 = 0;\n-\tint wait = 1000;\n-\tint err, i;\n-\n-\tfor (i = 0; i < ETH_ALEN; i++)\n-\t\tmac_addr[i] = 0;\n-\n-\terr = vnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);\n-\tif (err)\n-\t\treturn err;\n-\n-\tfor (i = 0; i < ETH_ALEN; i++)\n-\t\tmac_addr[i] = ((u8 *)&a0)[i];\n-\n-\treturn 0;\n-}\n-\n-int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,\n-\tint broadcast, int promisc, int allmulti)\n-{\n-\tu64 a0, a1 = 0;\n-\tint wait = 1000;\n-\tint err;\n-\n-\ta0 = (directed ? CMD_PFILTER_DIRECTED : 0) |\n-\t     (multicast ? CMD_PFILTER_MULTICAST : 0) |\n-\t     (broadcast ? CMD_PFILTER_BROADCAST : 0) |\n-\t     (promisc ? CMD_PFILTER_PROMISCUOUS : 0) |\n-\t     (allmulti ? CMD_PFILTER_ALL_MULTICAST : 0);\n-\n-\terr = vnic_dev_cmd(vdev, CMD_PACKET_FILTER, &a0, &a1, wait);\n-\tif (err)\n-\t\tpr_err(\"Can't set packet filter\\n\");\n-\n-\treturn err;\n-}\n-\n-int vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr)\n-{\n-\tu64 a0 = 0, a1 = 0;\n-\tint wait = 1000;\n-\tint err;\n-\tint i;\n-\n-\tfor (i = 0; i < ETH_ALEN; i++)\n-\t\t((u8 *)&a0)[i] = addr[i];\n-\n-\terr = vnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);\n-\tif (err)\n-\t\tpr_err(\"Can't add addr [%02x:%02x:%02x:%02x:%02x:%02x], %d\\n\",\n-\t\t\taddr[0], addr[1], addr[2], addr[3], addr[4], addr[5],\n-\t\t\terr);\n-\n-\treturn err;\n-}\n-\n-int vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr)\n-{\n-\tu64 a0 = 0, a1 = 0;\n-\tint wait = 1000;\n-\tint err;\n-\tint i;\n-\n-\tfor (i = 0; i < ETH_ALEN; i++)\n-\t\t((u8 *)&a0)[i] = addr[i];\n-\n-\terr = vnic_dev_cmd(vdev, CMD_ADDR_DEL, &a0, &a1, wait);\n-\tif (err)\n-\t\tpr_err(\"Can't del addr [%02x:%02x:%02x:%02x:%02x:%02x], %d\\n\",\n-\t\t\taddr[0], addr[1], addr[2], addr[3], addr[4], addr[5],\n-\t\t\terr);\n-\n-\treturn err;\n-}\n-\n-int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,\n-\tu8 ig_vlan_rewrite_mode)\n-{\n-\tu64 a0 = ig_vlan_rewrite_mode, a1 = 0;\n-\tint wait = 1000;\n-\n-\tif (vnic_dev_capable(vdev, CMD_IG_VLAN_REWRITE_MODE))\n-\t\treturn vnic_dev_cmd(vdev, CMD_IG_VLAN_REWRITE_MODE,\n-\t\t\t\t&a0, &a1, wait);\n-\telse\n-\t\treturn 0;\n-}\n-\n-int vnic_dev_raise_intr(struct vnic_dev *vdev, u16 intr)\n-{\n-\tu64 a0 = intr, a1 = 0;\n-\tint wait = 1000;\n-\tint err;\n-\n-\terr = vnic_dev_cmd(vdev, CMD_IAR, &a0, &a1, wait);\n-\tif (err)\n-\t\tpr_err(\"Failed to raise INTR[%d], err %d\\n\", intr, err);\n-\n-\treturn err;\n-}\n-\n-void vnic_dev_set_reset_flag(struct vnic_dev *vdev, int state)\n-{\n-\tvdev->in_reset = state;\n-}\n-\n-static inline int vnic_dev_in_reset(struct vnic_dev *vdev)\n-{\n-\treturn vdev->in_reset;\n-}\n-\n-int vnic_dev_notify_setcmd(struct vnic_dev *vdev,\n-\tvoid *notify_addr, dma_addr_t notify_pa, u16 intr)\n-{\n-\tu64 a0, a1;\n-\tint wait = 1000;\n-\tint r;\n-\n-\tmemset(notify_addr, 0, sizeof(struct vnic_devcmd_notify));\n-\tif (!vnic_dev_in_reset(vdev)) {\n-\t\tvdev->notify = notify_addr;\n-\t\tvdev->notify_pa = notify_pa;\n-\t}\n-\n-\ta0 = (u64)notify_pa;\n-\ta1 = ((u64)intr << 32) & 0x0000ffff00000000ULL;\n-\ta1 += sizeof(struct vnic_devcmd_notify);\n-\n-\tr = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);\n-\tif (!vnic_dev_in_reset(vdev))\n-\t\tvdev->notify_sz = (r == 0) ? (u32)a1 : 0;\n-\n-\treturn r;\n-}\n-\n-int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr)\n-{\n-\tvoid *notify_addr = NULL;\n-\tdma_addr_t notify_pa = 0;\n-\tchar name[NAME_MAX];\n-\tstatic u32 instance;\n-\n-\tif (vdev->notify || vdev->notify_pa) {\n-\t\tpr_warn(\"notify block %p still allocated.\\n\" \\\n-\t\t\t\"Ignore if restarting port\\n\", vdev->notify);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (!vnic_dev_in_reset(vdev)) {\n-\t\tsnprintf((char *)name, sizeof(name),\n-\t\t\t\"vnic_notify-%d\", instance++);\n-\t\tnotify_addr = vdev->alloc_consistent(vdev->priv,\n-\t\t\tsizeof(struct vnic_devcmd_notify),\n-\t\t\t&notify_pa, (u8 *)name);\n-\t\tif (!notify_addr)\n-\t\t\treturn -ENOMEM;\n-\t}\n-\n-\treturn vnic_dev_notify_setcmd(vdev, notify_addr, notify_pa, intr);\n-}\n-\n-int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev)\n-{\n-\tu64 a0, a1;\n-\tint wait = 1000;\n-\tint err;\n-\n-\ta0 = 0;  /* paddr = 0 to unset notify buffer */\n-\ta1 = 0x0000ffff00000000ULL; /* intr num = -1 to unreg for intr */\n-\ta1 += sizeof(struct vnic_devcmd_notify);\n-\n-\terr = vnic_dev_cmd(vdev, CMD_NOTIFY, &a0, &a1, wait);\n-\tif (!vnic_dev_in_reset(vdev)) {\n-\t\tvdev->notify = NULL;\n-\t\tvdev->notify_pa = 0;\n-\t\tvdev->notify_sz = 0;\n-\t}\n-\n-\treturn err;\n-}\n-\n-int vnic_dev_notify_unset(struct vnic_dev *vdev)\n-{\n-\tif (vdev->notify && !vnic_dev_in_reset(vdev)) {\n-\t\tvdev->free_consistent(vdev->pdev,\n-\t\t\tsizeof(struct vnic_devcmd_notify),\n-\t\t\tvdev->notify,\n-\t\t\tvdev->notify_pa);\n-\t}\n-\n-\treturn vnic_dev_notify_unsetcmd(vdev);\n-}\n-\n-static int vnic_dev_notify_ready(struct vnic_dev *vdev)\n-{\n-\tu32 *words;\n-\tunsigned int nwords = vdev->notify_sz / 4;\n-\tunsigned int i;\n-\tu32 csum;\n-\n-\tif (!vdev->notify || !vdev->notify_sz)\n-\t\treturn 0;\n-\n-\tdo {\n-\t\tcsum = 0;\n-\t\trte_memcpy(&vdev->notify_copy, vdev->notify, vdev->notify_sz);\n-\t\twords = (u32 *)&vdev->notify_copy;\n-\t\tfor (i = 1; i < nwords; i++)\n-\t\t\tcsum += words[i];\n-\t} while (csum != words[0]);\n-\n-\treturn 1;\n-}\n-\n-int vnic_dev_init(struct vnic_dev *vdev, int arg)\n-{\n-\tu64 a0 = (u32)arg, a1 = 0;\n-\tint wait = 1000;\n-\tint r = 0;\n-\n-\tif (vnic_dev_capable(vdev, CMD_INIT))\n-\t\tr = vnic_dev_cmd(vdev, CMD_INIT, &a0, &a1, wait);\n-\telse {\n-\t\tvnic_dev_cmd(vdev, CMD_INIT_v1, &a0, &a1, wait);\n-\t\tif (a0 & CMD_INITF_DEFAULT_MAC) {\n-\t\t\t/* Emulate these for old CMD_INIT_v1 which\n-\t\t\t * didn't pass a0 so no CMD_INITF_*.\n-\t\t\t */\n-\t\t\tvnic_dev_cmd(vdev, CMD_GET_MAC_ADDR, &a0, &a1, wait);\n-\t\t\tvnic_dev_cmd(vdev, CMD_ADDR_ADD, &a0, &a1, wait);\n-\t\t}\n-\t}\n-\treturn r;\n-}\n-\n-int vnic_dev_deinit(struct vnic_dev *vdev)\n-{\n-\tu64 a0 = 0, a1 = 0;\n-\tint wait = 1000;\n-\n-\treturn vnic_dev_cmd(vdev, CMD_DEINIT, &a0, &a1, wait);\n-}\n-\n-void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev)\n-{\n-\t/* Default: hardware intr coal timer is in units of 1.5 usecs */\n-\tvdev->intr_coal_timer_info.mul = 2;\n-\tvdev->intr_coal_timer_info.div = 3;\n-\tvdev->intr_coal_timer_info.max_usec =\n-\t\tvnic_dev_intr_coal_timer_hw_to_usec(vdev, 0xffff);\n-}\n-\n-int vnic_dev_link_status(struct vnic_dev *vdev)\n-{\n-\tif (!vnic_dev_notify_ready(vdev))\n-\t\treturn 0;\n-\n-\treturn vdev->notify_copy.link_state;\n-}\n-\n-u32 vnic_dev_port_speed(struct vnic_dev *vdev)\n-{\n-\tif (!vnic_dev_notify_ready(vdev))\n-\t\treturn 0;\n-\n-\treturn vdev->notify_copy.port_speed;\n-}\n-\n-void vnic_dev_set_intr_mode(struct vnic_dev *vdev,\n-\tenum vnic_dev_intr_mode intr_mode)\n-{\n-\tvdev->intr_mode = intr_mode;\n-}\n-\n-enum vnic_dev_intr_mode vnic_dev_get_intr_mode(\n-\tstruct vnic_dev *vdev)\n-{\n-\treturn vdev->intr_mode;\n-}\n-\n-u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec)\n-{\n-\treturn (usec * vdev->intr_coal_timer_info.mul) /\n-\t\tvdev->intr_coal_timer_info.div;\n-}\n-\n-u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles)\n-{\n-\treturn (hw_cycles * vdev->intr_coal_timer_info.div) /\n-\t\tvdev->intr_coal_timer_info.mul;\n-}\n-\n-u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev)\n-{\n-\treturn vdev->intr_coal_timer_info.max_usec;\n-}\n-\n-void vnic_dev_unregister(struct vnic_dev *vdev)\n-{\n-\tif (vdev) {\n-\t\tif (vdev->notify)\n-\t\t\tvdev->free_consistent(vdev->pdev,\n-\t\t\t\tsizeof(struct vnic_devcmd_notify),\n-\t\t\t\tvdev->notify,\n-\t\t\t\tvdev->notify_pa);\n-\t\tif (vdev->stats)\n-\t\t\tvdev->free_consistent(vdev->pdev,\n-\t\t\t\tsizeof(struct vnic_stats),\n-\t\t\t\tvdev->stats, vdev->stats_pa);\n-\t\tif (vdev->fw_info)\n-\t\t\tvdev->free_consistent(vdev->pdev,\n-\t\t\t\tsizeof(struct vnic_devcmd_fw_info),\n-\t\t\t\tvdev->fw_info, vdev->fw_info_pa);\n-\t\tkfree(vdev);\n-\t}\n-}\n-\n-struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,\n-\tvoid *priv, struct rte_pci_device *pdev, struct vnic_dev_bar *bar,\n-\tunsigned int num_bars)\n-{\n-\tif (!vdev) {\n-\t\tvdev = kzalloc(sizeof(struct vnic_dev), GFP_ATOMIC);\n-\t\tif (!vdev)\n-\t\t\treturn NULL;\n-\t}\n-\n-\tvdev->priv = priv;\n-\tvdev->pdev = pdev;\n-\n-\tif (vnic_dev_discover_res(vdev, bar, num_bars))\n-\t\tgoto err_out;\n-\n-\tvdev->devcmd = vnic_dev_get_res(vdev, RES_TYPE_DEVCMD, 0);\n-\tif (!vdev->devcmd)\n-\t\tgoto err_out;\n-\n-\treturn vdev;\n-\n-err_out:\n-\tvnic_dev_unregister(vdev);\n-\treturn NULL;\n-}\n-\n-struct rte_pci_device *vnic_dev_get_pdev(struct vnic_dev *vdev)\n-{\n-\treturn vdev->pdev;\n-}\n-\n-int vnic_dev_set_mac_addr(struct vnic_dev *vdev, u8 *mac_addr)\n-{\n-\tu64 a0, a1 = 0;\n-\tint wait = 1000;\n-\tint i;\n-\n-\tfor (i = 0; i < ETH_ALEN; i++)\n-\t\t((u8 *)&a0)[i] = mac_addr[i];\n-\n-\treturn vnic_dev_cmd(vdev, CMD_SET_MAC_ADDR, &a0, &a1, wait);\n-}\n-\n-/*\n- *  vnic_dev_classifier: Add/Delete classifier entries\n- *  @vdev: vdev of the device\n- *  @cmd: CLSF_ADD for Add filter\n- *        CLSF_DEL for Delete filter\n- *  @entry: In case of ADD filter, the caller passes the RQ number in this\n- *          variable.\n- *          This function stores the filter_id returned by the\n- *          firmware in the same variable before return;\n- *\n- *          In case of DEL filter, the caller passes the RQ number. Return\n- *          value is irrelevant.\n- * @data: filter data\n- */\n-int vnic_dev_classifier(struct vnic_dev *vdev, u8 cmd, u16 *entry,\n-\tstruct filter *data)\n-{\n-\tu64 a0, a1;\n-\tint wait = 1000;\n-\tdma_addr_t tlv_pa;\n-\tint ret = -EINVAL;\n-\tstruct filter_tlv *tlv, *tlv_va;\n-\tstruct filter_action *action;\n-\tu64 tlv_size;\n-\tstatic unsigned int unique_id;\n-\tchar z_name[RTE_MEMZONE_NAMESIZE];\n-\n-\tif (cmd == CLSF_ADD) {\n-\t\ttlv_size = sizeof(struct filter) +\n-\t\t    sizeof(struct filter_action) +\n-\t\t    2*sizeof(struct filter_tlv);\n-\t\tsnprintf((char *)z_name, sizeof(z_name),\n-\t\t\t\"vnic_clsf_%d\", unique_id++);\n-\t\ttlv_va = vdev->alloc_consistent(vdev->priv,\n-\t\t\ttlv_size, &tlv_pa, (u8 *)z_name);\n-\t\tif (!tlv_va)\n-\t\t\treturn -ENOMEM;\n-\t\ttlv = tlv_va;\n-\t\ta0 = tlv_pa;\n-\t\ta1 = tlv_size;\n-\t\tmemset(tlv, 0, tlv_size);\n-\t\ttlv->type = CLSF_TLV_FILTER;\n-\t\ttlv->length = sizeof(struct filter);\n-\t\t*(struct filter *)&tlv->val = *data;\n-\n-\t\ttlv = (struct filter_tlv *)((char *)tlv +\n-\t\t\t\t\t sizeof(struct filter_tlv) +\n-\t\t\t\t\t sizeof(struct filter));\n-\n-\t\ttlv->type = CLSF_TLV_ACTION;\n-\t\ttlv->length = sizeof(struct filter_action);\n-\t\taction = (struct filter_action *)&tlv->val;\n-\t\taction->type = FILTER_ACTION_RQ_STEERING;\n-\t\taction->u.rq_idx = *entry;\n-\n-\t\tret = vnic_dev_cmd(vdev, CMD_ADD_FILTER, &a0, &a1, wait);\n-\t\t*entry = (u16)a0;\n-\t\tvdev->free_consistent(vdev->pdev, tlv_size, tlv_va, tlv_pa);\n-\t} else if (cmd == CLSF_DEL) {\n-\t\ta0 = *entry;\n-\t\tret = vnic_dev_cmd(vdev, CMD_DEL_FILTER, &a0, &a1, wait);\n-\t}\n-\n-\treturn ret;\n-}\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_dev.h b/lib/librte_pmd_enic/vnic/vnic_dev.h\ndeleted file mode 100644\nindex f583357..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_dev.h\n+++ /dev/null\n@@ -1,212 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_dev.h 196958 2014-11-04 18:23:37Z xuywang $\"\n-\n-#ifndef _VNIC_DEV_H_\n-#define _VNIC_DEV_H_\n-\n-#include \"enic_compat.h\"\n-#include \"rte_pci.h\"\n-#include \"vnic_resource.h\"\n-#include \"vnic_devcmd.h\"\n-\n-#ifndef VNIC_PADDR_TARGET\n-#define VNIC_PADDR_TARGET\t0x0000000000000000ULL\n-#endif\n-\n-#ifndef readq\n-static inline u64 readq(void __iomem *reg)\n-{\n-\treturn ((u64)readl((char *)reg + 0x4UL) << 32) |\n-\t\t(u64)readl(reg);\n-}\n-\n-static inline void writeq(u64 val, void __iomem *reg)\n-{\n-\twritel(val & 0xffffffff, reg);\n-\twritel((u32)(val >> 32), (char *)reg + 0x4UL);\n-}\n-#endif\n-\n-#undef pr_fmt\n-#define pr_fmt(fmt) KBUILD_MODNAME \": \" fmt\n-\n-enum vnic_dev_intr_mode {\n-\tVNIC_DEV_INTR_MODE_UNKNOWN,\n-\tVNIC_DEV_INTR_MODE_INTX,\n-\tVNIC_DEV_INTR_MODE_MSI,\n-\tVNIC_DEV_INTR_MODE_MSIX,\n-};\n-\n-struct vnic_dev_bar {\n-\tvoid __iomem *vaddr;\n-\tdma_addr_t bus_addr;\n-\tunsigned long len;\n-};\n-\n-struct vnic_dev_ring {\n-\tvoid *descs;\n-\tsize_t size;\n-\tdma_addr_t base_addr;\n-\tsize_t base_align;\n-\tvoid *descs_unaligned;\n-\tsize_t size_unaligned;\n-\tdma_addr_t base_addr_unaligned;\n-\tunsigned int desc_size;\n-\tunsigned int desc_count;\n-\tunsigned int desc_avail;\n-};\n-\n-struct vnic_dev_iomap_info {\n-\tdma_addr_t bus_addr;\n-\tunsigned long len;\n-\tvoid __iomem *vaddr;\n-};\n-\n-struct vnic_dev;\n-struct vnic_stats;\n-\n-void *vnic_dev_priv(struct vnic_dev *vdev);\n-unsigned int vnic_dev_get_res_count(struct vnic_dev *vdev,\n-\tenum vnic_res_type type);\n-void vnic_register_cbacks(struct vnic_dev *vdev,\n-\tvoid *(*alloc_consistent)(void *priv, size_t size,\n-\t\tdma_addr_t *dma_handle, u8 *name),\n-\tvoid (*free_consistent)(struct rte_pci_device *hwdev,\n-\t\tsize_t size, void *vaddr,\n-\t\tdma_addr_t dma_handle));\n-void __iomem *vnic_dev_get_res(struct vnic_dev *vdev, enum vnic_res_type type,\n-\tunsigned int index);\n-dma_addr_t vnic_dev_get_res_bus_addr(struct vnic_dev *vdev,\n-\tenum vnic_res_type type, unsigned int index);\n-uint8_t vnic_dev_get_res_bar(struct vnic_dev *vdev,\n-\tenum vnic_res_type type);\n-uint32_t vnic_dev_get_res_offset(struct vnic_dev *vdev,\n-\tenum vnic_res_type type, unsigned int index);\n-unsigned long vnic_dev_get_res_type_len(struct vnic_dev *vdev,\n-\t\t\t\t\tenum vnic_res_type type);\n-unsigned int vnic_dev_desc_ring_size(struct vnic_dev_ring *ring,\n-\tunsigned int desc_count, unsigned int desc_size);\n-void vnic_dev_clear_desc_ring(struct vnic_dev_ring *ring);\n-void vnic_set_hdr_split_size(struct vnic_dev *vdev, u16 size);\n-u16 vnic_get_hdr_split_size(struct vnic_dev *vdev);\n-int vnic_dev_alloc_desc_ring(struct vnic_dev *vdev, struct vnic_dev_ring *ring,\n-\tunsigned int desc_count, unsigned int desc_size, unsigned int socket_id,\n-\tchar *z_name);\n-void vnic_dev_free_desc_ring(struct vnic_dev *vdev,\n-\tstruct vnic_dev_ring *ring);\n-int vnic_dev_cmd(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,\n-\tu64 *a0, u64 *a1, int wait);\n-int vnic_dev_cmd_args(struct vnic_dev *vdev, enum vnic_devcmd_cmd cmd,\n-\tu64 *args, int nargs, int wait);\n-void vnic_dev_cmd_proxy_by_index_start(struct vnic_dev *vdev, u16 index);\n-void vnic_dev_cmd_proxy_by_bdf_start(struct vnic_dev *vdev, u16 bdf);\n-void vnic_dev_cmd_proxy_end(struct vnic_dev *vdev);\n-int vnic_dev_fw_info(struct vnic_dev *vdev,\n-\tstruct vnic_devcmd_fw_info **fw_info);\n-int vnic_dev_asic_info(struct vnic_dev *vdev, u16 *asic_type, u16 *asic_rev);\n-int vnic_dev_spec(struct vnic_dev *vdev, unsigned int offset, size_t size,\n-\tvoid *value);\n-int vnic_dev_stats_clear(struct vnic_dev *vdev);\n-int vnic_dev_stats_dump(struct vnic_dev *vdev, struct vnic_stats **stats);\n-int vnic_dev_hang_notify(struct vnic_dev *vdev);\n-int vnic_dev_packet_filter(struct vnic_dev *vdev, int directed, int multicast,\n-\tint broadcast, int promisc, int allmulti);\n-int vnic_dev_packet_filter_all(struct vnic_dev *vdev, int directed,\n-\tint multicast, int broadcast, int promisc, int allmulti);\n-int vnic_dev_add_addr(struct vnic_dev *vdev, u8 *addr);\n-int vnic_dev_del_addr(struct vnic_dev *vdev, u8 *addr);\n-int vnic_dev_get_mac_addr(struct vnic_dev *vdev, u8 *mac_addr);\n-int vnic_dev_raise_intr(struct vnic_dev *vdev, u16 intr);\n-int vnic_dev_notify_set(struct vnic_dev *vdev, u16 intr);\n-void vnic_dev_set_reset_flag(struct vnic_dev *vdev, int state);\n-int vnic_dev_notify_unset(struct vnic_dev *vdev);\n-int vnic_dev_notify_setcmd(struct vnic_dev *vdev,\n-\tvoid *notify_addr, dma_addr_t notify_pa, u16 intr);\n-int vnic_dev_notify_unsetcmd(struct vnic_dev *vdev);\n-int vnic_dev_link_status(struct vnic_dev *vdev);\n-u32 vnic_dev_port_speed(struct vnic_dev *vdev);\n-u32 vnic_dev_msg_lvl(struct vnic_dev *vdev);\n-u32 vnic_dev_mtu(struct vnic_dev *vdev);\n-u32 vnic_dev_link_down_cnt(struct vnic_dev *vdev);\n-u32 vnic_dev_notify_status(struct vnic_dev *vdev);\n-u32 vnic_dev_uif(struct vnic_dev *vdev);\n-int vnic_dev_close(struct vnic_dev *vdev);\n-int vnic_dev_enable(struct vnic_dev *vdev);\n-int vnic_dev_enable_wait(struct vnic_dev *vdev);\n-int vnic_dev_disable(struct vnic_dev *vdev);\n-int vnic_dev_open(struct vnic_dev *vdev, int arg);\n-int vnic_dev_open_done(struct vnic_dev *vdev, int *done);\n-int vnic_dev_init(struct vnic_dev *vdev, int arg);\n-int vnic_dev_init_done(struct vnic_dev *vdev, int *done, int *err);\n-int vnic_dev_init_prov(struct vnic_dev *vdev, u8 *buf, u32 len);\n-int vnic_dev_deinit(struct vnic_dev *vdev);\n-void vnic_dev_intr_coal_timer_info_default(struct vnic_dev *vdev);\n-int vnic_dev_intr_coal_timer_info(struct vnic_dev *vdev);\n-int vnic_dev_soft_reset(struct vnic_dev *vdev, int arg);\n-int vnic_dev_soft_reset_done(struct vnic_dev *vdev, int *done);\n-int vnic_dev_hang_reset(struct vnic_dev *vdev, int arg);\n-int vnic_dev_hang_reset_done(struct vnic_dev *vdev, int *done);\n-void vnic_dev_set_intr_mode(struct vnic_dev *vdev,\n-\tenum vnic_dev_intr_mode intr_mode);\n-enum vnic_dev_intr_mode vnic_dev_get_intr_mode(struct vnic_dev *vdev);\n-u32 vnic_dev_intr_coal_timer_usec_to_hw(struct vnic_dev *vdev, u32 usec);\n-u32 vnic_dev_intr_coal_timer_hw_to_usec(struct vnic_dev *vdev, u32 hw_cycles);\n-u32 vnic_dev_get_intr_coal_timer_max(struct vnic_dev *vdev);\n-void vnic_dev_unregister(struct vnic_dev *vdev);\n-int vnic_dev_set_ig_vlan_rewrite_mode(struct vnic_dev *vdev,\n-\tu8 ig_vlan_rewrite_mode);\n-struct vnic_dev *vnic_dev_register(struct vnic_dev *vdev,\n-\tvoid *priv, struct rte_pci_device *pdev, struct vnic_dev_bar *bar,\n-\tunsigned int num_bars);\n-struct rte_pci_device *vnic_dev_get_pdev(struct vnic_dev *vdev);\n-int vnic_dev_cmd_init(struct vnic_dev *vdev, int fallback);\n-int vnic_dev_get_size(void);\n-int vnic_dev_int13(struct vnic_dev *vdev, u64 arg, u32 op);\n-int vnic_dev_perbi(struct vnic_dev *vdev, u64 arg, u32 op);\n-u32 vnic_dev_perbi_rebuild_cnt(struct vnic_dev *vdev);\n-int vnic_dev_init_prov2(struct vnic_dev *vdev, u8 *buf, u32 len);\n-int vnic_dev_enable2(struct vnic_dev *vdev, int active);\n-int vnic_dev_enable2_done(struct vnic_dev *vdev, int *status);\n-int vnic_dev_deinit_done(struct vnic_dev *vdev, int *status);\n-int vnic_dev_set_mac_addr(struct vnic_dev *vdev, u8 *mac_addr);\n-int vnic_dev_classifier(struct vnic_dev *vdev, u8 cmd, u16 *entry,\n-\tstruct filter *data);\n-#ifdef ENIC_VXLAN\n-int vnic_dev_overlay_offload_enable_disable(struct vnic_dev *vdev,\n-\tu8 overlay, u8 config);\n-int vnic_dev_overlay_offload_cfg(struct vnic_dev *vdev, u8 overlay,\n-\tu16 vxlan_udp_port_number);\n-#endif\n-#endif /* _VNIC_DEV_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_devcmd.h b/lib/librte_pmd_enic/vnic/vnic_devcmd.h\ndeleted file mode 100644\nindex e7ecf31..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_devcmd.h\n+++ /dev/null\n@@ -1,774 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_devcmd.h 173135 2014-05-16 03:14:07Z sanpilla $\"\n-\n-#ifndef _VNIC_DEVCMD_H_\n-#define _VNIC_DEVCMD_H_\n-\n-#define _CMD_NBITS      14\n-#define _CMD_VTYPEBITS\t10\n-#define _CMD_FLAGSBITS  6\n-#define _CMD_DIRBITS\t2\n-\n-#define _CMD_NMASK      ((1 << _CMD_NBITS)-1)\n-#define _CMD_VTYPEMASK  ((1 << _CMD_VTYPEBITS)-1)\n-#define _CMD_FLAGSMASK  ((1 << _CMD_FLAGSBITS)-1)\n-#define _CMD_DIRMASK    ((1 << _CMD_DIRBITS)-1)\n-\n-#define _CMD_NSHIFT     0\n-#define _CMD_VTYPESHIFT (_CMD_NSHIFT+_CMD_NBITS)\n-#define _CMD_FLAGSSHIFT (_CMD_VTYPESHIFT+_CMD_VTYPEBITS)\n-#define _CMD_DIRSHIFT   (_CMD_FLAGSSHIFT+_CMD_FLAGSBITS)\n-\n-/*\n- * Direction bits (from host perspective).\n- */\n-#define _CMD_DIR_NONE   0U\n-#define _CMD_DIR_WRITE  1U\n-#define _CMD_DIR_READ   2U\n-#define _CMD_DIR_RW     (_CMD_DIR_WRITE | _CMD_DIR_READ)\n-\n-/*\n- * Flag bits.\n- */\n-#define _CMD_FLAGS_NONE 0U\n-#define _CMD_FLAGS_NOWAIT 1U\n-\n-/*\n- * vNIC type bits.\n- */\n-#define _CMD_VTYPE_NONE  0U\n-#define _CMD_VTYPE_ENET  1U\n-#define _CMD_VTYPE_FC    2U\n-#define _CMD_VTYPE_SCSI  4U\n-#define _CMD_VTYPE_ALL   (_CMD_VTYPE_ENET | _CMD_VTYPE_FC | _CMD_VTYPE_SCSI)\n-\n-/*\n- * Used to create cmds..\n- */\n-#define _CMDCF(dir, flags, vtype, nr)  \\\n-\t(((dir)   << _CMD_DIRSHIFT) | \\\n-\t((flags) << _CMD_FLAGSSHIFT) | \\\n-\t((vtype) << _CMD_VTYPESHIFT) | \\\n-\t((nr)    << _CMD_NSHIFT))\n-#define _CMDC(dir, vtype, nr)    _CMDCF(dir, 0, vtype, nr)\n-#define _CMDCNW(dir, vtype, nr)  _CMDCF(dir, _CMD_FLAGS_NOWAIT, vtype, nr)\n-\n-/*\n- * Used to decode cmds..\n- */\n-#define _CMD_DIR(cmd)            (((cmd) >> _CMD_DIRSHIFT) & _CMD_DIRMASK)\n-#define _CMD_FLAGS(cmd)          (((cmd) >> _CMD_FLAGSSHIFT) & _CMD_FLAGSMASK)\n-#define _CMD_VTYPE(cmd)          (((cmd) >> _CMD_VTYPESHIFT) & _CMD_VTYPEMASK)\n-#define _CMD_N(cmd)              (((cmd) >> _CMD_NSHIFT) & _CMD_NMASK)\n-\n-enum vnic_devcmd_cmd {\n-\tCMD_NONE                = _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_NONE, 0),\n-\n-\t/*\n-\t * mcpu fw info in mem:\n-\t * in:\n-\t *   (u64)a0=paddr to struct vnic_devcmd_fw_info\n-\t * action:\n-\t *   Fills in struct vnic_devcmd_fw_info (128 bytes)\n-\t * note:\n-\t *   An old definition of CMD_MCPU_FW_INFO\n-\t */\n-\tCMD_MCPU_FW_INFO_OLD    = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 1),\n-\n-\t/*\n-\t * mcpu fw info in mem:\n-\t * in:\n-\t *   (u64)a0=paddr to struct vnic_devcmd_fw_info\n-\t *   (u16)a1=size of the structure\n-\t * out:\n-\t *\t (u16)a1=0                          for in:a1 = 0,\n-\t *\t         data size actually written for other values.\n-\t * action:\n-\t *   Fills in first 128 bytes of vnic_devcmd_fw_info for in:a1 = 0,\n-\t *            first in:a1 bytes               for 0 < in:a1 <= 132,\n-\t *            132 bytes                       for other values of in:a1.\n-\t * note:\n-\t *   CMD_MCPU_FW_INFO and CMD_MCPU_FW_INFO_OLD have the same enum 1\n-\t *   for source compatibility.\n-\t */\n-\tCMD_MCPU_FW_INFO        = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 1),\n-\n-\t/* dev-specific block member:\n-\t *    in: (u16)a0=offset,(u8)a1=size\n-\t *    out: a0=value */\n-\tCMD_DEV_SPEC            = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 2),\n-\n-\t/* stats clear */\n-\tCMD_STATS_CLEAR         = _CMDCNW(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 3),\n-\n-\t/* stats dump in mem: (u64)a0=paddr to stats area,\n-\t *                    (u16)a1=sizeof stats area */\n-\tCMD_STATS_DUMP          = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 4),\n-\n-\t/* set Rx packet filter: (u32)a0=filters (see CMD_PFILTER_*) */\n-\tCMD_PACKET_FILTER\t= _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 7),\n-\n-\t/* set Rx packet filter for all: (u32)a0=filters (see CMD_PFILTER_*) */\n-\tCMD_PACKET_FILTER_ALL   = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 7),\n-\n-\t/* hang detection notification */\n-\tCMD_HANG_NOTIFY         = _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 8),\n-\n-\t/* MAC address in (u48)a0 */\n-\tCMD_GET_MAC_ADDR\t= _CMDC(_CMD_DIR_READ,\n-\t\t\t\t\t_CMD_VTYPE_ENET | _CMD_VTYPE_FC, 9),\n-\n-\t/* add addr from (u48)a0 */\n-\tCMD_ADDR_ADD            = _CMDCNW(_CMD_DIR_WRITE,\n-\t\t\t\t\t_CMD_VTYPE_ENET | _CMD_VTYPE_FC, 12),\n-\n-\t/* del addr from (u48)a0 */\n-\tCMD_ADDR_DEL            = _CMDCNW(_CMD_DIR_WRITE,\n-\t\t\t\t\t_CMD_VTYPE_ENET | _CMD_VTYPE_FC, 13),\n-\n-\t/* add VLAN id in (u16)a0 */\n-\tCMD_VLAN_ADD            = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 14),\n-\n-\t/* del VLAN id in (u16)a0 */\n-\tCMD_VLAN_DEL            = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 15),\n-\n-\t/* nic_cfg in (u32)a0 */\n-\tCMD_NIC_CFG             = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 16),\n-\n-\t/* union vnic_rss_key in mem: (u64)a0=paddr, (u16)a1=len */\n-\tCMD_RSS_KEY             = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 17),\n-\n-\t/* union vnic_rss_cpu in mem: (u64)a0=paddr, (u16)a1=len */\n-\tCMD_RSS_CPU             = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 18),\n-\n-\t/* initiate softreset */\n-\tCMD_SOFT_RESET          = _CMDCNW(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 19),\n-\n-\t/* softreset status:\n-\t *    out: a0=0 reset complete, a0=1 reset in progress */\n-\tCMD_SOFT_RESET_STATUS   = _CMDC(_CMD_DIR_READ, _CMD_VTYPE_ALL, 20),\n-\n-\t/* set struct vnic_devcmd_notify buffer in mem:\n-\t * in:\n-\t *   (u64)a0=paddr to notify (set paddr=0 to unset)\n-\t *   (u32)a1 & 0x00000000ffffffff=sizeof(struct vnic_devcmd_notify)\n-\t *   (u16)a1 & 0x0000ffff00000000=intr num (-1 for no intr)\n-\t * out:\n-\t *   (u32)a1 = effective size\n-\t */\n-\tCMD_NOTIFY              = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 21),\n-\n-\t/* UNDI API: (u64)a0=paddr to s_PXENV_UNDI_ struct,\n-\t *           (u8)a1=PXENV_UNDI_xxx */\n-\tCMD_UNDI                = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 22),\n-\n-\t/* initiate open sequence (u32)a0=flags (see CMD_OPENF_*) */\n-\tCMD_OPEN\t\t= _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 23),\n-\n-\t/* open status:\n-\t *    out: a0=0 open complete, a0=1 open in progress */\n-\tCMD_OPEN_STATUS\t\t= _CMDC(_CMD_DIR_READ, _CMD_VTYPE_ALL, 24),\n-\n-\t/* close vnic */\n-\tCMD_CLOSE\t\t= _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 25),\n-\n-\t/* initialize virtual link: (u32)a0=flags (see CMD_INITF_*) */\n-/***** Replaced by CMD_INIT *****/\n-\tCMD_INIT_v1\t\t= _CMDCNW(_CMD_DIR_READ, _CMD_VTYPE_ALL, 26),\n-\n-\t/* variant of CMD_INIT, with provisioning info\n-\t *     (u64)a0=paddr of vnic_devcmd_provinfo\n-\t *     (u32)a1=sizeof provision info */\n-\tCMD_INIT_PROV_INFO\t= _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 27),\n-\n-\t/* enable virtual link */\n-\tCMD_ENABLE\t\t= _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 28),\n-\n-\t/* enable virtual link, waiting variant. */\n-\tCMD_ENABLE_WAIT\t\t= _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 28),\n-\n-\t/* disable virtual link */\n-\tCMD_DISABLE\t\t= _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 29),\n-\n-\t/* stats dump sum of all vnic stats on same uplink in mem:\n-\t *     (u64)a0=paddr\n-\t *     (u16)a1=sizeof stats area */\n-\tCMD_STATS_DUMP_ALL\t= _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 30),\n-\n-\t/* init status:\n-\t *    out: a0=0 init complete, a0=1 init in progress\n-\t *         if a0=0, a1=errno */\n-\tCMD_INIT_STATUS\t\t= _CMDC(_CMD_DIR_READ, _CMD_VTYPE_ALL, 31),\n-\n-\t/* INT13 API: (u64)a0=paddr to vnic_int13_params struct\n-\t *            (u32)a1=INT13_CMD_xxx */\n-\tCMD_INT13               = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_FC, 32),\n-\n-\t/* logical uplink enable/disable: (u64)a0: 0/1=disable/enable */\n-\tCMD_LOGICAL_UPLINK      = _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 33),\n-\n-\t/* undo initialize of virtual link */\n-\tCMD_DEINIT\t\t= _CMDCNW(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 34),\n-\n-\t/* initialize virtual link: (u32)a0=flags (see CMD_INITF_*) */\n-\tCMD_INIT\t\t= _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 35),\n-\n-\t/* check fw capability of a cmd:\n-\t * in:  (u32)a0=cmd\n-\t * out: (u32)a0=errno, 0:valid cmd, a1=supported VNIC_STF_* bits */\n-\tCMD_CAPABILITY\t\t= _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 36),\n-\n-\t/* persistent binding info\n-\t * in:  (u64)a0=paddr of arg\n-\t *      (u32)a1=CMD_PERBI_XXX */\n-\tCMD_PERBI\t\t= _CMDC(_CMD_DIR_RW, _CMD_VTYPE_FC, 37),\n-\n-\t/* Interrupt Assert Register functionality\n-\t * in: (u16)a0=interrupt number to assert\n-\t */\n-\tCMD_IAR\t\t\t= _CMDCNW(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 38),\n-\n-\t/* initiate hangreset, like softreset after hang detected */\n-\tCMD_HANG_RESET\t\t= _CMDC(_CMD_DIR_NONE, _CMD_VTYPE_ALL, 39),\n-\n-\t/* hangreset status:\n-\t *    out: a0=0 reset complete, a0=1 reset in progress */\n-\tCMD_HANG_RESET_STATUS   = _CMDC(_CMD_DIR_READ, _CMD_VTYPE_ALL, 40),\n-\n-\t/*\n-\t * Set hw ingress packet vlan rewrite mode:\n-\t * in:  (u32)a0=new vlan rewrite mode\n-\t * out: (u32)a0=old vlan rewrite mode */\n-\tCMD_IG_VLAN_REWRITE_MODE = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ENET, 41),\n-\n-\t/*\n-\t * in:  (u16)a0=bdf of target vnic\n-\t *      (u32)a1=cmd to proxy\n-\t *      a2-a15=args to cmd in a1\n-\t * out: (u32)a0=status of proxied cmd\n-\t *      a1-a15=out args of proxied cmd */\n-\tCMD_PROXY_BY_BDF =\t_CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 42),\n-\n-\t/*\n-\t * As for BY_BDF except a0 is index of hvnlink subordinate vnic\n-\t * or SR-IOV virtual vnic\n-\t */\n-\tCMD_PROXY_BY_INDEX =    _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 43),\n-\n-\t/*\n-\t * For HPP toggle:\n-\t * adapter-info-get\n-\t * in:  (u64)a0=phsical address of buffer passed in from caller.\n-\t *      (u16)a1=size of buffer specified in a0.\n-\t * out: (u64)a0=phsical address of buffer passed in from caller.\n-\t *      (u16)a1=actual bytes from VIF-CONFIG-INFO TLV, or\n-\t *              0 if no VIF-CONFIG-INFO TLV was ever received. */\n-\tCMD_CONFIG_INFO_GET = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 44),\n-\n-\t/*\n-\t * INT13 API: (u64)a0=paddr to vnic_int13_params struct\n-\t *            (u32)a1=INT13_CMD_xxx\n-\t */\n-\tCMD_INT13_ALL = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 45),\n-\n-\t/*\n-\t * Set default vlan:\n-\t * in: (u16)a0=new default vlan\n-\t *     (u16)a1=zero for overriding vlan with param a0,\n-\t *\t\t       non-zero for resetting vlan to the default\n-\t * out: (u16)a0=old default vlan\n-\t */\n-\tCMD_SET_DEFAULT_VLAN = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 46),\n-\n-\t/* init_prov_info2:\n-\t * Variant of CMD_INIT_PROV_INFO, where it will not try to enable\n-\t * the vnic until CMD_ENABLE2 is issued.\n-\t *     (u64)a0=paddr of vnic_devcmd_provinfo\n-\t *     (u32)a1=sizeof provision info */\n-\tCMD_INIT_PROV_INFO2  = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 47),\n-\n-\t/* enable2:\n-\t *      (u32)a0=0                  ==> standby\n-\t *             =CMD_ENABLE2_ACTIVE ==> active\n-\t */\n-\tCMD_ENABLE2 = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 48),\n-\n-\t/*\n-\t * cmd_status:\n-\t *     Returns the status of the specified command\n-\t * Input:\n-\t *     a0 = command for which status is being queried.\n-\t *          Possible values are:\n-\t *              CMD_SOFT_RESET\n-\t *              CMD_HANG_RESET\n-\t *              CMD_OPEN\n-\t *              CMD_INIT\n-\t *              CMD_INIT_PROV_INFO\n-\t *              CMD_DEINIT\n-\t *              CMD_INIT_PROV_INFO2\n-\t *              CMD_ENABLE2\n-\t * Output:\n-\t *     if status == STAT_ERROR\n-\t *        a0 = ERR_ENOTSUPPORTED - status for command in a0 is\n-\t *                                 not supported\n-\t *     if status == STAT_NONE\n-\t *        a0 = status of the devcmd specified in a0 as follows.\n-\t *             ERR_SUCCESS   - command in a0 completed successfully\n-\t *             ERR_EINPROGRESS - command in a0 is still in progress\n-\t */\n-\tCMD_STATUS = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 49),\n-\n-\t/*\n-\t * Returns interrupt coalescing timer conversion factors.\n-\t * After calling this devcmd, ENIC driver can convert\n-\t * interrupt coalescing timer in usec into CPU cycles as follows:\n-\t *\n-\t *   intr_timer_cycles = intr_timer_usec * multiplier / divisor\n-\t *\n-\t * Interrupt coalescing timer in usecs can be be converted/obtained\n-\t * from CPU cycles as follows:\n-\t *\n-\t *   intr_timer_usec = intr_timer_cycles * divisor / multiplier\n-\t *\n-\t * in: none\n-\t * out: (u32)a0 = multiplier\n-\t *      (u32)a1 = divisor\n-\t *      (u32)a2 = maximum timer value in usec\n-\t */\n-\tCMD_INTR_COAL_CONVERT = _CMDC(_CMD_DIR_READ, _CMD_VTYPE_ALL, 50),\n-\n-\t/*\n-\t * ISCSI DUMP API:\n-\t * in: (u64)a0=paddr of the param or param itself\n-\t *     (u32)a1=ISCSI_CMD_xxx\n-\t */\n-\tCMD_ISCSI_DUMP_REQ = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 51),\n-\n-\t/*\n-\t * ISCSI DUMP STATUS API:\n-\t * in: (u32)a0=cmd tag\n-\t * in: (u32)a1=ISCSI_CMD_xxx\n-\t * out: (u32)a0=cmd status\n-\t */\n-\tCMD_ISCSI_DUMP_STATUS = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 52),\n-\n-\t/*\n-\t * Subvnic migration from MQ <--> VF.\n-\t * Enable the LIF migration from MQ to VF and vice versa. MQ and VF\n-\t * indexes are statically bound at the time of initialization.\n-\t * Based on the\n-\t * direction of migration, the resources of either MQ or the VF shall\n-\t * be attached to the LIF.\n-\t * in:        (u32)a0=Direction of Migration\n-\t *\t\t\t\t\t0=> Migrate to VF\n-\t *\t\t\t\t\t1=> Migrate to MQ\n-\t *            (u32)a1=VF index (MQ index)\n-\t */\n-\tCMD_MIGRATE_SUBVNIC = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 53),\n-\n-\n-\t/*\n-\t * Register / Deregister the notification block for MQ subvnics\n-\t * in:\n-\t *   (u64)a0=paddr to notify (set paddr=0 to unset)\n-\t *   (u32)a1 & 0x00000000ffffffff=sizeof(struct vnic_devcmd_notify)\n-\t *   (u16)a1 & 0x0000ffff00000000=intr num (-1 for no intr)\n-\t * out:\n-\t *   (u32)a1 = effective size\n-\t */\n-\tCMD_SUBVNIC_NOTIFY = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ALL, 54),\n-\n-\t/*\n-\t * Set the predefined mac address as default\n-\t * in:\n-\t *   (u48)a0=mac addr\n-\t */\n-\tCMD_SET_MAC_ADDR = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 55),\n-\n-\t/* Update the provisioning info of the given VIF\n-\t *     (u64)a0=paddr of vnic_devcmd_provinfo\n-\t *     (u32)a1=sizeof provision info */\n-\tCMD_PROV_INFO_UPDATE = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 56),\n-\n-\t/*\n-\t * Initialization for the devcmd2 interface.\n-\t * in: (u64) a0=host result buffer physical address\n-\t * in: (u16) a1=number of entries in result buffer\n-\t */\n-\tCMD_INITIALIZE_DEVCMD2 = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ALL, 57),\n-\n-\t/*\n-\t * Add a filter.\n-\t * in: (u64) a0= filter address\n-\t *     (u32) a1= size of filter\n-\t * out: (u32) a0=filter identifier\n-\t */\n-\tCMD_ADD_FILTER = _CMDC(_CMD_DIR_RW, _CMD_VTYPE_ENET, 58),\n-\n-\t/*\n-\t * Delete a filter.\n-\t * in: (u32) a0=filter identifier\n-\t */\n-\tCMD_DEL_FILTER = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 59),\n-\n-\t/*\n-\t * Enable a Queue Pair in User space NIC\n-\t * in: (u32) a0=Queue Pair number\n-\t *     (u32) a1= command\n-\t */\n-\tCMD_QP_ENABLE = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 60),\n-\n-\t/*\n-\t * Disable a Queue Pair in User space NIC\n-\t * in: (u32) a0=Queue Pair number\n-\t *     (u32) a1= command\n-\t */\n-\tCMD_QP_DISABLE = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 61),\n-\n-\t/*\n-\t * Stats dump Queue Pair in User space NIC\n-\t * in: (u32) a0=Queue Pair number\n-\t *     (u64) a1=host buffer addr for status dump\n-\t *     (u32) a2=length of the buffer\n-\t */\n-\tCMD_QP_STATS_DUMP = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 62),\n-\n-\t/*\n-\t * Clear stats for Queue Pair in User space NIC\n-\t * in: (u32) a0=Queue Pair number\n-\t */\n-\tCMD_QP_STATS_CLEAR = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 63),\n-\n-\t/*\n-\t * Enable/Disable overlay offloads on the given vnic\n-\t * in: (u8) a0 = OVERLAY_FEATURE_NVGRE : NVGRE\n-\t *          a0 = OVERLAY_FEATURE_VXLAN : VxLAN\n-\t * in: (u8) a1 = OVERLAY_OFFLOAD_ENABLE : Enable\n-\t *          a1 = OVERLAY_OFFLOAD_DISABLE : Disable\n-\t */\n-\tCMD_OVERLAY_OFFLOAD_ENABLE_DISABLE =\n-\t\t_CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 72),\n-\n-\t/*\n-\t * Configuration of overlay offloads feature on a given vNIC\n-\t * in: (u8) a0 = DEVCMD_OVERLAY_NVGRE : NVGRE\n-\t *          a0 = DEVCMD_OVERLAY_VXLAN : VxLAN\n-\t * in: (u8) a1 = VXLAN_PORT_UPDATE : VxLAN\n-\t * in: (u16) a2 = unsigned short int port information\n-\t */\n-\tCMD_OVERLAY_OFFLOAD_CFG = _CMDC(_CMD_DIR_WRITE, _CMD_VTYPE_ENET, 73),\n-};\n-\n-/* CMD_ENABLE2 flags */\n-#define CMD_ENABLE2_STANDBY 0x0\n-#define CMD_ENABLE2_ACTIVE  0x1\n-\n-/* flags for CMD_OPEN */\n-#define CMD_OPENF_OPROM\t\t0x1\t/* open coming from option rom */\n-\n-/* flags for CMD_INIT */\n-#define CMD_INITF_DEFAULT_MAC\t0x1\t/* init with default mac addr */\n-\n-/* flags for CMD_PACKET_FILTER */\n-#define CMD_PFILTER_DIRECTED\t\t0x01\n-#define CMD_PFILTER_MULTICAST\t\t0x02\n-#define CMD_PFILTER_BROADCAST\t\t0x04\n-#define CMD_PFILTER_PROMISCUOUS\t\t0x08\n-#define CMD_PFILTER_ALL_MULTICAST\t0x10\n-\n-/* Commands for CMD_QP_ENABLE/CM_QP_DISABLE */\n-#define CMD_QP_RQWQ                     0x0\n-\n-/* rewrite modes for CMD_IG_VLAN_REWRITE_MODE */\n-#define IG_VLAN_REWRITE_MODE_DEFAULT_TRUNK              0\n-#define IG_VLAN_REWRITE_MODE_UNTAG_DEFAULT_VLAN         1\n-#define IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN  2\n-#define IG_VLAN_REWRITE_MODE_PASS_THRU                  3\n-\n-enum vnic_devcmd_status {\n-\tSTAT_NONE = 0,\n-\tSTAT_BUSY = 1 << 0,\t/* cmd in progress */\n-\tSTAT_ERROR = 1 << 1,\t/* last cmd caused error (code in a0) */\n-};\n-\n-enum vnic_devcmd_error {\n-\tERR_SUCCESS = 0,\n-\tERR_EINVAL = 1,\n-\tERR_EFAULT = 2,\n-\tERR_EPERM = 3,\n-\tERR_EBUSY = 4,\n-\tERR_ECMDUNKNOWN = 5,\n-\tERR_EBADSTATE = 6,\n-\tERR_ENOMEM = 7,\n-\tERR_ETIMEDOUT = 8,\n-\tERR_ELINKDOWN = 9,\n-\tERR_EMAXRES = 10,\n-\tERR_ENOTSUPPORTED = 11,\n-\tERR_EINPROGRESS = 12,\n-\tERR_MAX\n-};\n-\n-/*\n- * note: hw_version and asic_rev refer to the same thing,\n- *       but have different formats. hw_version is\n- *       a 32-byte string (e.g. \"A2\") and asic_rev is\n- *       a 16-bit integer (e.g. 0xA2).\n- */\n-struct vnic_devcmd_fw_info {\n-\tchar fw_version[32];\n-\tchar fw_build[32];\n-\tchar hw_version[32];\n-\tchar hw_serial_number[32];\n-\tu16 asic_type;\n-\tu16 asic_rev;\n-};\n-\n-enum fwinfo_asic_type {\n-\tFWINFO_ASIC_TYPE_UNKNOWN,\n-\tFWINFO_ASIC_TYPE_PALO,\n-\tFWINFO_ASIC_TYPE_SERENO,\n-};\n-\n-\n-struct vnic_devcmd_notify {\n-\tu32 csum;\t\t/* checksum over following words */\n-\n-\tu32 link_state;\t\t/* link up == 1 */\n-\tu32 port_speed;\t\t/* effective port speed (rate limit) */\n-\tu32 mtu;\t\t/* MTU */\n-\tu32 msglvl;\t\t/* requested driver msg lvl */\n-\tu32 uif;\t\t/* uplink interface */\n-\tu32 status;\t\t/* status bits (see VNIC_STF_*) */\n-\tu32 error;\t\t/* error code (see ERR_*) for first ERR */\n-\tu32 link_down_cnt;\t/* running count of link down transitions */\n-\tu32 perbi_rebuild_cnt;\t/* running count of perbi rebuilds */\n-};\n-#define VNIC_STF_FATAL_ERR\t0x0001\t/* fatal fw error */\n-#define VNIC_STF_STD_PAUSE\t0x0002\t/* standard link-level pause on */\n-#define VNIC_STF_PFC_PAUSE\t0x0004\t/* priority flow control pause on */\n-/* all supported status flags */\n-#define VNIC_STF_ALL\t\t(VNIC_STF_FATAL_ERR |\\\n-\t\t\t\t VNIC_STF_STD_PAUSE |\\\n-\t\t\t\t VNIC_STF_PFC_PAUSE |\\\n-\t\t\t\t 0)\n-\n-struct vnic_devcmd_provinfo {\n-\tu8 oui[3];\n-\tu8 type;\n-\tu8 data[0];\n-};\n-\n-/*\n- * These are used in flags field of different filters to denote\n- * valid fields used.\n- */\n-#define FILTER_FIELD_VALID(fld) (1 << (fld - 1))\n-\n-#define FILTER_FIELDS_USNIC (FILTER_FIELD_VALID(1) | \\\n-\t\t\t     FILTER_FIELD_VALID(2) | \\\n-\t\t\t     FILTER_FIELD_VALID(3) | \\\n-\t\t\t     FILTER_FIELD_VALID(4))\n-\n-#define FILTER_FIELDS_IPV4_5TUPLE (FILTER_FIELD_VALID(1) | \\\n-\t\t\t\t   FILTER_FIELD_VALID(2) | \\\n-\t\t\t\t   FILTER_FIELD_VALID(3) | \\\n-\t\t\t\t   FILTER_FIELD_VALID(4) | \\\n-\t\t\t\t   FILTER_FIELD_VALID(5))\n-\n-#define FILTER_FIELDS_MAC_VLAN (FILTER_FIELD_VALID(1) | \\\n-\t\t\t\tFILTER_FIELD_VALID(2))\n-\n-#define FILTER_FIELD_USNIC_VLAN    FILTER_FIELD_VALID(1)\n-#define FILTER_FIELD_USNIC_ETHTYPE FILTER_FIELD_VALID(2)\n-#define FILTER_FIELD_USNIC_PROTO   FILTER_FIELD_VALID(3)\n-#define FILTER_FIELD_USNIC_ID      FILTER_FIELD_VALID(4)\n-\n-struct filter_usnic_id {\n-\tu32 flags;\n-\tu16 vlan;\n-\tu16 ethtype;\n-\tu8 proto_version;\n-\tu32 usnic_id;\n-} __attribute__((packed));\n-\n-#define FILTER_FIELD_5TUP_PROTO  FILTER_FIELD_VALID(1)\n-#define FILTER_FIELD_5TUP_SRC_AD FILTER_FIELD_VALID(2)\n-#define FILTER_FIELD_5TUP_DST_AD FILTER_FIELD_VALID(3)\n-#define FILTER_FIELD_5TUP_SRC_PT FILTER_FIELD_VALID(4)\n-#define FILTER_FIELD_5TUP_DST_PT FILTER_FIELD_VALID(5)\n-\n-/* Enums for the protocol field. */\n-enum protocol_e {\n-\tPROTO_UDP = 0,\n-\tPROTO_TCP = 1,\n-};\n-\n-struct filter_ipv4_5tuple {\n-\tu32 flags;\n-\tu32 protocol;\n-\tu32 src_addr;\n-\tu32 dst_addr;\n-\tu16 src_port;\n-\tu16 dst_port;\n-} __attribute__((packed));\n-\n-#define FILTER_FIELD_VMQ_VLAN   FILTER_FIELD_VALID(1)\n-#define FILTER_FIELD_VMQ_MAC    FILTER_FIELD_VALID(2)\n-\n-struct filter_mac_vlan {\n-\tu32 flags;\n-\tu16 vlan;\n-\tu8 mac_addr[6];\n-} __attribute__((packed));\n-\n-/* Specifies the filter_action type. */\n-enum {\n-\tFILTER_ACTION_RQ_STEERING = 0,\n-\tFILTER_ACTION_MAX\n-};\n-\n-struct filter_action {\n-\tu32 type;\n-\tunion {\n-\t\tu32 rq_idx;\n-\t} u;\n-} __attribute__((packed));\n-\n-/* Specifies the filter type. */\n-enum filter_type {\n-\tFILTER_USNIC_ID = 0,\n-\tFILTER_IPV4_5TUPLE = 1,\n-\tFILTER_MAC_VLAN = 2,\n-\tFILTER_MAX\n-};\n-\n-struct filter {\n-\tu32 type;\n-\tunion {\n-\t\tstruct filter_usnic_id usnic;\n-\t\tstruct filter_ipv4_5tuple ipv4;\n-\t\tstruct filter_mac_vlan mac_vlan;\n-\t} u;\n-} __attribute__((packed));\n-\n-enum {\n-\tCLSF_TLV_FILTER = 0,\n-\tCLSF_TLV_ACTION = 1,\n-};\n-\n-#define FILTER_MAX_BUF_SIZE 100  /* Maximum size of buffer to CMD_ADD_FILTER */\n-\n-struct filter_tlv {\n-\tuint32_t type;\n-\tuint32_t length;\n-\tuint32_t val[0];\n-};\n-\n-enum {\n-\tCLSF_ADD = 0,\n-\tCLSF_DEL = 1,\n-};\n-\n-/*\n- * Writing cmd register causes STAT_BUSY to get set in status register.\n- * When cmd completes, STAT_BUSY will be cleared.\n- *\n- * If cmd completed successfully STAT_ERROR will be clear\n- * and args registers contain cmd-specific results.\n- *\n- * If cmd error, STAT_ERROR will be set and args[0] contains error code.\n- *\n- * status register is read-only.  While STAT_BUSY is set,\n- * all other register contents are read-only.\n- */\n-\n-/* Make sizeof(vnic_devcmd) a power-of-2 for I/O BAR. */\n-#define VNIC_DEVCMD_NARGS 15\n-struct vnic_devcmd {\n-\tu32 status;\t\t\t/* RO */\n-\tu32 cmd;\t\t\t/* RW */\n-\tu64 args[VNIC_DEVCMD_NARGS];\t/* RW cmd args (little-endian) */\n-};\n-\n-/*\n- * Version 2 of the interface.\n- *\n- * Some things are carried over, notably the vnic_devcmd_cmd enum.\n- */\n-\n-/*\n- * Flags for vnic_devcmd2.flags\n- */\n-\n-#define DEVCMD2_FNORESULT       0x1     /* Don't copy result to host */\n-\n-#define VNIC_DEVCMD2_NARGS      VNIC_DEVCMD_NARGS\n-struct vnic_devcmd2 {\n-\tu16 pad;\n-\tu16 flags;\n-\tu32 cmd;                /* same command #defines as original */\n-\tu64 args[VNIC_DEVCMD2_NARGS];\n-};\n-\n-#define VNIC_DEVCMD2_NRESULTS   VNIC_DEVCMD_NARGS\n-struct devcmd2_result {\n-\tu64 results[VNIC_DEVCMD2_NRESULTS];\n-\tu32 pad;\n-\tu16 completed_index;    /* into copy WQ */\n-\tu8  error;              /* same error codes as original */\n-\tu8  color;              /* 0 or 1 as with completion queues */\n-};\n-\n-#define DEVCMD2_RING_SIZE   32\n-#define DEVCMD2_DESC_SIZE   128\n-\n-#define DEVCMD2_RESULTS_SIZE_MAX   ((1 << 16) - 1)\n-\n-/* Overlay related definitions */\n-\n-/*\n- * This enum lists the flag associated with each of the overlay features\n- */\n-typedef enum {\n-\tOVERLAY_FEATURE_NVGRE = 1,\n-\tOVERLAY_FEATURE_VXLAN,\n-\tOVERLAY_FEATURE_MAX,\n-} overlay_feature_t;\n-\n-#define OVERLAY_OFFLOAD_ENABLE 0\n-#define OVERLAY_OFFLOAD_DISABLE 1\n-\n-#define OVERLAY_CFG_VXLAN_PORT_UPDATE 0\n-#endif /* _VNIC_DEVCMD_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_enet.h b/lib/librte_pmd_enic/vnic/vnic_enet.h\ndeleted file mode 100644\nindex 9d3cc07..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_enet.h\n+++ /dev/null\n@@ -1,78 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_enet.h 175806 2014-06-04 19:31:17Z rfaucett $\"\n-\n-#ifndef _VNIC_ENIC_H_\n-#define _VNIC_ENIC_H_\n-\n-/* Device-specific region: enet configuration */\n-struct vnic_enet_config {\n-\tu32 flags;\n-\tu32 wq_desc_count;\n-\tu32 rq_desc_count;\n-\tu16 mtu;\n-\tu16 intr_timer_deprecated;\n-\tu8 intr_timer_type;\n-\tu8 intr_mode;\n-\tchar devname[16];\n-\tu32 intr_timer_usec;\n-\tu16 loop_tag;\n-\tu16 vf_rq_count;\n-\tu16 num_arfs;\n-\tu64 mem_paddr;\n-};\n-\n-#define VENETF_TSO\t\t0x1\t/* TSO enabled */\n-#define VENETF_LRO\t\t0x2\t/* LRO enabled */\n-#define VENETF_RXCSUM\t\t0x4\t/* RX csum enabled */\n-#define VENETF_TXCSUM\t\t0x8\t/* TX csum enabled */\n-#define VENETF_RSS\t\t0x10\t/* RSS enabled */\n-#define VENETF_RSSHASH_IPV4\t0x20\t/* Hash on IPv4 fields */\n-#define VENETF_RSSHASH_TCPIPV4\t0x40\t/* Hash on TCP + IPv4 fields */\n-#define VENETF_RSSHASH_IPV6\t0x80\t/* Hash on IPv6 fields */\n-#define VENETF_RSSHASH_TCPIPV6\t0x100\t/* Hash on TCP + IPv6 fields */\n-#define VENETF_RSSHASH_IPV6_EX\t0x200\t/* Hash on IPv6 extended fields */\n-#define VENETF_RSSHASH_TCPIPV6_EX 0x400\t/* Hash on TCP + IPv6 ext. fields */\n-#define VENETF_LOOP\t\t0x800\t/* Loopback enabled */\n-#define VENETF_VMQ\t\t0x4000  /* using VMQ flag for VMware NETQ */\n-#define VENETF_VXLAN    0x10000 /* VxLAN offload */\n-#define VENETF_NVGRE    0x20000 /* NVGRE offload */\n-#define VENET_INTR_TYPE_MIN\t0\t/* Timer specs min interrupt spacing */\n-#define VENET_INTR_TYPE_IDLE\t1\t/* Timer specs idle time before irq */\n-\n-#define VENET_INTR_MODE_ANY\t0\t/* Try MSI-X, then MSI, then INTx */\n-#define VENET_INTR_MODE_MSI\t1\t/* Try MSI then INTx */\n-#define VENET_INTR_MODE_INTX\t2\t/* Try INTx only */\n-\n-#endif /* _VNIC_ENIC_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_intr.c b/lib/librte_pmd_enic/vnic/vnic_intr.c\ndeleted file mode 100644\nindex 84368af..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_intr.c\n+++ /dev/null\n@@ -1,78 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_intr.c 171146 2014-05-02 07:08:20Z ssujith $\"\n-\n-#include \"vnic_dev.h\"\n-#include \"vnic_intr.h\"\n-\n-void vnic_intr_free(struct vnic_intr *intr)\n-{\n-\tintr->ctrl = NULL;\n-}\n-\n-int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,\n-\tunsigned int index)\n-{\n-\tintr->index = index;\n-\tintr->vdev = vdev;\n-\n-\tintr->ctrl = vnic_dev_get_res(vdev, RES_TYPE_INTR_CTRL, index);\n-\tif (!intr->ctrl) {\n-\t\tpr_err(\"Failed to hook INTR[%d].ctrl resource\\n\", index);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer,\n-\tunsigned int coalescing_type, unsigned int mask_on_assertion)\n-{\n-\tvnic_intr_coalescing_timer_set(intr, coalescing_timer);\n-\tiowrite32(coalescing_type, &intr->ctrl->coalescing_type);\n-\tiowrite32(mask_on_assertion, &intr->ctrl->mask_on_assertion);\n-\tiowrite32(0, &intr->ctrl->int_credits);\n-}\n-\n-void vnic_intr_coalescing_timer_set(struct vnic_intr *intr,\n-\tu32 coalescing_timer)\n-{\n-\tiowrite32(vnic_dev_intr_coal_timer_usec_to_hw(intr->vdev,\n-\t\tcoalescing_timer), &intr->ctrl->coalescing_timer);\n-}\n-\n-void vnic_intr_clean(struct vnic_intr *intr)\n-{\n-\tiowrite32(0, &intr->ctrl->int_credits);\n-}\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_intr.h b/lib/librte_pmd_enic/vnic/vnic_intr.h\ndeleted file mode 100644\nindex ecb82bf..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_intr.h\n+++ /dev/null\n@@ -1,126 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_intr.h 171146 2014-05-02 07:08:20Z ssujith $\"\n-\n-#ifndef _VNIC_INTR_H_\n-#define _VNIC_INTR_H_\n-\n-\n-#include \"vnic_dev.h\"\n-\n-#define VNIC_INTR_TIMER_TYPE_ABS\t0\n-#define VNIC_INTR_TIMER_TYPE_QUIET\t1\n-\n-/* Interrupt control */\n-struct vnic_intr_ctrl {\n-\tu32 coalescing_timer;\t\t/* 0x00 */\n-\tu32 pad0;\n-\tu32 coalescing_value;\t\t/* 0x08 */\n-\tu32 pad1;\n-\tu32 coalescing_type;\t\t/* 0x10 */\n-\tu32 pad2;\n-\tu32 mask_on_assertion;\t\t/* 0x18 */\n-\tu32 pad3;\n-\tu32 mask;\t\t\t/* 0x20 */\n-\tu32 pad4;\n-\tu32 int_credits;\t\t/* 0x28 */\n-\tu32 pad5;\n-\tu32 int_credit_return;\t\t/* 0x30 */\n-\tu32 pad6;\n-};\n-\n-struct vnic_intr {\n-\tunsigned int index;\n-\tstruct vnic_dev *vdev;\n-\tstruct vnic_intr_ctrl __iomem *ctrl;\t\t/* memory-mapped */\n-};\n-\n-static inline void vnic_intr_unmask(struct vnic_intr *intr)\n-{\n-\tiowrite32(0, &intr->ctrl->mask);\n-}\n-\n-static inline void vnic_intr_mask(struct vnic_intr *intr)\n-{\n-\tiowrite32(1, &intr->ctrl->mask);\n-}\n-\n-static inline int vnic_intr_masked(struct vnic_intr *intr)\n-{\n-\treturn ioread32(&intr->ctrl->mask);\n-}\n-\n-static inline void vnic_intr_return_credits(struct vnic_intr *intr,\n-\tunsigned int credits, int unmask, int reset_timer)\n-{\n-#define VNIC_INTR_UNMASK_SHIFT\t\t16\n-#define VNIC_INTR_RESET_TIMER_SHIFT\t17\n-\n-\tu32 int_credit_return = (credits & 0xffff) |\n-\t\t(unmask ? (1 << VNIC_INTR_UNMASK_SHIFT) : 0) |\n-\t\t(reset_timer ? (1 << VNIC_INTR_RESET_TIMER_SHIFT) : 0);\n-\n-\tiowrite32(int_credit_return, &intr->ctrl->int_credit_return);\n-}\n-\n-static inline unsigned int vnic_intr_credits(struct vnic_intr *intr)\n-{\n-\treturn ioread32(&intr->ctrl->int_credits);\n-}\n-\n-static inline void vnic_intr_return_all_credits(struct vnic_intr *intr)\n-{\n-\tunsigned int credits = vnic_intr_credits(intr);\n-\tint unmask = 1;\n-\tint reset_timer = 1;\n-\n-\tvnic_intr_return_credits(intr, credits, unmask, reset_timer);\n-}\n-\n-static inline u32 vnic_intr_legacy_pba(u32 __iomem *legacy_pba)\n-{\n-\t/* read PBA without clearing */\n-\treturn ioread32(legacy_pba);\n-}\n-\n-void vnic_intr_free(struct vnic_intr *intr);\n-int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr,\n-\tunsigned int index);\n-void vnic_intr_init(struct vnic_intr *intr, u32 coalescing_timer,\n-\tunsigned int coalescing_type, unsigned int mask_on_assertion);\n-void vnic_intr_coalescing_timer_set(struct vnic_intr *intr,\n-\tu32 coalescing_timer);\n-void vnic_intr_clean(struct vnic_intr *intr);\n-\n-#endif /* _VNIC_INTR_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_nic.h b/lib/librte_pmd_enic/vnic/vnic_nic.h\ndeleted file mode 100644\nindex 332cfb4..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_nic.h\n+++ /dev/null\n@@ -1,88 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_nic.h 59839 2010-09-27 20:36:31Z roprabhu $\"\n-\n-#ifndef _VNIC_NIC_H_\n-#define _VNIC_NIC_H_\n-\n-#define NIC_CFG_RSS_DEFAULT_CPU_MASK_FIELD\t0xffUL\n-#define NIC_CFG_RSS_DEFAULT_CPU_SHIFT\t\t0\n-#define NIC_CFG_RSS_HASH_TYPE\t\t\t(0xffUL << 8)\n-#define NIC_CFG_RSS_HASH_TYPE_MASK_FIELD\t0xffUL\n-#define NIC_CFG_RSS_HASH_TYPE_SHIFT\t\t8\n-#define NIC_CFG_RSS_HASH_BITS\t\t\t(7UL << 16)\n-#define NIC_CFG_RSS_HASH_BITS_MASK_FIELD\t7UL\n-#define NIC_CFG_RSS_HASH_BITS_SHIFT\t\t16\n-#define NIC_CFG_RSS_BASE_CPU\t\t\t(7UL << 19)\n-#define NIC_CFG_RSS_BASE_CPU_MASK_FIELD\t\t7UL\n-#define NIC_CFG_RSS_BASE_CPU_SHIFT\t\t19\n-#define NIC_CFG_RSS_ENABLE\t\t\t(1UL << 22)\n-#define NIC_CFG_RSS_ENABLE_MASK_FIELD\t\t1UL\n-#define NIC_CFG_RSS_ENABLE_SHIFT\t\t22\n-#define NIC_CFG_TSO_IPID_SPLIT_EN\t\t(1UL << 23)\n-#define NIC_CFG_TSO_IPID_SPLIT_EN_MASK_FIELD\t1UL\n-#define NIC_CFG_TSO_IPID_SPLIT_EN_SHIFT\t\t23\n-#define NIC_CFG_IG_VLAN_STRIP_EN\t\t(1UL << 24)\n-#define NIC_CFG_IG_VLAN_STRIP_EN_MASK_FIELD\t1UL\n-#define NIC_CFG_IG_VLAN_STRIP_EN_SHIFT\t\t24\n-\n-#define NIC_CFG_RSS_HASH_TYPE_IPV4\t\t(1 << 1)\n-#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV4\t\t(1 << 2)\n-#define NIC_CFG_RSS_HASH_TYPE_IPV6\t\t(1 << 3)\n-#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV6\t\t(1 << 4)\n-#define NIC_CFG_RSS_HASH_TYPE_IPV6_EX\t\t(1 << 5)\n-#define NIC_CFG_RSS_HASH_TYPE_TCP_IPV6_EX\t(1 << 6)\n-\n-static inline void vnic_set_nic_cfg(u32 *nic_cfg,\n-\tu8 rss_default_cpu, u8 rss_hash_type,\n-\tu8 rss_hash_bits, u8 rss_base_cpu,\n-\tu8 rss_enable, u8 tso_ipid_split_en,\n-\tu8 ig_vlan_strip_en)\n-{\n-\t*nic_cfg = (rss_default_cpu & NIC_CFG_RSS_DEFAULT_CPU_MASK_FIELD) |\n-\t\t((rss_hash_type & NIC_CFG_RSS_HASH_TYPE_MASK_FIELD)\n-\t\t\t<< NIC_CFG_RSS_HASH_TYPE_SHIFT) |\n-\t\t((rss_hash_bits & NIC_CFG_RSS_HASH_BITS_MASK_FIELD)\n-\t\t\t<< NIC_CFG_RSS_HASH_BITS_SHIFT) |\n-\t\t((rss_base_cpu & NIC_CFG_RSS_BASE_CPU_MASK_FIELD)\n-\t\t\t<< NIC_CFG_RSS_BASE_CPU_SHIFT) |\n-\t\t((rss_enable & NIC_CFG_RSS_ENABLE_MASK_FIELD)\n-\t\t\t<< NIC_CFG_RSS_ENABLE_SHIFT) |\n-\t\t((tso_ipid_split_en & NIC_CFG_TSO_IPID_SPLIT_EN_MASK_FIELD)\n-\t\t\t<< NIC_CFG_TSO_IPID_SPLIT_EN_SHIFT) |\n-\t\t((ig_vlan_strip_en & NIC_CFG_IG_VLAN_STRIP_EN_MASK_FIELD)\n-\t\t\t<< NIC_CFG_IG_VLAN_STRIP_EN_SHIFT);\n-}\n-\n-#endif /* _VNIC_NIC_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_resource.h b/lib/librte_pmd_enic/vnic/vnic_resource.h\ndeleted file mode 100644\nindex 2512712..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_resource.h\n+++ /dev/null\n@@ -1,97 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_resource.h 196958 2014-11-04 18:23:37Z xuywang $\"\n-\n-#ifndef _VNIC_RESOURCE_H_\n-#define _VNIC_RESOURCE_H_\n-\n-#define VNIC_RES_MAGIC\t\t0x766E6963L\t/* 'vnic' */\n-#define VNIC_RES_VERSION\t0x00000000L\n-#define MGMTVNIC_MAGIC\t\t0x544d474dL\t/* 'MGMT' */\n-#define MGMTVNIC_VERSION\t0x00000000L\n-\n-/* The MAC address assigned to the CFG vNIC is fixed. */\n-#define MGMTVNIC_MAC\t\t{ 0x02, 0x00, 0x54, 0x4d, 0x47, 0x4d }\n-\n-/* vNIC resource types */\n-enum vnic_res_type {\n-\tRES_TYPE_EOL,\t\t\t/* End-of-list */\n-\tRES_TYPE_WQ,\t\t\t/* Work queues */\n-\tRES_TYPE_RQ,\t\t\t/* Receive queues */\n-\tRES_TYPE_CQ,\t\t\t/* Completion queues */\n-\tRES_TYPE_MEM,\t\t\t/* Window to dev memory */\n-\tRES_TYPE_NIC_CFG,\t\t/* Enet NIC config registers */\n-\tRES_TYPE_RSS_KEY,\t\t/* Enet RSS secret key */\n-\tRES_TYPE_RSS_CPU,\t\t/* Enet RSS indirection table */\n-\tRES_TYPE_TX_STATS,\t\t/* Netblock Tx statistic regs */\n-\tRES_TYPE_RX_STATS,\t\t/* Netblock Rx statistic regs */\n-\tRES_TYPE_INTR_CTRL,\t\t/* Interrupt ctrl table */\n-\tRES_TYPE_INTR_TABLE,\t\t/* MSI/MSI-X Interrupt table */\n-\tRES_TYPE_INTR_PBA,\t\t/* MSI/MSI-X PBA table */\n-\tRES_TYPE_INTR_PBA_LEGACY,\t/* Legacy intr status */\n-\tRES_TYPE_DEBUG,\t\t\t/* Debug-only info */\n-\tRES_TYPE_DEV,\t\t\t/* Device-specific region */\n-\tRES_TYPE_DEVCMD,\t\t/* Device command region */\n-\tRES_TYPE_PASS_THRU_PAGE,\t/* Pass-thru page */\n-\tRES_TYPE_SUBVNIC,               /* subvnic resource type */\n-\tRES_TYPE_MQ_WQ,                 /* MQ Work queues */\n-\tRES_TYPE_MQ_RQ,                 /* MQ Receive queues */\n-\tRES_TYPE_MQ_CQ,                 /* MQ Completion queues */\n-\tRES_TYPE_DEPRECATED1,           /* Old version of devcmd 2 */\n-\tRES_TYPE_DEVCMD2,               /* Device control region */\n-\tRES_TYPE_MAX,\t\t\t/* Count of resource types */\n-};\n-\n-struct vnic_resource_header {\n-\tu32 magic;\n-\tu32 version;\n-};\n-\n-struct mgmt_barmap_hdr {\n-\tu32 magic;\t\t\t/* magic number */\n-\tu32 version;\t\t\t/* header format version */\n-\tu16 lif;\t\t\t/* loopback lif for mgmt frames */\n-\tu16 pci_slot;\t\t\t/* installed pci slot */\n-\tchar serial[16];\t\t/* card serial number */\n-};\n-\n-struct vnic_resource {\n-\tu8 type;\n-\tu8 bar;\n-\tu8 pad[2];\n-\tu32 bar_offset;\n-\tu32 count;\n-};\n-\n-#endif /* _VNIC_RESOURCE_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_rq.c b/lib/librte_pmd_enic/vnic/vnic_rq.c\ndeleted file mode 100644\nindex 3a4b65a..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_rq.c\n+++ /dev/null\n@@ -1,245 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_rq.c 171146 2014-05-02 07:08:20Z ssujith $\"\n-\n-#include \"vnic_dev.h\"\n-#include \"vnic_rq.h\"\n-\n-static int vnic_rq_alloc_bufs(struct vnic_rq *rq)\n-{\n-\tstruct vnic_rq_buf *buf;\n-\tunsigned int i, j, count = rq->ring.desc_count;\n-\tunsigned int blks = VNIC_RQ_BUF_BLKS_NEEDED(count);\n-\n-\tfor (i = 0; i < blks; i++) {\n-\t\trq->bufs[i] = kzalloc(VNIC_RQ_BUF_BLK_SZ(count), GFP_ATOMIC);\n-\t\tif (!rq->bufs[i])\n-\t\t\treturn -ENOMEM;\n-\t}\n-\n-\tfor (i = 0; i < blks; i++) {\n-\t\tbuf = rq->bufs[i];\n-\t\tfor (j = 0; j < VNIC_RQ_BUF_BLK_ENTRIES(count); j++) {\n-\t\t\tbuf->index = i * VNIC_RQ_BUF_BLK_ENTRIES(count) + j;\n-\t\t\tbuf->desc = (u8 *)rq->ring.descs +\n-\t\t\t\trq->ring.desc_size * buf->index;\n-\t\t\tif (buf->index + 1 == count) {\n-\t\t\t\tbuf->next = rq->bufs[0];\n-\t\t\t\tbreak;\n-\t\t\t} else if (j + 1 == VNIC_RQ_BUF_BLK_ENTRIES(count)) {\n-\t\t\t\tbuf->next = rq->bufs[i + 1];\n-\t\t\t} else {\n-\t\t\t\tbuf->next = buf + 1;\n-\t\t\t\tbuf++;\n-\t\t\t}\n-\t\t}\n-\t}\n-\n-\trq->to_use = rq->to_clean = rq->bufs[0];\n-\n-\treturn 0;\n-}\n-\n-int vnic_rq_mem_size(struct vnic_rq *rq, unsigned int desc_count,\n-\tunsigned int desc_size)\n-{\n-\tint mem_size = 0;\n-\n-\tmem_size += vnic_dev_desc_ring_size(&rq->ring, desc_count, desc_size);\n-\n-\tmem_size += VNIC_RQ_BUF_BLKS_NEEDED(rq->ring.desc_count) *\n-\t\tVNIC_RQ_BUF_BLK_SZ(rq->ring.desc_count);\n-\n-\treturn mem_size;\n-}\n-\n-void vnic_rq_free(struct vnic_rq *rq)\n-{\n-\tstruct vnic_dev *vdev;\n-\tunsigned int i;\n-\n-\tvdev = rq->vdev;\n-\n-\tvnic_dev_free_desc_ring(vdev, &rq->ring);\n-\n-\tfor (i = 0; i < VNIC_RQ_BUF_BLKS_MAX; i++) {\n-\t\tif (rq->bufs[i]) {\n-\t\t\tkfree(rq->bufs[i]);\n-\t\t\trq->bufs[i] = NULL;\n-\t\t}\n-\t}\n-\n-\trq->ctrl = NULL;\n-}\n-\n-int vnic_rq_alloc(struct vnic_dev *vdev, struct vnic_rq *rq, unsigned int index,\n-\tunsigned int desc_count, unsigned int desc_size)\n-{\n-\tint err;\n-\tchar res_name[NAME_MAX];\n-\tstatic int instance;\n-\n-\trq->index = index;\n-\trq->vdev = vdev;\n-\n-\trq->ctrl = vnic_dev_get_res(vdev, RES_TYPE_RQ, index);\n-\tif (!rq->ctrl) {\n-\t\tpr_err(\"Failed to hook RQ[%d] resource\\n\", index);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tvnic_rq_disable(rq);\n-\n-\tsnprintf(res_name, sizeof(res_name), \"%d-rq-%d\", instance++, index);\n-\terr = vnic_dev_alloc_desc_ring(vdev, &rq->ring, desc_count, desc_size,\n-\t\trq->socket_id, res_name);\n-\tif (err)\n-\t\treturn err;\n-\n-\terr = vnic_rq_alloc_bufs(rq);\n-\tif (err) {\n-\t\tvnic_rq_free(rq);\n-\t\treturn err;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-void vnic_rq_init_start(struct vnic_rq *rq, unsigned int cq_index,\n-\tunsigned int fetch_index, unsigned int posted_index,\n-\tunsigned int error_interrupt_enable,\n-\tunsigned int error_interrupt_offset)\n-{\n-\tu64 paddr;\n-\tunsigned int count = rq->ring.desc_count;\n-\n-\tpaddr = (u64)rq->ring.base_addr | VNIC_PADDR_TARGET;\n-\twriteq(paddr, &rq->ctrl->ring_base);\n-\tiowrite32(count, &rq->ctrl->ring_size);\n-\tiowrite32(cq_index, &rq->ctrl->cq_index);\n-\tiowrite32(error_interrupt_enable, &rq->ctrl->error_interrupt_enable);\n-\tiowrite32(error_interrupt_offset, &rq->ctrl->error_interrupt_offset);\n-\tiowrite32(0, &rq->ctrl->dropped_packet_count);\n-\tiowrite32(0, &rq->ctrl->error_status);\n-\tiowrite32(fetch_index, &rq->ctrl->fetch_index);\n-\tiowrite32(posted_index, &rq->ctrl->posted_index);\n-\n-\trq->to_use = rq->to_clean =\n-\t\t&rq->bufs[fetch_index / VNIC_RQ_BUF_BLK_ENTRIES(count)]\n-\t\t\t[fetch_index % VNIC_RQ_BUF_BLK_ENTRIES(count)];\n-}\n-\n-void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,\n-\tunsigned int error_interrupt_enable,\n-\tunsigned int error_interrupt_offset)\n-{\n-\tu32 fetch_index = 0;\n-\t/* Use current fetch_index as the ring starting point */\n-\tfetch_index = ioread32(&rq->ctrl->fetch_index);\n-\n-\tif (fetch_index == 0xFFFFFFFF) { /* check for hardware gone  */\n-\t\t/* Hardware surprise removal: reset fetch_index */\n-\t\tfetch_index = 0;\n-\t}\n-\n-\tvnic_rq_init_start(rq, cq_index,\n-\t\tfetch_index, fetch_index,\n-\t\terror_interrupt_enable,\n-\t\terror_interrupt_offset);\n-}\n-\n-void vnic_rq_error_out(struct vnic_rq *rq, unsigned int error)\n-{\n-\tiowrite32(error, &rq->ctrl->error_status);\n-}\n-\n-unsigned int vnic_rq_error_status(struct vnic_rq *rq)\n-{\n-\treturn ioread32(&rq->ctrl->error_status);\n-}\n-\n-void vnic_rq_enable(struct vnic_rq *rq)\n-{\n-\tiowrite32(1, &rq->ctrl->enable);\n-}\n-\n-int vnic_rq_disable(struct vnic_rq *rq)\n-{\n-\tunsigned int wait;\n-\n-\tiowrite32(0, &rq->ctrl->enable);\n-\n-\t/* Wait for HW to ACK disable request */\n-\tfor (wait = 0; wait < 1000; wait++) {\n-\t\tif (!(ioread32(&rq->ctrl->running)))\n-\t\t\treturn 0;\n-\t\tudelay(10);\n-\t}\n-\n-\tpr_err(\"Failed to disable RQ[%d]\\n\", rq->index);\n-\n-\treturn -ETIMEDOUT;\n-}\n-\n-void vnic_rq_clean(struct vnic_rq *rq,\n-\tvoid (*buf_clean)(struct vnic_rq *rq, struct vnic_rq_buf *buf))\n-{\n-\tstruct vnic_rq_buf *buf;\n-\tu32 fetch_index;\n-\tunsigned int count = rq->ring.desc_count;\n-\n-\tbuf = rq->to_clean;\n-\n-\twhile (vnic_rq_desc_used(rq) > 0) {\n-\n-\t\t(*buf_clean)(rq, buf);\n-\n-\t\tbuf = rq->to_clean = buf->next;\n-\t\trq->ring.desc_avail++;\n-\t}\n-\n-\t/* Use current fetch_index as the ring starting point */\n-\tfetch_index = ioread32(&rq->ctrl->fetch_index);\n-\n-\tif (fetch_index == 0xFFFFFFFF) { /* check for hardware gone  */\n-\t\t/* Hardware surprise removal: reset fetch_index */\n-\t\tfetch_index = 0;\n-\t}\n-\trq->to_use = rq->to_clean =\n-\t\t&rq->bufs[fetch_index / VNIC_RQ_BUF_BLK_ENTRIES(count)]\n-\t\t\t[fetch_index % VNIC_RQ_BUF_BLK_ENTRIES(count)];\n-\tiowrite32(fetch_index, &rq->ctrl->posted_index);\n-\n-\tvnic_dev_clear_desc_ring(&rq->ring);\n-}\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_rq.h b/lib/librte_pmd_enic/vnic/vnic_rq.h\ndeleted file mode 100644\nindex 54b6612..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_rq.h\n+++ /dev/null\n@@ -1,282 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_rq.h 180262 2014-07-02 07:57:43Z gvaradar $\"\n-\n-#ifndef _VNIC_RQ_H_\n-#define _VNIC_RQ_H_\n-\n-\n-#include \"vnic_dev.h\"\n-#include \"vnic_cq.h\"\n-\n-/* Receive queue control */\n-struct vnic_rq_ctrl {\n-\tu64 ring_base;\t\t\t/* 0x00 */\n-\tu32 ring_size;\t\t\t/* 0x08 */\n-\tu32 pad0;\n-\tu32 posted_index;\t\t/* 0x10 */\n-\tu32 pad1;\n-\tu32 cq_index;\t\t\t/* 0x18 */\n-\tu32 pad2;\n-\tu32 enable;\t\t\t/* 0x20 */\n-\tu32 pad3;\n-\tu32 running;\t\t\t/* 0x28 */\n-\tu32 pad4;\n-\tu32 fetch_index;\t\t/* 0x30 */\n-\tu32 pad5;\n-\tu32 error_interrupt_enable;\t/* 0x38 */\n-\tu32 pad6;\n-\tu32 error_interrupt_offset;\t/* 0x40 */\n-\tu32 pad7;\n-\tu32 error_status;\t\t/* 0x48 */\n-\tu32 pad8;\n-\tu32 dropped_packet_count;\t/* 0x50 */\n-\tu32 pad9;\n-\tu32 dropped_packet_count_rc;\t/* 0x58 */\n-\tu32 pad10;\n-};\n-\n-/* Break the vnic_rq_buf allocations into blocks of 32/64 entries */\n-#define VNIC_RQ_BUF_MIN_BLK_ENTRIES 32\n-#define VNIC_RQ_BUF_DFLT_BLK_ENTRIES 64\n-#define VNIC_RQ_BUF_BLK_ENTRIES(entries) \\\n-\t((unsigned int)((entries < VNIC_RQ_BUF_DFLT_BLK_ENTRIES) ? \\\n-\tVNIC_RQ_BUF_MIN_BLK_ENTRIES : VNIC_RQ_BUF_DFLT_BLK_ENTRIES))\n-#define VNIC_RQ_BUF_BLK_SZ(entries) \\\n-\t(VNIC_RQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_rq_buf))\n-#define VNIC_RQ_BUF_BLKS_NEEDED(entries) \\\n-\tDIV_ROUND_UP(entries, VNIC_RQ_BUF_BLK_ENTRIES(entries))\n-#define VNIC_RQ_BUF_BLKS_MAX VNIC_RQ_BUF_BLKS_NEEDED(4096)\n-\n-struct vnic_rq_buf {\n-\tstruct vnic_rq_buf *next;\n-\tdma_addr_t dma_addr;\n-\tvoid *os_buf;\n-\tunsigned int os_buf_index;\n-\tunsigned int len;\n-\tunsigned int index;\n-\tvoid *desc;\n-\tuint64_t wr_id;\n-};\n-\n-struct vnic_rq {\n-\tunsigned int index;\n-\tstruct vnic_dev *vdev;\n-\tstruct vnic_rq_ctrl __iomem *ctrl;              /* memory-mapped */\n-\tstruct vnic_dev_ring ring;\n-\tstruct vnic_rq_buf *bufs[VNIC_RQ_BUF_BLKS_MAX];\n-\tstruct vnic_rq_buf *to_use;\n-\tstruct vnic_rq_buf *to_clean;\n-\tvoid *os_buf_head;\n-\tunsigned int pkts_outstanding;\n-\n-\tunsigned int socket_id;\n-\tstruct rte_mempool *mp;\n-};\n-\n-static inline unsigned int vnic_rq_desc_avail(struct vnic_rq *rq)\n-{\n-\t/* how many does SW own? */\n-\treturn rq->ring.desc_avail;\n-}\n-\n-static inline unsigned int vnic_rq_desc_used(struct vnic_rq *rq)\n-{\n-\t/* how many does HW own? */\n-\treturn rq->ring.desc_count - rq->ring.desc_avail - 1;\n-}\n-\n-static inline void *vnic_rq_next_desc(struct vnic_rq *rq)\n-{\n-\treturn rq->to_use->desc;\n-}\n-\n-static inline unsigned int vnic_rq_next_index(struct vnic_rq *rq)\n-{\n-\treturn rq->to_use->index;\n-}\n-\n-static inline void vnic_rq_post(struct vnic_rq *rq,\n-\tvoid *os_buf, unsigned int os_buf_index,\n-\tdma_addr_t dma_addr, unsigned int len,\n-\tuint64_t wrid)\n-{\n-\tstruct vnic_rq_buf *buf = rq->to_use;\n-\n-\tbuf->os_buf = os_buf;\n-\tbuf->os_buf_index = os_buf_index;\n-\tbuf->dma_addr = dma_addr;\n-\tbuf->len = len;\n-\tbuf->wr_id = wrid;\n-\n-\tbuf = buf->next;\n-\trq->to_use = buf;\n-\trq->ring.desc_avail--;\n-\n-\t/* Move the posted_index every nth descriptor\n-\t */\n-\n-#ifndef VNIC_RQ_RETURN_RATE\n-#define VNIC_RQ_RETURN_RATE\t\t0xf\t/* keep 2^n - 1 */\n-#endif\n-\n-\tif ((buf->index & VNIC_RQ_RETURN_RATE) == 0) {\n-\t\t/* Adding write memory barrier prevents compiler and/or CPU\n-\t\t * reordering, thus avoiding descriptor posting before\n-\t\t * descriptor is initialized. Otherwise, hardware can read\n-\t\t * stale descriptor fields.\n-\t\t */\n-\t\twmb();\n-\t\tiowrite32(buf->index, &rq->ctrl->posted_index);\n-\t}\n-}\n-\n-static inline void vnic_rq_post_commit(struct vnic_rq *rq,\n-\tvoid *os_buf, unsigned int os_buf_index,\n-\tdma_addr_t dma_addr, unsigned int len)\n-{\n-\tstruct vnic_rq_buf *buf = rq->to_use;\n-\n-\tbuf->os_buf = os_buf;\n-\tbuf->os_buf_index = os_buf_index;\n-\tbuf->dma_addr = dma_addr;\n-\tbuf->len = len;\n-\n-\tbuf = buf->next;\n-\trq->to_use = buf;\n-\trq->ring.desc_avail--;\n-\n-\t/* Move the posted_index every descriptor\n-\t */\n-\n-\t/* Adding write memory barrier prevents compiler and/or CPU\n-\t * reordering, thus avoiding descriptor posting before\n-\t * descriptor is initialized. Otherwise, hardware can read\n-\t * stale descriptor fields.\n-\t */\n-\twmb();\n-\tiowrite32(buf->index, &rq->ctrl->posted_index);\n-}\n-\n-static inline void vnic_rq_return_descs(struct vnic_rq *rq, unsigned int count)\n-{\n-\trq->ring.desc_avail += count;\n-}\n-\n-enum desc_return_options {\n-\tVNIC_RQ_RETURN_DESC,\n-\tVNIC_RQ_DEFER_RETURN_DESC,\n-};\n-\n-static inline int vnic_rq_service(struct vnic_rq *rq,\n-\tstruct cq_desc *cq_desc, u16 completed_index,\n-\tint desc_return, int (*buf_service)(struct vnic_rq *rq,\n-\tstruct cq_desc *cq_desc, struct vnic_rq_buf *buf,\n-\tint skipped, void *opaque), void *opaque)\n-{\n-\tstruct vnic_rq_buf *buf;\n-\tint skipped;\n-\tint eop = 0;\n-\n-\tbuf = rq->to_clean;\n-\twhile (1) {\n-\n-\t\tskipped = (buf->index != completed_index);\n-\n-\t\tif ((*buf_service)(rq, cq_desc, buf, skipped, opaque))\n-\t\t\teop++;\n-\n-\t\tif (desc_return == VNIC_RQ_RETURN_DESC)\n-\t\t\trq->ring.desc_avail++;\n-\n-\t\trq->to_clean = buf->next;\n-\n-\t\tif (!skipped)\n-\t\t\tbreak;\n-\n-\t\tbuf = rq->to_clean;\n-\t}\n-\treturn eop;\n-}\n-\n-static inline int vnic_rq_fill(struct vnic_rq *rq,\n-\tint (*buf_fill)(struct vnic_rq *rq))\n-{\n-\tint err;\n-\n-\twhile (vnic_rq_desc_avail(rq) > 0) {\n-\n-\t\terr = (*buf_fill)(rq);\n-\t\tif (err)\n-\t\t\treturn err;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-static inline int vnic_rq_fill_count(struct vnic_rq *rq,\n-\tint (*buf_fill)(struct vnic_rq *rq), unsigned int count)\n-{\n-\tint err;\n-\n-\twhile ((vnic_rq_desc_avail(rq) > 0) && (count--)) {\n-\n-\t\terr = (*buf_fill)(rq);\n-\t\tif (err)\n-\t\t\treturn err;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-void vnic_rq_free(struct vnic_rq *rq);\n-int vnic_rq_alloc(struct vnic_dev *vdev, struct vnic_rq *rq, unsigned int index,\n-\tunsigned int desc_count, unsigned int desc_size);\n-void vnic_rq_init_start(struct vnic_rq *rq, unsigned int cq_index,\n-\tunsigned int fetch_index, unsigned int posted_index,\n-\tunsigned int error_interrupt_enable,\n-\tunsigned int error_interrupt_offset);\n-void vnic_rq_init(struct vnic_rq *rq, unsigned int cq_index,\n-\tunsigned int error_interrupt_enable,\n-\tunsigned int error_interrupt_offset);\n-void vnic_rq_error_out(struct vnic_rq *rq, unsigned int error);\n-unsigned int vnic_rq_error_status(struct vnic_rq *rq);\n-void vnic_rq_enable(struct vnic_rq *rq);\n-int vnic_rq_disable(struct vnic_rq *rq);\n-void vnic_rq_clean(struct vnic_rq *rq,\n-\tvoid (*buf_clean)(struct vnic_rq *rq, struct vnic_rq_buf *buf));\n-int vnic_rq_mem_size(struct vnic_rq *rq, unsigned int desc_count,\n-\tunsigned int desc_size);\n-\n-#endif /* _VNIC_RQ_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_rss.c b/lib/librte_pmd_enic/vnic/vnic_rss.c\ndeleted file mode 100644\nindex 5ff76b1..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_rss.c\n+++ /dev/null\n@@ -1,85 +0,0 @@\n-/*\n- * Copyright 2008 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id$\"\n-\n-#include \"enic_compat.h\"\n-#include \"vnic_rss.h\"\n-\n-void vnic_set_rss_key(union vnic_rss_key *rss_key, u8 *key)\n-{\n-\tu32 i;\n-\tu32 *p;\n-\tu16 *q;\n-\n-\tfor (i = 0; i < 4; ++i) {\n-\t\tp = (u32 *)(key + (10 * i));\n-\t\tiowrite32(*p++, &rss_key->key[i].b[0]);\n-\t\tiowrite32(*p++, &rss_key->key[i].b[4]);\n-\t\tq = (u16 *)p;\n-\t\tiowrite32(*q, &rss_key->key[i].b[8]);\n-\t}\n-}\n-\n-void vnic_set_rss_cpu(union vnic_rss_cpu *rss_cpu, u8 *cpu)\n-{\n-\tu32 i;\n-\tu32 *p = (u32 *)cpu;\n-\n-\tfor (i = 0; i < 32; ++i)\n-\t\tiowrite32(*p++, &rss_cpu->cpu[i].b[0]);\n-}\n-\n-void vnic_get_rss_key(union vnic_rss_key *rss_key, u8 *key)\n-{\n-\tu32 i;\n-\tu32 *p;\n-\tu16 *q;\n-\n-\tfor (i = 0; i < 4; ++i) {\n-\t\tp = (u32 *)(key + (10 * i));\n-\t\t*p++ = ioread32(&rss_key->key[i].b[0]);\n-\t\t*p++ = ioread32(&rss_key->key[i].b[4]);\n-\t\tq = (u16 *)p;\n-\t\t*q = (u16)ioread32(&rss_key->key[i].b[8]);\n-\t}\n-}\n-\n-void vnic_get_rss_cpu(union vnic_rss_cpu *rss_cpu, u8 *cpu)\n-{\n-\tu32 i;\n-\tu32 *p = (u32 *)cpu;\n-\n-\tfor (i = 0; i < 32; ++i)\n-\t\t*p++ = ioread32(&rss_cpu->cpu[i].b[0]);\n-}\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_rss.h b/lib/librte_pmd_enic/vnic/vnic_rss.h\ndeleted file mode 100644\nindex 45ed3d2..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_rss.h\n+++ /dev/null\n@@ -1,61 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- */\n-#ident \"$Id: vnic_rss.h 64224 2010-11-09 19:43:13Z vkolluri $\"\n-\n-#ifndef _VNIC_RSS_H_\n-#define _VNIC_RSS_H_\n-\n-/* RSS key array */\n-union vnic_rss_key {\n-\tstruct {\n-\t\tu8 b[10];\n-\t\tu8 b_pad[6];\n-\t} key[4];\n-\tu64 raw[8];\n-};\n-\n-/* RSS cpu array */\n-union vnic_rss_cpu {\n-\tstruct {\n-\t\tu8 b[4];\n-\t\tu8 b_pad[4];\n-\t} cpu[32];\n-\tu64 raw[32];\n-};\n-\n-void vnic_set_rss_key(union vnic_rss_key *rss_key, u8 *key);\n-void vnic_set_rss_cpu(union vnic_rss_cpu *rss_cpu, u8 *cpu);\n-void vnic_get_rss_key(union vnic_rss_key *rss_key, u8 *key);\n-void vnic_get_rss_cpu(union vnic_rss_cpu *rss_cpu, u8 *cpu);\n-\n-#endif /* _VNIC_RSS_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_stats.h b/lib/librte_pmd_enic/vnic/vnic_stats.h\ndeleted file mode 100644\nindex ac5aa72..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_stats.h\n+++ /dev/null\n@@ -1,86 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_stats.h 84040 2011-08-09 23:38:43Z dwang2 $\"\n-\n-#ifndef _VNIC_STATS_H_\n-#define _VNIC_STATS_H_\n-\n-/* Tx statistics */\n-struct vnic_tx_stats {\n-\tu64 tx_frames_ok;\n-\tu64 tx_unicast_frames_ok;\n-\tu64 tx_multicast_frames_ok;\n-\tu64 tx_broadcast_frames_ok;\n-\tu64 tx_bytes_ok;\n-\tu64 tx_unicast_bytes_ok;\n-\tu64 tx_multicast_bytes_ok;\n-\tu64 tx_broadcast_bytes_ok;\n-\tu64 tx_drops;\n-\tu64 tx_errors;\n-\tu64 tx_tso;\n-\tu64 rsvd[16];\n-};\n-\n-/* Rx statistics */\n-struct vnic_rx_stats {\n-\tu64 rx_frames_ok;\n-\tu64 rx_frames_total;\n-\tu64 rx_unicast_frames_ok;\n-\tu64 rx_multicast_frames_ok;\n-\tu64 rx_broadcast_frames_ok;\n-\tu64 rx_bytes_ok;\n-\tu64 rx_unicast_bytes_ok;\n-\tu64 rx_multicast_bytes_ok;\n-\tu64 rx_broadcast_bytes_ok;\n-\tu64 rx_drop;\n-\tu64 rx_no_bufs;\n-\tu64 rx_errors;\n-\tu64 rx_rss;\n-\tu64 rx_crc_errors;\n-\tu64 rx_frames_64;\n-\tu64 rx_frames_127;\n-\tu64 rx_frames_255;\n-\tu64 rx_frames_511;\n-\tu64 rx_frames_1023;\n-\tu64 rx_frames_1518;\n-\tu64 rx_frames_to_max;\n-\tu64 rsvd[16];\n-};\n-\n-struct vnic_stats {\n-\tstruct vnic_tx_stats tx;\n-\tstruct vnic_rx_stats rx;\n-};\n-\n-#endif /* _VNIC_STATS_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_wq.c b/lib/librte_pmd_enic/vnic/vnic_wq.c\ndeleted file mode 100644\nindex e52cef0..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_wq.c\n+++ /dev/null\n@@ -1,245 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_wq.c 183023 2014-07-22 23:47:25Z xuywang $\"\n-\n-#include \"vnic_dev.h\"\n-#include \"vnic_wq.h\"\n-\n-static inline\n-int vnic_wq_get_ctrl(struct vnic_dev *vdev, struct vnic_wq *wq,\n-\t\t\t\tunsigned int index, enum vnic_res_type res_type)\n-{\n-\twq->ctrl = vnic_dev_get_res(vdev, res_type, index);\n-\tif (!wq->ctrl)\n-\t\treturn -EINVAL;\n-\treturn 0;\n-}\n-\n-static inline\n-int vnic_wq_alloc_ring(struct vnic_dev *vdev, struct vnic_wq *wq,\n-\t\t\t\tunsigned int desc_count, unsigned int desc_size)\n-{\n-\tchar res_name[NAME_MAX];\n-\tstatic int instance;\n-\n-\tsnprintf(res_name, sizeof(res_name), \"%d-wq-%d\", instance++, wq->index);\n-\treturn vnic_dev_alloc_desc_ring(vdev, &wq->ring, desc_count, desc_size,\n-\t\twq->socket_id, res_name);\n-}\n-\n-static int vnic_wq_alloc_bufs(struct vnic_wq *wq)\n-{\n-\tstruct vnic_wq_buf *buf;\n-\tunsigned int i, j, count = wq->ring.desc_count;\n-\tunsigned int blks = VNIC_WQ_BUF_BLKS_NEEDED(count);\n-\n-\tfor (i = 0; i < blks; i++) {\n-\t\twq->bufs[i] = kzalloc(VNIC_WQ_BUF_BLK_SZ(count), GFP_ATOMIC);\n-\t\tif (!wq->bufs[i])\n-\t\t\treturn -ENOMEM;\n-\t}\n-\n-\tfor (i = 0; i < blks; i++) {\n-\t\tbuf = wq->bufs[i];\n-\t\tfor (j = 0; j < VNIC_WQ_BUF_BLK_ENTRIES(count); j++) {\n-\t\t\tbuf->index = i * VNIC_WQ_BUF_BLK_ENTRIES(count) + j;\n-\t\t\tbuf->desc = (u8 *)wq->ring.descs +\n-\t\t\t\twq->ring.desc_size * buf->index;\n-\t\t\tif (buf->index + 1 == count) {\n-\t\t\t\tbuf->next = wq->bufs[0];\n-\t\t\t\tbreak;\n-\t\t\t} else if (j + 1 == VNIC_WQ_BUF_BLK_ENTRIES(count)) {\n-\t\t\t\tbuf->next = wq->bufs[i + 1];\n-\t\t\t} else {\n-\t\t\t\tbuf->next = buf + 1;\n-\t\t\t\tbuf++;\n-\t\t\t}\n-\t\t}\n-\t}\n-\n-\twq->to_use = wq->to_clean = wq->bufs[0];\n-\n-\treturn 0;\n-}\n-\n-void vnic_wq_free(struct vnic_wq *wq)\n-{\n-\tstruct vnic_dev *vdev;\n-\tunsigned int i;\n-\n-\tvdev = wq->vdev;\n-\n-\tvnic_dev_free_desc_ring(vdev, &wq->ring);\n-\n-\tfor (i = 0; i < VNIC_WQ_BUF_BLKS_MAX; i++) {\n-\t\tif (wq->bufs[i]) {\n-\t\t\tkfree(wq->bufs[i]);\n-\t\t\twq->bufs[i] = NULL;\n-\t\t}\n-\t}\n-\n-\twq->ctrl = NULL;\n-}\n-\n-int vnic_wq_mem_size(struct vnic_wq *wq, unsigned int desc_count,\n-\tunsigned int desc_size)\n-{\n-\tint mem_size = 0;\n-\n-\tmem_size += vnic_dev_desc_ring_size(&wq->ring, desc_count, desc_size);\n-\n-\tmem_size += VNIC_WQ_BUF_BLKS_NEEDED(wq->ring.desc_count) *\n-\t\tVNIC_WQ_BUF_BLK_SZ(wq->ring.desc_count);\n-\n-\treturn mem_size;\n-}\n-\n-\n-int vnic_wq_alloc(struct vnic_dev *vdev, struct vnic_wq *wq, unsigned int index,\n-\tunsigned int desc_count, unsigned int desc_size)\n-{\n-\tint err;\n-\n-\twq->index = index;\n-\twq->vdev = vdev;\n-\n-\terr = vnic_wq_get_ctrl(vdev, wq, index, RES_TYPE_WQ);\n-\tif (err) {\n-\t\tpr_err(\"Failed to hook WQ[%d] resource, err %d\\n\", index, err);\n-\t\treturn err;\n-\t}\n-\n-\tvnic_wq_disable(wq);\n-\n-\terr = vnic_wq_alloc_ring(vdev, wq, desc_count, desc_size);\n-\tif (err)\n-\t\treturn err;\n-\n-\terr = vnic_wq_alloc_bufs(wq);\n-\tif (err) {\n-\t\tvnic_wq_free(wq);\n-\t\treturn err;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-void vnic_wq_init_start(struct vnic_wq *wq, unsigned int cq_index,\n-\tunsigned int fetch_index, unsigned int posted_index,\n-\tunsigned int error_interrupt_enable,\n-\tunsigned int error_interrupt_offset)\n-{\n-\tu64 paddr;\n-\tunsigned int count = wq->ring.desc_count;\n-\n-\tpaddr = (u64)wq->ring.base_addr | VNIC_PADDR_TARGET;\n-\twriteq(paddr, &wq->ctrl->ring_base);\n-\tiowrite32(count, &wq->ctrl->ring_size);\n-\tiowrite32(fetch_index, &wq->ctrl->fetch_index);\n-\tiowrite32(posted_index, &wq->ctrl->posted_index);\n-\tiowrite32(cq_index, &wq->ctrl->cq_index);\n-\tiowrite32(error_interrupt_enable, &wq->ctrl->error_interrupt_enable);\n-\tiowrite32(error_interrupt_offset, &wq->ctrl->error_interrupt_offset);\n-\tiowrite32(0, &wq->ctrl->error_status);\n-\n-\twq->to_use = wq->to_clean =\n-\t\t&wq->bufs[fetch_index / VNIC_WQ_BUF_BLK_ENTRIES(count)]\n-\t\t\t[fetch_index % VNIC_WQ_BUF_BLK_ENTRIES(count)];\n-}\n-\n-void vnic_wq_init(struct vnic_wq *wq, unsigned int cq_index,\n-\tunsigned int error_interrupt_enable,\n-\tunsigned int error_interrupt_offset)\n-{\n-\tvnic_wq_init_start(wq, cq_index, 0, 0,\n-\t\terror_interrupt_enable,\n-\t\terror_interrupt_offset);\n-}\n-\n-void vnic_wq_error_out(struct vnic_wq *wq, unsigned int error)\n-{\n-\tiowrite32(error, &wq->ctrl->error_status);\n-}\n-\n-unsigned int vnic_wq_error_status(struct vnic_wq *wq)\n-{\n-\treturn ioread32(&wq->ctrl->error_status);\n-}\n-\n-void vnic_wq_enable(struct vnic_wq *wq)\n-{\n-\tiowrite32(1, &wq->ctrl->enable);\n-}\n-\n-int vnic_wq_disable(struct vnic_wq *wq)\n-{\n-\tunsigned int wait;\n-\n-\tiowrite32(0, &wq->ctrl->enable);\n-\n-\t/* Wait for HW to ACK disable request */\n-\tfor (wait = 0; wait < 1000; wait++) {\n-\t\tif (!(ioread32(&wq->ctrl->running)))\n-\t\t\treturn 0;\n-\t\tudelay(10);\n-\t}\n-\n-\tpr_err(\"Failed to disable WQ[%d]\\n\", wq->index);\n-\n-\treturn -ETIMEDOUT;\n-}\n-\n-void vnic_wq_clean(struct vnic_wq *wq,\n-\tvoid (*buf_clean)(struct vnic_wq *wq, struct vnic_wq_buf *buf))\n-{\n-\tstruct vnic_wq_buf *buf;\n-\n-\tbuf = wq->to_clean;\n-\n-\twhile (vnic_wq_desc_used(wq) > 0) {\n-\n-\t\t(*buf_clean)(wq, buf);\n-\n-\t\tbuf = wq->to_clean = buf->next;\n-\t\twq->ring.desc_avail++;\n-\t}\n-\n-\twq->to_use = wq->to_clean = wq->bufs[0];\n-\n-\tiowrite32(0, &wq->ctrl->fetch_index);\n-\tiowrite32(0, &wq->ctrl->posted_index);\n-\tiowrite32(0, &wq->ctrl->error_status);\n-\n-\tvnic_dev_clear_desc_ring(&wq->ring);\n-}\ndiff --git a/lib/librte_pmd_enic/vnic/vnic_wq.h b/lib/librte_pmd_enic/vnic/vnic_wq.h\ndeleted file mode 100644\nindex f8219ad..0000000\n--- a/lib/librte_pmd_enic/vnic/vnic_wq.h\n+++ /dev/null\n@@ -1,283 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: vnic_wq.h 183023 2014-07-22 23:47:25Z xuywang $\"\n-\n-#ifndef _VNIC_WQ_H_\n-#define _VNIC_WQ_H_\n-\n-\n-#include \"vnic_dev.h\"\n-#include \"vnic_cq.h\"\n-\n-/* Work queue control */\n-struct vnic_wq_ctrl {\n-\tu64 ring_base;\t\t\t/* 0x00 */\n-\tu32 ring_size;\t\t\t/* 0x08 */\n-\tu32 pad0;\n-\tu32 posted_index;\t\t/* 0x10 */\n-\tu32 pad1;\n-\tu32 cq_index;\t\t\t/* 0x18 */\n-\tu32 pad2;\n-\tu32 enable;\t\t\t/* 0x20 */\n-\tu32 pad3;\n-\tu32 running;\t\t\t/* 0x28 */\n-\tu32 pad4;\n-\tu32 fetch_index;\t\t/* 0x30 */\n-\tu32 pad5;\n-\tu32 dca_value;\t\t\t/* 0x38 */\n-\tu32 pad6;\n-\tu32 error_interrupt_enable;\t/* 0x40 */\n-\tu32 pad7;\n-\tu32 error_interrupt_offset;\t/* 0x48 */\n-\tu32 pad8;\n-\tu32 error_status;\t\t/* 0x50 */\n-\tu32 pad9;\n-};\n-\n-struct vnic_wq_buf {\n-\tstruct vnic_wq_buf *next;\n-\tdma_addr_t dma_addr;\n-\tvoid *os_buf;\n-\tunsigned int len;\n-\tunsigned int index;\n-\tint sop;\n-\tvoid *desc;\n-\tuint64_t wr_id; /* Cookie */\n-\tuint8_t cq_entry; /* Gets completion event from hw */\n-\tuint8_t desc_skip_cnt; /* Num descs to occupy */\n-\tuint8_t compressed_send; /* Both hdr and payload in one desc */\n-};\n-\n-/* Break the vnic_wq_buf allocations into blocks of 32/64 entries */\n-#define VNIC_WQ_BUF_MIN_BLK_ENTRIES 32\n-#define VNIC_WQ_BUF_DFLT_BLK_ENTRIES 64\n-#define VNIC_WQ_BUF_BLK_ENTRIES(entries) \\\n-\t((unsigned int)((entries < VNIC_WQ_BUF_DFLT_BLK_ENTRIES) ? \\\n-\tVNIC_WQ_BUF_MIN_BLK_ENTRIES : VNIC_WQ_BUF_DFLT_BLK_ENTRIES))\n-#define VNIC_WQ_BUF_BLK_SZ(entries) \\\n-\t(VNIC_WQ_BUF_BLK_ENTRIES(entries) * sizeof(struct vnic_wq_buf))\n-#define VNIC_WQ_BUF_BLKS_NEEDED(entries) \\\n-\tDIV_ROUND_UP(entries, VNIC_WQ_BUF_BLK_ENTRIES(entries))\n-#define VNIC_WQ_BUF_BLKS_MAX VNIC_WQ_BUF_BLKS_NEEDED(4096)\n-\n-struct vnic_wq {\n-\tunsigned int index;\n-\tstruct vnic_dev *vdev;\n-\tstruct vnic_wq_ctrl __iomem *ctrl;              /* memory-mapped */\n-\tstruct vnic_dev_ring ring;\n-\tstruct vnic_wq_buf *bufs[VNIC_WQ_BUF_BLKS_MAX];\n-\tstruct vnic_wq_buf *to_use;\n-\tstruct vnic_wq_buf *to_clean;\n-\tunsigned int pkts_outstanding;\n-\tunsigned int socket_id;\n-};\n-\n-static inline unsigned int vnic_wq_desc_avail(struct vnic_wq *wq)\n-{\n-\t/* how many does SW own? */\n-\treturn wq->ring.desc_avail;\n-}\n-\n-static inline unsigned int vnic_wq_desc_used(struct vnic_wq *wq)\n-{\n-\t/* how many does HW own? */\n-\treturn wq->ring.desc_count - wq->ring.desc_avail - 1;\n-}\n-\n-static inline void *vnic_wq_next_desc(struct vnic_wq *wq)\n-{\n-\treturn wq->to_use->desc;\n-}\n-\n-#define PI_LOG2_CACHE_LINE_SIZE        5\n-#define PI_INDEX_BITS            12\n-#define PI_INDEX_MASK ((1U << PI_INDEX_BITS) - 1)\n-#define PI_PREFETCH_LEN_MASK ((1U << PI_LOG2_CACHE_LINE_SIZE) - 1)\n-#define PI_PREFETCH_LEN_OFF 16\n-#define PI_PREFETCH_ADDR_BITS 43\n-#define PI_PREFETCH_ADDR_MASK ((1ULL << PI_PREFETCH_ADDR_BITS) - 1)\n-#define PI_PREFETCH_ADDR_OFF 21\n-\n-/** How many cache lines are touched by buffer (addr, len). */\n-static inline unsigned int num_cache_lines_touched(dma_addr_t addr,\n-\t\t\t\t\t\t\tunsigned int len)\n-{\n-\tconst unsigned long mask = PI_PREFETCH_LEN_MASK;\n-\tconst unsigned long laddr = (unsigned long)addr;\n-\tunsigned long lines, equiv_len;\n-\t/* A. If addr is aligned, our solution is just to round up len to the\n-\tnext boundary.\n-\n-\te.g. addr = 0, len = 48\n-\t+--------------------+\n-\t|XXXXXXXXXXXXXXXXXXXX|    32-byte cacheline a\n-\t+--------------------+\n-\t|XXXXXXXXXX          |    cacheline b\n-\t+--------------------+\n-\n-\tB. If addr is not aligned, however, we may use an extra\n-\tcacheline.  e.g. addr = 12, len = 22\n-\n-\t+--------------------+\n-\t|       XXXXXXXXXXXXX|\n-\t+--------------------+\n-\t|XX                  |\n-\t+--------------------+\n-\n-\tOur solution is to make the problem equivalent to case A\n-\tabove by adding the empty space in the first cacheline to the length:\n-\tunsigned long len;\n-\n-\t+--------------------+\n-\t|eeeeeeeXXXXXXXXXXXXX|    \"e\" is empty space, which we add to len\n-\t+--------------------+\n-\t|XX                  |\n-\t+--------------------+\n-\n-\t*/\n-\tequiv_len = len + (laddr & mask);\n-\n-\t/* Now we can just round up this len to the next 32-byte boundary. */\n-\tlines = (equiv_len + mask) & (~mask);\n-\n-\t/* Scale bytes -> cachelines. */\n-\treturn lines >> PI_LOG2_CACHE_LINE_SIZE;\n-}\n-\n-static inline u64 vnic_cached_posted_index(dma_addr_t addr, unsigned int len,\n-\t\t\t\t\t\tunsigned int index)\n-{\n-\tunsigned int num_cache_lines = num_cache_lines_touched(addr, len);\n-\t/* Wish we could avoid a branch here.  We could have separate\n-\t * vnic_wq_post() and vinc_wq_post_inline(), the latter\n-\t * only supporting < 1k (2^5 * 2^5) sends, I suppose.  This would\n-\t * eliminate the if (eop) branch as well.\n-\t */\n-\tif (num_cache_lines > PI_PREFETCH_LEN_MASK)\n-\t\tnum_cache_lines = 0;\n-\treturn (index & PI_INDEX_MASK) |\n-\t((num_cache_lines & PI_PREFETCH_LEN_MASK) << PI_PREFETCH_LEN_OFF) |\n-\t\t(((addr >> PI_LOG2_CACHE_LINE_SIZE) &\n-\tPI_PREFETCH_ADDR_MASK) << PI_PREFETCH_ADDR_OFF);\n-}\n-\n-static inline void vnic_wq_post(struct vnic_wq *wq,\n-\tvoid *os_buf, dma_addr_t dma_addr,\n-\tunsigned int len, int sop, int eop,\n-\tuint8_t desc_skip_cnt, uint8_t cq_entry,\n-\tuint8_t compressed_send, uint64_t wrid)\n-{\n-\tstruct vnic_wq_buf *buf = wq->to_use;\n-\n-\tbuf->sop = sop;\n-\tbuf->cq_entry = cq_entry;\n-\tbuf->compressed_send = compressed_send;\n-\tbuf->desc_skip_cnt = desc_skip_cnt;\n-\tbuf->os_buf = os_buf;\n-\tbuf->dma_addr = dma_addr;\n-\tbuf->len = len;\n-\tbuf->wr_id = wrid;\n-\n-\tbuf = buf->next;\n-\tif (eop) {\n-#ifdef DO_PREFETCH\n-\t\tuint64_t wr = vnic_cached_posted_index(dma_addr, len,\n-\t\t\t\t\t\t\tbuf->index);\n-#endif\n-\t\t/* Adding write memory barrier prevents compiler and/or CPU\n-\t\t * reordering, thus avoiding descriptor posting before\n-\t\t * descriptor is initialized. Otherwise, hardware can read\n-\t\t * stale descriptor fields.\n-\t\t */\n-\t\twmb();\n-#ifdef DO_PREFETCH\n-\t\t/* Intel chipsets seem to limit the rate of PIOs that we can\n-\t\t * push on the bus.  Thus, it is very important to do a single\n-\t\t * 64 bit write here.  With two 32-bit writes, my maximum\n-\t\t * pkt/sec rate was cut almost in half. -AJF\n-\t\t */\n-\t\tiowrite64((uint64_t)wr, &wq->ctrl->posted_index);\n-#else\n-\t\tiowrite32(buf->index, &wq->ctrl->posted_index);\n-#endif\n-\t}\n-\twq->to_use = buf;\n-\n-\twq->ring.desc_avail -= desc_skip_cnt;\n-}\n-\n-static inline void vnic_wq_service(struct vnic_wq *wq,\n-\tstruct cq_desc *cq_desc, u16 completed_index,\n-\tvoid (*buf_service)(struct vnic_wq *wq,\n-\tstruct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque),\n-\tvoid *opaque)\n-{\n-\tstruct vnic_wq_buf *buf;\n-\n-\tbuf = wq->to_clean;\n-\twhile (1) {\n-\n-\t\t(*buf_service)(wq, cq_desc, buf, opaque);\n-\n-\t\twq->ring.desc_avail++;\n-\n-\t\twq->to_clean = buf->next;\n-\n-\t\tif (buf->index == completed_index)\n-\t\t\tbreak;\n-\n-\t\tbuf = wq->to_clean;\n-\t}\n-}\n-\n-void vnic_wq_free(struct vnic_wq *wq);\n-int vnic_wq_alloc(struct vnic_dev *vdev, struct vnic_wq *wq, unsigned int index,\n-\tunsigned int desc_count, unsigned int desc_size);\n-void vnic_wq_init_start(struct vnic_wq *wq, unsigned int cq_index,\n-\tunsigned int fetch_index, unsigned int posted_index,\n-\tunsigned int error_interrupt_enable,\n-\tunsigned int error_interrupt_offset);\n-void vnic_wq_init(struct vnic_wq *wq, unsigned int cq_index,\n-\tunsigned int error_interrupt_enable,\n-\tunsigned int error_interrupt_offset);\n-void vnic_wq_error_out(struct vnic_wq *wq, unsigned int error);\n-unsigned int vnic_wq_error_status(struct vnic_wq *wq);\n-void vnic_wq_enable(struct vnic_wq *wq);\n-int vnic_wq_disable(struct vnic_wq *wq);\n-void vnic_wq_clean(struct vnic_wq *wq,\n-\tvoid (*buf_clean)(struct vnic_wq *wq, struct vnic_wq_buf *buf));\n-int vnic_wq_mem_size(struct vnic_wq *wq, unsigned int desc_count,\n-\tunsigned int desc_size);\n-\n-#endif /* _VNIC_WQ_H_ */\ndiff --git a/lib/librte_pmd_enic/vnic/wq_enet_desc.h b/lib/librte_pmd_enic/vnic/wq_enet_desc.h\ndeleted file mode 100644\nindex ff2b768..0000000\n--- a/lib/librte_pmd_enic/vnic/wq_enet_desc.h\n+++ /dev/null\n@@ -1,114 +0,0 @@\n-/*\n- * Copyright 2008-2010 Cisco Systems, Inc.  All rights reserved.\n- * Copyright 2007 Nuova Systems, Inc.  All rights reserved.\n- *\n- * Copyright (c) 2014, Cisco Systems, Inc.\n- * All rights reserved.\n- *\n- * Redistribution and use in source and binary forms, with or without\n- * modification, are permitted provided that the following conditions\n- * are met:\n- *\n- * 1. Redistributions of source code must retain the above copyright\n- * notice, this list of conditions and the following disclaimer.\n- *\n- * 2. Redistributions in binary form must reproduce the above copyright\n- * notice, this list of conditions and the following disclaimer in\n- * the documentation and/or other materials provided with the\n- * distribution.\n- *\n- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n- * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS\n- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE\n- * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,\n- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,\n- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER\n- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT\n- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN\n- * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE\n- * POSSIBILITY OF SUCH DAMAGE.\n- *\n- */\n-#ident \"$Id: wq_enet_desc.h 59839 2010-09-27 20:36:31Z roprabhu $\"\n-\n-#ifndef _WQ_ENET_DESC_H_\n-#define _WQ_ENET_DESC_H_\n-\n-/* Ethernet work queue descriptor: 16B */\n-struct wq_enet_desc {\n-\t__le64 address;\n-\t__le16 length;\n-\t__le16 mss_loopback;\n-\t__le16 header_length_flags;\n-\t__le16 vlan_tag;\n-};\n-\n-#define WQ_ENET_ADDR_BITS\t\t64\n-#define WQ_ENET_LEN_BITS\t\t14\n-#define WQ_ENET_LEN_MASK\t\t((1 << WQ_ENET_LEN_BITS) - 1)\n-#define WQ_ENET_MSS_BITS\t\t14\n-#define WQ_ENET_MSS_MASK\t\t((1 << WQ_ENET_MSS_BITS) - 1)\n-#define WQ_ENET_MSS_SHIFT\t\t2\n-#define WQ_ENET_LOOPBACK_SHIFT\t\t1\n-#define WQ_ENET_HDRLEN_BITS\t\t10\n-#define WQ_ENET_HDRLEN_MASK\t\t((1 << WQ_ENET_HDRLEN_BITS) - 1)\n-#define WQ_ENET_FLAGS_OM_BITS\t\t2\n-#define WQ_ENET_FLAGS_OM_MASK\t\t((1 << WQ_ENET_FLAGS_OM_BITS) - 1)\n-#define WQ_ENET_FLAGS_EOP_SHIFT\t\t12\n-#define WQ_ENET_FLAGS_CQ_ENTRY_SHIFT\t13\n-#define WQ_ENET_FLAGS_FCOE_ENCAP_SHIFT\t14\n-#define WQ_ENET_FLAGS_VLAN_TAG_INSERT_SHIFT\t15\n-\n-#define WQ_ENET_OFFLOAD_MODE_CSUM\t0\n-#define WQ_ENET_OFFLOAD_MODE_RESERVED\t1\n-#define WQ_ENET_OFFLOAD_MODE_CSUM_L4\t2\n-#define WQ_ENET_OFFLOAD_MODE_TSO\t3\n-\n-static inline void wq_enet_desc_enc(struct wq_enet_desc *desc,\n-\tu64 address, u16 length, u16 mss, u16 header_length,\n-\tu8 offload_mode, u8 eop, u8 cq_entry, u8 fcoe_encap,\n-\tu8 vlan_tag_insert, u16 vlan_tag, u8 loopback)\n-{\n-\tdesc->address = cpu_to_le64(address);\n-\tdesc->length = cpu_to_le16(length & WQ_ENET_LEN_MASK);\n-\tdesc->mss_loopback = cpu_to_le16((mss & WQ_ENET_MSS_MASK) <<\n-\t\tWQ_ENET_MSS_SHIFT | (loopback & 1) << WQ_ENET_LOOPBACK_SHIFT);\n-\tdesc->header_length_flags = cpu_to_le16(\n-\t\t(header_length & WQ_ENET_HDRLEN_MASK) |\n-\t\t(offload_mode & WQ_ENET_FLAGS_OM_MASK) << WQ_ENET_HDRLEN_BITS |\n-\t\t(eop & 1) << WQ_ENET_FLAGS_EOP_SHIFT |\n-\t\t(cq_entry & 1) << WQ_ENET_FLAGS_CQ_ENTRY_SHIFT |\n-\t\t(fcoe_encap & 1) << WQ_ENET_FLAGS_FCOE_ENCAP_SHIFT |\n-\t\t(vlan_tag_insert & 1) << WQ_ENET_FLAGS_VLAN_TAG_INSERT_SHIFT);\n-\tdesc->vlan_tag = cpu_to_le16(vlan_tag);\n-}\n-\n-static inline void wq_enet_desc_dec(struct wq_enet_desc *desc,\n-\tu64 *address, u16 *length, u16 *mss, u16 *header_length,\n-\tu8 *offload_mode, u8 *eop, u8 *cq_entry, u8 *fcoe_encap,\n-\tu8 *vlan_tag_insert, u16 *vlan_tag, u8 *loopback)\n-{\n-\t*address = le64_to_cpu(desc->address);\n-\t*length = le16_to_cpu(desc->length) & WQ_ENET_LEN_MASK;\n-\t*mss = (le16_to_cpu(desc->mss_loopback) >> WQ_ENET_MSS_SHIFT) &\n-\t\tWQ_ENET_MSS_MASK;\n-\t*loopback = (u8)((le16_to_cpu(desc->mss_loopback) >>\n-\t\tWQ_ENET_LOOPBACK_SHIFT) & 1);\n-\t*header_length = le16_to_cpu(desc->header_length_flags) &\n-\t\tWQ_ENET_HDRLEN_MASK;\n-\t*offload_mode = (u8)((le16_to_cpu(desc->header_length_flags) >>\n-\t\tWQ_ENET_HDRLEN_BITS) & WQ_ENET_FLAGS_OM_MASK);\n-\t*eop = (u8)((le16_to_cpu(desc->header_length_flags) >>\n-\t\tWQ_ENET_FLAGS_EOP_SHIFT) & 1);\n-\t*cq_entry = (u8)((le16_to_cpu(desc->header_length_flags) >>\n-\t\tWQ_ENET_FLAGS_CQ_ENTRY_SHIFT) & 1);\n-\t*fcoe_encap = (u8)((le16_to_cpu(desc->header_length_flags) >>\n-\t\tWQ_ENET_FLAGS_FCOE_ENCAP_SHIFT) & 1);\n-\t*vlan_tag_insert = (u8)((le16_to_cpu(desc->header_length_flags) >>\n-\t\tWQ_ENET_FLAGS_VLAN_TAG_INSERT_SHIFT) & 1);\n-\t*vlan_tag = le16_to_cpu(desc->vlan_tag);\n-}\n-\n-#endif /* _WQ_ENET_DESC_H_ */\n",
    "prefixes": [
        "dpdk-dev",
        "v2",
        "06/19"
    ]
}