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GET /api/patches/47269/?format=api
{ "id": 47269, "url": "https://patches.dpdk.org/api/patches/47269/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1540344746-29045-2-git-send-email-honnappa.nagarahalli@arm.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1540344746-29045-2-git-send-email-honnappa.nagarahalli@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1540344746-29045-2-git-send-email-honnappa.nagarahalli@arm.com", "date": "2018-10-24T01:32:22", "name": "[v6,1/5] hash: separate multi-writer from rw-concurrency", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "073373abb84fe71968c8d9bb5059222b1002ff92", "submitter": { "id": 1045, "url": "https://patches.dpdk.org/api/people/1045/?format=api", "name": "Honnappa Nagarahalli", "email": "honnappa.nagarahalli@arm.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1540344746-29045-2-git-send-email-honnappa.nagarahalli@arm.com/mbox/", "series": [ { "id": 2045, "url": "https://patches.dpdk.org/api/series/2045/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=2045", "date": "2018-10-24T01:32:21", "name": "Address reader-writer concurrency in rte_hash", "version": 6, "mbox": "https://patches.dpdk.org/series/2045/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/47269/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/47269/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 4AE9B5F62;\n\tWed, 24 Oct 2018 03:32:42 +0200 (CEST)", "from foss.arm.com (usa-sjc-mx-foss1.foss.arm.com [217.140.101.70])\n\tby dpdk.org (Postfix) with ESMTP id F27B05F1A\n\tfor <dev@dpdk.org>; Wed, 24 Oct 2018 03:32:38 +0200 (CEST)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249])\n\tby usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2908EEBD;\n\tTue, 23 Oct 2018 18:32:38 -0700 (PDT)", "from 2p2660v4-1.austin.arm.com (2p2660v4-1.austin.arm.com\n\t[10.118.14.139])\n\tby usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id\n\tB7B933F627; Tue, 23 Oct 2018 18:32:37 -0700 (PDT)" ], "From": "Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>", "To": "bruce.richardson@intel.com,\n\tpablo.de.lara.guarch@intel.com", "Cc": "dev@dpdk.org, yipeng1.wang@intel.com, honnappa.nagarahalli@arm.com,\n\tdharmik.thakkar@arm.com, gavin.hu@arm.com, nd@arm.com", "Date": "Tue, 23 Oct 2018 20:32:22 -0500", "Message-Id": "<1540344746-29045-2-git-send-email-honnappa.nagarahalli@arm.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1540344746-29045-1-git-send-email-honnappa.nagarahalli@arm.com>", "References": "<1540344746-29045-1-git-send-email-honnappa.nagarahalli@arm.com>", "Subject": "[dpdk-dev] [PATCH v6 1/5] hash: separate multi-writer from\n\trw-concurrency", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "RW concurrency is required with single writer and multiple reader\nusecase as well. Hence, multi-writer should not be enabled by default when\nRW concurrency is enabled.\n\nFixes: f2e3001b53ec (\"hash: support read/write concurrency\")\nCc: yipeng1.wang@intel.com\n\nSigned-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>\nReviewed-by: Gavin Hu <gavin.hu@arm.com>\nReviewed-by: Yipeng Wang <yipeng1.wang@intel.com>\nAcked-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n lib/librte_hash/rte_cuckoo_hash.c | 49 +++++++++++++++++++++------------------\n lib/librte_hash/rte_cuckoo_hash.h | 8 +++++--\n test/test/test_hash_readwrite.c | 6 +++--\n 3 files changed, 37 insertions(+), 26 deletions(-)", "diff": "diff --git a/lib/librte_hash/rte_cuckoo_hash.c b/lib/librte_hash/rte_cuckoo_hash.c\nindex 9a48934..3539a10 100644\n--- a/lib/librte_hash/rte_cuckoo_hash.c\n+++ b/lib/librte_hash/rte_cuckoo_hash.c\n@@ -136,9 +136,10 @@ rte_hash_create(const struct rte_hash_parameters *params)\n \tchar ext_ring_name[RTE_RING_NAMESIZE];\n \tunsigned num_key_slots;\n \tunsigned i;\n-\tunsigned int hw_trans_mem_support = 0, multi_writer_support = 0;\n+\tunsigned int hw_trans_mem_support = 0, use_local_cache = 0;\n \tunsigned int ext_table_support = 0;\n \tunsigned int readwrite_concur_support = 0;\n+\tunsigned int writer_takes_lock = 0;\n \n \trte_hash_function default_hash_func = (rte_hash_function)rte_jhash;\n \n@@ -162,19 +163,21 @@ rte_hash_create(const struct rte_hash_parameters *params)\n \tif (params->extra_flag & RTE_HASH_EXTRA_FLAGS_TRANS_MEM_SUPPORT)\n \t\thw_trans_mem_support = 1;\n \n-\tif (params->extra_flag & RTE_HASH_EXTRA_FLAGS_MULTI_WRITER_ADD)\n-\t\tmulti_writer_support = 1;\n+\tif (params->extra_flag & RTE_HASH_EXTRA_FLAGS_MULTI_WRITER_ADD) {\n+\t\tuse_local_cache = 1;\n+\t\twriter_takes_lock = 1;\n+\t}\n \n \tif (params->extra_flag & RTE_HASH_EXTRA_FLAGS_RW_CONCURRENCY) {\n \t\treadwrite_concur_support = 1;\n-\t\tmulti_writer_support = 1;\n+\t\twriter_takes_lock = 1;\n \t}\n \n \tif (params->extra_flag & RTE_HASH_EXTRA_FLAGS_EXT_TABLE)\n \t\text_table_support = 1;\n \n \t/* Store all keys and leave the first entry as a dummy entry for lookup_bulk */\n-\tif (multi_writer_support)\n+\tif (use_local_cache)\n \t\t/*\n \t\t * Increase number of slots by total number of indices\n \t\t * that can be stored in the lcore caches\n@@ -322,7 +325,7 @@ rte_hash_create(const struct rte_hash_parameters *params)\n \th->cmp_jump_table_idx = KEY_OTHER_BYTES;\n #endif\n \n-\tif (multi_writer_support) {\n+\tif (use_local_cache) {\n \t\th->local_free_slots = rte_zmalloc_socket(NULL,\n \t\t\t\tsizeof(struct lcore_cache) * RTE_MAX_LCORE,\n \t\t\t\tRTE_CACHE_LINE_SIZE, params->socket_id);\n@@ -352,9 +355,10 @@ rte_hash_create(const struct rte_hash_parameters *params)\n \th->key_store = k;\n \th->free_slots = r;\n \th->hw_trans_mem_support = hw_trans_mem_support;\n-\th->multi_writer_support = multi_writer_support;\n+\th->use_local_cache = use_local_cache;\n \th->readwrite_concur_support = readwrite_concur_support;\n \th->ext_table_support = ext_table_support;\n+\th->writer_takes_lock = writer_takes_lock;\n \n #if defined(RTE_ARCH_X86)\n \tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_SSE2))\n@@ -363,10 +367,11 @@ rte_hash_create(const struct rte_hash_parameters *params)\n #endif\n \t\th->sig_cmp_fn = RTE_HASH_COMPARE_SCALAR;\n \n-\t/* Turn on multi-writer only with explicit flag from user and TM\n-\t * support.\n+\t/* Writer threads need to take the lock when:\n+\t * 1) RTE_HASH_EXTRA_FLAGS_RW_CONCURRENCY is enabled OR\n+\t * 2) RTE_HASH_EXTRA_FLAGS_MULTI_WRITER_ADD is enabled\n \t */\n-\tif (h->multi_writer_support) {\n+\tif (h->writer_takes_lock) {\n \t\th->readwrite_lock = rte_malloc(NULL, sizeof(rte_rwlock_t),\n \t\t\t\t\t\tRTE_CACHE_LINE_SIZE);\n \t\tif (h->readwrite_lock == NULL)\n@@ -425,10 +430,10 @@ rte_hash_free(struct rte_hash *h)\n \n \trte_rwlock_write_unlock(RTE_EAL_TAILQ_RWLOCK);\n \n-\tif (h->multi_writer_support) {\n+\tif (h->use_local_cache)\n \t\trte_free(h->local_free_slots);\n+\tif (h->writer_takes_lock)\n \t\trte_free(h->readwrite_lock);\n-\t}\n \trte_ring_free(h->free_slots);\n \trte_ring_free(h->free_ext_bkts);\n \trte_free(h->key_store);\n@@ -454,7 +459,7 @@ rte_hash_count(const struct rte_hash *h)\n \tif (h == NULL)\n \t\treturn -EINVAL;\n \n-\tif (h->multi_writer_support) {\n+\tif (h->use_local_cache) {\n \t\ttot_ring_cnt = h->entries + (RTE_MAX_LCORE - 1) *\n \t\t\t\t\t(LCORE_CACHE_SIZE - 1);\n \t\tfor (i = 0; i < RTE_MAX_LCORE; i++)\n@@ -473,9 +478,9 @@ rte_hash_count(const struct rte_hash *h)\n static inline void\n __hash_rw_writer_lock(const struct rte_hash *h)\n {\n-\tif (h->multi_writer_support && h->hw_trans_mem_support)\n+\tif (h->writer_takes_lock && h->hw_trans_mem_support)\n \t\trte_rwlock_write_lock_tm(h->readwrite_lock);\n-\telse if (h->multi_writer_support)\n+\telse if (h->writer_takes_lock)\n \t\trte_rwlock_write_lock(h->readwrite_lock);\n }\n \n@@ -491,9 +496,9 @@ __hash_rw_reader_lock(const struct rte_hash *h)\n static inline void\n __hash_rw_writer_unlock(const struct rte_hash *h)\n {\n-\tif (h->multi_writer_support && h->hw_trans_mem_support)\n+\tif (h->writer_takes_lock && h->hw_trans_mem_support)\n \t\trte_rwlock_write_unlock_tm(h->readwrite_lock);\n-\telse if (h->multi_writer_support)\n+\telse if (h->writer_takes_lock)\n \t\trte_rwlock_write_unlock(h->readwrite_lock);\n }\n \n@@ -532,7 +537,7 @@ rte_hash_reset(struct rte_hash *h)\n \t}\n \n \t/* Repopulate the free slots ring. Entry zero is reserved for key misses */\n-\tif (h->multi_writer_support)\n+\tif (h->use_local_cache)\n \t\ttot_ring_cnt = h->entries + (RTE_MAX_LCORE - 1) *\n \t\t\t\t\t(LCORE_CACHE_SIZE - 1);\n \telse\n@@ -548,7 +553,7 @@ rte_hash_reset(struct rte_hash *h)\n \t\t\t\t\t\t(void *)((uintptr_t) i));\n \t}\n \n-\tif (h->multi_writer_support) {\n+\tif (h->use_local_cache) {\n \t\t/* Reset local caches per lcore */\n \t\tfor (i = 0; i < RTE_MAX_LCORE; i++)\n \t\t\th->local_free_slots[i].len = 0;\n@@ -566,7 +571,7 @@ enqueue_slot_back(const struct rte_hash *h,\n \t\tstruct lcore_cache *cached_free_slots,\n \t\tvoid *slot_id)\n {\n-\tif (h->multi_writer_support) {\n+\tif (h->use_local_cache) {\n \t\tcached_free_slots->objs[cached_free_slots->len] = slot_id;\n \t\tcached_free_slots->len++;\n \t} else\n@@ -848,7 +853,7 @@ __rte_hash_add_key_with_hash(const struct rte_hash *h, const void *key,\n \t__hash_rw_writer_unlock(h);\n \n \t/* Did not find a match, so get a new slot for storing the new key */\n-\tif (h->multi_writer_support) {\n+\tif (h->use_local_cache) {\n \t\tlcore_id = rte_lcore_id();\n \t\tcached_free_slots = &h->local_free_slots[lcore_id];\n \t\t/* Try to get a free slot from the local cache */\n@@ -1117,7 +1122,7 @@ remove_entry(const struct rte_hash *h, struct rte_hash_bucket *bkt, unsigned i)\n \tstruct lcore_cache *cached_free_slots;\n \n \tbkt->sig_current[i] = NULL_SIGNATURE;\n-\tif (h->multi_writer_support) {\n+\tif (h->use_local_cache) {\n \t\tlcore_id = rte_lcore_id();\n \t\tcached_free_slots = &h->local_free_slots[lcore_id];\n \t\t/* Cache full, need to free it. */\ndiff --git a/lib/librte_hash/rte_cuckoo_hash.h b/lib/librte_hash/rte_cuckoo_hash.h\nindex 7753cd8..8c522ac 100644\n--- a/lib/librte_hash/rte_cuckoo_hash.h\n+++ b/lib/librte_hash/rte_cuckoo_hash.h\n@@ -161,11 +161,15 @@ struct rte_hash {\n \t/**< Length of hash key. */\n \tuint8_t hw_trans_mem_support;\n \t/**< If hardware transactional memory is used. */\n-\tuint8_t multi_writer_support;\n-\t/**< If multi-writer support is enabled. */\n+\tuint8_t use_local_cache;\n+\t/**< If multi-writer support is enabled, use local cache\n+\t * to allocate key-store slots.\n+\t */\n \tuint8_t readwrite_concur_support;\n \t/**< If read-write concurrency support is enabled */\n \tuint8_t ext_table_support; /**< Enable extendable bucket table */\n+\tuint8_t writer_takes_lock;\n+\t/**< Indicates if the writer threads need to take lock */\n \trte_hash_function hash_func; /**< Function used to calculate hash. */\n \tuint32_t hash_func_init_val; /**< Init value used by hash_func. */\n \trte_hash_cmp_eq_t rte_hash_custom_cmp_eq;\ndiff --git a/test/test/test_hash_readwrite.c b/test/test/test_hash_readwrite.c\nindex 2a4f7b9..a8fadd0 100644\n--- a/test/test/test_hash_readwrite.c\n+++ b/test/test/test_hash_readwrite.c\n@@ -122,10 +122,12 @@ init_params(int use_htm, int use_jhash)\n \tif (use_htm)\n \t\thash_params.extra_flag =\n \t\t\tRTE_HASH_EXTRA_FLAGS_TRANS_MEM_SUPPORT |\n-\t\t\tRTE_HASH_EXTRA_FLAGS_RW_CONCURRENCY;\n+\t\t\tRTE_HASH_EXTRA_FLAGS_RW_CONCURRENCY |\n+\t\t\tRTE_HASH_EXTRA_FLAGS_MULTI_WRITER_ADD;\n \telse\n \t\thash_params.extra_flag =\n-\t\t\tRTE_HASH_EXTRA_FLAGS_RW_CONCURRENCY;\n+\t\t\tRTE_HASH_EXTRA_FLAGS_RW_CONCURRENCY |\n+\t\t\tRTE_HASH_EXTRA_FLAGS_MULTI_WRITER_ADD;\n \n \thash_params.name = \"tests\";\n \n", "prefixes": [ "v6", "1/5" ] }