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GET /api/patches/45699/?format=api
{ "id": 45699, "url": "https://patches.dpdk.org/api/patches/45699/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1538275984-38043-1-git-send-email-xiaoyun.li@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1538275984-38043-1-git-send-email-xiaoyun.li@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1538275984-38043-1-git-send-email-xiaoyun.li@intel.com", "date": "2018-09-30T02:53:04", "name": "[v3] doc: add known issue about legacy intr mode for ixgbe", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9a620bf5350407ca6071eb8bb66541ebc99d23c9", "submitter": { "id": 798, "url": "https://patches.dpdk.org/api/people/798/?format=api", "name": "Li, Xiaoyun", "email": "xiaoyun.li@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1538275984-38043-1-git-send-email-xiaoyun.li@intel.com/mbox/", "series": [ { "id": 1604, "url": "https://patches.dpdk.org/api/series/1604/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=1604", "date": "2018-09-30T02:53:04", "name": "[v3] doc: add known issue about legacy intr mode for ixgbe", "version": 3, "mbox": "https://patches.dpdk.org/series/1604/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/45699/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/45699/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id E63591B106;\n\tSun, 30 Sep 2018 05:09:48 +0200 (CEST)", "from mga09.intel.com (mga09.intel.com [134.134.136.24])\n\tby dpdk.org (Postfix) with ESMTP id 62D661B100\n\tfor <dev@dpdk.org>; Sun, 30 Sep 2018 05:09:46 +0200 (CEST)", "from orsmga007.jf.intel.com ([10.7.209.58])\n\tby orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384;\n\t29 Sep 2018 20:09:46 -0700", "from dpdk-xiaoyunl.sh.intel.com ([10.67.110.231])\n\tby orsmga007.jf.intel.com with ESMTP; 29 Sep 2018 20:09:20 -0700" ], "X-Amp-Result": "SKIPPED(no attachment in message)", "X-Amp-File-Uploaded": "False", "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.54,322,1534834800\"; d=\"scan'208\";a=\"77232704\"", "From": "Xiaoyun Li <xiaoyun.li@intel.com>", "To": "beilei.xing@intel.com, qi.z.zhang@intel.com, dev@dpdk.org,\n\twenzhuo.lu@intel.com, jingjing.wu@intel.com", "Cc": "Xiaoyun Li <xiaoyun.li@intel.com>", "Date": "Sat, 29 Sep 2018 22:53:04 -0400", "Message-Id": "<1538275984-38043-1-git-send-email-xiaoyun.li@intel.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1538039797-43828-1-git-send-email-xiaoyun.li@intel.com>", "References": "<1538039797-43828-1-git-send-email-xiaoyun.li@intel.com>", "Subject": "[dpdk-dev] [PATCH v3] doc: add known issue about legacy intr mode\n\tfor ixgbe", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "When using uio_pci_generic module or using legacy interrupt mode of\nigb_uio or vfio, X550 cannot get interrupts. Because the Interrupt\nStatus bit is not implemented, then the irq cannot be handled correctly\nand cannot report the event fd to DPDK apps.\n\nAdd this hw limitation and details into ixgbe known issue.\n\nSigned-off-by: Xiaoyun Li <xiaoyun.li@intel.com>\n---\nv3:\n * Correct a misspelling.\nv2:\n * Correct the link of X550 spec update.\n * Polish the known issue title.\n---\n doc/guides/nics/ixgbe.rst | 26 ++++++++++++++++++++++++++\n 1 file changed, 26 insertions(+)", "diff": "diff --git a/doc/guides/nics/ixgbe.rst b/doc/guides/nics/ixgbe.rst\nindex 16d6390..af4c876 100644\n--- a/doc/guides/nics/ixgbe.rst\n+++ b/doc/guides/nics/ixgbe.rst\n@@ -200,6 +200,32 @@ There is no RTE API to add a VF's MAC address from the PF. On ixgbe, the\n ``rte_eth_dev_mac_addr_add()`` function can be used to add a VF's MAC address,\n as a workaround.\n \n+X550 does not support legacy interrupt mode\n+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~\n+\n+Desccription\n+^^^^^^^^^^^^\n+X550 cannot get interrupts if using ``uio_pci_generic`` module or using legacy\n+interrupt mode of ``igb_uio`` or ``vfio``. Because the errata of X550 states\n+that the Interrupt Status bit is not implemented. The errata is the item #22\n+from `X550 spec update <https://www.intel.com/content/dam/www/public/us/en/\n+documents/specification-updates/ethernet-x550-spec-update.pdf>`_\n+\n+Implication\n+^^^^^^^^^^^\n+When using ``uio_pci_generic`` module or using legacy interrupt mode of\n+``igb_uio`` or ``vfio``, the Interrupt Status bit would be checked if the\n+interrupt is coming. Since the bit is not implemented in X550, the irq cannot\n+be handled correctly and cannot report the event fd to DPDK apps. Then apps\n+cannot get interrupts and ``dmesg`` will show messages like ``irq #No.: ``\n+``nobody cared.``\n+\n+Workaround\n+^^^^^^^^^^\n+Do not bind the ``uio_pci_generic`` module in X550 NICs.\n+Do not bind ``igb_uio`` with legacy mode in X550 NICs.\n+Before using ``vfio`` with legacy mode in X550 NICs, using ``modprobe vfio ``\n+``nointxmask=1`` to bind ``vfio``.\n \n Inline crypto processing support\n --------------------------------\n", "prefixes": [ "v3" ] }