Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/35948/?format=api
{ "id": 35948, "url": "https://patches.dpdk.org/api/patches/35948/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/64cbab88a6f0af969384be218dbf69521db7d8b4.1520720053.git.rahul.lakkireddy@chelsio.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<64cbab88a6f0af969384be218dbf69521db7d8b4.1520720053.git.rahul.lakkireddy@chelsio.com>", "list_archive_url": "https://inbox.dpdk.org/dev/64cbab88a6f0af969384be218dbf69521db7d8b4.1520720053.git.rahul.lakkireddy@chelsio.com", "date": "2018-03-10T22:48:25", "name": "[dpdk-dev,07/13] cxgbe: update TX and RX path for VF", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "06febed820df47a221d49a9c321562d21f1ff7ab", "submitter": { "id": 241, "url": "https://patches.dpdk.org/api/people/241/?format=api", "name": "Rahul Lakkireddy", "email": "rahul.lakkireddy@chelsio.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/64cbab88a6f0af969384be218dbf69521db7d8b4.1520720053.git.rahul.lakkireddy@chelsio.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/35948/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/35948/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [127.0.0.1])\n\tby dpdk.org (Postfix) with ESMTP id 8803EAAC3;\n\tSat, 10 Mar 2018 23:49:49 +0100 (CET)", "from stargate.chelsio.com (stargate.chelsio.com [12.32.117.8])\n\tby dpdk.org (Postfix) with ESMTP id 67030AAA4\n\tfor <dev@dpdk.org>; Sat, 10 Mar 2018 23:49:47 +0100 (CET)", "from localhost (scalar.blr.asicdesigners.com [10.193.185.94])\n\tby stargate.chelsio.com (8.13.8/8.13.8) with ESMTP id w2AMngBM014060; \n\tSat, 10 Mar 2018 14:49:43 -0800" ], "From": "Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>", "To": "dev@dpdk.org", "Cc": "kumaras@chelsio.com, nirranjan@chelsio.com, indranil@chelsio.com", "Date": "Sun, 11 Mar 2018 04:18:25 +0530", "Message-Id": "<64cbab88a6f0af969384be218dbf69521db7d8b4.1520720053.git.rahul.lakkireddy@chelsio.com>", "X-Mailer": "git-send-email 2.5.3", "In-Reply-To": [ "<cover.1520720053.git.rahul.lakkireddy@chelsio.com>", "<cover.1520720053.git.rahul.lakkireddy@chelsio.com>" ], "References": [ "<cover.1520720053.git.rahul.lakkireddy@chelsio.com>", "<cover.1520720053.git.rahul.lakkireddy@chelsio.com>" ], "Subject": "[dpdk-dev] [PATCH 07/13] cxgbe: update TX and RX path for VF", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Kumar Sanghvi <kumaras@chelsio.com>\n\nOn TX path, add fw_eth_tx_pkt_vm_wr to transmit packets over VF.\nUse is_pf4() to correctly calculate the work request size and\noffsets within the work request. On RX path, use pktshift to adjust\ndata offset within the mbuf.\n\nSigned-off-by: Kumar Sanghvi <kumaras@chelsio.com>\nSigned-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>\n---\n drivers/net/cxgbe/base/adapter.h | 5 ++\n drivers/net/cxgbe/base/t4fw_interface.h | 25 ++++++\n drivers/net/cxgbe/cxgbe_ethdev.c | 8 +-\n drivers/net/cxgbe/cxgbe_pfvf.h | 4 +\n drivers/net/cxgbe/cxgbevf_ethdev.c | 4 +-\n drivers/net/cxgbe/sge.c | 139 +++++++++++++++++++++++++-------\n 6 files changed, 149 insertions(+), 36 deletions(-)", "diff": "diff --git a/drivers/net/cxgbe/base/adapter.h b/drivers/net/cxgbe/base/adapter.h\nindex 95752d1b4..fcea4055a 100644\n--- a/drivers/net/cxgbe/base/adapter.h\n+++ b/drivers/net/cxgbe/base/adapter.h\n@@ -198,6 +198,7 @@ struct sge_eth_rxq { /* a SW Ethernet Rx queue */\n * scenario where a packet needs 32 bytes.\n */\n #define ETH_COALESCE_PKT_NUM 15\n+#define ETH_COALESCE_VF_PKT_NUM 7\n #define ETH_COALESCE_PKT_PER_DESC 2\n \n struct tx_eth_coal_desc {\n@@ -227,6 +228,10 @@ struct eth_coalesce {\n \tunsigned int len;\n \tunsigned int flits;\n \tunsigned int max;\n+\t__u8 ethmacdst[ETHER_ADDR_LEN];\n+\t__u8 ethmacsrc[ETHER_ADDR_LEN];\n+\t__be16 ethtype;\n+\t__be16 vlantci;\n };\n \n struct sge_txq {\ndiff --git a/drivers/net/cxgbe/base/t4fw_interface.h b/drivers/net/cxgbe/base/t4fw_interface.h\nindex 3a89814ff..274f00b95 100644\n--- a/drivers/net/cxgbe/base/t4fw_interface.h\n+++ b/drivers/net/cxgbe/base/t4fw_interface.h\n@@ -84,6 +84,8 @@ enum fw_memtype {\n enum fw_wr_opcodes {\n \tFW_ETH_TX_PKT_WR\t= 0x08,\n \tFW_ETH_TX_PKTS_WR\t= 0x09,\n+\tFW_ETH_TX_PKT_VM_WR\t= 0x11,\n+\tFW_ETH_TX_PKTS_VM_WR\t= 0x12,\n \tFW_ETH_TX_PKTS2_WR = 0x78,\n };\n \n@@ -146,6 +148,29 @@ struct fw_eth_tx_pkts_wr {\n \t__u8 type;\n };\n \n+struct fw_eth_tx_pkt_vm_wr {\n+\t__be32 op_immdlen;\n+\t__be32 equiq_to_len16;\n+\t__be32 r3[2];\n+\t__u8 ethmacdst[6];\n+\t__u8 ethmacsrc[6];\n+\t__be16 ethtype;\n+\t__be16 vlantci;\n+};\n+\n+struct fw_eth_tx_pkts_vm_wr {\n+\t__be32 op_pkd;\n+\t__be32 equiq_to_len16;\n+\t__be32 r3;\n+\t__be16 plen;\n+\t__u8 npkt;\n+\t__u8 r4;\n+\t__u8 ethmacdst[6];\n+\t__u8 ethmacsrc[6];\n+\t__be16 ethtype;\n+\t__be16 vlantci;\n+};\n+\n /******************************************************************************\n * C O M M A N D s\n *********************/\ndiff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_ethdev.c\nindex 16031f38d..e84facd33 100644\n--- a/drivers/net/cxgbe/cxgbe_ethdev.c\n+++ b/drivers/net/cxgbe/cxgbe_ethdev.c\n@@ -86,8 +86,8 @@\n */\n #include \"t4_pci_id_tbl.h\"\n \n-static uint16_t cxgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n-\t\t\t\tuint16_t nb_pkts)\n+uint16_t cxgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t\t uint16_t nb_pkts)\n {\n \tstruct sge_eth_txq *txq = (struct sge_eth_txq *)tx_queue;\n \tuint16_t pkts_sent, pkts_remain;\n@@ -120,8 +120,8 @@ static uint16_t cxgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \treturn total_sent;\n }\n \n-static uint16_t cxgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n-\t\t\t\tuint16_t nb_pkts)\n+uint16_t cxgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t\t uint16_t nb_pkts)\n {\n \tstruct sge_eth_rxq *rxq = (struct sge_eth_rxq *)rx_queue;\n \tunsigned int work_done;\ndiff --git a/drivers/net/cxgbe/cxgbe_pfvf.h b/drivers/net/cxgbe/cxgbe_pfvf.h\nindex e3d8533ca..19bfd6d92 100644\n--- a/drivers/net/cxgbe/cxgbe_pfvf.h\n+++ b/drivers/net/cxgbe/cxgbe_pfvf.h\n@@ -34,5 +34,9 @@ int cxgbe_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu);\n int cxgbe_dev_start(struct rte_eth_dev *eth_dev);\n int cxgbe_dev_link_update(struct rte_eth_dev *eth_dev,\n \t\t\t int wait_to_complete);\n+uint16_t cxgbe_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t\t\t uint16_t nb_pkts);\n+uint16_t cxgbe_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,\n+\t\t\t uint16_t nb_pkts);\n const uint32_t *cxgbe_dev_supported_ptypes_get(struct rte_eth_dev *eth_dev);\n #endif /* _CXGBE_PFVF_H_ */\ndiff --git a/drivers/net/cxgbe/cxgbevf_ethdev.c b/drivers/net/cxgbe/cxgbevf_ethdev.c\nindex 3b1deac52..a96630341 100644\n--- a/drivers/net/cxgbe/cxgbevf_ethdev.c\n+++ b/drivers/net/cxgbe/cxgbevf_ethdev.c\n@@ -68,8 +68,8 @@ static int eth_cxgbevf_dev_init(struct rte_eth_dev *eth_dev)\n \tCXGBE_FUNC_TRACE();\n \n \teth_dev->dev_ops = &cxgbevf_eth_dev_ops;\n-\teth_dev->rx_pkt_burst = NULL;\n-\teth_dev->tx_pkt_burst = NULL;\n+\teth_dev->rx_pkt_burst = &cxgbe_recv_pkts;\n+\teth_dev->tx_pkt_burst = &cxgbe_xmit_pkts;\n \tpci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);\n \n \t/* for secondary processes, we attach to ethdevs allocated by primary\ndiff --git a/drivers/net/cxgbe/sge.c b/drivers/net/cxgbe/sge.c\nindex aba1a49f3..54e13fb9a 100644\n--- a/drivers/net/cxgbe/sge.c\n+++ b/drivers/net/cxgbe/sge.c\n@@ -337,7 +337,11 @@ static inline void ring_fl_db(struct adapter *adap, struct sge_fl *q)\n \t\t * mechanism.\n \t\t */\n \t\tif (unlikely(!q->bar2_addr)) {\n-\t\t\tt4_write_reg_relaxed(adap, MYPF_REG(A_SGE_PF_KDOORBELL),\n+\t\t\tu32 reg = is_pf4(adap) ? MYPF_REG(A_SGE_PF_KDOORBELL) :\n+\t\t\t\t\t\t T4VF_SGE_BASE_ADDR +\n+\t\t\t\t\t\t A_SGE_VF_KDOORBELL;\n+\n+\t\t\tt4_write_reg_relaxed(adap, reg,\n \t\t\t\t\t val | V_QID(q->cntxt_id));\n \t\t} else {\n \t\t\twritel_relaxed(val | V_QID(q->bar2_qid),\n@@ -570,12 +574,16 @@ static inline int is_eth_imm(const struct rte_mbuf *m)\n /**\n * calc_tx_flits - calculate the number of flits for a packet Tx WR\n * @m: the packet\n+ * @adap: adapter structure pointer\n *\n * Returns the number of flits needed for a Tx WR for the given Ethernet\n * packet, including the needed WR and CPL headers.\n */\n-static inline unsigned int calc_tx_flits(const struct rte_mbuf *m)\n+static inline unsigned int calc_tx_flits(const struct rte_mbuf *m,\n+\t\t\t\t\t struct adapter *adap)\n {\n+\tsize_t wr_size = is_pf4(adap) ? sizeof(struct fw_eth_tx_pkt_wr) :\n+\t\t\t\t\tsizeof(struct fw_eth_tx_pkt_vm_wr);\n \tunsigned int flits;\n \tint hdrlen;\n \n@@ -600,11 +608,10 @@ static inline unsigned int calc_tx_flits(const struct rte_mbuf *m)\n \t */\n \tflits = sgl_len(m->nb_segs);\n \tif (m->tso_segsz)\n-\t\tflits += (sizeof(struct fw_eth_tx_pkt_wr) +\n-\t\t\t sizeof(struct cpl_tx_pkt_lso_core) +\n+\t\tflits += (wr_size + sizeof(struct cpl_tx_pkt_lso_core) +\n \t\t\t sizeof(struct cpl_tx_pkt_core)) / sizeof(__be64);\n \telse\n-\t\tflits += (sizeof(struct fw_eth_tx_pkt_wr) +\n+\t\tflits += (wr_size +\n \t\t\t sizeof(struct cpl_tx_pkt_core)) / sizeof(__be64);\n \treturn flits;\n }\n@@ -848,14 +855,20 @@ static void tx_timer_cb(void *data)\n static inline void ship_tx_pkt_coalesce_wr(struct adapter *adap,\n \t\t\t\t\t struct sge_eth_txq *txq)\n {\n-\tu32 wr_mid;\n-\tstruct sge_txq *q = &txq->q;\n+\tstruct fw_eth_tx_pkts_vm_wr *vmwr;\n+\tconst size_t fw_hdr_copy_len = (sizeof(vmwr->ethmacdst) +\n+\t\t\t\t\tsizeof(vmwr->ethmacsrc) +\n+\t\t\t\t\tsizeof(vmwr->ethtype) +\n+\t\t\t\t\tsizeof(vmwr->vlantci));\n \tstruct fw_eth_tx_pkts_wr *wr;\n+\tstruct sge_txq *q = &txq->q;\n \tunsigned int ndesc;\n+\tu32 wr_mid;\n \n \t/* fill the pkts WR header */\n \twr = (void *)&q->desc[q->pidx];\n \twr->op_pkd = htonl(V_FW_WR_OP(FW_ETH_TX_PKTS2_WR));\n+\tvmwr = (void *)&q->desc[q->pidx];\n \n \twr_mid = V_FW_WR_LEN16(DIV_ROUND_UP(q->coalesce.flits, 2));\n \tndesc = flits_to_desc(q->coalesce.flits);\n@@ -863,12 +876,18 @@ static inline void ship_tx_pkt_coalesce_wr(struct adapter *adap,\n \twr->plen = cpu_to_be16(q->coalesce.len);\n \twr->npkt = q->coalesce.idx;\n \twr->r3 = 0;\n-\twr->type = q->coalesce.type;\n+\tif (is_pf4(adap)) {\n+\t\twr->op_pkd = htonl(V_FW_WR_OP(FW_ETH_TX_PKTS2_WR));\n+\t\twr->type = q->coalesce.type;\n+\t} else {\n+\t\twr->op_pkd = htonl(V_FW_WR_OP(FW_ETH_TX_PKTS_VM_WR));\n+\t\tvmwr->r4 = 0;\n+\t\tmemcpy((void *)vmwr->ethmacdst, (void *)q->coalesce.ethmacdst,\n+\t\t fw_hdr_copy_len);\n+\t}\n \n \t/* zero out coalesce structure members */\n-\tq->coalesce.idx = 0;\n-\tq->coalesce.flits = 0;\n-\tq->coalesce.len = 0;\n+\tmemset((void *)&q->coalesce, 0, sizeof(struct eth_coalesce));\n \n \ttxq_advance(q, ndesc);\n \ttxq->stats.coal_wr++;\n@@ -896,13 +915,27 @@ static inline int should_tx_packet_coalesce(struct sge_eth_txq *txq,\n \t\t\t\t\t unsigned int *nflits,\n \t\t\t\t\t struct adapter *adap)\n {\n+\tstruct fw_eth_tx_pkts_vm_wr *wr;\n+\tconst size_t fw_hdr_copy_len = (sizeof(wr->ethmacdst) +\n+\t\t\t\t\tsizeof(wr->ethmacsrc) +\n+\t\t\t\t\tsizeof(wr->ethtype) +\n+\t\t\t\t\tsizeof(wr->vlantci));\n \tstruct sge_txq *q = &txq->q;\n \tunsigned int flits, ndesc;\n \tunsigned char type = 0;\n-\tint credits;\n+\tint credits, wr_size;\n \n \t/* use coal WR type 1 when no frags are present */\n \ttype = (mbuf->nb_segs == 1) ? 1 : 0;\n+\tif (!is_pf4(adap)) {\n+\t\tif (!type)\n+\t\t\treturn 0;\n+\n+\t\tif (q->coalesce.idx && memcmp((void *)q->coalesce.ethmacdst,\n+\t\t\t\t\t rte_pktmbuf_mtod(mbuf, void *),\n+\t\t\t\t\t fw_hdr_copy_len))\n+\t\t\tship_tx_pkt_coalesce_wr(adap, txq);\n+\t}\n \n \tif (unlikely(type != q->coalesce.type && q->coalesce.idx))\n \t\tship_tx_pkt_coalesce_wr(adap, txq);\n@@ -948,16 +981,21 @@ static inline int should_tx_packet_coalesce(struct sge_eth_txq *txq,\n \n new:\n \t/* start a new pkts WR, the WR header is not filled below */\n-\tflits += sizeof(struct fw_eth_tx_pkts_wr) / sizeof(__be64);\n+\twr_size = is_pf4(adap) ? sizeof(struct fw_eth_tx_pkts_wr) :\n+\t\t\t\t sizeof(struct fw_eth_tx_pkts_vm_wr);\n+\tflits += wr_size / sizeof(__be64);\n \tndesc = flits_to_desc(q->coalesce.flits + flits);\n \tcredits = txq_avail(q) - ndesc;\n \n \tif (unlikely(credits < 0 || wraps_around(q, ndesc)))\n \t\treturn 0;\n-\tq->coalesce.flits += 2;\n+\tq->coalesce.flits += wr_size / sizeof(__be64);\n \tq->coalesce.type = type;\n \tq->coalesce.ptr = (unsigned char *)&q->desc[q->pidx] +\n-\t\t\t 2 * sizeof(__be64);\n+\t\t\t q->coalesce.flits * sizeof(__be64);\n+\tif (!is_pf4(adap))\n+\t\tmemcpy((void *)q->coalesce.ethmacdst,\n+\t\t rte_pktmbuf_mtod(mbuf, void *), fw_hdr_copy_len);\n \treturn 1;\n }\n \n@@ -987,6 +1025,8 @@ static inline int tx_do_packet_coalesce(struct sge_eth_txq *txq,\n \tstruct cpl_tx_pkt_core *cpl;\n \tstruct tx_sw_desc *sd;\n \tunsigned int idx = q->coalesce.idx, len = mbuf->pkt_len;\n+\tunsigned int max_coal_pkt_num = is_pf4(adap) ? ETH_COALESCE_PKT_NUM :\n+\t\t\t\t\t\t ETH_COALESCE_VF_PKT_NUM;\n \n #ifdef RTE_LIBRTE_CXGBE_TPUT\n \tRTE_SET_USED(nb_pkts);\n@@ -1030,9 +1070,12 @@ static inline int tx_do_packet_coalesce(struct sge_eth_txq *txq,\n \t\tcntrl |= F_TXPKT_VLAN_VLD | V_TXPKT_VLAN(mbuf->vlan_tci);\n \t}\n \n-\tcpl->ctrl0 = htonl(V_TXPKT_OPCODE(CPL_TX_PKT_XT) |\n-\t\t\t V_TXPKT_INTF(pi->tx_chan) |\n-\t\t\t V_TXPKT_PF(adap->pf));\n+\tcpl->ctrl0 = htonl(V_TXPKT_OPCODE(CPL_TX_PKT_XT));\n+\tif (is_pf4(adap))\n+\t\tcpl->ctrl0 |= htonl(V_TXPKT_INTF(pi->tx_chan) |\n+\t\t\t\t V_TXPKT_PF(adap->pf));\n+\telse\n+\t\tcpl->ctrl0 |= htonl(V_TXPKT_INTF(pi->port_id));\n \tcpl->pack = htons(0);\n \tcpl->len = htons(len);\n \tcpl->ctrl1 = cpu_to_be64(cntrl);\n@@ -1061,7 +1104,7 @@ static inline int tx_do_packet_coalesce(struct sge_eth_txq *txq,\n \tsd->coalesce.idx = (idx & 1) + 1;\n \n \t/* send the coaelsced work request if max reached */\n-\tif (++q->coalesce.idx == ETH_COALESCE_PKT_NUM\n+\tif (++q->coalesce.idx == max_coal_pkt_num\n #ifndef RTE_LIBRTE_CXGBE_TPUT\n \t || q->coalesce.idx >= nb_pkts\n #endif\n@@ -1085,6 +1128,7 @@ int t4_eth_xmit(struct sge_eth_txq *txq, struct rte_mbuf *mbuf,\n \tstruct adapter *adap;\n \tstruct rte_mbuf *m = mbuf;\n \tstruct fw_eth_tx_pkt_wr *wr;\n+\tstruct fw_eth_tx_pkt_vm_wr *vmwr;\n \tstruct cpl_tx_pkt_core *cpl;\n \tstruct tx_sw_desc *d;\n \tdma_addr_t addr[m->nb_segs];\n@@ -1141,7 +1185,7 @@ int t4_eth_xmit(struct sge_eth_txq *txq, struct rte_mbuf *mbuf,\n \tif (txq->q.coalesce.idx)\n \t\tship_tx_pkt_coalesce_wr(adap, txq);\n \n-\tflits = calc_tx_flits(m);\n+\tflits = calc_tx_flits(m, adap);\n \tndesc = flits_to_desc(flits);\n \tcredits = txq_avail(&txq->q) - ndesc;\n \n@@ -1163,31 +1207,55 @@ int t4_eth_xmit(struct sge_eth_txq *txq, struct rte_mbuf *mbuf,\n \t}\n \n \twr = (void *)&txq->q.desc[txq->q.pidx];\n+\tvmwr = (void *)&txq->q.desc[txq->q.pidx];\n \twr->equiq_to_len16 = htonl(wr_mid);\n-\twr->r3 = rte_cpu_to_be_64(0);\n-\tend = (u64 *)wr + flits;\n+\tif (is_pf4(adap)) {\n+\t\twr->r3 = rte_cpu_to_be_64(0);\n+\t\tend = (u64 *)wr + flits;\n+\t} else {\n+\t\tconst size_t fw_hdr_copy_len = (sizeof(vmwr->ethmacdst) +\n+\t\t\t\t\t\tsizeof(vmwr->ethmacsrc) +\n+\t\t\t\t\t\tsizeof(vmwr->ethtype) +\n+\t\t\t\t\t\tsizeof(vmwr->vlantci));\n+\n+\t\tvmwr->r3[0] = rte_cpu_to_be_32(0);\n+\t\tvmwr->r3[1] = rte_cpu_to_be_32(0);\n+\t\tmemcpy((void *)vmwr->ethmacdst, rte_pktmbuf_mtod(m, void *),\n+\t\t fw_hdr_copy_len);\n+\t\tend = (u64 *)vmwr + flits;\n+\t}\n \n \tlen = 0;\n \tlen += sizeof(*cpl);\n \n \t/* Coalescing skipped and we send through normal path */\n \tif (!(m->ol_flags & PKT_TX_TCP_SEG)) {\n-\t\twr->op_immdlen = htonl(V_FW_WR_OP(FW_ETH_TX_PKT_WR) |\n+\t\twr->op_immdlen = htonl(V_FW_WR_OP(is_pf4(adap) ?\n+\t\t\t\t\t\t FW_ETH_TX_PKT_WR :\n+\t\t\t\t\t\t FW_ETH_TX_PKT_VM_WR) |\n \t\t\t\t V_FW_WR_IMMDLEN(len));\n-\t\tcpl = (void *)(wr + 1);\n+\t\tif (is_pf4(adap))\n+\t\t\tcpl = (void *)(wr + 1);\n+\t\telse\n+\t\t\tcpl = (void *)(vmwr + 1);\n \t\tif (m->ol_flags & PKT_TX_IP_CKSUM) {\n \t\t\tcntrl = hwcsum(adap->params.chip, m) |\n \t\t\t\tF_TXPKT_IPCSUM_DIS;\n \t\t\ttxq->stats.tx_cso++;\n \t\t}\n \t} else {\n-\t\tlso = (void *)(wr + 1);\n+\t\tif (is_pf4(adap))\n+\t\t\tlso = (void *)(wr + 1);\n+\t\telse\n+\t\t\tlso = (void *)(vmwr + 1);\n \t\tv6 = (m->ol_flags & PKT_TX_IPV6) != 0;\n \t\tl3hdr_len = m->l3_len;\n \t\tl4hdr_len = m->l4_len;\n \t\teth_xtra_len = m->l2_len - ETHER_HDR_LEN;\n \t\tlen += sizeof(*lso);\n-\t\twr->op_immdlen = htonl(V_FW_WR_OP(FW_ETH_TX_PKT_WR) |\n+\t\twr->op_immdlen = htonl(V_FW_WR_OP(is_pf4(adap) ?\n+\t\t\t\t\t\t FW_ETH_TX_PKT_WR :\n+\t\t\t\t\t\t FW_ETH_TX_PKT_VM_WR) |\n \t\t\t\t V_FW_WR_IMMDLEN(len));\n \t\tlso->lso_ctrl = htonl(V_LSO_OPCODE(CPL_TX_PKT_LSO) |\n \t\t\t\t F_LSO_FIRST_SLICE | F_LSO_LAST_SLICE |\n@@ -1221,9 +1289,14 @@ int t4_eth_xmit(struct sge_eth_txq *txq, struct rte_mbuf *mbuf,\n \t\tcntrl |= F_TXPKT_VLAN_VLD | V_TXPKT_VLAN(m->vlan_tci);\n \t}\n \n-\tcpl->ctrl0 = htonl(V_TXPKT_OPCODE(CPL_TX_PKT_XT) |\n-\t\t\t V_TXPKT_INTF(pi->tx_chan) |\n-\t\t\t V_TXPKT_PF(adap->pf));\n+\tcpl->ctrl0 = htonl(V_TXPKT_OPCODE(CPL_TX_PKT_XT));\n+\tif (is_pf4(adap))\n+\t\tcpl->ctrl0 |= htonl(V_TXPKT_INTF(pi->tx_chan) |\n+\t\t\t\t V_TXPKT_PF(adap->pf));\n+\telse\n+\t\tcpl->ctrl0 |= htonl(V_TXPKT_INTF(pi->port_id) |\n+\t\t\t\t V_TXPKT_PF(0));\n+\n \tcpl->pack = htons(0);\n \tcpl->len = htons(m->pkt_len);\n \tcpl->ctrl1 = cpu_to_be64(cntrl);\n@@ -1468,6 +1541,7 @@ static int process_responses(struct sge_rspq *q, int budget,\n \t\trsp_type = G_RSPD_TYPE(rc->u.type_gen);\n \n \t\tif (likely(rsp_type == X_RSPD_TYPE_FLBUF)) {\n+\t\t\tstruct sge *s = &q->adapter->sge;\n \t\t\tunsigned int stat_pidx;\n \t\t\tint stat_pidx_diff;\n \n@@ -1554,6 +1628,7 @@ static int process_responses(struct sge_rspq *q, int budget,\n \t\t\t\t\tpkt->vlan_tci = ntohs(cpl->vlan);\n \t\t\t\t}\n \n+\t\t\t\trte_pktmbuf_adj(pkt, s->pktshift);\n \t\t\t\trxq->stats.pkts++;\n \t\t\t\trxq->stats.rx_bytes += pkt->pkt_len;\n \t\t\t\trx_pkts[budget - budget_left] = pkt;\n@@ -1612,7 +1687,11 @@ int cxgbe_poll(struct sge_rspq *q, struct rte_mbuf **rx_pkts,\n \t\tval = V_CIDXINC(cidx_inc) | V_SEINTARM(params);\n \n \t\tif (unlikely(!q->bar2_addr)) {\n-\t\t\tt4_write_reg(q->adapter, MYPF_REG(A_SGE_PF_GTS),\n+\t\t\tu32 reg = is_pf4(q->adapter) ? MYPF_REG(A_SGE_PF_GTS) :\n+\t\t\t\t\t\t T4VF_SGE_BASE_ADDR +\n+\t\t\t\t\t\t A_SGE_VF_GTS;\n+\n+\t\t\tt4_write_reg(q->adapter, reg,\n \t\t\t\t val | V_INGRESSQID((u32)q->cntxt_id));\n \t\t} else {\n \t\t\twritel(val | V_INGRESSQID(q->bar2_qid),\n", "prefixes": [ "dpdk-dev", "07/13" ] }