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{
    "id": 28720,
    "url": "https://patches.dpdk.org/api/patches/28720/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20170914082651.26232-11-akhil.goyal@nxp.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
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    "msgid": "<20170914082651.26232-11-akhil.goyal@nxp.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20170914082651.26232-11-akhil.goyal@nxp.com",
    "date": "2017-09-14T08:26:50",
    "name": "[dpdk-dev,10/11] crypto/dpaa2_sec: add support for protocol offload ipsec",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "856821159159a74dbff0def172f956e8be98cfee",
    "submitter": {
        "id": 517,
        "url": "https://patches.dpdk.org/api/people/517/?format=api",
        "name": "Akhil Goyal",
        "email": "akhil.goyal@nxp.com"
    },
    "delegate": null,
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20170914082651.26232-11-akhil.goyal@nxp.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/28720/comments/",
    "check": "fail",
    "checks": "https://patches.dpdk.org/api/patches/28720/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Akhil Goyal <akhil.goyal@nxp.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<declan.doherty@intel.com>, <pablo.de.lara.guarch@intel.com>,\n\t<hemant.agrawal@nxp.com>, <radu.nicolau@intel.com>,\n\t<borisp@mellanox.com>, \n\t<aviadye@mellanox.com>, <thomas@monjalon.net>, <sandeep.malik@nxp.com>,\n\t<jerin.jacob@caviumnetworks.com>",
        "Date": "Thu, 14 Sep 2017 13:56:50 +0530",
        "Message-ID": "<20170914082651.26232-11-akhil.goyal@nxp.com>",
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        "References": "<20170914082651.26232-1-akhil.goyal@nxp.com>",
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        "Subject": "[dpdk-dev] [PATCH 10/11] crypto/dpaa2_sec: add support for protocol\n\toffload ipsec",
        "X-BeenThere": "dev@dpdk.org",
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        "Errors-To": "dev-bounces@dpdk.org",
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    },
    "content": "driver implementation to support rte_security APIs\n\nSigned-off-by: Akhil Goyal <akhil.goyal@nxp.com>\n---\n doc/guides/cryptodevs/features/dpaa2_sec.ini |   1 +\n drivers/crypto/Makefile                      |   2 +-\n drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c  | 402 ++++++++++++++++++++++++++-\n drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h    |  62 +++++\n 4 files changed, 455 insertions(+), 12 deletions(-)",
    "diff": "diff --git a/doc/guides/cryptodevs/features/dpaa2_sec.ini b/doc/guides/cryptodevs/features/dpaa2_sec.ini\nindex c3bb3dd..8fd07d6 100644\n--- a/doc/guides/cryptodevs/features/dpaa2_sec.ini\n+++ b/doc/guides/cryptodevs/features/dpaa2_sec.ini\n@@ -7,6 +7,7 @@\n Symmetric crypto       = Y\n Sym operation chaining = Y\n HW Accelerated         = Y\n+Protocol offload       = Y\n \n ;\n ; Supported crypto algorithms of the 'dpaa2_sec' crypto driver.\ndiff --git a/drivers/crypto/Makefile b/drivers/crypto/Makefile\nindex 7a719b9..7340c8e 100644\n--- a/drivers/crypto/Makefile\n+++ b/drivers/crypto/Makefile\n@@ -54,6 +54,6 @@ DEPDIRS-zuc = $(core-libs)\n DIRS-$(CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO) += null\n DEPDIRS-null = $(core-libs)\n DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC) += dpaa2_sec\n-DEPDIRS-dpaa2_sec = $(core-libs)\n+DEPDIRS-dpaa2_sec = $(core-libs) librte_security\n \n include $(RTE_SDK)/mk/rte.subdir.mk\ndiff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\nindex e0f6cfc..6717ff7 100644\n--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\n+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\n@@ -36,6 +36,7 @@\n \n #include <rte_mbuf.h>\n #include <rte_cryptodev.h>\n+#include <rte_security_driver.h>\n #include <rte_malloc.h>\n #include <rte_memcpy.h>\n #include <rte_string_fns.h>\n@@ -73,12 +74,44 @@\n #define FLE_POOL_NUM_BUFS\t32000\n #define FLE_POOL_BUF_SIZE\t256\n #define FLE_POOL_CACHE_SIZE\t512\n+#define SEC_FLC_DHR_OUTBOUND\t-114\n+#define SEC_FLC_DHR_INBOUND\t0\n \n enum rta_sec_era rta_sec_era = RTA_SEC_ERA_8;\n \n static uint8_t cryptodev_driver_id;\n \n static inline int\n+build_proto_fd(dpaa2_sec_session *sess,\n+\t       struct rte_crypto_op *op,\n+\t       struct qbman_fd *fd, uint16_t bpid)\n+{\n+\tstruct rte_crypto_sym_op *sym_op = op->sym;\n+\tstruct ctxt_priv *priv = sess->ctxt;\n+\tstruct sec_flow_context *flc;\n+\tstruct rte_mbuf *mbuf = sym_op->m_src;\n+\n+\tif (likely(bpid < MAX_BPID))\n+\t\tDPAA2_SET_FD_BPID(fd, bpid);\n+\telse\n+\t\tDPAA2_SET_FD_IVP(fd);\n+\n+\t/* Save the shared descriptor */\n+\tflc = &priv->flc_desc[0].flc;\n+\n+\tDPAA2_SET_FD_ADDR(fd, DPAA2_MBUF_VADDR_TO_IOVA(sym_op->m_src));\n+\tDPAA2_SET_FD_OFFSET(fd, sym_op->m_src->data_off);\n+\tDPAA2_SET_FD_LEN(fd, sym_op->m_src->pkt_len);\n+\tDPAA2_SET_FD_FLC(fd, ((uint64_t)flc));\n+\n+\t/* save physical address of mbuf */\n+\top->sym->aead.digest.phys_addr = mbuf->buf_physaddr;\n+\tmbuf->buf_physaddr = (uint64_t)op;\n+\n+\treturn 0;\n+}\n+\n+static inline int\n build_authenc_gcm_fd(dpaa2_sec_session *sess,\n \t\t     struct rte_crypto_op *op,\n \t\t     struct qbman_fd *fd, uint16_t bpid)\n@@ -545,13 +578,23 @@ build_cipher_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,\n }\n \n static inline int\n-build_sec_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,\n+build_sec_fd(struct rte_crypto_op *op,\n \t     struct qbman_fd *fd, uint16_t bpid)\n {\n \tint ret = -1;\n+\tdpaa2_sec_session *sess;\n \n \tPMD_INIT_FUNC_TRACE();\n \n+\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION)\n+\t\tsess = (dpaa2_sec_session *)get_session_private_data(\n+\t\t\t\top->sym->session, cryptodev_driver_id);\n+\telse if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)\n+\t\tsess = (dpaa2_sec_session *)get_sec_session_private_data(\n+\t\t\t\top->sym->sec_session);\n+\telse\n+\t\treturn -1;\n+\n \tswitch (sess->ctxt_type) {\n \tcase DPAA2_SEC_CIPHER:\n \t\tret = build_cipher_fd(sess, op, fd, bpid);\n@@ -565,6 +608,9 @@ build_sec_fd(dpaa2_sec_session *sess, struct rte_crypto_op *op,\n \tcase DPAA2_SEC_CIPHER_HASH:\n \t\tret = build_authenc_fd(sess, op, fd, bpid);\n \t\tbreak;\n+\tcase DPAA2_SEC_IPSEC:\n+\t\tret = build_proto_fd(sess, op, fd, bpid);\n+\t\tbreak;\n \tcase DPAA2_SEC_HASH_CIPHER:\n \tdefault:\n \t\tRTE_LOG(ERR, PMD, \"error: Unsupported session\\n\");\n@@ -588,12 +634,11 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,\n \t/*todo - need to support multiple buffer pools */\n \tuint16_t bpid;\n \tstruct rte_mempool *mb_pool;\n-\tdpaa2_sec_session *sess;\n \n \tif (unlikely(nb_ops == 0))\n \t\treturn 0;\n \n-\tif (ops[0]->sess_type != RTE_CRYPTO_OP_WITH_SESSION) {\n+\tif (ops[0]->sess_type == RTE_CRYPTO_OP_SESSIONLESS) {\n \t\tRTE_LOG(ERR, PMD, \"sessionless crypto op not supported\\n\");\n \t\treturn 0;\n \t}\n@@ -618,13 +663,9 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,\n \t\tfor (loop = 0; loop < frames_to_send; loop++) {\n \t\t\t/*Clear the unused FD fields before sending*/\n \t\t\tmemset(&fd_arr[loop], 0, sizeof(struct qbman_fd));\n-\t\t\tsess = (dpaa2_sec_session *)\n-\t\t\t\t\tget_session_private_data(\n-\t\t\t\t\t(*ops)->sym->session,\n-\t\t\t\t\tcryptodev_driver_id);\n \t\t\tmb_pool = (*ops)->sym->m_src->pool;\n \t\t\tbpid = mempool_to_bpid(mb_pool);\n-\t\t\tret = build_sec_fd(sess, *ops, &fd_arr[loop], bpid);\n+\t\t\tret = build_sec_fd(*ops, &fd_arr[loop], bpid);\n \t\t\tif (ret) {\n \t\t\t\tPMD_DRV_LOG(ERR, \"error: Improper packet\"\n \t\t\t\t\t    \" contents for crypto operation\\n\");\n@@ -649,12 +690,44 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,\n }\n \n static inline struct rte_crypto_op *\n-sec_fd_to_mbuf(const struct qbman_fd *fd)\n+sec_simple_fd_to_mbuf(const struct qbman_fd *fd, __rte_unused uint8_t id)\n+{\n+\tstruct rte_crypto_op *op;\n+\tuint16_t len = DPAA2_GET_FD_LEN(fd);\n+\tuint16_t diff = 0;\n+\tdpaa2_sec_session *sess_priv;\n+\n+\tstruct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(\n+\t\tDPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)),\n+\t\trte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);\n+\n+\top = (struct rte_crypto_op *)mbuf->buf_physaddr;\n+\tmbuf->buf_physaddr = op->sym->aead.digest.phys_addr;\n+\top->sym->aead.digest.phys_addr = 0L;\n+\n+\tsess_priv = (dpaa2_sec_session *)get_sec_session_private_data(\n+\t\t\t\top->sym->sec_session);\n+\tif (sess_priv->dir == DIR_ENC)\n+\t\tmbuf->data_off += SEC_FLC_DHR_OUTBOUND;\n+\telse\n+\t\tmbuf->data_off += SEC_FLC_DHR_INBOUND;\n+\tdiff = len - mbuf->pkt_len;\n+\tmbuf->pkt_len += diff;\n+\tmbuf->data_len += diff;\n+\n+\treturn op;\n+}\n+\n+static inline struct rte_crypto_op *\n+sec_fd_to_mbuf(const struct qbman_fd *fd, uint8_t driver_id)\n {\n \tstruct qbman_fle *fle;\n \tstruct rte_crypto_op *op;\n \tstruct ctxt_priv *priv;\n \n+\tif (DPAA2_FD_GET_FORMAT(fd) == qbman_fd_single)\n+\t\treturn sec_simple_fd_to_mbuf(fd, driver_id);\n+\n \tfle = (struct qbman_fle *)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));\n \n \tPMD_RX_LOG(DEBUG, \"FLE addr = %x - %x, offset = %x\",\n@@ -701,6 +774,8 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,\n {\n \t/* Function is responsible to receive frames for a given device and VQ*/\n \tstruct dpaa2_sec_qp *dpaa2_qp = (struct dpaa2_sec_qp *)qp;\n+\tstruct rte_cryptodev *dev =\n+\t\t\t(struct rte_cryptodev *)(dpaa2_qp->rx_vq.dev);\n \tstruct qbman_result *dq_storage;\n \tuint32_t fqid = dpaa2_qp->rx_vq.fqid;\n \tint ret, num_rx = 0;\n@@ -770,7 +845,7 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,\n \t\t}\n \n \t\tfd = qbman_result_DQ_fd(dq_storage);\n-\t\tops[num_rx] = sec_fd_to_mbuf(fd);\n+\t\tops[num_rx] = sec_fd_to_mbuf(fd, dev->driver_id);\n \n \t\tif (unlikely(fd->simple.frc)) {\n \t\t\t/* TODO Parse SEC errors */\n@@ -1547,6 +1622,293 @@ dpaa2_sec_set_session_parameters(struct rte_cryptodev *dev,\n }\n \n static int\n+dpaa2_sec_set_ipsec_session(struct rte_cryptodev *dev,\n+\t\t\t    struct rte_security_session_conf *conf,\n+\t\t\t    void *sess)\n+{\n+\tstruct rte_security_ipsec_xform *ipsec_xform = &conf->ipsec;\n+\tstruct rte_crypto_sym_xform *crypto_xform = conf->crypto_xform;\n+\tdpaa2_sec_session *session = (dpaa2_sec_session *)sess;\n+\tstruct ctxt_priv *priv;\n+\tstruct ipsec_encap_pdb encap_pdb;\n+\tstruct ipsec_decap_pdb decap_pdb;\n+\tstruct alginfo authdata, cipherdata;\n+\tunsigned int bufsize;\n+\tstruct sec_flow_context *flc;\n+\n+\tPMD_INIT_FUNC_TRACE();\n+\n+\tpriv = (struct ctxt_priv *)rte_zmalloc(NULL,\n+\t\t\t\tsizeof(struct ctxt_priv) +\n+\t\t\t\tsizeof(struct sec_flc_desc),\n+\t\t\t\tRTE_CACHE_LINE_SIZE);\n+\n+\tif (priv == NULL) {\n+\t\tRTE_LOG(ERR, PMD, \"\\nNo memory for priv CTXT\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tflc = &priv->flc_desc[0].flc;\n+\n+\tsession->ctxt_type = DPAA2_SEC_IPSEC;\n+\tsession->cipher_key.data = rte_zmalloc(NULL,\n+\t\t\t\t\t       crypto_xform->cipher.key.length,\n+\t\t\t\t\t       RTE_CACHE_LINE_SIZE);\n+\tif (session->cipher_key.data == NULL &&\n+\t\t\tcrypto_xform->cipher.key.length > 0) {\n+\t\tRTE_LOG(ERR, PMD, \"No Memory for cipher key\\n\");\n+\t\trte_free(priv);\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tsession->cipher_key.length = crypto_xform->cipher.key.length;\n+\tsession->auth_key.data = rte_zmalloc(NULL,\n+\t\t\t\t\tcrypto_xform->next->auth.key.length,\n+\t\t\t\t\tRTE_CACHE_LINE_SIZE);\n+\tif (session->auth_key.data == NULL &&\n+\t\t\tcrypto_xform->next->auth.key.length > 0) {\n+\t\tRTE_LOG(ERR, PMD, \"No Memory for auth key\\n\");\n+\t\trte_free(session->cipher_key.data);\n+\t\trte_free(priv);\n+\t\treturn -ENOMEM;\n+\t}\n+\tsession->auth_key.length = crypto_xform->next->auth.key.length;\n+\tmemcpy(session->cipher_key.data, crypto_xform->cipher.key.data,\n+\t\t\tcrypto_xform->cipher.key.length);\n+\tmemcpy(session->auth_key.data, crypto_xform->next->auth.key.data,\n+\t\t\tcrypto_xform->next->auth.key.length);\n+\n+\tauthdata.key = (uint64_t)session->auth_key.data;\n+\tauthdata.keylen = session->auth_key.length;\n+\tauthdata.key_enc_flags = 0;\n+\tauthdata.key_type = RTA_DATA_IMM;\n+\tswitch (crypto_xform->next->auth.algo) {\n+\tcase RTE_CRYPTO_AUTH_SHA1_HMAC:\n+\t\tauthdata.algtype = OP_PCL_IPSEC_HMAC_SHA1_96;\n+\t\tauthdata.algmode = OP_ALG_AAI_HMAC;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_SHA1_HMAC;\n+\t\tbreak;\n+\tcase RTE_CRYPTO_AUTH_MD5_HMAC:\n+\t\tauthdata.algtype = OP_PCL_IPSEC_HMAC_MD5_96;\n+\t\tauthdata.algmode = OP_ALG_AAI_HMAC;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_MD5_HMAC;\n+\t\tbreak;\n+\tcase RTE_CRYPTO_AUTH_SHA256_HMAC:\n+\t\tauthdata.algtype = OP_PCL_IPSEC_HMAC_SHA2_256_128;\n+\t\tauthdata.algmode = OP_ALG_AAI_HMAC;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_SHA256_HMAC;\n+\t\tbreak;\n+\tcase RTE_CRYPTO_AUTH_SHA384_HMAC:\n+\t\tauthdata.algtype = OP_PCL_IPSEC_HMAC_SHA2_384_192;\n+\t\tauthdata.algmode = OP_ALG_AAI_HMAC;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_SHA384_HMAC;\n+\t\tbreak;\n+\tcase RTE_CRYPTO_AUTH_SHA512_HMAC:\n+\t\tauthdata.algtype = OP_PCL_IPSEC_HMAC_SHA2_512_256;\n+\t\tauthdata.algmode = OP_ALG_AAI_HMAC;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_SHA512_HMAC;\n+\t\tbreak;\n+\tcase RTE_CRYPTO_AUTH_AES_CMAC:\n+\t\tauthdata.algtype = OP_PCL_IPSEC_AES_CMAC_96;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_AES_CMAC;\n+\t\tbreak;\n+\tcase RTE_CRYPTO_AUTH_NULL:\n+\t\tauthdata.algtype = OP_PCL_IPSEC_HMAC_NULL;\n+\t\tsession->auth_alg = RTE_CRYPTO_AUTH_NULL;\n+\t\tbreak;\n+\tcase RTE_CRYPTO_AUTH_SHA224_HMAC:\n+\tcase RTE_CRYPTO_AUTH_AES_XCBC_MAC:\n+\tcase RTE_CRYPTO_AUTH_SNOW3G_UIA2:\n+\tcase RTE_CRYPTO_AUTH_SHA1:\n+\tcase RTE_CRYPTO_AUTH_SHA256:\n+\tcase RTE_CRYPTO_AUTH_SHA512:\n+\tcase RTE_CRYPTO_AUTH_SHA224:\n+\tcase RTE_CRYPTO_AUTH_SHA384:\n+\tcase RTE_CRYPTO_AUTH_MD5:\n+\tcase RTE_CRYPTO_AUTH_AES_GMAC:\n+\tcase RTE_CRYPTO_AUTH_KASUMI_F9:\n+\tcase RTE_CRYPTO_AUTH_AES_CBC_MAC:\n+\tcase RTE_CRYPTO_AUTH_ZUC_EIA3:\n+\t\tRTE_LOG(ERR, PMD, \"Crypto: Unsupported auth alg %u\\n\",\n+\t\t\tcrypto_xform->next->auth.algo);\n+\t\tgoto out;\n+\tdefault:\n+\t\tRTE_LOG(ERR, PMD, \"Crypto: Undefined Auth specified %u\\n\",\n+\t\t\tcrypto_xform->next->auth.algo);\n+\t\tgoto out;\n+\t}\n+\tcipherdata.key = (uint64_t)session->cipher_key.data;\n+\tcipherdata.keylen = session->cipher_key.length;\n+\tcipherdata.key_enc_flags = 0;\n+\tcipherdata.key_type = RTA_DATA_IMM;\n+\n+\tswitch (crypto_xform->cipher.algo) {\n+\tcase RTE_CRYPTO_CIPHER_AES_CBC:\n+\t\tcipherdata.algtype = OP_PCL_IPSEC_AES_CBC;\n+\t\tcipherdata.algmode = OP_ALG_AAI_CBC;\n+\t\tsession->cipher_alg = RTE_CRYPTO_CIPHER_AES_CBC;\n+\t\tbreak;\n+\tcase RTE_CRYPTO_CIPHER_3DES_CBC:\n+\t\tcipherdata.algtype = OP_PCL_IPSEC_3DES;\n+\t\tcipherdata.algmode = OP_ALG_AAI_CBC;\n+\t\tsession->cipher_alg = RTE_CRYPTO_CIPHER_3DES_CBC;\n+\t\tbreak;\n+\tcase RTE_CRYPTO_CIPHER_AES_CTR:\n+\t\tcipherdata.algtype = OP_PCL_IPSEC_AES_CTR;\n+\t\tcipherdata.algmode = OP_ALG_AAI_CTR;\n+\t\tsession->cipher_alg = RTE_CRYPTO_CIPHER_AES_CTR;\n+\t\tbreak;\n+\tcase RTE_CRYPTO_CIPHER_NULL:\n+\t\tcipherdata.algtype = OP_PCL_IPSEC_NULL;\n+\t\tbreak;\n+\tcase RTE_CRYPTO_CIPHER_SNOW3G_UEA2:\n+\tcase RTE_CRYPTO_CIPHER_3DES_ECB:\n+\tcase RTE_CRYPTO_CIPHER_AES_ECB:\n+\tcase RTE_CRYPTO_CIPHER_KASUMI_F8:\n+\t\tRTE_LOG(ERR, PMD, \"Crypto: Unsupported Cipher alg %u\\n\",\n+\t\t\tcrypto_xform->cipher.algo);\n+\t\tgoto out;\n+\tdefault:\n+\t\tRTE_LOG(ERR, PMD, \"Crypto: Undefined Cipher specified %u\\n\",\n+\t\t\tcrypto_xform->cipher.algo);\n+\t\tgoto out;\n+\t}\n+\n+\tif (ipsec_xform->direction == RTE_SECURITY_IPSEC_SA_DIR_EGRESS) {\n+\t\tstruct ip ip4_hdr;\n+\n+\t\tflc->dhr = SEC_FLC_DHR_OUTBOUND;\n+\t\tip4_hdr.ip_v = IPVERSION;\n+\t\tip4_hdr.ip_hl = 5;\n+\t\tip4_hdr.ip_len = rte_cpu_to_be_16(sizeof(ip4_hdr));\n+\t\tip4_hdr.ip_tos = ipsec_xform->tunnel.ipv4.dscp;\n+\t\tip4_hdr.ip_id = 0;\n+\t\tip4_hdr.ip_off = 0;\n+\t\tip4_hdr.ip_ttl = ipsec_xform->tunnel.ipv4.ttl;\n+\t\tip4_hdr.ip_p = 0x32;\n+\t\tip4_hdr.ip_sum = 0;\n+\t\tip4_hdr.ip_src = ipsec_xform->tunnel.ipv4.src_ip;\n+\t\tip4_hdr.ip_dst = ipsec_xform->tunnel.ipv4.dst_ip;\n+\t\tip4_hdr.ip_sum = calc_chksum((uint16_t *)(void *)&ip4_hdr,\n+\t\t\tsizeof(struct ip));\n+\n+\t\t/* For Sec Proto only one descriptor is required. */\n+\t\tmemset(&encap_pdb, 0, sizeof(struct ipsec_encap_pdb));\n+\t\tencap_pdb.options = (IPVERSION << PDBNH_ESP_ENCAP_SHIFT) |\n+\t\t\tPDBOPTS_ESP_OIHI_PDB_INL |\n+\t\t\tPDBOPTS_ESP_IVSRC |\n+\t\t\tPDBHMO_ESP_ENCAP_DTTL;\n+\t\tencap_pdb.spi = ipsec_xform->spi;\n+\t\tencap_pdb.ip_hdr_len = sizeof(struct ip);\n+\n+\t\tsession->dir = DIR_ENC;\n+\t\tbufsize = cnstr_shdsc_ipsec_new_encap(priv->flc_desc[0].desc,\n+\t\t\t\t1, 0, &encap_pdb,\n+\t\t\t\t(uint8_t *)&ip4_hdr,\n+\t\t\t\t&cipherdata, &authdata);\n+\t} else if (ipsec_xform->direction ==\n+\t\t\tRTE_SECURITY_IPSEC_SA_DIR_INGRESS) {\n+\t\tflc->dhr = SEC_FLC_DHR_INBOUND;\n+\t\tmemset(&decap_pdb, 0, sizeof(struct ipsec_decap_pdb));\n+\t\tdecap_pdb.options = sizeof(struct ip) << 16;\n+\t\tsession->dir = DIR_DEC;\n+\t\tbufsize = cnstr_shdsc_ipsec_new_decap(priv->flc_desc[0].desc,\n+\t\t\t\t1, 0, &decap_pdb, &cipherdata, &authdata);\n+\t} else\n+\t\tgoto out;\n+\tflc->word1_sdl = (uint8_t)bufsize;\n+\n+\t/*Enable the stashing control bit*/\n+\tDPAA2_SET_FLC_RSC(flc);\n+\tflc->word2_rflc_31_0 = lower_32_bits(\n+\t\t\t(uint64_t)&(((struct dpaa2_sec_qp *)\n+\t\t\tdev->data->queue_pairs[0])->rx_vq) | 0x14);\n+\tflc->word3_rflc_63_32 = upper_32_bits(\n+\t\t\t(uint64_t)&(((struct dpaa2_sec_qp *)\n+\t\t\tdev->data->queue_pairs[0])->rx_vq));\n+\n+\t/* Set EWS bit i.e. enable write-safe */\n+\tDPAA2_SET_FLC_EWS(flc);\n+\t/* Set BS = 1 i.e reuse input buffers as output buffers */\n+\tDPAA2_SET_FLC_REUSE_BS(flc);\n+\t/* Set FF = 10 (bit)\n+\tReuse input buffers if they provide sufficient space */\n+\tDPAA2_SET_FLC_REUSE_FF(flc);\n+\n+\tsession->ctxt = priv;\n+\n+\treturn 0;\n+out:\n+\trte_free(session->auth_key.data);\n+\trte_free(session->cipher_key.data);\n+\trte_free(priv);\n+\treturn -1;\n+}\n+\n+static int\n+dpaa2_sec_security_session_create(void *dev,\n+\t\t\t\t  struct rte_security_session_conf *conf,\n+\t\t\t\t  struct rte_security_session *sess,\n+\t\t\t\t  struct rte_mempool *mempool)\n+{\n+\tvoid *sess_private_data;\n+\tstruct rte_cryptodev *cdev = (struct rte_cryptodev *)dev;\n+\tint ret;\n+\n+\tif (rte_mempool_get(mempool, &sess_private_data)) {\n+\t\tCDEV_LOG_ERR(\n+\t\t\t\"Couldn't get object from session mempool\");\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tswitch (conf->protocol) {\n+\tcase RTE_SECURITY_PROTOCOL_IPSEC:\n+\t\tret = dpaa2_sec_set_ipsec_session(cdev, conf,\n+\t\t\t\tsess_private_data);\n+\t\tbreak;\n+\tcase RTE_SECURITY_PROTOCOL_MACSEC:\n+\t\treturn -ENOTSUP;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\tif (ret != 0) {\n+\t\tPMD_DRV_LOG(ERR,\n+\t\t\t\"DPAA2 PMD: failed to configure session parameters\");\n+\n+\t\t/* Return session to mempool */\n+\t\trte_mempool_put(mempool, sess_private_data);\n+\t\treturn ret;\n+\t}\n+\n+\tset_sec_session_private_data(sess, sess_private_data);\n+\n+\treturn ret;\n+}\n+\n+/** Clear the memory of session so it doesn't leave key material behind */\n+static int\n+dpaa2_sec_security_session_destroy(void *dev __rte_unused,\n+\t\tstruct rte_security_session *sess)\n+{\n+\tPMD_INIT_FUNC_TRACE();\n+\tvoid *sess_priv = get_sec_session_private_data(sess);\n+\n+\tdpaa2_sec_session *s = (dpaa2_sec_session *)sess_priv;\n+\n+\tif (sess_priv) {\n+\t\tstruct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);\n+\n+\t\trte_free(s->ctxt);\n+\t\trte_free(s->cipher_key.data);\n+\t\trte_free(s->auth_key.data);\n+\t\tmemset(sess, 0, sizeof(dpaa2_sec_session));\n+\t\tset_sec_session_private_data(sess, NULL);\n+\t\trte_mempool_put(sess_mp, sess_priv);\n+\t}\n+\treturn 0;\n+}\n+\n+static int\n dpaa2_sec_session_configure(struct rte_cryptodev *dev,\n \t\tstruct rte_crypto_sym_xform *xform,\n \t\tstruct rte_cryptodev_sym_session *sess,\n@@ -1820,6 +2182,21 @@ static struct rte_cryptodev_ops crypto_ops = {\n \t.session_clear        = dpaa2_sec_session_clear,\n };\n \n+static const struct rte_security_capability *\n+dpaa2_sec_capabilities_get(void *device __rte_unused)\n+{\n+\treturn dpaa2_sec_security_cap;\n+}\n+\n+struct rte_security_ops dpaa2_sec_security_ops = {\n+\t.session_create = dpaa2_sec_security_session_create,\n+\t.session_update = NULL,\n+\t.session_query = NULL,\n+\t.session_destroy = dpaa2_sec_security_session_destroy,\n+\t.set_pkt_metadata = NULL,\n+\t.capabilities_get = dpaa2_sec_capabilities_get\n+};\n+\n static int\n dpaa2_sec_uninit(const struct rte_cryptodev *dev)\n {\n@@ -1855,12 +2232,15 @@ dpaa2_sec_dev_init(struct rte_cryptodev *cryptodev)\n \n \tcryptodev->driver_id = cryptodev_driver_id;\n \tcryptodev->dev_ops = &crypto_ops;\n+\trte_security_register(&cryptodev->data->sec_id,\n+\t\t\t(void *)&cryptodev, &dpaa2_sec_security_ops);\n \n \tcryptodev->enqueue_burst = dpaa2_sec_enqueue_burst;\n \tcryptodev->dequeue_burst = dpaa2_sec_dequeue_burst;\n \tcryptodev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |\n \t\t\tRTE_CRYPTODEV_FF_HW_ACCELERATED |\n-\t\t\tRTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING;\n+\t\t\tRTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |\n+\t\t\tRTE_CRYPTODEV_FF_SECURITY;\n \n \tinternals = cryptodev->data->dev_private;\n \tinternals->max_nb_sessions = RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS;\ndiff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h\nindex 3849a05..fd97ea3 100644\n--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h\n+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_priv.h\n@@ -67,6 +67,11 @@ enum shr_desc_type {\n #define DIR_ENC                 1\n #define DIR_DEC                 0\n \n+#define DPAA2_SET_FLC_EWS(flc)  (flc->word1_bits23_16 |= 0x1)\n+#define DPAA2_SET_FLC_RSC(flc)  (flc->word1_bits31_24 |= 0x1)\n+#define DPAA2_SET_FLC_REUSE_BS(flc) (flc->mode_bits |= 0x8000)\n+#define DPAA2_SET_FLC_REUSE_FF(flc) (flc->mode_bits |= 0x2000)\n+\n /* SEC Flow Context Descriptor */\n struct sec_flow_context {\n \t/* word 0 */\n@@ -411,4 +416,61 @@ static const struct rte_cryptodev_capabilities dpaa2_sec_capabilities[] = {\n \n \tRTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()\n };\n+\n+static const struct rte_security_capability dpaa2_sec_security_cap[] = {\n+\t{ /* IPsec Lookaside Protocol offload ESP Transport Egress */\n+\t\t.action = RTE_SECURITY_ACTION_TYPE_LOOKASIDE_PROTOCOL,\n+\t\t.protocol = RTE_SECURITY_PROTOCOL_IPSEC,\n+\t\t.ipsec = {\n+\t\t\t.proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP,\n+\t\t\t.mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL,\n+\t\t\t.direction = RTE_SECURITY_IPSEC_SA_DIR_EGRESS,\n+\t\t\t.options = { 0 }\n+\t\t},\n+\t\t.crypto_capabilities = dpaa2_sec_capabilities\n+\t},\n+\t{ /* IPsec Lookaside Protocol offload ESP Tunnel Ingress */\n+\t\t.action = RTE_SECURITY_ACTION_TYPE_LOOKASIDE_PROTOCOL,\n+\t\t.protocol = RTE_SECURITY_PROTOCOL_IPSEC,\n+\t\t.ipsec = {\n+\t\t\t.proto = RTE_SECURITY_IPSEC_SA_PROTO_ESP,\n+\t\t\t.mode = RTE_SECURITY_IPSEC_SA_MODE_TUNNEL,\n+\t\t\t.direction = RTE_SECURITY_IPSEC_SA_DIR_INGRESS,\n+\t\t\t.options = { 0 }\n+\t\t},\n+\t\t.crypto_capabilities = dpaa2_sec_capabilities\n+\t},\n+\t{\n+\t\t.action = RTE_SECURITY_ACTION_TYPE_NONE\n+\t}\n+};\n+\n+/**\n+ * Checksum\n+ *\n+ * @param buffer calculate chksum for buffer\n+ * @param len    buffer length\n+ *\n+ * @return checksum value in host cpu order\n+ */\n+static inline uint16_t calc_chksum(void *buffer, int len)\n+{\n+\tuint16_t *buf = (uint16_t *)buffer;\n+\tuint32_t sum = 0;\n+\tuint16_t result;\n+\n+\tfor (sum = 0; len > 1; len -= 2)\n+\t\tsum += *buf++;\n+\n+\tif (len == 1)\n+\t\tsum += *(unsigned char *)buf;\n+\n+\tsum = (sum >> 16) + (sum & 0xFFFF);\n+\tsum += (sum >> 16);\n+\tresult = ~sum;\n+\n+\treturn  result;\n+}\n+\n+\n #endif /* _RTE_DPAA2_SEC_PMD_PRIVATE_H_ */\n",
    "prefixes": [
        "dpdk-dev",
        "10/11"
    ]
}