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GET /api/patches/28483/?format=api
{ "id": 28483, "url": "https://patches.dpdk.org/api/patches/28483/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1504860327-18451-7-git-send-email-hemant.agrawal@nxp.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1504860327-18451-7-git-send-email-hemant.agrawal@nxp.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1504860327-18451-7-git-send-email-hemant.agrawal@nxp.com", "date": "2017-09-08T08:45:03", "name": "[dpdk-dev,v2,06/30] bus/fslmc: qbman remove unused funcs and align names", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "2431cd6cb407d57097422da7944f4d73a15723cf", "submitter": { "id": 477, "url": "https://patches.dpdk.org/api/people/477/?format=api", "name": "Hemant Agrawal", "email": "hemant.agrawal@nxp.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1504860327-18451-7-git-send-email-hemant.agrawal@nxp.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/28483/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/28483/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id EAF23199D9;\n\tFri, 8 Sep 2017 10:46:07 +0200 (CEST)", "from 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(version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1385.11\n\tvia Frontend Transport; Fri, 8 Sep 2017 08:46:02 +0000", "from bf-netperf1.ap.freescale.net (bf-netperf1.ap.freescale.net\n\t[10.232.134.28])\n\tby tx30smr01.am.freescale.net (8.14.3/8.14.0) with ESMTP id\n\tv888jmoc023063; Fri, 8 Sep 2017 01:46:00 -0700" ], "Authentication-Results": "spf=fail (sender IP is 192.88.168.50)\n\tsmtp.mailfrom=nxp.com; nxp.com; dkim=none (message not signed)\n\theader.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com;", "Received-SPF": "Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;", "From": "Hemant Agrawal <hemant.agrawal@nxp.com>", "To": "<dev@dpdk.org>", "CC": "<ferruh.yigit@intel.com>, <shreyansh.jain@nxp.com>", "Date": "Fri, 8 Sep 2017 14:15:03 +0530", "Message-ID": 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PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6095135)(2401047)(8121501046)(5005006)(93006095)(93001095)(10201501046)(3002001)(100000703101)(100105400095)(6055026)(6096035)(201703131430075)(201703131433075)(201703131441075)(201703131448075)(201703161259150)(20161123561025)(20161123563025)(20161123565025)(20161123556025)(20161123559100)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:SN2PR03MB2271; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:SN2PR03MB2271; ", "X-Forefront-PRVS": "04244E0DC5", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "08 Sep 2017 08:46:02.6745\n\t(UTC)", "X-MS-Exchange-CrossTenant-Id": "5afe0b00-7697-4969-b663-5eab37d5f47e", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SN2PR03MB2271", "Subject": "[dpdk-dev] [PATCH v2 06/30] bus/fslmc: qbman remove unused funcs\n\tand align names", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "name alignment for check command and result functions\nputting them as separate functions instead of changing the original\nfunctions.\n\nSigned-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>\n---\n drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 146 ++--\n drivers/bus/fslmc/qbman/qbman_portal.c | 731 ++++++++++-----------\n drivers/bus/fslmc/qbman/qbman_portal.h | 6 +-\n drivers/bus/fslmc/qbman/qbman_private.h | 2 +-\n drivers/bus/fslmc/qbman/qbman_sys.h | 12 -\n drivers/bus/fslmc/rte_bus_fslmc_version.map | 3 +-\n drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 4 +-\n drivers/net/dpaa2/dpaa2_rxtx.c | 10 +-\n 8 files changed, 449 insertions(+), 465 deletions(-)", "diff": "diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h\nindex fe1cc94..24a6d4b 100644\n--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h\n+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h\n@@ -194,11 +194,38 @@ void qbman_swp_interrupt_set_inhibit(struct qbman_swp *p, int inhibit);\n /**\n * struct qbman_result - structure for qbman dequeue response and/or\n * notification.\n- * @dont_manipulate_directly: the 16 32bit data to represent the whole\n+ * @donot_manipulate_directly: the 16 32bit data to represent the whole\n * possible qbman dequeue result.\n */\n struct qbman_result {\n-\tuint32_t dont_manipulate_directly[16];\n+\tunion {\n+\t\tstruct common {\n+\t\t\tuint8_t verb;\n+\t\t\tuint8_t reserved[63];\n+\t\t} common;\n+\t\tstruct dq {\n+\t\t\tuint8_t verb;\n+\t\t\tuint8_t stat;\n+\t\t\t__le16 seqnum;\n+\t\t\t__le16 oprid;\n+\t\t\tuint8_t reserved;\n+\t\t\tuint8_t tok;\n+\t\t\t__le32 fqid;\n+\t\t\tuint32_t reserved2;\n+\t\t\t__le32 fq_byte_cnt;\n+\t\t\t__le32 fq_frm_cnt;\n+\t\t\t__le64 fqd_ctx;\n+\t\t\tuint8_t fd[32];\n+\t\t} dq;\n+\t\tstruct scn {\n+\t\t\tuint8_t verb;\n+\t\t\tuint8_t stat;\n+\t\t\tuint8_t state;\n+\t\t\tuint8_t reserved;\n+\t\t\t__le32 rid_tok;\n+\t\t\t__le64 ctx;\n+\t\t} scn;\n+\t};\n };\n \n /* TODO:\n@@ -254,11 +281,21 @@ void qbman_swp_push_set(struct qbman_swp *s, uint8_t channel_idx, int enable);\n \n /**\n * struct qbman_pull_desc - the structure for pull dequeue descriptor\n- * @dont_manipulate_directly: the 6 32bit data to represent the whole\n- * possible settings for pull dequeue descriptor.\n */\n struct qbman_pull_desc {\n-\tuint32_t dont_manipulate_directly[6];\n+\tunion {\n+\t\tuint32_t donot_manipulate_directly[16];\n+\t\tstruct pull {\n+\t\t\tuint8_t verb;\n+\t\t\tuint8_t numf;\n+\t\t\tuint8_t tok;\n+\t\t\tuint8_t reserved;\n+\t\t\tuint32_t dq_src;\n+\t\t\tuint64_t rsp_addr;\n+\t\t\tuint64_t rsp_addr_virt;\n+\t\t\tuint8_t padding[40];\n+\t\t} pull;\n+\t};\n };\n \n enum qbman_pull_type_e {\n@@ -415,7 +452,20 @@ struct qbman_result *qbman_get_dqrr_from_idx(struct qbman_swp *s, uint8_t idx);\n * dequeue result.\n */\n int qbman_result_has_new_result(struct qbman_swp *s,\n-\t\t\t\tconst struct qbman_result *dq);\n+\t\t\t\tstruct qbman_result *dq);\n+\n+/**\n+ * qbman_check_command_complete() - Check if the previous issued dq commnd\n+ * is completed and results are available in memory.\n+ * @s: the software portal object.\n+ * @dq: the dequeue result read from the memory.\n+ *\n+ * Return 1 for getting a valid dequeue result, or 0 for not getting a valid\n+ * dequeue result.\n+ */\n+int qbman_check_command_complete(struct qbman_result *dq);\n+\n+int qbman_check_new_result(struct qbman_result *dq);\n \n /* -------------------------------------------------------- */\n /* Parsing dequeue entries (DQRR and user-provided storage) */\n@@ -537,7 +587,7 @@ int qbman_result_is_FQPN(const struct qbman_result *dq);\n *\n * Return the state field.\n */\n-uint32_t qbman_result_DQ_flags(const struct qbman_result *dq);\n+uint8_t qbman_result_DQ_flags(const struct qbman_result *dq);\n \n /**\n * qbman_result_DQ_is_pull() - Check whether the dq response is from a pull\n@@ -648,24 +698,6 @@ uint32_t qbman_result_SCN_rid(const struct qbman_result *scn);\n */\n uint64_t qbman_result_SCN_ctx(const struct qbman_result *scn);\n \n-/**\n- * qbman_result_SCN_state_in_mem() - Get the state in notification written\n- * in memory\n- * @scn: the state change notification.\n- *\n- * Return the state.\n- */\n-uint8_t qbman_result_SCN_state_in_mem(const struct qbman_result *scn);\n-\n-/**\n- * qbman_result_SCN_rid_in_mem() - Get the resource id in notification written\n- * in memory.\n- * @scn: the state change notification.\n- *\n- * Return the resource id.\n- */\n-uint32_t qbman_result_SCN_rid_in_mem(const struct qbman_result *scn);\n-\n /* Type-specific \"resource IDs\". Mainly for illustration purposes, though it\n * also gives the appropriate type widths.\n */\n@@ -746,22 +778,36 @@ uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn);\n \t/* Enqueues */\n \t/************/\n \n-/**\n- * struct qbman_eq_desc - structure of enqueue descriptor\n- * @dont_manipulate_directly: the 8 32bit data to represent the whole\n- * possible qbman enqueue setting in enqueue descriptor.\n- */\n+/* struct qbman_eq_desc - structure of enqueue descriptor */\n struct qbman_eq_desc {\n-\tuint32_t dont_manipulate_directly[8];\n+\tunion {\n+\t\tuint32_t donot_manipulate_directly[8];\n+\t\tstruct eq {\n+\t\t\tuint8_t verb;\n+\t\t\tuint8_t dca;\n+\t\t\tuint16_t seqnum;\n+\t\t\tuint16_t orpid;\n+\t\t\tuint16_t reserved1;\n+\t\t\tuint32_t tgtid;\n+\t\t\tuint32_t tag;\n+\t\t\tuint16_t qdbin;\n+\t\t\tuint8_t qpri;\n+\t\t\tuint8_t reserved[3];\n+\t\t\tuint8_t wae;\n+\t\t\tuint8_t rspid;\n+\t\t\tuint64_t rsp_addr;\n+\t\t\tuint8_t fd[32];\n+\t\t} eq;\n+\t};\n };\n \n /**\n * struct qbman_eq_response - structure of enqueue response\n- * @dont_manipulate_directly: the 16 32bit data to represent the whole\n+ * @donot_manipulate_directly: the 16 32bit data to represent the whole\n * enqueue response.\n */\n struct qbman_eq_response {\n-\tuint32_t dont_manipulate_directly[16];\n+\tuint32_t donot_manipulate_directly[16];\n };\n \n /**\n@@ -801,7 +847,7 @@ void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success);\n * sequeue number.\n */\n void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,\n-\t\t\t uint32_t opr_id, uint32_t seqnum, int incomplete);\n+\t\t\t uint16_t opr_id, uint16_t seqnum, int incomplete);\n \n /**\n * qbman_eq_desc_set_orp_hole() - fill a hole in the order-restoration sequence\n@@ -810,8 +856,8 @@ void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,\n * @opr_id: the order point record id.\n * @seqnum: the order restoration sequence number.\n */\n-void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint32_t opr_id,\n-\t\t\t\tuint32_t seqnum);\n+void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint16_t opr_id,\n+\t\t\t\tuint16_t seqnum);\n \n /**\n * qbman_eq_desc_set_orp_nesn() - advance NESN (Next Expected Sequence Number)\n@@ -820,8 +866,8 @@ void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint32_t opr_id,\n * @opr_id: the order point record id.\n * @seqnum: the order restoration sequence number.\n */\n-void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint32_t opr_id,\n-\t\t\t\tuint32_t seqnum);\n+void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint16_t opr_id,\n+\t\t\t\tuint16_t seqnum);\n /**\n * qbman_eq_desc_set_response() - Set the enqueue response info.\n * @d: the enqueue descriptor\n@@ -873,7 +919,7 @@ void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, uint32_t fqid);\n * @qd_prio: the queuing destination priority.\n */\n void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,\n-\t\t\t uint32_t qd_bin, uint32_t qd_prio);\n+\t\t\t uint16_t qd_bin, uint8_t qd_prio);\n \n /**\n * qbman_eq_desc_set_eqdi() - enable/disable EQDI interrupt\n@@ -898,7 +944,7 @@ void qbman_eq_desc_set_eqdi(struct qbman_eq_desc *d, int enable);\n * being rescheduled.)\n */\n void qbman_eq_desc_set_dca(struct qbman_eq_desc *d, int enable,\n-\t\t\t uint32_t dqrr_idx, int park);\n+\t\t\t uint8_t dqrr_idx, int park);\n \n /**\n * qbman_swp_enqueue() - Issue an enqueue command.\n@@ -957,11 +1003,20 @@ int qbman_swp_enqueue_thresh(struct qbman_swp *s, unsigned int thresh);\n \t/*******************/\n /**\n * struct qbman_release_desc - The structure for buffer release descriptor\n- * @dont_manipulate_directly: the 32bit data to represent the whole\n+ * @donot_manipulate_directly: the 32bit data to represent the whole\n * possible settings of qbman release descriptor.\n */\n struct qbman_release_desc {\n-\tuint32_t dont_manipulate_directly[1];\n+\tunion {\n+\t\tuint32_t donot_manipulate_directly[16];\n+\t\tstruct br {\n+\t\t\tuint8_t verb;\n+\t\t\tuint8_t reserved;\n+\t\t\tuint16_t bpid;\n+\t\t\tuint32_t reserved2;\n+\t\t\tuint64_t buf[7];\n+\t\t} br;\n+\t};\n };\n \n /**\n@@ -975,7 +1030,7 @@ void qbman_release_desc_clear(struct qbman_release_desc *d);\n * qbman_release_desc_set_bpid() - Set the ID of the buffer pool to release to\n * @d: the qbman release descriptor.\n */\n-void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid);\n+void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint16_t bpid);\n \n /**\n * qbman_release_desc_set_rcdi() - Determines whether or not the portal's RCDI\n@@ -1018,7 +1073,7 @@ int qbman_swp_release_thresh(struct qbman_swp *s, unsigned int thresh);\n * Return 0 for success, or negative error code if the acquire command\n * fails.\n */\n-int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,\n+int qbman_swp_acquire(struct qbman_swp *s, uint16_t bpid, uint64_t *buffers,\n \t\t unsigned int num_buffers);\n \n \t/*****************/\n@@ -1133,7 +1188,4 @@ int qbman_swp_CDAN_disable(struct qbman_swp *s, uint16_t channelid);\n */\n int qbman_swp_CDAN_set_context_enable(struct qbman_swp *s, uint16_t channelid,\n \t\t\t\t uint64_t ctx);\n-\n-int qbman_check_command_complete(struct qbman_swp *s,\n-\t\t\t\t const struct qbman_result *dq);\n #endif /* !_FSL_QBMAN_PORTAL_H */\ndiff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c\nindex 7fc78cd..072dfe8 100644\n--- a/drivers/bus/fslmc/qbman/qbman_portal.c\n+++ b/drivers/bus/fslmc/qbman/qbman_portal.c\n@@ -69,21 +69,23 @@\n /* Pre-defined attribute codes */\n /*******************************/\n \n-struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);\n-struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);\n+#define QMAN_RESPONSE_VERB_MASK 0x7f\n \n /*************************/\n /* SDQCR attribute codes */\n /*************************/\n+#define QB_SDQCR_FC_SHIFT 29\n+#define QB_SDQCR_FC_MASK 0x1\n+#define QB_SDQCR_DCT_SHIFT 24\n+#define QB_SDQCR_DCT_MASK 0x3\n+#define QB_SDQCR_TOK_SHIFT 16\n+#define QB_SDQCR_TOK_MASK 0xff\n+#define QB_SDQCR_SRC_SHIFT 0\n+#define QB_SDQCR_SRC_MASK 0xffff\n+\n+/* opaque token for static dequeues */\n+#define QMAN_SDQCR_TOKEN 0xbb\n \n-/* we put these here because at least some of them are required by\n- * qbman_swp_init()\n- */\n-struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);\n-struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);\n-struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);\n-static struct qb_attr_code code_eq_dca_idx;\n-#define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1)\n enum qbman_sdqcr_dct {\n \tqbman_sdqcr_dct_null = 0,\n \tqbman_sdqcr_dct_prio_ics,\n@@ -96,13 +98,11 @@ enum qbman_sdqcr_fc {\n \tqbman_sdqcr_fc_up_to_3 = 1\n };\n \n-struct qb_attr_code code_sdqcr_dqsrc = QB_CODE(0, 0, 16);\n-\n /* We need to keep track of which SWP triggered a pull command\n * so keep an array of portal IDs and use the token field to\n * be able to find the proper portal\n */\n-#define MAX_QBMAN_PORTALS 35\n+#define MAX_QBMAN_PORTALS 64\n static struct qbman_swp *portal_idx_map[MAX_QBMAN_PORTALS];\n \n /*********************************/\n@@ -136,9 +136,10 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)\n #endif\n \tp->mc.valid_bit = QB_VALID_BIT;\n \tp->sdq = 0;\n-\tqb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics);\n-\tqb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3);\n-\tqb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb);\n+\tp->sdq |= qbman_sdqcr_dct_prio_ics << QB_SDQCR_DCT_SHIFT;\n+\tp->sdq |= qbman_sdqcr_fc_up_to_3 << QB_SDQCR_FC_SHIFT;\n+\tp->sdq |= QMAN_SDQCR_TOKEN << QB_SDQCR_TOK_SHIFT;\n+\n \tatomic_set(&p->vdq.busy, 1);\n \tp->vdq.valid_bit = QB_VALID_BIT;\n \tp->dqrr.next_idx = 0;\n@@ -147,13 +148,9 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)\n \tif ((qman_version & 0xFFFF0000) < QMAN_REV_4100) {\n \t\tp->dqrr.dqrr_size = 4;\n \t\tp->dqrr.reset_bug = 1;\n-\t\t/* Set size of DQRR to 4, encoded in 2 bits */\n-\t\tcode_eq_dca_idx = (struct qb_attr_code)QB_CODE(0, 8, 2);\n \t} else {\n \t\tp->dqrr.dqrr_size = 8;\n \t\tp->dqrr.reset_bug = 0;\n-\t\t/* Set size of DQRR to 8, encoded in 3 bits */\n-\t\tcode_eq_dca_idx = (struct qb_attr_code)QB_CODE(0, 8, 3);\n \t}\n \n \tret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);\n@@ -165,7 +162,7 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)\n \t/* SDQCR needs to be initialized to 0 when no channels are\n \t * being dequeued from or else the QMan HW will indicate an\n \t * error. The values that were calculated above will be\n-\t * applied when dequeues from a specific channel are enabled\n+\t * applied when dequeues from a specific channel are enabled.\n \t */\n \tqbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, 0);\n \teqcr_pi = qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_EQCR_PI);\n@@ -280,9 +277,9 @@ void *qbman_swp_mc_start(struct qbman_swp *p)\n \treturn ret;\n }\n \n-void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)\n+void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint8_t cmd_verb)\n {\n-\tuint32_t *v = cmd;\n+\tuint8_t *v = cmd;\n #ifdef QBMAN_CHECKING\n \tQBMAN_BUG_ON(!(p->mc.check != swp_mc_can_submit));\n #endif\n@@ -323,35 +320,22 @@ void *qbman_swp_mc_result(struct qbman_swp *p)\n /* Enqueue */\n /***********/\n \n-/* These should be const, eventually */\n-static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);\n-static struct qb_attr_code code_eq_eqdi = QB_CODE(0, 3, 1);\n-static struct qb_attr_code code_eq_dca_en = QB_CODE(0, 15, 1);\n-static struct qb_attr_code code_eq_dca_pk = QB_CODE(0, 14, 1);\n-/* Can't set code_eq_dca_idx width. Need qman version. Read at runtime */\n-static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);\n-static struct qb_attr_code code_eq_orp_is_nesn = QB_CODE(0, 31, 1);\n-static struct qb_attr_code code_eq_orp_nlis = QB_CODE(0, 30, 1);\n-static struct qb_attr_code code_eq_orp_seqnum = QB_CODE(0, 16, 14);\n-static struct qb_attr_code code_eq_opr_id = QB_CODE(1, 0, 16);\n-static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);\n-/* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */\n-static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);\n-static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);\n-static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);\n-static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);\n-static struct qb_attr_code code_eq_rsp_id = QB_CODE(5, 24, 8);\n-static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);\n-\n-enum qbman_eq_cmd_e {\n-\t/* No enqueue, primarily for plugging ORP gaps for dropped frames */\n-\tqbman_eq_cmd_empty,\n-\t/* DMA an enqueue response once complete */\n-\tqbman_eq_cmd_respond,\n-\t/* DMA an enqueue response only if the enqueue fails */\n-\tqbman_eq_cmd_respond_reject\n+#define QB_ENQUEUE_CMD_OPTIONS_SHIFT 0\n+enum qb_enqueue_commands {\n+\tenqueue_empty = 0,\n+\tenqueue_response_always = 1,\n+\tenqueue_rejects_to_fq = 2\n };\n \n+#define QB_ENQUEUE_CMD_EC_OPTION_MASK 0x3\n+#define QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT 2\n+#define QB_ENQUEUE_CMD_IRQ_ON_DISPATCH_SHIFT 3\n+#define QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT 4\n+#define QB_ENQUEUE_CMD_DCA_PK_SHIFT 6\n+#define QB_ENQUEUE_CMD_DCA_EN_SHIFT 7\n+#define QB_ENQUEUE_CMD_NLIS_SHIFT 14\n+#define QB_ENQUEUE_CMD_IS_NESN_SHIFT 15\n+\n void qbman_eq_desc_clear(struct qbman_eq_desc *d)\n {\n \tmemset(d, 0, sizeof(*d));\n@@ -359,115 +343,110 @@ void qbman_eq_desc_clear(struct qbman_eq_desc *d)\n \n void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_eq_orp_en, cl, 0);\n-\tqb_attr_code_encode(&code_eq_cmd, cl,\n-\t\t\t respond_success ? qbman_eq_cmd_respond :\n-\t\t\t\t\t qbman_eq_cmd_respond_reject);\n+\td->eq.verb &= ~(1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT);\n+\tif (respond_success)\n+\t\td->eq.verb |= enqueue_response_always;\n+\telse\n+\t\td->eq.verb |= enqueue_rejects_to_fq;\n }\n \n void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,\n-\t\t\t uint32_t opr_id, uint32_t seqnum, int incomplete)\n+\t\t\t uint16_t opr_id, uint16_t seqnum, int incomplete)\n {\n-\tuint32_t *cl = qb_cl(d);\n+\td->eq.verb |= 1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT;\n+\tif (respond_success)\n+\t\td->eq.verb |= enqueue_response_always;\n+\telse\n+\t\td->eq.verb |= enqueue_rejects_to_fq;\n \n-\tqb_attr_code_encode(&code_eq_orp_en, cl, 1);\n-\tqb_attr_code_encode(&code_eq_cmd, cl,\n-\t\t\t respond_success ? qbman_eq_cmd_respond :\n-\t\t\t\t\t qbman_eq_cmd_respond_reject);\n-\tqb_attr_code_encode(&code_eq_opr_id, cl, opr_id);\n-\tqb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);\n-\tqb_attr_code_encode(&code_eq_orp_nlis, cl, !!incomplete);\n+\td->eq.orpid = opr_id;\n+\td->eq.seqnum = seqnum;\n+\tif (incomplete)\n+\t\td->eq.seqnum |= 1 << QB_ENQUEUE_CMD_NLIS_SHIFT;\n+\telse\n+\t\td->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_NLIS_SHIFT);\n }\n \n-void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint32_t opr_id,\n-\t\t\t\tuint32_t seqnum)\n+void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint16_t opr_id,\n+\t\t\t\tuint16_t seqnum)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_eq_orp_en, cl, 1);\n-\tqb_attr_code_encode(&code_eq_cmd, cl, qbman_eq_cmd_empty);\n-\tqb_attr_code_encode(&code_eq_opr_id, cl, opr_id);\n-\tqb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);\n-\tqb_attr_code_encode(&code_eq_orp_nlis, cl, 0);\n-\tqb_attr_code_encode(&code_eq_orp_is_nesn, cl, 0);\n+\td->eq.verb |= 1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT;\n+\td->eq.verb &= ~QB_ENQUEUE_CMD_EC_OPTION_MASK;\n+\td->eq.orpid = opr_id;\n+\td->eq.seqnum = seqnum;\n+\td->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_NLIS_SHIFT);\n+\td->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_IS_NESN_SHIFT);\n }\n \n-void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint32_t opr_id,\n-\t\t\t\tuint32_t seqnum)\n+void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint16_t opr_id,\n+\t\t\t\tuint16_t seqnum)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_eq_orp_en, cl, 1);\n-\tqb_attr_code_encode(&code_eq_cmd, cl, qbman_eq_cmd_empty);\n-\tqb_attr_code_encode(&code_eq_opr_id, cl, opr_id);\n-\tqb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);\n-\tqb_attr_code_encode(&code_eq_orp_nlis, cl, 0);\n-\tqb_attr_code_encode(&code_eq_orp_is_nesn, cl, 1);\n+\td->eq.verb |= 1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT;\n+\td->eq.verb &= ~QB_ENQUEUE_CMD_EC_OPTION_MASK;\n+\td->eq.orpid = opr_id;\n+\td->eq.seqnum = seqnum;\n+\td->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_NLIS_SHIFT);\n+\td->eq.seqnum |= 1 << QB_ENQUEUE_CMD_IS_NESN_SHIFT;\n }\n \n void qbman_eq_desc_set_response(struct qbman_eq_desc *d,\n \t\t\t\tdma_addr_t storage_phys,\n \t\t\t\tint stash)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys);\n-\tqb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash);\n+\td->eq.rsp_addr = storage_phys;\n+\td->eq.wae = stash;\n }\n \n void qbman_eq_desc_set_token(struct qbman_eq_desc *d, uint8_t token)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_eq_rsp_id, cl, (uint32_t)token);\n+\td->eq.rspid = token;\n }\n \n void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, uint32_t fqid)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_eq_qd_en, cl, 0);\n-\tqb_attr_code_encode(&code_eq_tgt_id, cl, fqid);\n+\td->eq.verb &= ~(1 << QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT);\n+\td->eq.tgtid = fqid;\n }\n \n void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,\n-\t\t\t uint32_t qd_bin, uint32_t qd_prio)\n+\t\t\t uint16_t qd_bin, uint8_t qd_prio)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_eq_qd_en, cl, 1);\n-\tqb_attr_code_encode(&code_eq_tgt_id, cl, qdid);\n-\tqb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin);\n-\tqb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio);\n+\td->eq.verb |= 1 << QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT;\n+\td->eq.tgtid = qdid;\n+\td->eq.qdbin = qd_bin;\n+\td->eq.qpri = qd_prio;\n }\n \n void qbman_eq_desc_set_eqdi(struct qbman_eq_desc *d, int enable)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_eq_eqdi, cl, !!enable);\n+\tif (enable)\n+\t\td->eq.verb |= 1 << QB_ENQUEUE_CMD_IRQ_ON_DISPATCH_SHIFT;\n+\telse\n+\t\td->eq.verb &= ~(1 << QB_ENQUEUE_CMD_IRQ_ON_DISPATCH_SHIFT);\n }\n \n void qbman_eq_desc_set_dca(struct qbman_eq_desc *d, int enable,\n-\t\t\t uint32_t dqrr_idx, int park)\n+\t\t\t uint8_t dqrr_idx, int park)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_eq_dca_en, cl, !!enable);\n \tif (enable) {\n-\t\tqb_attr_code_encode(&code_eq_dca_pk, cl, !!park);\n-\t\tqb_attr_code_encode(&code_eq_dca_idx, cl, dqrr_idx);\n+\t\td->eq.dca = dqrr_idx;\n+\t\tif (park)\n+\t\t\td->eq.dca |= 1 << QB_ENQUEUE_CMD_DCA_PK_SHIFT;\n+\t\telse\n+\t\t\td->eq.dca &= ~(1 << QB_ENQUEUE_CMD_DCA_PK_SHIFT);\n+\t\td->eq.dca |= 1 << QB_ENQUEUE_CMD_DCA_EN_SHIFT;\n+\t} else {\n+\t\td->eq.dca &= ~(1 << QB_ENQUEUE_CMD_DCA_EN_SHIFT);\n \t}\n }\n \n #define EQAR_IDX(eqar) ((eqar) & 0x7)\n #define EQAR_VB(eqar) ((eqar) & 0x80)\n #define EQAR_SUCCESS(eqar) ((eqar) & 0x100)\n+\n static int qbman_swp_enqueue_array_mode(struct qbman_swp *s,\n \t\t\t\t\tconst struct qbman_eq_desc *d,\n-\t\t\t\t const struct qbman_fd *fd)\n+\t\t\t\t\tconst struct qbman_fd *fd)\n {\n \tuint32_t *p;\n \tconst uint32_t *cl = qb_cl(d);\n@@ -477,20 +456,20 @@ static int qbman_swp_enqueue_array_mode(struct qbman_swp *s,\n \tif (!EQAR_SUCCESS(eqar))\n \t\treturn -EBUSY;\n \tp = qbman_cena_write_start_wo_shadow(&s->sys,\n-\t\t\tQBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));\n+\t\t\t\t\tQBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));\n \tmemcpy(&p[1], &cl[1], 28);\n \tmemcpy(&p[8], fd, sizeof(*fd));\n \t/* Set the verb byte, have to substitute in the valid-bit */\n \tlwsync();\n \tp[0] = cl[0] | EQAR_VB(eqar);\n \tqbman_cena_write_complete_wo_shadow(&s->sys,\n-\t\t\tQBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));\n+\t\t\t\t\tQBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));\n \treturn 0;\n }\n \n static int qbman_swp_enqueue_ring_mode(struct qbman_swp *s,\n \t\t\t\t const struct qbman_eq_desc *d,\n-\t\t\t\tconst struct qbman_fd *fd)\n+\t\t\t\t const struct qbman_fd *fd)\n {\n \tuint32_t *p;\n \tconst uint32_t *cl = qb_cl(d);\n@@ -509,19 +488,21 @@ static int qbman_swp_enqueue_ring_mode(struct qbman_swp *s,\n \t}\n \n \tp = qbman_cena_write_start_wo_shadow(&s->sys,\n-\t\tQBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));\n+\t\t\t\t\tQBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));\n \tmemcpy(&p[1], &cl[1], 28);\n \tmemcpy(&p[8], fd, sizeof(*fd));\n \tlwsync();\n+\n \t/* Set the verb byte, have to substitute in the valid-bit */\n \tp[0] = cl[0] | s->eqcr.pi_vb;\n \tqbman_cena_write_complete_wo_shadow(&s->sys,\n-\t\tQBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));\n+\t\t\t\t\tQBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));\n \ts->eqcr.pi++;\n \ts->eqcr.pi &= 0xF;\n \ts->eqcr.available--;\n \tif (!(s->eqcr.pi & 7))\n \t\ts->eqcr.pi_vb ^= QB_VALID_BIT;\n+\n \treturn 0;\n }\n \n@@ -672,23 +653,26 @@ int qbman_swp_enqueue_multiple_desc(struct qbman_swp *s,\n \n void qbman_swp_push_get(struct qbman_swp *s, uint8_t channel_idx, int *enabled)\n {\n-\tstruct qb_attr_code code = CODE_SDQCR_DQSRC(channel_idx);\n+\tuint16_t src = (s->sdq >> QB_SDQCR_SRC_SHIFT) & QB_SDQCR_SRC_MASK;\n \n \tQBMAN_BUG_ON(channel_idx > 15);\n-\t*enabled = (int)qb_attr_code_decode(&code, &s->sdq);\n+\t*enabled = src | (1 << channel_idx);\n }\n \n void qbman_swp_push_set(struct qbman_swp *s, uint8_t channel_idx, int enable)\n {\n \tuint16_t dqsrc;\n-\tstruct qb_attr_code code = CODE_SDQCR_DQSRC(channel_idx);\n \n \tQBMAN_BUG_ON(channel_idx > 15);\n-\tqb_attr_code_encode(&code, &s->sdq, !!enable);\n+\tif (enable)\n+\t\ts->sdq |= 1 << channel_idx;\n+\telse\n+\t\ts->sdq &= ~(1 << channel_idx);\n+\n \t/* Read make the complete src map. If no channels are enabled\n \t * the SDQCR must be 0 or else QMan will assert errors\n \t */\n-\tdqsrc = (uint16_t)qb_attr_code_decode(&code_sdqcr_dqsrc, &s->sdq);\n+\tdqsrc = (s->sdq >> QB_SDQCR_SRC_SHIFT) & QB_SDQCR_SRC_MASK;\n \tif (dqsrc != 0)\n \t\tqbman_cinh_write(&s->sys, QBMAN_CINH_SWP_SDQCR, s->sdq);\n \telse\n@@ -700,14 +684,10 @@ void qbman_swp_push_set(struct qbman_swp *s, uint8_t channel_idx, int enable)\n /***************************/\n \n /* These should be const, eventually */\n-static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);\n-static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);\n-static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);\n-static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);\n-static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 5);\n-static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);\n-static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);\n-static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);\n+#define QB_VDQCR_VERB_DCT_SHIFT 0\n+#define QB_VDQCR_VERB_DT_SHIFT 2\n+#define QB_VDQCR_VERB_RLS_SHIFT 4\n+#define QB_VDQCR_VERB_WAE_SHIFT 5\n \n enum qb_pull_dt_e {\n \tqb_pull_dt_channel,\n@@ -725,62 +705,52 @@ void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,\n \t\t\t\t dma_addr_t storage_phys,\n \t\t\t\t int stash)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\t/* Squiggle the pointer 'storage' into the extra 2 words of the\n-\t * descriptor (which aren't copied to the hw command)\n-\t */\n-\t*(void **)&cl[4] = storage;\n+\td->pull.rsp_addr_virt = (uint64_t)storage;\n+\n \tif (!storage) {\n-\t\tqb_attr_code_encode(&code_pull_rls, cl, 0);\n+\t\td->pull.verb &= ~(1 << QB_VDQCR_VERB_RLS_SHIFT);\n \t\treturn;\n \t}\n-\tqb_attr_code_encode(&code_pull_rls, cl, 1);\n-\tqb_attr_code_encode(&code_pull_stash, cl, !!stash);\n-\tqb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys);\n+\td->pull.verb |= 1 << QB_VDQCR_VERB_RLS_SHIFT;\n+\tif (stash)\n+\t\td->pull.verb |= 1 << QB_VDQCR_VERB_WAE_SHIFT;\n+\telse\n+\t\td->pull.verb &= ~(1 << QB_VDQCR_VERB_WAE_SHIFT);\n+\n+\td->pull.rsp_addr = storage_phys;\n }\n \n void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_pull_numframes, cl,\n-\t\t\t (uint32_t)(numframes - 1));\n+\td->pull.numf = numframes - 1;\n }\n \n void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_pull_token, cl, token);\n+\td->pull.tok = token;\n }\n \n void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_pull_dct, cl, 1);\n-\tqb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue);\n-\tqb_attr_code_encode(&code_pull_dqsource, cl, fqid);\n+\td->pull.verb |= 1 << QB_VDQCR_VERB_DCT_SHIFT;\n+\td->pull.verb |= qb_pull_dt_framequeue << QB_VDQCR_VERB_DT_SHIFT;\n+\td->pull.dq_src = fqid;\n }\n \n void qbman_pull_desc_set_wq(struct qbman_pull_desc *d, uint32_t wqid,\n \t\t\t enum qbman_pull_type_e dct)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_pull_dct, cl, dct);\n-\tqb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_workqueue);\n-\tqb_attr_code_encode(&code_pull_dqsource, cl, wqid);\n+\td->pull.verb |= dct << QB_VDQCR_VERB_DCT_SHIFT;\n+\td->pull.verb |= qb_pull_dt_workqueue << QB_VDQCR_VERB_DT_SHIFT;\n+\td->pull.dq_src = wqid;\n }\n \n void qbman_pull_desc_set_channel(struct qbman_pull_desc *d, uint32_t chid,\n \t\t\t\t enum qbman_pull_type_e dct)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_pull_dct, cl, dct);\n-\tqb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_channel);\n-\tqb_attr_code_encode(&code_pull_dqsource, cl, chid);\n+\td->pull.verb |= dct << QB_VDQCR_VERB_DCT_SHIFT;\n+\td->pull.verb |= qb_pull_dt_channel << QB_VDQCR_VERB_DT_SHIFT;\n+\td->pull.dq_src = chid;\n }\n \n int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)\n@@ -792,18 +762,18 @@ int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)\n \t\tatomic_inc(&s->vdq.busy);\n \t\treturn -EBUSY;\n \t}\n-\ts->vdq.storage = *(void **)&cl[4];\n-\t/* We use portal index +1 as token so that 0 still indicates\n-\t * that the result isn't valid yet.\n-\t */\n-\tqb_attr_code_encode(&code_pull_token, cl, s->desc.idx + 1);\n+\n+\td->pull.tok = s->sys.idx + 1;\n+\ts->vdq.storage = (void *)d->pull.rsp_addr_virt;\n \tp = qbman_cena_write_start_wo_shadow(&s->sys, QBMAN_CENA_SWP_VDQCR);\n \tmemcpy(&p[1], &cl[1], 12);\n+\n \t/* Set the verb byte, have to substitute in the valid-bit */\n \tlwsync();\n \tp[0] = cl[0] | s->vdq.valid_bit;\n \ts->vdq.valid_bit ^= QB_VALID_BIT;\n \tqbman_cena_write_complete_wo_shadow(&s->sys, QBMAN_CENA_SWP_VDQCR);\n+\n \treturn 0;\n }\n \n@@ -811,16 +781,7 @@ int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)\n /* Polling DQRR */\n /****************/\n \n-static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);\n-static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);\n-static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);\n-static struct qb_attr_code code_dqrr_seqnum = QB_CODE(0, 16, 14);\n-static struct qb_attr_code code_dqrr_odpid = QB_CODE(1, 0, 16);\n-/* static struct qb_attr_code code_dqrr_tok = QB_CODE(1, 24, 8); */\n-static struct qb_attr_code code_dqrr_fqid = QB_CODE(2, 0, 24);\n-static struct qb_attr_code code_dqrr_byte_count = QB_CODE(4, 0, 32);\n-static struct qb_attr_code code_dqrr_frame_count = QB_CODE(5, 0, 24);\n-static struct qb_attr_code code_dqrr_ctx_lo = QB_CODE(6, 0, 32);\n+#define QMAN_DQRR_PI_MASK 0xf\n \n #define QBMAN_RESULT_DQ 0x60\n #define QBMAN_RESULT_FQRN 0x21\n@@ -833,8 +794,6 @@ static struct qb_attr_code code_dqrr_ctx_lo = QB_CODE(6, 0, 32);\n #define QBMAN_RESULT_BPSCN 0x29\n #define QBMAN_RESULT_CSCN_WQ 0x2a\n \n-static struct qb_attr_code code_dqpi_pi = QB_CODE(0, 0, 4);\n-\n /* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry\n * only once, so repeated calls can return a sequence of DQRR entries, without\n * requiring they be consumed immediately or in any particular order.\n@@ -844,8 +803,7 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)\n \tuint32_t verb;\n \tuint32_t response_verb;\n \tuint32_t flags;\n-\tconst struct qbman_result *dq;\n-\tconst uint32_t *p;\n+\tconst struct qbman_result *p;\n \n \t/* Before using valid-bit to detect if something is there, we have to\n \t * handle the case of the DQRR reset bug...\n@@ -858,11 +816,13 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)\n \t\t * will be much less efficient than all subsequent trips around\n \t\t * it...\n \t\t */\n-\t\tuint32_t dqpi = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_DQPI);\n-\t\tuint32_t pi = qb_attr_code_decode(&code_dqpi_pi, &dqpi);\n+\t\tuint8_t pi = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_DQPI) &\n+\t\t\t QMAN_DQRR_PI_MASK;\n+\n \t\t/* there are new entries if pi != next_idx */\n \t\tif (pi == s->dqrr.next_idx)\n \t\t\treturn NULL;\n+\n \t\t/* if next_idx is/was the last ring index, and 'pi' is\n \t\t * different, we can disable the workaround as all the ring\n \t\t * entries have now been DMA'd to so valid-bit checking is\n@@ -877,12 +837,12 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)\n \t\t\ts->dqrr.reset_bug = 0;\n \t\t}\n \t\tqbman_cena_invalidate_prefetch(&s->sys,\n-\t\t\t\tQBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));\n+\t\t\t\t\tQBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));\n \t}\n-\tdq = qbman_cena_read_wo_shadow(&s->sys,\n-\t\t\t\t QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));\n-\tp = qb_cl(dq);\n-\tverb = qb_attr_code_decode(&code_dqrr_verb, p);\n+\tp = qbman_cena_read_wo_shadow(&s->sys,\n+\t\t\t\t QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));\n+\tverb = p->dq.verb;\n+\n \t/* If the valid-bit isn't of the expected polarity, nothing there. Note,\n \t * in the DQRR reset bug workaround, we shouldn't need to skip these\n \t * check, because we've already determined that a new entry is available\n@@ -902,16 +862,16 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)\n \t\ts->dqrr.valid_bit ^= QB_VALID_BIT;\n \t}\n \t/* If this is the final response to a volatile dequeue command\n-\t * indicate that the vdq is no longer busy.\n+\t * indicate that the vdq is no longer busy\n \t */\n-\tflags = qbman_result_DQ_flags(dq);\n-\tresponse_verb = qb_attr_code_decode(&code_dqrr_response, &verb);\n+\tflags = p->dq.stat;\n+\tresponse_verb = verb & QMAN_RESPONSE_VERB_MASK;\n \tif ((response_verb == QBMAN_RESULT_DQ) &&\n \t (flags & QBMAN_DQ_STAT_VOLATILE) &&\n \t (flags & QBMAN_DQ_STAT_EXPIRED))\n \t\tatomic_inc(&s->vdq.busy);\n \n-\treturn dq;\n+\treturn p;\n }\n \n /* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */\n@@ -924,80 +884,69 @@ void qbman_swp_dqrr_consume(struct qbman_swp *s,\n /*********************************/\n /* Polling user-provided storage */\n /*********************************/\n-\n-int qbman_result_has_new_result(__attribute__((unused)) struct qbman_swp *s,\n-\t\t\t\tconst struct qbman_result *dq)\n+int qbman_result_has_new_result(struct qbman_swp *s,\n+\t\t\t\tstruct qbman_result *dq)\n {\n-\t/* To avoid converting the little-endian DQ entry to host-endian prior\n-\t * to us knowing whether there is a valid entry or not (and run the\n-\t * risk of corrupting the incoming hardware LE write), we detect in\n-\t * hardware endianness rather than host. This means we need a different\n-\t * \"code\" depending on whether we are BE or LE in software, which is\n-\t * where DQRR_TOK_OFFSET comes in...\n+\tif (dq->dq.tok == 0)\n+\t\treturn 0;\n+\n+\t/*\n+\t * Set token to be 0 so we will detect change back to 1\n+\t * next time the looping is traversed. Const is cast away here\n+\t * as we want users to treat the dequeue responses as read only.\n \t */\n-\tstatic struct qb_attr_code code_dqrr_tok_detect =\n-\t\t\t\t\tQB_CODE(0, DQRR_TOK_OFFSET, 8);\n-\t/* The user trying to poll for a result treats \"dq\" as const. It is\n-\t * however the same address that was provided to us non-const in the\n-\t * first place, for directing hardware DMA to. So we can cast away the\n-\t * const because it is mutable from our perspective.\n+\t((struct qbman_result *)dq)->dq.tok = 0;\n+\n+\t/*\n+\t * VDQCR \"no longer busy\" hook - not quite the same as DQRR, because the\n+\t * fact \"VDQCR\" shows busy doesn't mean that we hold the result that\n+\t * makes it available. Eg. we may be looking at our 10th dequeue result,\n+\t * having released VDQCR after the 1st result and it is now busy due to\n+\t * some other command!\n \t */\n-\tuint32_t *p = (uint32_t *)(unsigned long)qb_cl(dq);\n-\tuint32_t token;\n+\tif (s->vdq.storage == dq) {\n+\t\ts->vdq.storage = NULL;\n+\t\tatomic_inc(&s->vdq.busy);\n+\t}\n+\n+\treturn 1;\n+}\n \n-\ttoken = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);\n-\tif (token == 0)\n+int qbman_check_new_result(struct qbman_result *dq)\n+{\n+\tif (dq->dq.tok == 0)\n \t\treturn 0;\n-\t/* Entry is valid - overwrite token back to 0 so\n-\t * a) If this memory is reused tokesn will be 0\n-\t * b) If someone calls \"has_new_result()\" again on this entry it\n-\t * will not appear to be new\n-\t */\n-\tqb_attr_code_encode(&code_dqrr_tok_detect, &p[1], 0);\n \n-\t/* Only now do we convert from hardware to host endianness. Also, as we\n-\t * are returning success, the user has promised not to call us again, so\n-\t * there's no risk of us converting the endianness twice...\n+\t/*\n+\t * Set token to be 0 so we will detect change back to 1\n+\t * next time the looping is traversed. Const is cast away here\n+\t * as we want users to treat the dequeue responses as read only.\n \t */\n-\tmake_le32_n(p, 16);\n+\t((struct qbman_result *)dq)->dq.tok = 0;\n+\n \treturn 1;\n }\n \n-int qbman_check_command_complete(struct qbman_swp *s,\n-\t\t\t\t const struct qbman_result *dq)\n+int qbman_check_command_complete(struct qbman_result *dq)\n {\n-\t/* To avoid converting the little-endian DQ entry to host-endian prior\n-\t * to us knowing whether there is a valid entry or not (and run the\n-\t * risk of corrupting the incoming hardware LE write), we detect in\n-\t * hardware endianness rather than host. This means we need a different\n-\t * \"code\" depending on whether we are BE or LE in software, which is\n-\t * where DQRR_TOK_OFFSET comes in...\n-\t */\n-\tstatic struct qb_attr_code code_dqrr_tok_detect =\n-\t\t\t\t\tQB_CODE(0, DQRR_TOK_OFFSET, 8);\n-\t/* The user trying to poll for a result treats \"dq\" as const. It is\n-\t * however the same address that was provided to us non-const in the\n-\t * first place, for directing hardware DMA to. So we can cast away the\n-\t * const because it is mutable from our perspective.\n-\t */\n-\tuint32_t *p = (uint32_t *)(unsigned long)qb_cl(dq);\n-\tuint32_t token;\n+\tstruct qbman_swp *s;\n \n-\ttoken = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);\n-\tif (token == 0)\n+\tif (dq->dq.tok == 0)\n \t\treturn 0;\n-\t/* TODO: Remove qbman_swp from parameters and make it a local\n-\t * once we've tested the reserve portal map change\n-\t */\n-\ts = portal_idx_map[token - 1];\n-\t/* When token is set it indicates that VDQ command has been fetched\n-\t * by qbman and is working on it. It is safe for software to issue\n-\t * another VDQ command, so incrementing the busy variable.\n+\n+\ts = portal_idx_map[dq->dq.tok - 1];\n+\t/*\n+\t * VDQCR \"no longer busy\" hook - not quite the same as DQRR, because the\n+\t * fact \"VDQCR\" shows busy doesn't mean that we hold the result that\n+\t * makes it available. Eg. we may be looking at our 10th dequeue result,\n+\t * having released VDQCR after the 1st result and it is now busy due to\n+\t * some other command!\n \t */\n \tif (s->vdq.storage == dq) {\n \t\ts->vdq.storage = NULL;\n \t\tatomic_inc(&s->vdq.busy);\n \t}\n+\n \treturn 1;\n }\n \n@@ -1005,23 +954,10 @@ int qbman_check_command_complete(struct qbman_swp *s,\n /* Categorising qbman results */\n /********************************/\n \n-static struct qb_attr_code code_result_in_mem =\n-\t\t\tQB_CODE(0, QBMAN_RESULT_VERB_OFFSET_IN_MEM, 7);\n-\n static inline int __qbman_result_is_x(const struct qbman_result *dq,\n-\t\t\t\t uint32_t x)\n-{\n-\tconst uint32_t *p = qb_cl(dq);\n-\tuint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p);\n-\n-\treturn (response_verb == x);\n-}\n-\n-static inline int __qbman_result_is_x_in_mem(const struct qbman_result *dq,\n-\t\t\t\t\t uint32_t x)\n+\t\t\t\t uint8_t x)\n {\n-\tconst uint32_t *p = qb_cl(dq);\n-\tuint32_t response_verb = qb_attr_code_decode(&code_result_in_mem, p);\n+\tuint8_t response_verb = dq->dq.verb & QMAN_RESPONSE_VERB_MASK;\n \n \treturn (response_verb == x);\n }\n@@ -1043,28 +979,28 @@ int qbman_result_is_CDAN(const struct qbman_result *dq)\n \n int qbman_result_is_CSCN(const struct qbman_result *dq)\n {\n-\treturn __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_CSCN_MEM) ||\n+\treturn __qbman_result_is_x(dq, QBMAN_RESULT_CSCN_MEM) ||\n \t\t__qbman_result_is_x(dq, QBMAN_RESULT_CSCN_WQ);\n }\n \n int qbman_result_is_BPSCN(const struct qbman_result *dq)\n {\n-\treturn __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_BPSCN);\n+\treturn __qbman_result_is_x(dq, QBMAN_RESULT_BPSCN);\n }\n \n int qbman_result_is_CGCU(const struct qbman_result *dq)\n {\n-\treturn __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_CGCU);\n+\treturn __qbman_result_is_x(dq, QBMAN_RESULT_CGCU);\n }\n \n int qbman_result_is_FQRN(const struct qbman_result *dq)\n {\n-\treturn __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_FQRN);\n+\treturn __qbman_result_is_x(dq, QBMAN_RESULT_FQRN);\n }\n \n int qbman_result_is_FQRNI(const struct qbman_result *dq)\n {\n-\treturn __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_FQRNI);\n+\treturn __qbman_result_is_x(dq, QBMAN_RESULT_FQRNI);\n }\n \n int qbman_result_is_FQPN(const struct qbman_result *dq)\n@@ -1078,109 +1014,62 @@ int qbman_result_is_FQPN(const struct qbman_result *dq)\n \n /* These APIs assume qbman_result_is_DQ() is TRUE */\n \n-uint32_t qbman_result_DQ_flags(const struct qbman_result *dq)\n+uint8_t qbman_result_DQ_flags(const struct qbman_result *dq)\n {\n-\tconst uint32_t *p = qb_cl(dq);\n-\n-\treturn qb_attr_code_decode(&code_dqrr_stat, p);\n+\treturn dq->dq.stat;\n }\n \n uint16_t qbman_result_DQ_seqnum(const struct qbman_result *dq)\n {\n-\tconst uint32_t *p = qb_cl(dq);\n-\n-\treturn (uint16_t)qb_attr_code_decode(&code_dqrr_seqnum, p);\n+\treturn dq->dq.seqnum;\n }\n \n uint16_t qbman_result_DQ_odpid(const struct qbman_result *dq)\n {\n-\tconst uint32_t *p = qb_cl(dq);\n-\n-\treturn (uint16_t)qb_attr_code_decode(&code_dqrr_odpid, p);\n+\treturn dq->dq.oprid;\n }\n \n uint32_t qbman_result_DQ_fqid(const struct qbman_result *dq)\n {\n-\tconst uint32_t *p = qb_cl(dq);\n-\n-\treturn qb_attr_code_decode(&code_dqrr_fqid, p);\n+\treturn dq->dq.fqid;\n }\n \n uint32_t qbman_result_DQ_byte_count(const struct qbman_result *dq)\n {\n-\tconst uint32_t *p = qb_cl(dq);\n-\n-\treturn qb_attr_code_decode(&code_dqrr_byte_count, p);\n+\treturn dq->dq.fq_byte_cnt;\n }\n \n uint32_t qbman_result_DQ_frame_count(const struct qbman_result *dq)\n {\n-\tconst uint32_t *p = qb_cl(dq);\n-\n-\treturn qb_attr_code_decode(&code_dqrr_frame_count, p);\n+\treturn dq->dq.fq_frm_cnt;\n }\n \n uint64_t qbman_result_DQ_fqd_ctx(const struct qbman_result *dq)\n {\n-\tconst uint64_t *p = (const uint64_t *)qb_cl(dq);\n-\n-\treturn qb_attr_code_decode_64(&code_dqrr_ctx_lo, p);\n+\treturn dq->dq.fqd_ctx;\n }\n \n const struct qbman_fd *qbman_result_DQ_fd(const struct qbman_result *dq)\n {\n-\tconst uint32_t *p = qb_cl(dq);\n-\n-\treturn (const struct qbman_fd *)&p[8];\n+\treturn (const struct qbman_fd *)&dq->dq.fd[0];\n }\n \n /**************************************/\n /* Parsing state-change notifications */\n /**************************************/\n-\n-static struct qb_attr_code code_scn_state = QB_CODE(0, 16, 8);\n-static struct qb_attr_code code_scn_rid = QB_CODE(1, 0, 24);\n-static struct qb_attr_code code_scn_state_in_mem =\n-\t\t\tQB_CODE(0, SCN_STATE_OFFSET_IN_MEM, 8);\n-static struct qb_attr_code code_scn_rid_in_mem =\n-\t\t\tQB_CODE(1, SCN_RID_OFFSET_IN_MEM, 24);\n-static struct qb_attr_code code_scn_ctx_lo = QB_CODE(2, 0, 32);\n-\n uint8_t qbman_result_SCN_state(const struct qbman_result *scn)\n {\n-\tconst uint32_t *p = qb_cl(scn);\n-\n-\treturn (uint8_t)qb_attr_code_decode(&code_scn_state, p);\n+\treturn scn->scn.state;\n }\n \n uint32_t qbman_result_SCN_rid(const struct qbman_result *scn)\n {\n-\tconst uint32_t *p = qb_cl(scn);\n-\n-\treturn qb_attr_code_decode(&code_scn_rid, p);\n+\treturn scn->scn.rid_tok;\n }\n \n uint64_t qbman_result_SCN_ctx(const struct qbman_result *scn)\n {\n-\tconst uint64_t *p = (const uint64_t *)qb_cl(scn);\n-\n-\treturn qb_attr_code_decode_64(&code_scn_ctx_lo, p);\n-}\n-\n-uint8_t qbman_result_SCN_state_in_mem(const struct qbman_result *scn)\n-{\n-\tconst uint32_t *p = qb_cl(scn);\n-\n-\treturn (uint8_t)qb_attr_code_decode(&code_scn_state_in_mem, p);\n-}\n-\n-uint32_t qbman_result_SCN_rid_in_mem(const struct qbman_result *scn)\n-{\n-\tconst uint32_t *p = qb_cl(scn);\n-\tuint32_t result_rid;\n-\n-\tresult_rid = qb_attr_code_decode(&code_scn_rid_in_mem, p);\n-\treturn make_le24(result_rid);\n+\treturn scn->scn.ctx;\n }\n \n /*****************/\n@@ -1188,22 +1077,22 @@ uint32_t qbman_result_SCN_rid_in_mem(const struct qbman_result *scn)\n /*****************/\n uint16_t qbman_result_bpscn_bpid(const struct qbman_result *scn)\n {\n-\treturn (uint16_t)qbman_result_SCN_rid_in_mem(scn) & 0x3FFF;\n+\treturn (uint16_t)qbman_result_SCN_rid(scn) & 0x3FFF;\n }\n \n int qbman_result_bpscn_has_free_bufs(const struct qbman_result *scn)\n {\n-\treturn !(int)(qbman_result_SCN_state_in_mem(scn) & 0x1);\n+\treturn !(int)(qbman_result_SCN_state(scn) & 0x1);\n }\n \n int qbman_result_bpscn_is_depleted(const struct qbman_result *scn)\n {\n-\treturn (int)(qbman_result_SCN_state_in_mem(scn) & 0x2);\n+\treturn (int)(qbman_result_SCN_state(scn) & 0x2);\n }\n \n int qbman_result_bpscn_is_surplus(const struct qbman_result *scn)\n {\n-\treturn (int)(qbman_result_SCN_state_in_mem(scn) & 0x4);\n+\treturn (int)(qbman_result_SCN_state(scn) & 0x4);\n }\n \n uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)\n@@ -1214,6 +1103,7 @@ uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)\n \tctx = qbman_result_SCN_ctx(scn);\n \tctx_hi = upper32(ctx);\n \tctx_lo = lower32(ctx);\n+\n \treturn ((uint64_t)make_le32(ctx_hi) << 32 |\n \t\t(uint64_t)make_le32(ctx_lo));\n }\n@@ -1223,7 +1113,7 @@ uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)\n /*****************/\n uint16_t qbman_result_cgcu_cgid(const struct qbman_result *scn)\n {\n-\treturn (uint16_t)qbman_result_SCN_rid_in_mem(scn) & 0xFFFF;\n+\treturn (uint16_t)qbman_result_SCN_rid(scn) & 0xFFFF;\n }\n \n uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)\n@@ -1234,6 +1124,7 @@ uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)\n \tctx = qbman_result_SCN_ctx(scn);\n \tctx_hi = upper32(ctx);\n \tctx_lo = lower32(ctx);\n+\n \treturn ((uint64_t)(make_le32(ctx_hi) & 0xFF) << 32) |\n \t\t(uint64_t)make_le32(ctx_lo);\n }\n@@ -1241,34 +1132,26 @@ uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)\n /******************/\n /* Buffer release */\n /******************/\n-\n-/* These should be const, eventually */\n-/* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */\n-static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);\n-static struct qb_attr_code code_release_rcdi = QB_CODE(0, 6, 1);\n-static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);\n+#define QB_BR_RC_VALID_SHIFT 5\n+#define QB_BR_RCDI_SHIFT 6\n \n void qbman_release_desc_clear(struct qbman_release_desc *d)\n {\n-\tuint32_t *cl;\n-\n \tmemset(d, 0, sizeof(*d));\n-\tcl = qb_cl(d);\n-\tqb_attr_code_encode(&code_release_set_me, cl, 1);\n+\td->br.verb = 1 << QB_BR_RC_VALID_SHIFT;\n }\n \n-void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)\n+void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint16_t bpid)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_release_bpid, cl, bpid);\n+\td->br.bpid = bpid;\n }\n \n void qbman_release_desc_set_rcdi(struct qbman_release_desc *d, int enable)\n {\n-\tuint32_t *cl = qb_cl(d);\n-\n-\tqb_attr_code_encode(&code_release_rcdi, cl, !!enable);\n+\tif (enable)\n+\t\td->br.verb |= 1 << QB_BR_RCDI_SHIFT;\n+\telse\n+\t\td->br.verb &= ~(1 << QB_BR_RCDI_SHIFT);\n }\n \n #define RAR_IDX(rar) ((rar) & 0x7)\n@@ -1285,12 +1168,16 @@ int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,\n \tpr_debug(\"RAR=%08x\\n\", rar);\n \tif (!RAR_SUCCESS(rar))\n \t\treturn -EBUSY;\n+\n \tQBMAN_BUG_ON(!num_buffers || (num_buffers > 7));\n+\n \t/* Start the release command */\n \tp = qbman_cena_write_start_wo_shadow(&s->sys,\n \t\t\t\t\t QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));\n+\n \t/* Copy the caller's buffer pointers to the command */\n \tu64_to_le32_copy(&p[2], buffers, num_buffers);\n+\n \t/* Set the verb byte, have to substitute in the valid-bit and the number\n \t * of buffers.\n \t */\n@@ -1298,25 +1185,38 @@ int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,\n \tp[0] = cl[0] | RAR_VB(rar) | num_buffers;\n \tqbman_cena_write_complete_wo_shadow(&s->sys,\n \t\t\t\t\t QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));\n+\n \treturn 0;\n }\n \n /*******************/\n /* Buffer acquires */\n /*******************/\n+struct qbman_acquire_desc {\n+\tuint8_t verb;\n+\tuint8_t reserved;\n+\tuint16_t bpid;\n+\tuint8_t num;\n+\tuint8_t reserved2[59];\n+};\n \n-/* These should be const, eventually */\n-static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);\n-static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);\n-static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);\n+struct qbman_acquire_rslt {\n+\tuint8_t verb;\n+\tuint8_t rslt;\n+\tuint16_t reserved;\n+\tuint8_t num;\n+\tuint8_t reserved2[3];\n+\tuint64_t buf[7];\n+};\n \n-int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,\n+int qbman_swp_acquire(struct qbman_swp *s, uint16_t bpid, uint64_t *buffers,\n \t\t unsigned int num_buffers)\n {\n-\tuint32_t *p;\n-\tuint32_t rslt, num;\n+\tstruct qbman_acquire_desc *p;\n+\tstruct qbman_acquire_rslt *r;\n \n-\tQBMAN_BUG_ON(!num_buffers || (num_buffers > 7));\n+\tif (!num_buffers || (num_buffers > 7))\n+\t\treturn -EINVAL;\n \n \t/* Start the management command */\n \tp = qbman_swp_mc_start(s);\n@@ -1325,59 +1225,81 @@ int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,\n \t\treturn -EBUSY;\n \n \t/* Encode the caller-provided attributes */\n-\tqb_attr_code_encode(&code_acquire_bpid, p, bpid);\n-\tqb_attr_code_encode(&code_acquire_num, p, num_buffers);\n+\tp->bpid = bpid;\n+\tp->num = num_buffers;\n \n \t/* Complete the management command */\n-\tp = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE);\n+\tr = qbman_swp_mc_complete(s, p, QBMAN_MC_ACQUIRE);\n+\tif (unlikely(!r)) {\n+\t\tpr_err(\"qbman: acquire from BPID %d failed, no response\\n\",\n+\t\t bpid);\n+\t\treturn -EIO;\n+\t}\n \n \t/* Decode the outcome */\n-\trslt = qb_attr_code_decode(&code_generic_rslt, p);\n-\tnum = qb_attr_code_decode(&code_acquire_r_num, p);\n-\tQBMAN_BUG_ON(qb_attr_code_decode(&code_generic_verb, p) !=\n-\t\t QBMAN_MC_ACQUIRE);\n+\tQBMAN_BUG_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != QBMAN_MC_ACQUIRE);\n \n \t/* Determine success or failure */\n-\tif (unlikely(rslt != QBMAN_MC_RSLT_OK)) {\n+\tif (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {\n \t\tpr_err(\"Acquire buffers from BPID 0x%x failed, code=0x%02x\\n\",\n-\t\t bpid, rslt);\n+\t\t bpid, r->rslt);\n \t\treturn -EIO;\n \t}\n-\tQBMAN_BUG_ON(num > num_buffers);\n+\n+\tQBMAN_BUG_ON(r->num > num_buffers);\n+\n \t/* Copy the acquired buffers to the caller's array */\n-\tu64_from_le32_copy(buffers, &p[2], num);\n-\treturn (int)num;\n+\tu64_from_le32_copy(buffers, &r->buf[0], r->num);\n+\n+\treturn (int)r->num;\n }\n \n /*****************/\n /* FQ management */\n /*****************/\n+struct qbman_alt_fq_state_desc {\n+\tuint8_t verb;\n+\tuint8_t reserved[3];\n+\tuint32_t fqid;\n+\tuint8_t reserved2[56];\n+};\n+\n+struct qbman_alt_fq_state_rslt {\n+\tuint8_t verb;\n+\tuint8_t rslt;\n+\tuint8_t reserved[62];\n+};\n \n-static struct qb_attr_code code_fqalt_fqid = QB_CODE(1, 0, 32);\n+#define ALT_FQ_FQID_MASK 0x00FFFFFF\n \n static int qbman_swp_alt_fq_state(struct qbman_swp *s, uint32_t fqid,\n \t\t\t\t uint8_t alt_fq_verb)\n {\n-\tuint32_t *p;\n-\tuint32_t rslt;\n+\tstruct qbman_alt_fq_state_desc *p;\n+\tstruct qbman_alt_fq_state_rslt *r;\n \n \t/* Start the management command */\n \tp = qbman_swp_mc_start(s);\n \tif (!p)\n \t\treturn -EBUSY;\n \n-\tqb_attr_code_encode(&code_fqalt_fqid, p, fqid);\n+\tp->fqid = fqid & ALT_FQ_FQID_MASK;\n+\n \t/* Complete the management command */\n-\tp = qbman_swp_mc_complete(s, p, p[0] | alt_fq_verb);\n+\tr = qbman_swp_mc_complete(s, p, alt_fq_verb);\n+\tif (unlikely(!r)) {\n+\t\tpr_err(\"qbman: mgmt cmd failed, no response (verb=0x%x)\\n\",\n+\t\t alt_fq_verb);\n+\t\treturn -EIO;\n+\t}\n \n \t/* Decode the outcome */\n-\trslt = qb_attr_code_decode(&code_generic_rslt, p);\n-\tQBMAN_BUG_ON(qb_attr_code_decode(&code_generic_verb, p) != alt_fq_verb);\n+\tQBMAN_BUG_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != alt_fq_verb);\n \n \t/* Determine success or failure */\n-\tif (unlikely(rslt != QBMAN_MC_RSLT_OK)) {\n+\tif (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {\n \t\tpr_err(\"ALT FQID %d failed: verb = 0x%08x, code = 0x%02x\\n\",\n-\t\t fqid, alt_fq_verb, rslt);\n+\t\t fqid, alt_fq_verb, r->rslt);\n \t\treturn -EIO;\n \t}\n \n@@ -1408,10 +1330,24 @@ int qbman_swp_fq_xoff(struct qbman_swp *s, uint32_t fqid)\n /* Channel management */\n /**********************/\n \n-static struct qb_attr_code code_cdan_cid = QB_CODE(0, 16, 12);\n-static struct qb_attr_code code_cdan_we = QB_CODE(1, 0, 8);\n-static struct qb_attr_code code_cdan_en = QB_CODE(1, 8, 1);\n-static struct qb_attr_code code_cdan_ctx_lo = QB_CODE(2, 0, 32);\n+struct qbman_cdan_ctrl_desc {\n+\tuint8_t verb;\n+\tuint8_t reserved;\n+\tuint16_t ch;\n+\tuint8_t we;\n+\tuint8_t ctrl;\n+\tuint16_t reserved2;\n+\tuint64_t cdan_ctx;\n+\tuint8_t reserved3[48];\n+\n+};\n+\n+struct qbman_cdan_ctrl_rslt {\n+\tuint8_t verb;\n+\tuint8_t rslt;\n+\tuint16_t ch;\n+\tuint8_t reserved[60];\n+};\n \n /* Hide \"ICD\" for now as we don't use it, don't set it, and don't test it, so it\n * would be irresponsible to expose it.\n@@ -1423,8 +1359,8 @@ static int qbman_swp_CDAN_set(struct qbman_swp *s, uint16_t channelid,\n \t\t\t uint8_t we_mask, uint8_t cdan_en,\n \t\t\t uint64_t ctx)\n {\n-\tuint32_t *p;\n-\tuint32_t rslt;\n+\tstruct qbman_cdan_ctrl_desc *p;\n+\tstruct qbman_cdan_ctrl_rslt *r;\n \n \t/* Start the management command */\n \tp = qbman_swp_mc_start(s);\n@@ -1432,22 +1368,29 @@ static int qbman_swp_CDAN_set(struct qbman_swp *s, uint16_t channelid,\n \t\treturn -EBUSY;\n \n \t/* Encode the caller-provided attributes */\n-\tqb_attr_code_encode(&code_cdan_cid, p, channelid);\n-\tqb_attr_code_encode(&code_cdan_we, p, we_mask);\n-\tqb_attr_code_encode(&code_cdan_en, p, cdan_en);\n-\tqb_attr_code_encode_64(&code_cdan_ctx_lo, (uint64_t *)p, ctx);\n+\tp->ch = channelid;\n+\tp->we = we_mask;\n+\tif (cdan_en)\n+\t\tp->ctrl = 1;\n+\telse\n+\t\tp->ctrl = 0;\n+\tp->cdan_ctx = ctx;\n+\n \t/* Complete the management command */\n-\tp = qbman_swp_mc_complete(s, p, p[0] | QBMAN_WQCHAN_CONFIGURE);\n+\tr = qbman_swp_mc_complete(s, p, QBMAN_WQCHAN_CONFIGURE);\n+\tif (unlikely(!r)) {\n+\t\tpr_err(\"qbman: wqchan config failed, no response\\n\");\n+\t\treturn -EIO;\n+\t}\n \n \t/* Decode the outcome */\n-\trslt = qb_attr_code_decode(&code_generic_rslt, p);\n-\tQBMAN_BUG_ON(qb_attr_code_decode(&code_generic_verb, p)\n-\t\t\t\t\t!= QBMAN_WQCHAN_CONFIGURE);\n+\tQBMAN_BUG_ON((r->verb & QBMAN_RESPONSE_VERB_MASK)\n+\t\t != QBMAN_WQCHAN_CONFIGURE);\n \n \t/* Determine success or failure */\n-\tif (unlikely(rslt != QBMAN_MC_RSLT_OK)) {\n+\tif (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {\n \t\tpr_err(\"CDAN cQID %d failed: code = 0x%02x\\n\",\n-\t\t channelid, rslt);\n+\t\t channelid, r->rslt);\n \t\treturn -EIO;\n \t}\n \ndiff --git a/drivers/bus/fslmc/qbman/qbman_portal.h b/drivers/bus/fslmc/qbman/qbman_portal.h\nindex 8018048..bfcef8f 100644\n--- a/drivers/bus/fslmc/qbman/qbman_portal.h\n+++ b/drivers/bus/fslmc/qbman/qbman_portal.h\n@@ -123,12 +123,12 @@ struct qbman_swp {\n * non-NULL if only if the response is complete).\n */\n void *qbman_swp_mc_start(struct qbman_swp *p);\n-void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb);\n+void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint8_t cmd_verb);\n void *qbman_swp_mc_result(struct qbman_swp *p);\n \n /* Wraps up submit + poll-for-result */\n static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,\n-\t\t\t\t\t uint32_t cmd_verb)\n+\t\t\t\t\t uint8_t cmd_verb)\n {\n \tint loopvar;\n \n@@ -275,4 +275,4 @@ static inline int32_t qb_attr_code_makesigned(const struct qb_attr_code *code,\n * an inline) is necessary to work with different descriptor types and to work\n * correctly with const and non-const inputs (and similarly-qualified outputs).\n */\n-#define qb_cl(d) (&(d)->dont_manipulate_directly[0])\n+#define qb_cl(d) (&(d)->donot_manipulate_directly[0])\ndiff --git a/drivers/bus/fslmc/qbman/qbman_private.h b/drivers/bus/fslmc/qbman/qbman_private.h\nindex b98c330..4f48b47 100644\n--- a/drivers/bus/fslmc/qbman/qbman_private.h\n+++ b/drivers/bus/fslmc/qbman/qbman_private.h\n@@ -92,7 +92,7 @@ do { \\\n *\n */\n #ifdef __LP64__\n-#define MAKE_MASK32(width) ((uint32_t)(( 1ULL << width) - 1))\n+#define MAKE_MASK32(width) ((uint32_t)((1ULL << width) - 1))\n #else\n #define MAKE_MASK32(width) (width == 32 ? 0xffffffff : \\\n \t\t\t\t (uint32_t)((1 << width) - 1))\ndiff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h\nindex 47da595..c73d2bf 100644\n--- a/drivers/bus/fslmc/qbman/qbman_sys.h\n+++ b/drivers/bus/fslmc/qbman/qbman_sys.h\n@@ -357,15 +357,3 @@ static inline void qbman_swp_sys_finish(struct qbman_swp_sys *s)\n {\n \tfree_page((unsigned long)s->cena);\n }\n-\n-static inline void *\n-qbman_cena_write_start_wo_shadow_fast(struct qbman_swp_sys *s,\n-\t\t\t\t uint32_t offset)\n-{\n-#ifdef QBMAN_CENA_TRACE\n-\tpr_info(\"qbman_cena_write_start(%p:%d:0x%03x)\\n\",\n-\t\ts->addr_cena, s->idx, offset);\n-#endif\n-\tQBMAN_BUG_ON(offset & 63);\n-\treturn (s->addr_cena + offset);\n-}\ndiff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map\nindex 13fb46a..3cc7dad 100644\n--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map\n+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map\n@@ -62,11 +62,12 @@ DPDK_17.08 {\n \tdpio_remove_static_dequeue_channel;\n \tmc_get_soc_version;\n \tmc_get_version;\n+\tqbman_check_new_result;\n \tqbman_eq_desc_set_dca;\n \tqbman_get_dqrr_from_idx;\n \tqbman_get_dqrr_idx;\n \tqbman_result_DQ_fqd_ctx;\n-\tqbman_result_SCN_state_in_mem;\n+\tqbman_result_SCN_state;\n \tqbman_swp_dqrr_consume;\n \tqbman_swp_dqrr_next;\n \tqbman_swp_enqueue_multiple;\ndiff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\nindex 094cf30..d2aff28 100644\n--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\n+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c\n@@ -747,13 +747,13 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,\n \t\t * Also seems like the SWP is shared between the Ethernet Driver\n \t\t * and the SEC driver.\n \t\t */\n-\t\twhile (!qbman_check_command_complete(swp, dq_storage))\n+\t\twhile (!qbman_check_command_complete(dq_storage))\n \t\t\t;\n \n \t\t/* Loop until the dq_storage is updated with\n \t\t * new token by QBMAN\n \t\t */\n-\t\twhile (!qbman_result_has_new_result(swp, dq_storage))\n+\t\twhile (!qbman_check_new_result(dq_storage))\n \t\t\t;\n \t\t/* Check whether Last Pull command is Expired and\n \t\t * setting Condition for Loop termination\ndiff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c\nindex 4342c73..75a06f5 100644\n--- a/drivers/net/dpaa2/dpaa2_rxtx.c\n+++ b/drivers/net/dpaa2/dpaa2_rxtx.c\n@@ -422,7 +422,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \t\tqbman_pull_desc_set_storage(&pulldesc, dq_storage,\n \t\t\t(dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);\n \t\tif (check_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)) {\n-\t\t\twhile (!qbman_check_command_complete(swp,\n+\t\t\twhile (!qbman_check_command_complete(\n \t\t\t get_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)))\n \t\t\t\t;\n \t\t\tclear_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index);\n@@ -445,7 +445,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \t * Also seems like the SWP is shared between the Ethernet Driver\n \t * and the SEC driver.\n \t */\n-\twhile (!qbman_check_command_complete(swp, dq_storage))\n+\twhile (!qbman_check_command_complete(dq_storage))\n \t\t;\n \tif (dq_storage == get_swp_active_dqs(q_storage->active_dpio_id))\n \t\tclear_swp_active_dqs(q_storage->active_dpio_id);\n@@ -453,7 +453,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \t\t/* Loop until the dq_storage is updated with\n \t\t * new token by QBMAN\n \t\t */\n-\t\twhile (!qbman_result_has_new_result(swp, dq_storage))\n+\t\twhile (!qbman_check_new_result(dq_storage))\n \t\t\t;\n \t\trte_prefetch0((void *)((uint64_t)(dq_storage + 1)));\n \t\t/* Check whether Last Pull command is Expired and\n@@ -486,7 +486,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \t}\n \n \tif (check_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)) {\n-\t\twhile (!qbman_check_command_complete(swp,\n+\t\twhile (!qbman_check_command_complete(\n \t\t get_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)))\n \t\t\t;\n \t\tclear_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index);\n@@ -560,7 +560,7 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)\n \twhile (nb_pkts) {\n \t\t/*Check if the queue is congested*/\n \t\tretry_count = 0;\n-\t\tif (qbman_result_SCN_state_in_mem(dpaa2_q->cscn)) {\n+\t\twhile (qbman_result_SCN_state(dpaa2_q->cscn)) {\n \t\t\tretry_count++;\n \t\t\t/* Retry for some time before giving up */\n \t\t\tif (retry_count > CONG_RETRY_COUNT)\n", "prefixes": [ "dpdk-dev", "v2", "06/30" ] }