Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/27858/?format=api
{ "id": 27858, "url": "https://patches.dpdk.org/api/patches/27858/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20170824132903.32057-5-santosh.shukla@caviumnetworks.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20170824132903.32057-5-santosh.shukla@caviumnetworks.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20170824132903.32057-5-santosh.shukla@caviumnetworks.com", "date": "2017-08-24T13:28:56", "name": "[dpdk-dev,v1,04/11] mempool/octeontx: implement pool alloc", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "6721a80b25bcce9a65c51ab91d71167556386b1c", "submitter": { "id": 480, "url": "https://patches.dpdk.org/api/people/480/?format=api", "name": "Santosh Shukla", "email": "santosh.shukla@caviumnetworks.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20170824132903.32057-5-santosh.shukla@caviumnetworks.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/27858/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/27858/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 7D1A27D9A;\n\tThu, 24 Aug 2017 15:30:04 +0200 (CEST)", "from NAM01-SN1-obe.outbound.protection.outlook.com\n\t(mail-sn1nam01on0071.outbound.protection.outlook.com [104.47.32.71])\n\tby dpdk.org (Postfix) with ESMTP id 8B8A62C15\n\tfor <dev@dpdk.org>; Thu, 24 Aug 2017 15:30:03 +0200 (CEST)", "from localhost.localdomain (14.140.2.178) by\n\tCY4PR07MB3093.namprd07.prod.outlook.com (10.172.115.7) with Microsoft\n\tSMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.1.1362.18; Thu, 24 Aug 2017 13:29:59 +0000" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=CAVIUMNETWORKS.onmicrosoft.com; s=selector1-cavium-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=Nnr1KQQCfk61iplQhvOeaiqZCm/0Rs6xPXEh4nf7CJQ=;\n\tb=iF//kPztLwPwnHDE6iOEhNtiR1LOT9DYp95E5/Wtus7pjtolpiaAZVSpf8CqhWifR6esiZnXbCwKOTzVH9wouaVhHKkI3UfC1aphuRyYt6IqJTj6dtOksScEfXdSJKZoha+CxtY2iuSnbX5jiHh423JB48jvxG5s40blgqSH+DM=", "Authentication-Results": "spf=none (sender IP is )\n\tsmtp.mailfrom=Santosh.Shukla@cavium.com; ", "From": "Santosh Shukla <santosh.shukla@caviumnetworks.com>", "To": "olivier.matz@6wind.com,\n\tdev@dpdk.org", "Cc": "thomas@monjalon.net, jerin.jacob@caviumnetworks.com,\n\themant.agrawal@nxp.com,\n\tSantosh Shukla <santosh.shukla@caviumnetworks.com>", "Date": "Thu, 24 Aug 2017 18:58:56 +0530", "Message-Id": "<20170824132903.32057-5-santosh.shukla@caviumnetworks.com>", "X-Mailer": "git-send-email 2.11.0", "In-Reply-To": "<20170824132903.32057-1-santosh.shukla@caviumnetworks.com>", "References": "<20170824132903.32057-1-santosh.shukla@caviumnetworks.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[14.140.2.178]", "X-ClientProxiedBy": "BM1PR01CA0071.INDPRD01.PROD.OUTLOOK.COM (10.174.208.139)\n\tTo CY4PR07MB3093.namprd07.prod.outlook.com (10.172.115.7)", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "68bfeb83-d9ee-48be-d420-08d4eaf4392e", "X-Microsoft-Antispam": "UriScan:; BCL:0; PCL:0;\n\tRULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(2017030254152)(300000503095)(300135400095)(201703131423075)(201703031133081)(201702281549075)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);\n\tSRVR:CY4PR07MB3093; ", "X-Microsoft-Exchange-Diagnostics": [ "1; CY4PR07MB3093;\n\t3:NYXXoLIRHFb7yx3l6VJBGA463vJAT0lwBAiaOx4jzvN6kgfo90AqUKJov4q3RIY7UNrwOr70DDFSwN6sPvnl0NJzmKn51DcCkBzLhm9LloFM/WlGP1jk0TfJyjXKYm2LpMmAULsTEsGDe+gb8SaET1Fec8mARNtweK5ONCzdUInDLVm1Y66Ib0eAZFQSBSvpbli3+licZMXL4wUuu/P53HBW2ifPwbxagNsBJsOrhIbjmK1tj3qyr4myxqH9QNdd;\n\t25:Llh4fIrtoexjqV8WbmPXiFBfHKb0cOqHTUAgQCBsS0C3qSjyHIEbpDN8xQ/FlTg75uDpdqi6Ut4w8Xp5SGC6Q3YkxGY/bFGYyDKVW/e90ZRS41sYWRUktZnomurWhOCcZJdCQRCv3yUnQ2YhLHOfFYAyyZkmZ9fUlfxmjlBYCBzqyC/leL3K3Z74nDBj9SoqlSjWnY8klOPRNTjNvhHJxVq9ZqwY2IFTo28r1Z0thCUFmOzUQr7eCIDkr8V4a5iV5eNrvl3XJhirDejdNEPxOVtDuE75Y8z9zYnegrGBDvw4M48W6UmkH1oTl8eKtd6Cc3U8Y9AmR38XlOjmdJqq3g==;\n\t31:airCQ9hIdkaDh70l5NWSh56CCrZBADFxtW23KuDGd9BO7YTBb1xwVMOoCsSPjZaiGoD9sBF+VCd7dyFmt6WW4x0Ia8Fiw36s42pijSJawPrUE77BVY0X3uPBe1dKHdzq3YS27iKNZuhgy1oboPLVAO2G3ObH0/U+hApZhslbRMfBo/BR7m+fjrxCVHjEVGaT/uy5mDdX7rmhQTGxm9RX6lI3EOHtRsYyeZRGNz4VYHs=", "1; CY4PR07MB3093;\n\t20:EsB1SXDBhFKeKwW//i4w/HHJgYzyYO9u6zheqkFNaxMepOIn5+et2LOZ6npGaJQPhYGiArJPa3yunCzWYibLRAiMmIhGPo8Dvlpkr+5pdrDqdMvePXlQ9GBSZQOz3zmDvmEO9thRkPmOCqwUJRqHzdr9PO8/UpHBodb8irQzpupwJhvxFnnXBUbdC4wbIW9Yhu37bm7sv5EDrp8gPXmCXnmGLr80TuiunjTcLoK3ovT6t0V9O2wGZREXqj9Acdzgi3SRfaPKN6ic7B32IUxfAphIdEP4KoJ3HTCTauXIAvaS7+DX7OS4bQnX+P6alN8xhyBKNLcaMHw5bLpqY4MgeNrkUOC4AXl6TJ/vrCYgcGEc/vbNPP8QkgdUo8DT5ljkNesZhJO25uLu6PTzWewQ48OtIluC7NZFZjdUtmCQfEMTTh7eEqb6HkkTp81feFkrejy/fPfUPunl/FKBIqWF5iEZ+S8D28h1PcwP0MggIw8ZBS42fOOqZuYUTGC0ZcrR/bRm9F2G0MR/fTSuF7aHxH7PO3iq+aWjXifVG4jI1rDkqH2V/Vv3sADPL29ztwCkc7nKNr/ehoUxR0rtg3WovjTBVukcYAk4KvqcWmiAXQQ=;\n\t4:mMp1tppHTqmqslp8+6uGlB2JLf3ul1WRwBevwVS96UkfPN/ey3F83EobXjKv80+bnTGyla/3aXMARIutLNBxYLwfkSSpqec9cPTyihjB3R5dMbQb2CL6cedj3sUvlRKcL87yVZbvo9JsWmCqe0HHDv8js0r8DgFvQ75WqEcnX942xS4LTnZAF4017Cbopl+lCmCU2uNkwMJIvcbrwm22BtWi7xhdn8j66FsPS4NZnvWMxyUqCpSoxBwkwoHFF6n5", "=?us-ascii?Q?1; CY4PR07MB3093;\n\t23:Z4zMRQDAxzanFvMof/5jf2dWMWvCLwkfcVZ4mgOkd?=\n\tNNFCY+140t4TqJ3sHZdcOWSZjlC3NHT7K6JfAYzvyfXMxHN0BkGf535GOdOnU+gPgLoecyLRsfClvzYAmsUXfcqxMz3pJeaY9Q+N3FM5CY8ZAI20KRSf975qFqzWjjoiJaNHJJWvztzzvXZ2rCQ0aNljDmtqfb7RoV8EpslPoyM35AFjuoRJxbmLqjxwZjwUCErOWN1sqIKQAMHAU+bycq2r/jmgcnBEZhhLB6uS640qsg9ZR7vlFpDR0gvWjAqbu+vTHcICWJgtB4e22H3UyMDfSqtcoSBmopuFuhBeeweZeTVC12/g0OGLyWO5i3bxHSBXRK75xfBUKGcAOzJD/uzNYSxQrL6BHmZ47I9t07ukPQE0NT9b+ytgtqtlzRjsrv5WB1znlRjIpqbix0S+cS0XQ4Bhsql0CATUql2d4RVYSp9x7PI0n4zc3Lb4B5FyyhcBCSSUkPFnu0SNqoI2vYeSLN/nK4gxVt1CIrqaUMk5qde+KlHROKqb2hJSvDb3My4RjB+hb9hMVbnG9MpzL3MYLJtmcLOl0/nWnm74XIQF00C3hI3SlV3bq/XImqECEGfI4QKxuM8W2+gbT4IkFKQQUXq9vT1q2K7STJdeOoNynzKWUiMjh6WV/XroYXdpznxJVMjV8iUG5GgpV+/z9LRs9wpbcdHXUcYrDgHv/WkiJt56iUyNrE3IZMa+OihWcpYDtOujgV+SeuLyFpGFOVvX+knmlUyxOPABicP+bxUIsmzJzfK2g8lVnv39KIdzXqVuUBrDbkXRP4j/im0Po/XihakVGkG0V5UhZl9jMIhdpaHUIxY8UIvZ/ORPBuoeqAbhrrN2nWVmjEEDe1qFOgxQJezzpozCxr196VjKJRobZo9N8iN+WRdxeHB4ZdzkEEpd3iEFERD+mJqYdmQjy5UEOGCKGVzvWj41NepG3GfIb+lrtcjIRkRKLnkBj89jviKVlQT+z0SQgSbuF1C36cpdcVTKlWUKIHSdI5kujnBOKQFm8u2JWK1TeAk+jkT3ll1Yl9sgwpR34jN97gCE+vjold76l2lUR2LD5mN6guxVufp0IRkox2cBduTn+dPhCf3i3Owb8yomA9olMcpdXA4OzksV5DYeVx7FFdo2rYLSPsq61m9umA61ieLhIwUn1Lz2jt/+ylyduZ/viwQyu2jVxSyIryMfOP3kuEjcr3QOZkEUO3Gey+dzGo+qHNG86uHrMrWgA/rM7mOIXGBWqHW", "1; CY4PR07MB3093;\n\t6:KfT3l239YitapurXQefCTH6/gYIajiSRhKCYfst6jg2dh0XIPMWd6I31VX83A21yzmXljmbEc/vatYCsxj3EljXhSIlCyP9zrB/X9lrZySiDVk3DtuMuDfkbaCvq6xyaGAuq0nopldoqXBqQUVVJC8ECSH0F+4q78JWj4XkIcW+ano716pHFGjJXPsm1D+6rNmk9fSSrYXqw+wC7Vh/4IncFIBxJ5yAIrSUtJB9Y5gOcwiSpUMP9eQX57F2/hKuBCnxK445BC0HlSdf0w85H29vpFZEy0yUAsvXtl7B4wG1MploHkQNu0KBkT0ZSTF3EvlwBkm4uD8tWXTMGvvjRLw==;\n\t5:1pG5YEg+yY9G5azNVmen3S0wkUmt8YqNVqkWdaYxVI/890hQYz9K56pG6aCMBOdA7DHXWugCLjdGr6AlgMN6/rxdiQ7nUWmfbFt88XRHe9aYwqxZuKeCN+BD5f03LTRKdmOSz0Uv7eVXnf3H06eTZ9pQT+dafCJ/T0VcSRXoFsI=;\n\t24:r/LcgGYm8NACF300EvUJFLBjY9G4p30CBasDhvX/JQU55uhy9Mx0aSDjXrqHF6/AJIODL5qp1EoKiUk5C94SVu/Qmc7R/3lvtTjqwhR5J38=;\n\t7:LG9V7VmqyEdm+z4Su0CMTr5EKPC7IJJRueFDu5Wn/KxLwrLz2CG9iUqYnNw+URaHGfOSnjiQ+hKvcaURuw7loRD5ss7N7sEysUM5kKNur6BzYvU7oqo1R2k/8FY+tklG3RRL6N5Ch+CWUAX692cRtwthK78W1S3cra4qO0YVuec2QI2qmG+XGMHsu+tO6H5Vbsil5uOPRWHZXm7iJGccrAl8DIAoE+SdSoSI6+T8YQc=" ], "X-MS-TrafficTypeDiagnostic": "CY4PR07MB3093:", "X-Exchange-Antispam-Report-Test": "UriScan:;", "X-Microsoft-Antispam-PRVS": "<CY4PR07MB3093F415F88317624CA5939EEA9A0@CY4PR07MB3093.namprd07.prod.outlook.com>", "X-Exchange-Antispam-Report-CFA-Test": "BCL:0; PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(601004)(2401047)(8121501046)(5005006)(100000703101)(100105400095)(10201501046)(3002001)(93006095)(6041248)(20161123560025)(20161123558100)(20161123555025)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123564025)(20161123562025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:CY4PR07MB3093; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:CY4PR07MB3093; ", "X-Forefront-PRVS": "04097B7F7F", "X-Forefront-Antispam-Report": "SFV:NSPM;\n\tSFS:(10009020)(7370300001)(4630300001)(6069001)(6009001)(189002)(199003)(110136004)(107886003)(53936002)(105586002)(101416001)(7736002)(50226002)(76176999)(42186005)(68736007)(6486002)(33646002)(50986999)(6512007)(106356001)(1076002)(2906002)(6506006)(3846002)(6116002)(478600001)(97736004)(4326008)(5660300001)(7350300001)(47776003)(5009440100003)(72206003)(575784001)(50466002)(8656003)(48376002)(25786009)(81156014)(81166006)(66066001)(305945005)(6666003)(5003940100001)(5890100001)(42882006)(36756003)(8676002)(189998001)(2950100002)(110426004);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:CY4PR07MB3093; H:localhost.localdomain;\n\tFPR:; \n\tSPF:None; PTR:InfoNoRecords; MX:1; A:1; LANG:en; ", "Received-SPF": "None (protection.outlook.com: cavium.com does not designate\n\tpermitted sender hosts)", "SpamDiagnosticOutput": "1:99", "SpamDiagnosticMetadata": "NSPM", "X-OriginatorOrg": "caviumnetworks.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "24 Aug 2017 13:29:59.2434\n\t(UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY4PR07MB3093", "Subject": "[dpdk-dev] [PATCH v1 04/11] mempool/octeontx: implement pool alloc", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Upon pool allocation request by application, Octeontx FPA alloc\ndoes following:\n- Gets free pool from pci fpavf array.\n- Uses mbox to communicate fpapf driver about,\n * gpool-id\n * pool block_sz\n * alignemnt\n- Programs fpavf pool boundary.\n\nSigned-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>\nSigned-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>\n---\n drivers/mempool/octeontx/Makefile | 1 +\n drivers/mempool/octeontx/octeontx_fpavf.c | 515 ++++++++++++++++++++++++\n drivers/mempool/octeontx/octeontx_fpavf.h | 10 +\n drivers/mempool/octeontx/rte_mempool_octeontx.c | 88 ++++\n 4 files changed, 614 insertions(+)\n create mode 100644 drivers/mempool/octeontx/rte_mempool_octeontx.c", "diff": "diff --git a/drivers/mempool/octeontx/Makefile b/drivers/mempool/octeontx/Makefile\nindex 55ca1d944..9c3389608 100644\n--- a/drivers/mempool/octeontx/Makefile\n+++ b/drivers/mempool/octeontx/Makefile\n@@ -51,6 +51,7 @@ LIBABIVER := 1\n # all source are stored in SRCS-y\n #\n SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL) += octeontx_fpavf.c\n+SRCS-$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL) += rte_mempool_octeontx.c\n \n # this lib depends upon:\n DEPDIRS-$(CONFIG_RTE_LIBRTE_OCTEONTX_MEMPOOL) += lib/librte_mbuf\ndiff --git a/drivers/mempool/octeontx/octeontx_fpavf.c b/drivers/mempool/octeontx/octeontx_fpavf.c\nindex 0b4a9357f..85ddf0a03 100644\n--- a/drivers/mempool/octeontx/octeontx_fpavf.c\n+++ b/drivers/mempool/octeontx/octeontx_fpavf.c\n@@ -46,9 +46,75 @@\n #include <rte_memory.h>\n #include <rte_malloc.h>\n #include <rte_spinlock.h>\n+#include <rte_mbuf.h>\n \n+#include <rte_pmd_octeontx_ssovf.h>\n #include \"octeontx_fpavf.h\"\n \n+/* FPA Mbox Message */\n+#define IDENTIFY\t\t0x0\n+\n+#define FPA_CONFIGSET\t\t0x1\n+#define FPA_CONFIGGET\t\t0x2\n+#define FPA_START_COUNT\t\t0x3\n+#define FPA_STOP_COUNT\t\t0x4\n+#define FPA_ATTACHAURA\t\t0x5\n+#define FPA_DETACHAURA\t\t0x6\n+#define FPA_SETAURALVL\t\t0x7\n+#define FPA_GETAURALVL\t\t0x8\n+\n+#define FPA_COPROC\t\t0x1\n+\n+/* fpa mbox struct */\n+struct octeontx_mbox_fpa_cfg {\n+\tint\t\taid;\n+\tuint64_t\tpool_cfg;\n+\tuint64_t\tpool_stack_base;\n+\tuint64_t\tpool_stack_end;\n+\tuint64_t\taura_cfg;\n+};\n+\n+struct __attribute__((__packed__)) gen_req {\n+\tuint32_t\tvalue;\n+};\n+\n+struct __attribute__((__packed__)) idn_req {\n+\tuint8_t\tdomain_id;\n+};\n+\n+struct __attribute__((__packed__)) gen_resp {\n+\tuint16_t\tdomain_id;\n+\tuint16_t\tvfid;\n+};\n+\n+struct __attribute__((__packed__)) dcfg_resp {\n+\tuint8_t\tsso_count;\n+\tuint8_t\tssow_count;\n+\tuint8_t\tfpa_count;\n+\tuint8_t\tpko_count;\n+\tuint8_t\ttim_count;\n+\tuint8_t\tnet_port_count;\n+\tuint8_t\tvirt_port_count;\n+};\n+\n+#define FPA_MAX_POOL\t32\n+#define FPA_PF_PAGE_SZ\t4096\n+\n+#define FPA_LN_SIZE\t128\n+#define FPA_ROUND_UP(x, size) \\\n+\t((((unsigned long)(x)) + size-1) & (~(size-1)))\n+#define FPA_OBJSZ_2_CACHE_LINE(sz)\t(((sz) + RTE_CACHE_LINE_MASK) >> 7)\n+#define FPA_CACHE_LINE_2_OBJSZ(sz)\t((sz) << 7)\n+\n+#define POOL_ENA\t\t\t(0x1 << 0)\n+#define POOL_DIS\t\t\t(0x0 << 0)\n+#define POOL_SET_NAT_ALIGN\t\t(0x1 << 1)\n+#define POOL_DIS_NAT_ALIGN\t\t(0x0 << 1)\n+#define POOL_STYPE(x)\t\t\t(((x) & 0x1) << 2)\n+#define POOL_LTYPE(x)\t\t\t(((x) & 0x3) << 3)\n+#define POOL_BUF_OFFSET(x)\t\t(((x) & 0x7fffULL) << 16)\n+#define POOL_BUF_SIZE(x)\t\t(((x) & 0x7ffULL) << 32)\n+\n struct fpavf_res {\n \tvoid\t\t*pool_stack_base;\n \tvoid\t\t*bar0;\n@@ -67,6 +133,455 @@ struct octeontx_fpadev {\n \n static struct octeontx_fpadev fpadev;\n \n+/* lock is taken by caller */\n+static int\n+octeontx_fpa_gpool_alloc(unsigned int object_size)\n+{\n+\tstruct fpavf_res *res = NULL;\n+\tuint16_t gpool;\n+\tunsigned int sz128;\n+\n+\tsz128 = FPA_OBJSZ_2_CACHE_LINE(object_size);\n+\n+\tfor (gpool = 0; gpool < FPA_VF_MAX; gpool++) {\n+\n+\t\t/* Skip VF that is not mapped Or _inuse */\n+\t\tif ((fpadev.pool[gpool].bar0 == NULL) ||\n+\t\t (fpadev.pool[gpool].is_inuse == true))\n+\t\t\tcontinue;\n+\n+\t\tres = &fpadev.pool[gpool];\n+\n+\t\tRTE_ASSERT(res->domain_id != (uint16_t)~0);\n+\t\tRTE_ASSERT(res->vf_id != (uint16_t)~0);\n+\t\tRTE_ASSERT(res->stack_ln_ptr != 0);\n+\n+\t\tif (res->sz128 == 0) {\n+\t\t\tres->sz128 = sz128;\n+\n+\t\t\tfpavf_log_dbg(\"gpool %d blk_sz %d\\n\", gpool, sz128);\n+\t\t\treturn gpool;\n+\t\t}\n+\t}\n+\n+\treturn -ENOSPC;\n+}\n+\n+/* lock is taken by caller */\n+static __rte_always_inline uintptr_t\n+octeontx_fpa_gpool2handle(uint16_t gpool)\n+{\n+\tstruct fpavf_res *res = NULL;\n+\n+\tRTE_ASSERT(gpool < FPA_VF_MAX);\n+\n+\tres = &fpadev.pool[gpool];\n+\tif (unlikely(res == NULL))\n+\t\treturn 0;\n+\n+\treturn (uintptr_t)res->bar0;\n+}\n+\n+/* lock is taken by caller */\n+static __rte_always_inline int\n+octeontx_fpa_handle2gpool(uintptr_t handle)\n+{\n+\tuint16_t gpool;\n+\n+\tfor (gpool = 0; gpool < FPA_VF_MAX; gpool++) {\n+\t\tif ((uintptr_t)fpadev.pool[gpool].bar0 != handle)\n+\t\t\tcontinue;\n+\n+\t\treturn gpool;\n+\t}\n+\t/* No entry */\n+\treturn -ENOSPC;\n+}\n+\n+static __rte_always_inline bool\n+octeontx_fpa_handle_valid(uintptr_t handle)\n+{\n+\tstruct fpavf_res *res = NULL;\n+\tuint8_t gpool;\n+\tbool ret = false;\n+\n+\tif (unlikely(!handle))\n+\t\treturn ret;\n+\n+\tfor (gpool = 0; gpool < FPA_VF_MAX; gpool++) {\n+\t\tif ((uintptr_t)fpadev.pool[gpool].bar0 != handle)\n+\t\t\tcontinue;\n+\n+\t\tres = &fpadev.pool[gpool];\n+\n+\t\tif (res->sz128 == 0 || res->domain_id == (uint16_t)~0 ||\n+\t\t res->stack_ln_ptr == 0)\n+\t\t\tret = false;\n+\t\telse\n+\t\t\tret = true;\n+\t\tbreak;\n+\t}\n+\n+\treturn ret;\n+}\n+\n+static int\n+octeontx_fpapf_pool_setup(unsigned int gpool, unsigned int buf_size,\n+\t\t\t signed short buf_offset, unsigned int max_buf_count)\n+{\n+\tvoid *memptr = NULL;\n+\tphys_addr_t phys_addr;\n+\tunsigned int memsz;\n+\tstruct fpavf_res *fpa = NULL;\n+\tuint64_t reg;\n+\tstruct octeontx_mbox_hdr hdr;\n+\tstruct dcfg_resp resp;\n+\tstruct octeontx_mbox_fpa_cfg cfg;\n+\tint ret = -1;\n+\n+\tfpa = &fpadev.pool[gpool];\n+\tmemsz = FPA_ROUND_UP(max_buf_count / fpa->stack_ln_ptr, FPA_LN_SIZE) *\n+\t\t\tFPA_LN_SIZE;\n+\n+\t/* Round-up to page size */\n+\tmemsz = (memsz + FPA_PF_PAGE_SZ - 1) & ~(uintptr_t)(FPA_PF_PAGE_SZ-1);\n+\tmemptr = rte_malloc(NULL, memsz, RTE_CACHE_LINE_SIZE);\n+\tif (memptr == NULL) {\n+\t\tret = -ENOMEM;\n+\t\tgoto err;\n+\t}\n+\n+\t/* Configure stack */\n+\tfpa->pool_stack_base = memptr;\n+\tphys_addr = rte_malloc_virt2phy(memptr);\n+\n+\tbuf_size /= FPA_LN_SIZE;\n+\n+\t/* POOL setup */\n+\thdr.coproc = FPA_COPROC;\n+\thdr.msg = FPA_CONFIGSET;\n+\thdr.vfid = fpa->vf_id;\n+\thdr.res_code = 0;\n+\n+\tbuf_offset /= FPA_LN_SIZE;\n+\treg = POOL_BUF_SIZE(buf_size) | POOL_BUF_OFFSET(buf_offset) |\n+\t\tPOOL_LTYPE(0x2) | POOL_STYPE(0) | POOL_SET_NAT_ALIGN |\n+\t\tPOOL_ENA;\n+\n+\tcfg.aid = 0;\n+\tcfg.pool_cfg = reg;\n+\tcfg.pool_stack_base = phys_addr;\n+\tcfg.pool_stack_end = phys_addr + memsz;\n+\tcfg.aura_cfg = (1 << 9);\n+\n+\tret = octeontx_ssovf_mbox_send(&hdr, &cfg,\n+\t\t\t\t\tsizeof(struct octeontx_mbox_fpa_cfg),\n+\t\t\t\t\t&resp, sizeof(resp));\n+\tif (ret < 0) {\n+\t\tret = -EACCES;\n+\t\tgoto err;\n+\t}\n+\n+\tfpavf_log_dbg(\" vfid %d gpool %d aid %d pool_cfg 0x%x pool_stack_base %\" PRIx64 \" pool_stack_end %\" PRIx64\" aura_cfg %\" PRIx64 \"\\n\",\n+\t\t fpa->vf_id, gpool, cfg.aid, (unsigned int)cfg.pool_cfg,\n+\t\t cfg.pool_stack_base, cfg.pool_stack_end, cfg.aura_cfg);\n+\n+\t/* Now pool is in_use */\n+\tfpa->is_inuse = true;\n+\n+err:\n+\tif (ret < 0)\n+\t\trte_free(memptr);\n+\n+\treturn ret;\n+}\n+\n+static int\n+octeontx_fpapf_pool_destroy(unsigned int gpool_index)\n+{\n+\tstruct octeontx_mbox_hdr hdr;\n+\tstruct dcfg_resp resp;\n+\tstruct octeontx_mbox_fpa_cfg cfg;\n+\tstruct fpavf_res *fpa = NULL;\n+\tint ret = -1;\n+\n+\tfpa = &fpadev.pool[gpool_index];\n+\n+\thdr.coproc = FPA_COPROC;\n+\thdr.msg = FPA_CONFIGSET;\n+\thdr.vfid = fpa->vf_id;\n+\thdr.res_code = 0;\n+\n+\t/* reset and free the pool */\n+\tcfg.aid = 0;\n+\tcfg.pool_cfg = 0;\n+\tcfg.pool_stack_base = 0;\n+\tcfg.pool_stack_end = 0;\n+\tcfg.aura_cfg = 0;\n+\n+\tret = octeontx_ssovf_mbox_send(&hdr, &cfg,\n+\t\t\t\t\tsizeof(struct octeontx_mbox_fpa_cfg),\n+\t\t\t\t\t&resp, sizeof(resp));\n+\tif (ret < 0) {\n+\t\tret = -EACCES;\n+\t\tgoto err;\n+\t}\n+\n+\tret = 0;\n+err:\n+\t/* anycase free pool stack memory */\n+\trte_free(fpa->pool_stack_base);\n+\tfpa->pool_stack_base = NULL;\n+\treturn ret;\n+}\n+\n+static int\n+octeontx_fpapf_aura_attach(unsigned int gpool_index)\n+{\n+\tstruct octeontx_mbox_hdr hdr;\n+\tstruct dcfg_resp resp;\n+\tstruct octeontx_mbox_fpa_cfg cfg;\n+\tint ret = 0;\n+\n+\tif (gpool_index >= FPA_MAX_POOL) {\n+\t\tret = -EINVAL;\n+\t\tgoto err;\n+\t}\n+\thdr.coproc = FPA_COPROC;\n+\thdr.msg = FPA_ATTACHAURA;\n+\thdr.vfid = gpool_index;\n+\thdr.res_code = 0;\n+\tmemset(&cfg, 0x0, sizeof(struct octeontx_mbox_fpa_cfg));\n+\tcfg.aid = gpool_index; /* gpool is guara */\n+\n+\tret = octeontx_ssovf_mbox_send(&hdr, &cfg,\n+\t\t\t\t\tsizeof(struct octeontx_mbox_fpa_cfg),\n+\t\t\t\t\t&resp, sizeof(resp));\n+\tif (ret < 0) {\n+\t\tfpavf_log_err(\"Could not attach fpa \");\n+\t\tfpavf_log_err(\"aura %d to pool %d. Err=%d. FuncErr=%d\\n\",\n+\t\t\t gpool_index, gpool_index, ret, hdr.res_code);\n+\t\tret = -EACCES;\n+\t\tgoto err;\n+\t}\n+err:\n+\treturn ret;\n+}\n+\n+static int\n+octeontx_fpapf_aura_detach(unsigned int gpool_index)\n+{\n+\tstruct octeontx_mbox_fpa_cfg cfg = {0};\n+\tstruct octeontx_mbox_hdr hdr = {0};\n+\tint ret = 0;\n+\n+\tif (gpool_index >= FPA_MAX_POOL) {\n+\t\tret = -EINVAL;\n+\t\tgoto err;\n+\t}\n+\n+\tcfg.aid = gpool_index; /* gpool is gaura */\n+\thdr.coproc = FPA_COPROC;\n+\thdr.msg = FPA_DETACHAURA;\n+\thdr.vfid = gpool_index;\n+\tret = octeontx_ssovf_mbox_send(&hdr, &cfg, sizeof(cfg), NULL, 0);\n+\tif (ret < 0) {\n+\t\tfpavf_log_err(\"Couldn't detach FPA aura %d Err=%d FuncErr=%d\\n\",\n+\t\t\t gpool_index, ret, hdr.res_code);\n+\t\tret = -EINVAL;\n+\t}\n+\n+err:\n+\treturn ret;\n+}\n+\n+static int\n+octeontx_fpavf_pool_setup(uintptr_t handle, unsigned long memsz,\n+\t\t\t void *memva, uint16_t gpool)\n+{\n+\tuint64_t va_end;\n+\n+\tif (unlikely(!handle))\n+\t\treturn -ENODEV;\n+\n+\tva_end = (uintptr_t)memva + memsz;\n+\tva_end &= ~RTE_CACHE_LINE_MASK;\n+\n+\t/* VHPOOL setup */\n+\tfpavf_write64((uintptr_t)memva,\n+\t\t\t (void *)((uintptr_t)handle +\n+\t\t\t FPA_VF_VHPOOL_START_ADDR(gpool)));\n+\tfpavf_write64(va_end,\n+\t\t\t (void *)((uintptr_t)handle +\n+\t\t\t FPA_VF_VHPOOL_END_ADDR(gpool)));\n+\treturn 0;\n+}\n+\n+static int\n+octeontx_fpapf_start_count(uint16_t gpool_index)\n+{\n+\tint ret = 0;\n+\tstruct octeontx_mbox_hdr hdr = {0};\n+\n+\tif (gpool_index >= FPA_MAX_POOL) {\n+\t\tret = -EINVAL;\n+\t\tgoto err;\n+\t}\n+\n+\thdr.coproc = FPA_COPROC;\n+\thdr.msg = FPA_START_COUNT;\n+\thdr.vfid = gpool_index;\n+\tret = octeontx_ssovf_mbox_send(&hdr, NULL, 0, NULL, 0);\n+\tif (ret < 0) {\n+\t\tfpavf_log_err(\"Could not start buffer counting for \");\n+\t\tfpavf_log_err(\"FPA pool %d. Err=%d. FuncErr=%d\\n\",\n+\t\t\t gpool_index, ret, hdr.res_code);\n+\t\tret = -EINVAL;\n+\t\tgoto err;\n+\t}\n+\n+err:\n+\treturn ret;\n+}\n+\n+static __rte_always_inline int\n+octeontx_fpavf_free(unsigned int gpool)\n+{\n+\tint ret = 0;\n+\n+\tif (gpool >= FPA_MAX_POOL) {\n+\t\tret = -EINVAL;\n+\t\tgoto err;\n+\t}\n+\n+\t/* Pool is free */\n+\tfpadev.pool[gpool].is_inuse = false;\n+\n+err:\n+\treturn ret;\n+}\n+\n+static __rte_always_inline int\n+octeontx_gpool_free(uint16_t gpool)\n+{\n+\tif (fpadev.pool[gpool].sz128 != 0) {\n+\t\tfpadev.pool[gpool].sz128 = 0;\n+\t\treturn 0;\n+\t}\n+\treturn -EINVAL;\n+}\n+\n+/*\n+ * Return buffer size for a given pool\n+ */\n+int\n+octeontx_fpa_bufpool_block_size(uintptr_t handle)\n+{\n+\tstruct fpavf_res *res = NULL;\n+\tint gpool;\n+\n+\tif (unlikely(!octeontx_fpa_handle_valid(handle)))\n+\t\treturn -EINVAL;\n+\n+\tgpool = octeontx_fpa_handle2gpool(handle);\n+\tres = &fpadev.pool[gpool];\n+\treturn FPA_CACHE_LINE_2_OBJSZ(res->sz128);\n+}\n+\n+uintptr_t\n+octeontx_fpa_bufpool_create(unsigned int object_size, unsigned int object_count,\n+\t\t\t\tunsigned int buf_offset, char **va_start,\n+\t\t\t\tint node_id)\n+{\n+\tunsigned int gpool;\n+\tvoid *memva;\n+\tunsigned long memsz;\n+\tuintptr_t gpool_handle;\n+\tint res;\n+\n+\tRTE_SET_USED(node_id);\n+\tFPAVF_STATIC_ASSERTION(sizeof(struct rte_mbuf) <=\n+\t\t\t\tOCTEONTX_FPAVF_BUF_OFFSET);\n+\n+\tif (unlikely(*va_start == NULL))\n+\t\tgoto error_end;\n+\n+\tobject_size = RTE_CACHE_LINE_ROUNDUP(object_size);\n+\tif (object_size > FPA_MAX_OBJ_SIZE) {\n+\t\terrno = EINVAL;\n+\t\tgoto error_end;\n+\t}\n+\n+\trte_spinlock_lock(&fpadev.lock);\n+\tres = octeontx_fpa_gpool_alloc(object_size);\n+\n+\t/* Bail if failed */\n+\tif (unlikely(res < 0)) {\n+\t\terrno = res;\n+\t\tgoto error_unlock;\n+\t}\n+\n+\t/* get fpavf */\n+\tgpool = res;\n+\n+\t/* get pool handle */\n+\tgpool_handle = octeontx_fpa_gpool2handle(gpool);\n+\tif (!octeontx_fpa_handle_valid(gpool_handle)) {\n+\t\terrno = ENOSPC;\n+\t\tgoto error_gpool_free;\n+\t}\n+\n+\tres = octeontx_fpapf_pool_setup(gpool, object_size, buf_offset,\n+\t\t\t\t\tobject_count);\n+\tif (res < 0) {\n+\t\terrno = res;\n+\t\tgoto error_gpool_free;\n+\t}\n+\n+\t/* populate AURA fields */\n+\tres = octeontx_fpapf_aura_attach(gpool);\n+\tif (res < 0) {\n+\t\terrno = res;\n+\t\tgoto error_pool_destroy;\n+\t}\n+\n+\t/* vf pool setup */\n+\tmemsz = object_size * object_count;\n+\tmemva = *va_start;\n+\tres = octeontx_fpavf_pool_setup(gpool_handle, memsz, memva, gpool);\n+\tif (res < 0) {\n+\t\terrno = res;\n+\t\tgoto error_gaura_detach;\n+\t}\n+\n+\t/* Release lock */\n+\trte_spinlock_unlock(&fpadev.lock);\n+\n+\t/* populate AURA registers */\n+\tfpavf_write64(object_count, (void *)((uintptr_t)gpool_handle +\n+\t\t\t FPA_VF_VHAURA_CNT(gpool)));\n+\tfpavf_write64(object_count, (void *)((uintptr_t)gpool_handle +\n+\t\t\t FPA_VF_VHAURA_CNT_LIMIT(gpool)));\n+\tfpavf_write64(object_count + 1, (void *)((uintptr_t)gpool_handle +\n+\t\t\t FPA_VF_VHAURA_CNT_THRESHOLD(gpool)));\n+\n+\tocteontx_fpapf_start_count(gpool);\n+\n+\treturn gpool_handle;\n+\n+error_gaura_detach:\n+\t(void) octeontx_fpapf_aura_detach(gpool);\n+error_pool_destroy:\n+\tocteontx_fpavf_free(gpool);\n+\tocteontx_fpapf_pool_destroy(gpool);\n+error_gpool_free:\n+\tocteontx_gpool_free(gpool);\n+error_unlock:\n+\trte_spinlock_unlock(&fpadev.lock);\n+error_end:\n+\treturn (uintptr_t)NULL;\n+}\n+\n static void\n octeontx_fpavf_setup(void)\n {\ndiff --git a/drivers/mempool/octeontx/octeontx_fpavf.h b/drivers/mempool/octeontx/octeontx_fpavf.h\nindex c43b1a7d2..3e8a2682f 100644\n--- a/drivers/mempool/octeontx/octeontx_fpavf.h\n+++ b/drivers/mempool/octeontx/octeontx_fpavf.h\n@@ -88,6 +88,10 @@\n #define\tFPA_VF0_APERTURE_SHIFT\t\t22\n #define FPA_AURA_SET_SIZE\t\t16\n \n+#define FPA_MAX_OBJ_SIZE\t\t(128 * 1024)\n+#define OCTEONTX_FPAVF_BUF_OFFSET\t128\n+\n+#define FPAVF_STATIC_ASSERTION(s) _Static_assert(s, #s)\n \n /*\n * In Cavium OcteonTX SoC, all accesses to the device registers are\n@@ -126,4 +130,10 @@ do {\t\t\t\t\t\t\t\\\n } while (0)\n #endif\n \n+uintptr_t\n+octeontx_fpa_bufpool_create(unsigned int object_size, unsigned int object_count,\n+\t\t\t\tunsigned int buf_offset, char **va_start,\n+\t\t\t\tint node);\n+int\n+octeontx_fpa_bufpool_block_size(uintptr_t handle);\n #endif\t/* __OCTEONTX_FPAVF_H__ */\ndiff --git a/drivers/mempool/octeontx/rte_mempool_octeontx.c b/drivers/mempool/octeontx/rte_mempool_octeontx.c\nnew file mode 100644\nindex 000000000..73648aa7f\n--- /dev/null\n+++ b/drivers/mempool/octeontx/rte_mempool_octeontx.c\n@@ -0,0 +1,88 @@\n+/*\n+ * BSD LICENSE\n+ *\n+ * Copyright (C) 2017 Cavium Inc. All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions\n+ * are met:\n+ *\n+ * * Redistributions of source code must retain the above copyright\n+ * notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ * notice, this list of conditions and the following disclaimer in\n+ * the documentation and/or other materials provided with the\n+ * distribution.\n+ * * Neither the name of Intel Corporation nor the names of its\n+ * contributors may be used to endorse or promote products derived\n+ * from this software without specific prior written permission.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS\n+ * \"AS IS\" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT\n+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR\n+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT\n+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,\n+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT\n+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,\n+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY\n+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE\n+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+#include <stdio.h>\n+#include <rte_mempool.h>\n+#include <rte_malloc.h>\n+#include <rte_mbuf.h>\n+\n+#include \"octeontx_fpavf.h\"\n+\n+static int\n+octeontx_fpavf_alloc(struct rte_mempool *mp)\n+{\n+\tuintptr_t pool;\n+\tuint32_t memseg_count = mp->size;\n+\tuint32_t object_size;\n+\tuintptr_t va_start;\n+\tint rc = 0;\n+\n+\t/* virtual hugepage mapped addr */\n+\tva_start = ~(uint64_t)0;\n+\n+\tobject_size = mp->elt_size + mp->header_size + mp->trailer_size;\n+\n+\tpool = octeontx_fpa_bufpool_create(object_size, memseg_count,\n+\t\t\t\t\t\tOCTEONTX_FPAVF_BUF_OFFSET,\n+\t\t\t\t\t\t(char **)&va_start,\n+\t\t\t\t\t\tmp->socket_id);\n+\trc = octeontx_fpa_bufpool_block_size(pool);\n+\tif (rc < 0)\n+\t\tgoto _end;\n+\n+\tif ((uint32_t)rc != object_size)\n+\t\tfpavf_log_err(\"buffer size mismatch: %d instead of %u\\n\",\n+\t\t\t\trc, object_size);\n+\n+\tfpavf_log_info(\"Pool created %p with .. \", (void *)pool);\n+\tfpavf_log_info(\"obj_sz %d, cnt %d\\n\", object_size, memseg_count);\n+\n+\t/* assign pool handle to mempool */\n+\tmp->pool_id = (uint64_t)pool;\n+\n+\treturn 0;\n+\n+_end:\n+\treturn rc;\n+}\n+\n+static struct rte_mempool_ops octeontx_fpavf_ops = {\n+\t.name = \"octeontx_fpavf\",\n+\t.alloc = octeontx_fpavf_alloc,\n+\t.free = NULL,\n+\t.enqueue = NULL,\n+\t.dequeue = NULL,\n+\t.get_count = NULL,\n+\t.get_capabilities = NULL,\n+\t.update_range = NULL,\n+};\n+\n+MEMPOOL_REGISTER_OPS(octeontx_fpavf_ops);\n", "prefixes": [ "dpdk-dev", "v1", "04/11" ] }