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GET /api/patches/27386/?format=api
{ "id": 27386, "url": "https://patches.dpdk.org/api/patches/27386/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/a20a347987050df9e56535b4e85c45185656f1a4.1501681927.git.nelio.laranjeiro@6wind.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<a20a347987050df9e56535b4e85c45185656f1a4.1501681927.git.nelio.laranjeiro@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/a20a347987050df9e56535b4e85c45185656f1a4.1501681927.git.nelio.laranjeiro@6wind.com", "date": "2017-08-02T14:10:36", "name": "[dpdk-dev,v1,20/21] net/mlx5: remove hash Rx queues support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d4a496bf3361c49d9e0cf6008047cac907fde2a1", "submitter": { "id": 243, "url": "https://patches.dpdk.org/api/people/243/?format=api", "name": "Nélio Laranjeiro", "email": "nelio.laranjeiro@6wind.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/a20a347987050df9e56535b4e85c45185656f1a4.1501681927.git.nelio.laranjeiro@6wind.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/27386/comments/", "check": "fail", "checks": "https://patches.dpdk.org/api/patches/27386/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id BACCBA259;\n\tWed, 2 Aug 2017 16:11:45 +0200 (CEST)", "from mail-wm0-f51.google.com (mail-wm0-f51.google.com\n\t[74.125.82.51]) by dpdk.org (Postfix) with ESMTP id 0852FA13C\n\tfor <dev@dpdk.org>; Wed, 2 Aug 2017 16:11:17 +0200 (CEST)", "by mail-wm0-f51.google.com with SMTP id m85so42776982wma.0\n\tfor <dev@dpdk.org>; Wed, 02 Aug 2017 07:11:17 -0700 (PDT)", "from ping.dev.6wind.com (host.78.145.23.62.rev.coltfrance.com.\n\t[62.23.145.78]) by smtp.gmail.com with ESMTPSA id\n\td53sm39449552wrd.81.2017.08.02.07.11.15\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tWed, 02 Aug 2017 07:11:16 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=6wind-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:in-reply-to:references;\n\tbh=PewfA/wwaNYirbDclg8DZtQcxasqlAnkh/13jeGPuoM=;\n\tb=PPTND6jUk2EdqwPDUB7FOwTvR5KPUEVc7nKBW05gq6wWuh1xmwqB/44fCI8j4Pa/X2\n\tHXvCq5QUJOTROWQYfom60Im9ESH9MAY7ncKvQlrv8+hkphAU6jtWQwNxkbxHpEffg8R6\n\tzO8hV8LMe6elZJEXeKbNluvf7Hqobrudd4ska/9dfm3UF1rTEb1htrBcld5UGb/BrFOz\n\t+bTUR7xZMKICsvSaJJ99R6xIchEKD8NsPr/XTaCzA+xix41wCARTfcwr0j5+RiSS22+x\n\tkxKZXqT2pFlODGkbxuLldLqJLaaErA45mr19nfVho2Q5Pc2+BKl8gI+6K1uTEVEw3D0e\n\tHTRw==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:in-reply-to:references;\n\tbh=PewfA/wwaNYirbDclg8DZtQcxasqlAnkh/13jeGPuoM=;\n\tb=Wa89qUL+ZT028qB5cneJ+q1nucmiL6u5qtwI4hGzIsgVlC+tkcKHNE6BkTv3ytQtwd\n\taZ6XxenZyJLi1DdKmTQdlihBDzM8AKF7fYZTgb8a7UroIfR4yjGsg4na7TTXAa3iYYYF\n\tYjqBjbn5mx/mV7te65lXKn1n098N5Bn91eHW2Spy/owkpp/JFhNMdz3NlXes5roQ0tN8\n\tGQazLZpNrVXiYqOSbWoAh5dQmkjfxRHhfiiqzffUD+0N/JkExKDBUFCTPts2mUWJBTW6\n\tB46K23lRAhy4uq+1k28poj7cndcOJl3QDOYjn07FsHORow7RL9C6n/mklb7l0TF2fk0l\n\tUxcg==", "X-Gm-Message-State": "AIVw111hpqfJ8u5pWOC2qg18g/CRZBmdtng3jo4GoqKD5sYUpNQTA7l6\n\tO1x2WEeO/Nwmr+sK+KCOxg==", "X-Received": "by 10.28.66.22 with SMTP id p22mr3909284wma.56.1501683076784;\n\tWed, 02 Aug 2017 07:11:16 -0700 (PDT)", "From": "Nelio Laranjeiro <nelio.laranjeiro@6wind.com>", "To": "dev@dpdk.org", "Cc": "adrien.mazarguil@6wind.com", "Date": "Wed, 2 Aug 2017 16:10:36 +0200", "Message-Id": "<a20a347987050df9e56535b4e85c45185656f1a4.1501681927.git.nelio.laranjeiro@6wind.com>", "X-Mailer": "git-send-email 2.1.4", "In-Reply-To": [ "<cover.1501681927.git.nelio.laranjeiro@6wind.com>", "<cover.1501681927.git.nelio.laranjeiro@6wind.com>" ], "References": [ "<cover.1501681927.git.nelio.laranjeiro@6wind.com>", "<cover.1501681927.git.nelio.laranjeiro@6wind.com>" ], "Subject": "[dpdk-dev] [PATCH v1 20/21] net/mlx5: remove hash Rx queues support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From this commit the RSS support becomes un-available until it is replaced\nby the generic flow implementation.\n\nSigned-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>\n---\n drivers/net/mlx5/mlx5.c | 2 -\n drivers/net/mlx5/mlx5.h | 6 -\n drivers/net/mlx5/mlx5_rxq.c | 470 ----------------------------------------\n drivers/net/mlx5/mlx5_rxtx.h | 76 -------\n drivers/net/mlx5/mlx5_trigger.c | 12 +-\n 5 files changed, 7 insertions(+), 559 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.c b/drivers/net/mlx5/mlx5.c\nindex bf6c66b..7f6c774 100644\n--- a/drivers/net/mlx5/mlx5.c\n+++ b/drivers/net/mlx5/mlx5.c\n@@ -146,8 +146,6 @@ mlx5_dev_close(struct rte_eth_dev *dev)\n \t ((priv->ctx != NULL) ? priv->ctx->device->name : \"\"));\n \t/* In case mlx5_dev_stop() has not been called. */\n \tpriv_dev_interrupt_handler_uninstall(priv, dev);\n-\tpriv_destroy_hash_rxqs(priv);\n-\n \t/* Prevent crashes when queues are still in use. */\n \tdev->rx_pkt_burst = removed_rx_burst;\n \tdev->tx_pkt_burst = removed_tx_burst;\ndiff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 5058bcd..7058256 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -126,13 +126,7 @@ struct priv {\n \tunsigned int txqs_n; /* TX queues array size. */\n \tstruct mlx5_rxq_data *(*rxqs)[]; /* RX queues. */\n \tstruct mlx5_txq_data *(*txqs)[]; /* TX queues. */\n-\t/* Indirection tables referencing all RX WQs. */\n-\tstruct ibv_exp_rwq_ind_table *(*ind_tables)[];\n-\tunsigned int ind_tables_n; /* Number of indirection tables. */\n \tunsigned int ind_table_max_size; /* Maximum indirection table size. */\n-\t/* Hash RX QPs feeding the indirection table. */\n-\tstruct hash_rxq (*hash_rxqs)[];\n-\tunsigned int hash_rxqs_n; /* Hash RX QPs array size. */\n \tstruct rte_eth_rss_conf rss_conf; /* RSS configuration. */\n \tstruct rte_intr_handle intr_handle; /* Interrupt handler. */\n \tunsigned int (*reta_idx)[]; /* RETA index table. */\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex d5dc928..762288b 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -64,121 +64,6 @@\n #include \"mlx5_autoconf.h\"\n #include \"mlx5_defs.h\"\n \n-/* Initialization data for hash RX queues. */\n-const struct hash_rxq_init hash_rxq_init[] = {\n-\t[HASH_RXQ_TCPV4] = {\n-\t\t.hash_fields = (IBV_EXP_RX_HASH_SRC_IPV4 |\n-\t\t\t\tIBV_EXP_RX_HASH_DST_IPV4 |\n-\t\t\t\tIBV_EXP_RX_HASH_SRC_PORT_TCP |\n-\t\t\t\tIBV_EXP_RX_HASH_DST_PORT_TCP),\n-\t\t.dpdk_rss_hf = ETH_RSS_NONFRAG_IPV4_TCP,\n-\t\t.flow_priority = 0,\n-\t\t.flow_spec.tcp_udp = {\n-\t\t\t.type = IBV_EXP_FLOW_SPEC_TCP,\n-\t\t\t.size = sizeof(hash_rxq_init[0].flow_spec.tcp_udp),\n-\t\t},\n-\t\t.underlayer = &hash_rxq_init[HASH_RXQ_IPV4],\n-\t},\n-\t[HASH_RXQ_UDPV4] = {\n-\t\t.hash_fields = (IBV_EXP_RX_HASH_SRC_IPV4 |\n-\t\t\t\tIBV_EXP_RX_HASH_DST_IPV4 |\n-\t\t\t\tIBV_EXP_RX_HASH_SRC_PORT_UDP |\n-\t\t\t\tIBV_EXP_RX_HASH_DST_PORT_UDP),\n-\t\t.dpdk_rss_hf = ETH_RSS_NONFRAG_IPV4_UDP,\n-\t\t.flow_priority = 0,\n-\t\t.flow_spec.tcp_udp = {\n-\t\t\t.type = IBV_EXP_FLOW_SPEC_UDP,\n-\t\t\t.size = sizeof(hash_rxq_init[0].flow_spec.tcp_udp),\n-\t\t},\n-\t\t.underlayer = &hash_rxq_init[HASH_RXQ_IPV4],\n-\t},\n-\t[HASH_RXQ_IPV4] = {\n-\t\t.hash_fields = (IBV_EXP_RX_HASH_SRC_IPV4 |\n-\t\t\t\tIBV_EXP_RX_HASH_DST_IPV4),\n-\t\t.dpdk_rss_hf = (ETH_RSS_IPV4 |\n-\t\t\t\tETH_RSS_FRAG_IPV4),\n-\t\t.flow_priority = 1,\n-\t\t.flow_spec.ipv4 = {\n-\t\t\t.type = IBV_EXP_FLOW_SPEC_IPV4,\n-\t\t\t.size = sizeof(hash_rxq_init[0].flow_spec.ipv4),\n-\t\t},\n-\t\t.underlayer = &hash_rxq_init[HASH_RXQ_ETH],\n-\t},\n-\t[HASH_RXQ_TCPV6] = {\n-\t\t.hash_fields = (IBV_EXP_RX_HASH_SRC_IPV6 |\n-\t\t\t\tIBV_EXP_RX_HASH_DST_IPV6 |\n-\t\t\t\tIBV_EXP_RX_HASH_SRC_PORT_TCP |\n-\t\t\t\tIBV_EXP_RX_HASH_DST_PORT_TCP),\n-\t\t.dpdk_rss_hf = ETH_RSS_NONFRAG_IPV6_TCP,\n-\t\t.flow_priority = 0,\n-\t\t.flow_spec.tcp_udp = {\n-\t\t\t.type = IBV_EXP_FLOW_SPEC_TCP,\n-\t\t\t.size = sizeof(hash_rxq_init[0].flow_spec.tcp_udp),\n-\t\t},\n-\t\t.underlayer = &hash_rxq_init[HASH_RXQ_IPV6],\n-\t},\n-\t[HASH_RXQ_UDPV6] = {\n-\t\t.hash_fields = (IBV_EXP_RX_HASH_SRC_IPV6 |\n-\t\t\t\tIBV_EXP_RX_HASH_DST_IPV6 |\n-\t\t\t\tIBV_EXP_RX_HASH_SRC_PORT_UDP |\n-\t\t\t\tIBV_EXP_RX_HASH_DST_PORT_UDP),\n-\t\t.dpdk_rss_hf = ETH_RSS_NONFRAG_IPV6_UDP,\n-\t\t.flow_priority = 0,\n-\t\t.flow_spec.tcp_udp = {\n-\t\t\t.type = IBV_EXP_FLOW_SPEC_UDP,\n-\t\t\t.size = sizeof(hash_rxq_init[0].flow_spec.tcp_udp),\n-\t\t},\n-\t\t.underlayer = &hash_rxq_init[HASH_RXQ_IPV6],\n-\t},\n-\t[HASH_RXQ_IPV6] = {\n-\t\t.hash_fields = (IBV_EXP_RX_HASH_SRC_IPV6 |\n-\t\t\t\tIBV_EXP_RX_HASH_DST_IPV6),\n-\t\t.dpdk_rss_hf = (ETH_RSS_IPV6 |\n-\t\t\t\tETH_RSS_FRAG_IPV6),\n-\t\t.flow_priority = 1,\n-\t\t.flow_spec.ipv6 = {\n-\t\t\t.type = IBV_EXP_FLOW_SPEC_IPV6,\n-\t\t\t.size = sizeof(hash_rxq_init[0].flow_spec.ipv6),\n-\t\t},\n-\t\t.underlayer = &hash_rxq_init[HASH_RXQ_ETH],\n-\t},\n-\t[HASH_RXQ_ETH] = {\n-\t\t.hash_fields = 0,\n-\t\t.dpdk_rss_hf = 0,\n-\t\t.flow_priority = 2,\n-\t\t.flow_spec.eth = {\n-\t\t\t.type = IBV_EXP_FLOW_SPEC_ETH,\n-\t\t\t.size = sizeof(hash_rxq_init[0].flow_spec.eth),\n-\t\t},\n-\t\t.underlayer = NULL,\n-\t},\n-};\n-\n-/* Number of entries in hash_rxq_init[]. */\n-const unsigned int hash_rxq_init_n = RTE_DIM(hash_rxq_init);\n-\n-/* Initialization data for hash RX queue indirection tables. */\n-static const struct ind_table_init ind_table_init[] = {\n-\t{\n-\t\t.max_size = -1u, /* Superseded by HW limitations. */\n-\t\t.hash_types =\n-\t\t\t1 << HASH_RXQ_TCPV4 |\n-\t\t\t1 << HASH_RXQ_UDPV4 |\n-\t\t\t1 << HASH_RXQ_IPV4 |\n-\t\t\t1 << HASH_RXQ_TCPV6 |\n-\t\t\t1 << HASH_RXQ_UDPV6 |\n-\t\t\t1 << HASH_RXQ_IPV6 |\n-\t\t\t0,\n-\t\t.hash_types_n = 6,\n-\t},\n-\t{\n-\t\t.max_size = 1,\n-\t\t.hash_types = 1 << HASH_RXQ_ETH,\n-\t\t.hash_types_n = 1,\n-\t},\n-};\n-\n-#define IND_TABLE_INIT_N RTE_DIM(ind_table_init)\n \n /* Default RSS hash key also used for ConnectX-3. */\n uint8_t rss_hash_default_key[] = {\n@@ -198,361 +83,6 @@ uint8_t rss_hash_default_key[] = {\n const size_t rss_hash_default_key_len = sizeof(rss_hash_default_key);\n \n /**\n- * Populate flow steering rule for a given hash RX queue type using\n- * information from hash_rxq_init[]. Nothing is written to flow_attr when\n- * flow_attr_size is not large enough, but the required size is still returned.\n- *\n- * @param priv\n- * Pointer to private structure.\n- * @param[out] flow_attr\n- * Pointer to flow attribute structure to fill. Note that the allocated\n- * area must be larger and large enough to hold all flow specifications.\n- * @param flow_attr_size\n- * Entire size of flow_attr and trailing room for flow specifications.\n- * @param type\n- * Hash RX queue type to use for flow steering rule.\n- *\n- * @return\n- * Total size of the flow attribute buffer. No errors are defined.\n- */\n-size_t\n-priv_flow_attr(struct priv *priv, struct ibv_exp_flow_attr *flow_attr,\n-\t size_t flow_attr_size, enum hash_rxq_type type)\n-{\n-\tsize_t offset = sizeof(*flow_attr);\n-\tconst struct hash_rxq_init *init = &hash_rxq_init[type];\n-\n-\tassert(priv != NULL);\n-\tassert((size_t)type < RTE_DIM(hash_rxq_init));\n-\tdo {\n-\t\toffset += init->flow_spec.hdr.size;\n-\t\tinit = init->underlayer;\n-\t} while (init != NULL);\n-\tif (offset > flow_attr_size)\n-\t\treturn offset;\n-\tflow_attr_size = offset;\n-\tinit = &hash_rxq_init[type];\n-\t*flow_attr = (struct ibv_exp_flow_attr){\n-\t\t.type = IBV_EXP_FLOW_ATTR_NORMAL,\n-\t\t/* Priorities < 3 are reserved for flow director. */\n-\t\t.priority = init->flow_priority + 3,\n-\t\t.num_of_specs = 0,\n-\t\t.port = priv->port,\n-\t\t.flags = 0,\n-\t};\n-\tdo {\n-\t\toffset -= init->flow_spec.hdr.size;\n-\t\tmemcpy((void *)((uintptr_t)flow_attr + offset),\n-\t\t &init->flow_spec,\n-\t\t init->flow_spec.hdr.size);\n-\t\t++flow_attr->num_of_specs;\n-\t\tinit = init->underlayer;\n-\t} while (init != NULL);\n-\treturn flow_attr_size;\n-}\n-\n-/**\n- * Convert hash type position in indirection table initializer to\n- * hash RX queue type.\n- *\n- * @param table\n- * Indirection table initializer.\n- * @param pos\n- * Hash type position.\n- *\n- * @return\n- * Hash RX queue type.\n- */\n-static enum hash_rxq_type\n-hash_rxq_type_from_pos(const struct ind_table_init *table, unsigned int pos)\n-{\n-\tenum hash_rxq_type type = HASH_RXQ_TCPV4;\n-\n-\tassert(pos < table->hash_types_n);\n-\tdo {\n-\t\tif ((table->hash_types & (1 << type)) && (pos-- == 0))\n-\t\t\tbreak;\n-\t\t++type;\n-\t} while (1);\n-\treturn type;\n-}\n-\n-/**\n- * Filter out disabled hash RX queue types from ind_table_init[].\n- *\n- * @param priv\n- * Pointer to private structure.\n- * @param[out] table\n- * Output table.\n- *\n- * @return\n- * Number of table entries.\n- */\n-static unsigned int\n-priv_make_ind_table_init(struct priv *priv,\n-\t\t\t struct ind_table_init (*table)[IND_TABLE_INIT_N])\n-{\n-\tuint64_t rss_hf;\n-\tunsigned int i;\n-\tunsigned int j;\n-\tunsigned int table_n = 0;\n-\t/* Mandatory to receive frames not handled by normal hash RX queues. */\n-\tunsigned int hash_types_sup = 1 << HASH_RXQ_ETH;\n-\n-\trss_hf = priv->rss_conf.rss_hf;\n-\t/* Process other protocols only if more than one queue. */\n-\tif (priv->rxqs_n > 1)\n-\t\tfor (i = 0; (i != hash_rxq_init_n); ++i)\n-\t\t\tif (rss_hf & hash_rxq_init[i].dpdk_rss_hf)\n-\t\t\t\thash_types_sup |= (1 << i);\n-\n-\t/* Filter out entries whose protocols are not in the set. */\n-\tfor (i = 0, j = 0; (i != IND_TABLE_INIT_N); ++i) {\n-\t\tunsigned int nb;\n-\t\tunsigned int h;\n-\n-\t\t/* j is increased only if the table has valid protocols. */\n-\t\tassert(j <= i);\n-\t\t(*table)[j] = ind_table_init[i];\n-\t\t(*table)[j].hash_types &= hash_types_sup;\n-\t\tfor (h = 0, nb = 0; (h != hash_rxq_init_n); ++h)\n-\t\t\tif (((*table)[j].hash_types >> h) & 0x1)\n-\t\t\t\t++nb;\n-\t\t(*table)[i].hash_types_n = nb;\n-\t\tif (nb) {\n-\t\t\t++table_n;\n-\t\t\t++j;\n-\t\t}\n-\t}\n-\treturn table_n;\n-}\n-\n-/**\n- * Initialize hash RX queues and indirection table.\n- *\n- * @param priv\n- * Pointer to private structure.\n- *\n- * @return\n- * 0 on success, errno value on failure.\n- */\n-int\n-priv_create_hash_rxqs(struct priv *priv)\n-{\n-\tstruct ibv_exp_wq *wqs[priv->reta_idx_n];\n-\tstruct ind_table_init ind_table_init[IND_TABLE_INIT_N];\n-\tunsigned int ind_tables_n =\n-\t\tpriv_make_ind_table_init(priv, &ind_table_init);\n-\tunsigned int hash_rxqs_n = 0;\n-\tstruct hash_rxq (*hash_rxqs)[] = NULL;\n-\tstruct ibv_exp_rwq_ind_table *(*ind_tables)[] = NULL;\n-\tunsigned int i;\n-\tunsigned int j;\n-\tunsigned int k;\n-\tint err = 0;\n-\n-\tassert(priv->ind_tables == NULL);\n-\tassert(priv->ind_tables_n == 0);\n-\tassert(priv->hash_rxqs == NULL);\n-\tassert(priv->hash_rxqs_n == 0);\n-\tassert(priv->pd != NULL);\n-\tassert(priv->ctx != NULL);\n-\tif (priv->isolated)\n-\t\treturn 0;\n-\tif (priv->rxqs_n == 0)\n-\t\treturn EINVAL;\n-\tassert(priv->rxqs != NULL);\n-\tif (ind_tables_n == 0) {\n-\t\tERROR(\"all hash RX queue types have been filtered out,\"\n-\t\t \" indirection table cannot be created\");\n-\t\treturn EINVAL;\n-\t}\n-\tif (priv->rxqs_n & (priv->rxqs_n - 1)) {\n-\t\tINFO(\"%u RX queues are configured, consider rounding this\"\n-\t\t \" number to the next power of two for better balancing\",\n-\t\t priv->rxqs_n);\n-\t\tDEBUG(\"indirection table extended to assume %u WQs\",\n-\t\t priv->reta_idx_n);\n-\t}\n-\tfor (i = 0; (i != priv->reta_idx_n); ++i) {\n-\t\tstruct mlx5_rxq_ctrl *rxq_ctrl;\n-\n-\t\trxq_ctrl = container_of((*priv->rxqs)[(*priv->reta_idx)[i]],\n-\t\t\t\t\tstruct mlx5_rxq_ctrl, rxq);\n-\t\twqs[i] = rxq_ctrl->ibv->wq;\n-\t}\n-\t/* Get number of hash RX queues to configure. */\n-\tfor (i = 0, hash_rxqs_n = 0; (i != ind_tables_n); ++i)\n-\t\thash_rxqs_n += ind_table_init[i].hash_types_n;\n-\tDEBUG(\"allocating %u hash RX queues for %u WQs, %u indirection tables\",\n-\t hash_rxqs_n, priv->rxqs_n, ind_tables_n);\n-\t/* Create indirection tables. */\n-\tind_tables = rte_calloc(__func__, ind_tables_n,\n-\t\t\t\tsizeof((*ind_tables)[0]), 0);\n-\tif (ind_tables == NULL) {\n-\t\terr = ENOMEM;\n-\t\tERROR(\"cannot allocate indirection tables container: %s\",\n-\t\t strerror(err));\n-\t\tgoto error;\n-\t}\n-\tfor (i = 0; (i != ind_tables_n); ++i) {\n-\t\tstruct ibv_exp_rwq_ind_table_init_attr ind_init_attr = {\n-\t\t\t.pd = priv->pd,\n-\t\t\t.log_ind_tbl_size = 0, /* Set below. */\n-\t\t\t.ind_tbl = wqs,\n-\t\t\t.comp_mask = 0,\n-\t\t};\n-\t\tunsigned int ind_tbl_size = ind_table_init[i].max_size;\n-\t\tstruct ibv_exp_rwq_ind_table *ind_table;\n-\n-\t\tif (priv->reta_idx_n < ind_tbl_size)\n-\t\t\tind_tbl_size = priv->reta_idx_n;\n-\t\tind_init_attr.log_ind_tbl_size = log2above(ind_tbl_size);\n-\t\terrno = 0;\n-\t\tind_table = ibv_exp_create_rwq_ind_table(priv->ctx,\n-\t\t\t\t\t\t\t &ind_init_attr);\n-\t\tif (ind_table != NULL) {\n-\t\t\t(*ind_tables)[i] = ind_table;\n-\t\t\tcontinue;\n-\t\t}\n-\t\t/* Not clear whether errno is set. */\n-\t\terr = (errno ? errno : EINVAL);\n-\t\tERROR(\"RX indirection table creation failed with error %d: %s\",\n-\t\t err, strerror(err));\n-\t\tgoto error;\n-\t}\n-\t/* Allocate array that holds hash RX queues and related data. */\n-\thash_rxqs = rte_calloc(__func__, hash_rxqs_n,\n-\t\t\t sizeof((*hash_rxqs)[0]), 0);\n-\tif (hash_rxqs == NULL) {\n-\t\terr = ENOMEM;\n-\t\tERROR(\"cannot allocate hash RX queues container: %s\",\n-\t\t strerror(err));\n-\t\tgoto error;\n-\t}\n-\tfor (i = 0, j = 0, k = 0;\n-\t ((i != hash_rxqs_n) && (j != ind_tables_n));\n-\t ++i) {\n-\t\tstruct hash_rxq *hash_rxq = &(*hash_rxqs)[i];\n-\t\tenum hash_rxq_type type =\n-\t\t\thash_rxq_type_from_pos(&ind_table_init[j], k);\n-\t\tstruct rte_eth_rss_conf *priv_rss_conf = &priv->rss_conf;\n-\t\tstruct ibv_exp_rx_hash_conf hash_conf = {\n-\t\t\t.rx_hash_function = IBV_EXP_RX_HASH_FUNC_TOEPLITZ,\n-\t\t\t.rx_hash_key_len = (priv_rss_conf ?\n-\t\t\t\t\t priv_rss_conf->rss_key_len :\n-\t\t\t\t\t rss_hash_default_key_len),\n-\t\t\t.rx_hash_key = (priv_rss_conf ?\n-\t\t\t\t\tpriv_rss_conf->rss_key :\n-\t\t\t\t\trss_hash_default_key),\n-\t\t\t.rx_hash_fields_mask = hash_rxq_init[type].hash_fields,\n-\t\t\t.rwq_ind_tbl = (*ind_tables)[j],\n-\t\t};\n-\t\tstruct ibv_exp_qp_init_attr qp_init_attr = {\n-\t\t\t.max_inl_recv = 0, /* Currently not supported. */\n-\t\t\t.qp_type = IBV_QPT_RAW_PACKET,\n-\t\t\t.comp_mask = (IBV_EXP_QP_INIT_ATTR_PD |\n-\t\t\t\t IBV_EXP_QP_INIT_ATTR_RX_HASH),\n-\t\t\t.pd = priv->pd,\n-\t\t\t.rx_hash_conf = &hash_conf,\n-\t\t\t.port_num = priv->port,\n-\t\t};\n-\n-\t\tDEBUG(\"using indirection table %u for hash RX queue %u type %d\",\n-\t\t j, i, type);\n-\t\t*hash_rxq = (struct hash_rxq){\n-\t\t\t.priv = priv,\n-\t\t\t.qp = ibv_exp_create_qp(priv->ctx, &qp_init_attr),\n-\t\t\t.type = type,\n-\t\t};\n-\t\tif (hash_rxq->qp == NULL) {\n-\t\t\terr = (errno ? errno : EINVAL);\n-\t\t\tERROR(\"Hash RX QP creation failure: %s\",\n-\t\t\t strerror(err));\n-\t\t\tgoto error;\n-\t\t}\n-\t\tif (++k < ind_table_init[j].hash_types_n)\n-\t\t\tcontinue;\n-\t\t/* Switch to the next indirection table and reset hash RX\n-\t\t * queue type array index. */\n-\t\t++j;\n-\t\tk = 0;\n-\t}\n-\tpriv->ind_tables = ind_tables;\n-\tpriv->ind_tables_n = ind_tables_n;\n-\tpriv->hash_rxqs = hash_rxqs;\n-\tpriv->hash_rxqs_n = hash_rxqs_n;\n-\tassert(err == 0);\n-\treturn 0;\n-error:\n-\tif (hash_rxqs != NULL) {\n-\t\tfor (i = 0; (i != hash_rxqs_n); ++i) {\n-\t\t\tstruct ibv_qp *qp = (*hash_rxqs)[i].qp;\n-\n-\t\t\tif (qp == NULL)\n-\t\t\t\tcontinue;\n-\t\t\tclaim_zero(ibv_destroy_qp(qp));\n-\t\t}\n-\t\trte_free(hash_rxqs);\n-\t}\n-\tif (ind_tables != NULL) {\n-\t\tfor (j = 0; (j != ind_tables_n); ++j) {\n-\t\t\tstruct ibv_exp_rwq_ind_table *ind_table =\n-\t\t\t\t(*ind_tables)[j];\n-\n-\t\t\tif (ind_table == NULL)\n-\t\t\t\tcontinue;\n-\t\t\tclaim_zero(ibv_exp_destroy_rwq_ind_table(ind_table));\n-\t\t}\n-\t\trte_free(ind_tables);\n-\t}\n-\treturn err;\n-}\n-\n-/**\n- * Clean up hash RX queues and indirection table.\n- *\n- * @param priv\n- * Pointer to private structure.\n- */\n-void\n-priv_destroy_hash_rxqs(struct priv *priv)\n-{\n-\tunsigned int i;\n-\n-\tDEBUG(\"destroying %u hash RX queues\", priv->hash_rxqs_n);\n-\tif (priv->hash_rxqs_n == 0) {\n-\t\tassert(priv->hash_rxqs == NULL);\n-\t\tassert(priv->ind_tables == NULL);\n-\t\treturn;\n-\t}\n-\tfor (i = 0; (i != priv->hash_rxqs_n); ++i) {\n-\t\tstruct hash_rxq *hash_rxq = &(*priv->hash_rxqs)[i];\n-\t\tunsigned int j, k;\n-\n-\t\tassert(hash_rxq->priv == priv);\n-\t\tassert(hash_rxq->qp != NULL);\n-\t\tfor (j = 0; (j != RTE_DIM(hash_rxq->mac_flow)); ++j)\n-\t\t\tfor (k = 0; (k != RTE_DIM(hash_rxq->mac_flow[j])); ++k)\n-\t\t\t\tassert(hash_rxq->mac_flow[j][k] == NULL);\n-\t\tclaim_zero(ibv_destroy_qp(hash_rxq->qp));\n-\t}\n-\tpriv->hash_rxqs_n = 0;\n-\trte_free(priv->hash_rxqs);\n-\tpriv->hash_rxqs = NULL;\n-\tfor (i = 0; (i != priv->ind_tables_n); ++i) {\n-\t\tstruct ibv_exp_rwq_ind_table *ind_table =\n-\t\t\t(*priv->ind_tables)[i];\n-\n-\t\tassert(ind_table != NULL);\n-\t\tclaim_zero(ibv_exp_destroy_rwq_ind_table(ind_table));\n-\t}\n-\tpriv->ind_tables_n = 0;\n-\trte_free(priv->ind_tables);\n-\tpriv->ind_tables = NULL;\n-}\n-\n-/**\n * Allocate RX queue elements.\n *\n * @param rxq_ctrl\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 683a866..c49b798 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -172,75 +172,6 @@ struct mlx5_hrxq {\n \tuint8_t rss_key[]; /* Hash key. */\n };\n \n-/* Hash RX queue types. */\n-enum hash_rxq_type {\n-\tHASH_RXQ_TCPV4,\n-\tHASH_RXQ_UDPV4,\n-\tHASH_RXQ_IPV4,\n-\tHASH_RXQ_TCPV6,\n-\tHASH_RXQ_UDPV6,\n-\tHASH_RXQ_IPV6,\n-\tHASH_RXQ_ETH,\n-};\n-\n-/* Flow structure with Ethernet specification. It is packed to prevent padding\n- * between attr and spec as this layout is expected by libibverbs. */\n-struct flow_attr_spec_eth {\n-\tstruct ibv_exp_flow_attr attr;\n-\tstruct ibv_exp_flow_spec_eth spec;\n-} __attribute__((packed));\n-\n-/* Define a struct flow_attr_spec_eth object as an array of at least\n- * \"size\" bytes. Room after the first index is normally used to store\n- * extra flow specifications. */\n-#define FLOW_ATTR_SPEC_ETH(name, size) \\\n-\tstruct flow_attr_spec_eth name \\\n-\t\t[((size) / sizeof(struct flow_attr_spec_eth)) + \\\n-\t\t !!((size) % sizeof(struct flow_attr_spec_eth))]\n-\n-/* Initialization data for hash RX queue. */\n-struct hash_rxq_init {\n-\tuint64_t hash_fields; /* Fields that participate in the hash. */\n-\tuint64_t dpdk_rss_hf; /* Matching DPDK RSS hash fields. */\n-\tunsigned int flow_priority; /* Flow priority to use. */\n-\tunion {\n-\t\tstruct {\n-\t\t\tenum ibv_exp_flow_spec_type type;\n-\t\t\tuint16_t size;\n-\t\t} hdr;\n-\t\tstruct ibv_exp_flow_spec_tcp_udp tcp_udp;\n-\t\tstruct ibv_exp_flow_spec_ipv4 ipv4;\n-\t\tstruct ibv_exp_flow_spec_ipv6 ipv6;\n-\t\tstruct ibv_exp_flow_spec_eth eth;\n-\t} flow_spec; /* Flow specification template. */\n-\tconst struct hash_rxq_init *underlayer; /* Pointer to underlayer. */\n-};\n-\n-/* Initialization data for indirection table. */\n-struct ind_table_init {\n-\tunsigned int max_size; /* Maximum number of WQs. */\n-\t/* Hash RX queues using this table. */\n-\tunsigned int hash_types;\n-\tunsigned int hash_types_n;\n-};\n-\n-/* Initialization data for special flows. */\n-struct special_flow_init {\n-\tuint8_t dst_mac_val[6];\n-\tuint8_t dst_mac_mask[6];\n-\tunsigned int hash_types;\n-\tunsigned int per_vlan:1;\n-};\n-\n-struct hash_rxq {\n-\tstruct priv *priv; /* Back pointer to private data. */\n-\tstruct ibv_qp *qp; /* Hash RX QP. */\n-\tenum hash_rxq_type type; /* Hash RX queue type. */\n-\t/* MAC flow steering rules, one per VLAN ID. */\n-\tstruct ibv_exp_flow *mac_flow\n-\t\t[MLX5_MAX_MAC_ADDRESSES][MLX5_MAX_VLAN_IDS];\n-};\n-\n /* TX queue descriptor. */\n RTE_STD_C11\n struct mlx5_txq_data {\n@@ -297,16 +228,9 @@ struct mlx5_txq_ctrl {\n \n /* mlx5_rxq.c */\n \n-extern const struct hash_rxq_init hash_rxq_init[];\n-extern const unsigned int hash_rxq_init_n;\n-\n extern uint8_t rss_hash_default_key[];\n extern const size_t rss_hash_default_key_len;\n \n-size_t priv_flow_attr(struct priv *, struct ibv_exp_flow_attr *,\n-\t\t size_t, enum hash_rxq_type);\n-int priv_create_hash_rxqs(struct priv *);\n-void priv_destroy_hash_rxqs(struct priv *);\n void mlx5_rxq_cleanup(struct mlx5_rxq_ctrl *);\n int mlx5_rxq_ctrl_setup(struct rte_eth_dev *, struct mlx5_rxq_ctrl *,\n \t\t\tuint16_t, unsigned int, const struct rte_eth_rxconf *,\ndiff --git a/drivers/net/mlx5/mlx5_trigger.c b/drivers/net/mlx5/mlx5_trigger.c\nindex 28f59dc..ef36ee2 100644\n--- a/drivers/net/mlx5/mlx5_trigger.c\n+++ b/drivers/net/mlx5/mlx5_trigger.c\n@@ -157,9 +157,10 @@ mlx5_dev_start(struct rte_eth_dev *dev)\n \t}\n \t/* Update receive callback. */\n \tpriv_select_rx_function(priv);\n-\terr = priv_create_hash_rxqs(priv);\n+\tpriv_dev_traffic_disable(priv, dev);\n+\tpriv_dev_traffic_enable(priv, dev);\n \tif (err) {\n-\t\tERROR(\"%p: an error occurred while configuring hash RX queues:\"\n+\t\tERROR(\"%p: an error occurred while configuring control flows:\"\n \t\t \" %s\",\n \t\t (void *)priv, strerror(err));\n \t\tgoto error;\n@@ -186,8 +187,8 @@ mlx5_dev_start(struct rte_eth_dev *dev)\n \tdev->data->dev_started = 0;\n \tLIST_FOREACH(mr, &priv->mr, next)\n \t\tpriv_mr_release(priv, mr);\n-\tpriv_destroy_hash_rxqs(priv);\n \tpriv_flow_stop(priv, &priv->flows);\n+\tpriv_dev_traffic_disable(priv, dev);\n \tpriv_txq_stop(priv);\n \tpriv_rxq_stop(priv);\n \tpriv_unlock(priv);\n@@ -213,9 +214,10 @@ mlx5_dev_stop(struct rte_eth_dev *dev)\n \n \tpriv_lock(priv);\n \tDEBUG(\"%p: cleaning up and destroying hash RX queues\", (void *)dev);\n-\tpriv_destroy_hash_rxqs(priv);\n \tpriv_flow_stop(priv, &priv->flows);\n-\tpriv_flow_flush(priv, &priv->ctrl_flows);\n+\tpriv_dev_traffic_disable(priv, dev);\n+\tpriv_txq_stop(priv);\n+\tpriv_rxq_stop(priv);\n \tLIST_FOREACH(mr, &priv->mr, next) {\n \t\tpriv_mr_release(priv, mr);\n \t}\n", "prefixes": [ "dpdk-dev", "v1", "20/21" ] }