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GET /api/patches/27317/?format=api
{ "id": 27317, "url": "https://patches.dpdk.org/api/patches/27317/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/4d973efe8071e0ca08829dc29c9d58b841d6c080.1501598384.git.adrien.mazarguil@6wind.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<4d973efe8071e0ca08829dc29c9d58b841d6c080.1501598384.git.adrien.mazarguil@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/4d973efe8071e0ca08829dc29c9d58b841d6c080.1501598384.git.adrien.mazarguil@6wind.com", "date": "2017-08-01T16:53:52", "name": "[dpdk-dev,v1,05/48] net/mlx4: remove secondary process support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4d42f05819ea6c76aa208277e936fc66cf212c00", "submitter": { "id": 165, "url": "https://patches.dpdk.org/api/people/165/?format=api", "name": "Adrien Mazarguil", "email": "adrien.mazarguil@6wind.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/4d973efe8071e0ca08829dc29c9d58b841d6c080.1501598384.git.adrien.mazarguil@6wind.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/27317/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/27317/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 2A94C9B93;\n\tTue, 1 Aug 2017 18:55:07 +0200 (CEST)", "from mail-wm0-f47.google.com (mail-wm0-f47.google.com\n\t[74.125.82.47]) by dpdk.org (Postfix) with ESMTP id A53D79167\n\tfor <dev@dpdk.org>; Tue, 1 Aug 2017 18:54:57 +0200 (CEST)", "by mail-wm0-f47.google.com with SMTP id m85so20334386wma.0\n\tfor <dev@dpdk.org>; Tue, 01 Aug 2017 09:54:57 -0700 (PDT)", "from 6wind.com (host.78.145.23.62.rev.coltfrance.com.\n\t[62.23.145.78]) by smtp.gmail.com with ESMTPSA id\n\tw203sm12705402wme.2.2017.08.01.09.54.55\n\tfor <dev@dpdk.org> (version=TLS1_2 cipher=AES128-SHA bits=128/128);\n\tTue, 01 Aug 2017 09:54:56 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=6wind-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:subject:date:message-id:in-reply-to:references;\n\tbh=88YADRR9hdrfNOFmZtN2o6O8G/H7g+/BgwY8rT+j8OE=;\n\tb=WvRg+RMQxtPY4TjypmmqTm/mZ0yFjXswXby+TygSvkd9qegwir8BF+0LtAYZCRnRJm\n\tRXhD3/C+Ksh+Vg7c0IiP0YX5GeO3tOcCd2OjIuzdHrgxuZd4cwxl4NodfZoA9WD5NT1/\n\t68qr4RBxB6pomVi8l6OZ4OeB7oanfNFU9dyqweACOH6mVp9BFHIRpGZeCkQlUGalmHxF\n\tmIoVgdtiLoz9j1dA9ZQX8hfMm/nY491L5H2Gg9O50p0ndAsTNYIw02QuObStvElS/92u\n\tmZ3A9MdcCwZ6hWexILvqDps9ICwsozoTh58PwGxHGflfAPFAoW/NguMpGnXw6AHYXihW\n\tbtHQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=88YADRR9hdrfNOFmZtN2o6O8G/H7g+/BgwY8rT+j8OE=;\n\tb=Vpn1ao1iTHniOv1OazCKkC8N7PpRyBOFG+TuciM3Zv7zoVApS+Xjl+K3NScX3qN+fK\n\t3FONYmiL9CD0fvCCNcFWRy/AOrYQH3WvrE7nwLVKwpJsOwdjf++HAPJnNzwX0C132958\n\t3v1kXYd3ZM0sC28r3yOpQuKNoncOD+uuNdSRkbFrNWetaDq1RALDhk1M9Jl/eZLvEG8m\n\t23qGbFRMqEluSpQuiheQjHSCWmGWEl8bvs9gnwPGzzfaAzMavUW19BihFWPrOU/vFm5M\n\tCn555crc7USjpMeuoNaEeLTNYaLrr63w6Yg/QgsYh3SMg+N37cwJJqXfQGhN9T8X9DBf\n\tE23w==", "X-Gm-Message-State": "AIVw112DJjEzZ8YxnbyEGRzMqj12kLBkB+svs9WLhqF1QndIqcIMdI+W\n\tIpstdx08V2TAFofa00o=", "X-Received": "by 10.28.209.74 with SMTP id i71mr1965897wmg.30.1501606496804;\n\tTue, 01 Aug 2017 09:54:56 -0700 (PDT)", "From": "Adrien Mazarguil <adrien.mazarguil@6wind.com>", "To": "dev@dpdk.org", "Date": "Tue, 1 Aug 2017 18:53:52 +0200", "Message-Id": "<4d973efe8071e0ca08829dc29c9d58b841d6c080.1501598384.git.adrien.mazarguil@6wind.com>", "X-Mailer": "git-send-email 2.1.4", "In-Reply-To": "<cover.1501598383.git.adrien.mazarguil@6wind.com>", "References": "<cover.1501598383.git.adrien.mazarguil@6wind.com>", "Subject": "[dpdk-dev] [PATCH v1 05/48] net/mlx4: remove secondary process\n\tsupport", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "Current implementation is partial (Tx only), not convenient to use and\nnot of primary concern.\n\nRemove this feature before refactoring the PMD.\n\nSigned-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>\n---\n doc/guides/nics/features/mlx4.ini | 1 -\n doc/guides/nics/mlx4.rst | 2 -\n drivers/net/mlx4/mlx4.c | 349 +--------------------------------\n 3 files changed, 8 insertions(+), 344 deletions(-)", "diff": "diff --git a/doc/guides/nics/features/mlx4.ini b/doc/guides/nics/features/mlx4.ini\nindex 1d5f266..f6efd21 100644\n--- a/doc/guides/nics/features/mlx4.ini\n+++ b/doc/guides/nics/features/mlx4.ini\n@@ -27,7 +27,6 @@ Inner L4 checksum = Y\n Packet type parsing = Y\n Basic stats = Y\n Stats per queue = Y\n-Multiprocess aware = Y\n Other kdrv = Y\n Power8 = Y\n x86-32 = Y\ndiff --git a/doc/guides/nics/mlx4.rst b/doc/guides/nics/mlx4.rst\nindex 4c8c299..04788f2 100644\n--- a/doc/guides/nics/mlx4.rst\n+++ b/doc/guides/nics/mlx4.rst\n@@ -88,7 +88,6 @@ Features\n - Scattered packets are supported for TX and RX.\n - Inner L3/L4 (IP, TCP and UDP) TX/RX checksum offloading and validation.\n - Outer L3 (IP) TX/RX checksum offloading and validation for VXLAN frames.\n-- Secondary process TX is supported.\n - RX interrupts.\n \n Limitations\n@@ -99,7 +98,6 @@ Limitations\n - RSS always includes L3 (IPv4/IPv6) and L4 (UDP/TCP). They cannot be\n dissociated.\n - Hardware counters are not implemented (they are software counters).\n-- Secondary process RX is not supported.\n \n Configuration\n -------------\ndiff --git a/drivers/net/mlx4/mlx4.c b/drivers/net/mlx4/mlx4.c\nindex e6fc204..e938371 100644\n--- a/drivers/net/mlx4/mlx4.c\n+++ b/drivers/net/mlx4/mlx4.c\n@@ -110,14 +110,6 @@ typedef union {\n \t (((val) & (from)) / ((from) / (to))) : \\\n \t (((val) & (from)) * ((to) / (from))))\n \n-/* Local storage for secondary process data. */\n-struct mlx4_secondary_data {\n-\tstruct rte_eth_dev_data data; /* Local device data. */\n-\tstruct priv *primary_priv; /* Private structure from primary. */\n-\tstruct rte_eth_dev_data *shared_dev_data; /* Shared device data. */\n-\trte_spinlock_t lock; /* Port configuration lock. */\n-} mlx4_secondary_data[RTE_MAX_ETHPORTS];\n-\n /** Configuration structure for device arguments. */\n struct mlx4_conf {\n \tstruct {\n@@ -145,38 +137,6 @@ static void\n priv_rx_intr_vec_disable(struct priv *priv);\n \n /**\n- * Check if running as a secondary process.\n- *\n- * @return\n- * Nonzero if running as a secondary process.\n- */\n-static inline int\n-mlx4_is_secondary(void)\n-{\n-\treturn rte_eal_process_type() != RTE_PROC_PRIMARY;\n-}\n-\n-/**\n- * Return private structure associated with an Ethernet device.\n- *\n- * @param dev\n- * Pointer to Ethernet device structure.\n- *\n- * @return\n- * Pointer to private structure.\n- */\n-static struct priv *\n-mlx4_get_priv(struct rte_eth_dev *dev)\n-{\n-\tstruct mlx4_secondary_data *sd;\n-\n-\tif (!mlx4_is_secondary())\n-\t\treturn dev->data->dev_private;\n-\tsd = &mlx4_secondary_data[dev->data->port_id];\n-\treturn sd->data.dev_private;\n-}\n-\n-/**\n * Lock private structure to protect it from concurrent access in the\n * control path.\n *\n@@ -734,8 +694,6 @@ mlx4_dev_configure(struct rte_eth_dev *dev)\n \tstruct priv *priv = dev->data->dev_private;\n \tint ret;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn -E_RTE_SECONDARY;\n \tpriv_lock(priv);\n \tret = dev_configure(dev);\n \tassert(ret >= 0);\n@@ -746,157 +704,6 @@ mlx4_dev_configure(struct rte_eth_dev *dev)\n static uint16_t mlx4_tx_burst(void *, struct rte_mbuf **, uint16_t);\n static uint16_t removed_rx_burst(void *, struct rte_mbuf **, uint16_t);\n \n-/**\n- * Configure secondary process queues from a private data pointer (primary\n- * or secondary) and update burst callbacks. Can take place only once.\n- *\n- * All queues must have been previously created by the primary process to\n- * avoid undefined behavior.\n- *\n- * @param priv\n- * Private data pointer from either primary or secondary process.\n- *\n- * @return\n- * Private data pointer from secondary process, NULL in case of error.\n- */\n-static struct priv *\n-mlx4_secondary_data_setup(struct priv *priv)\n-{\n-\tunsigned int port_id = 0;\n-\tstruct mlx4_secondary_data *sd;\n-\tvoid **tx_queues;\n-\tvoid **rx_queues;\n-\tunsigned int nb_tx_queues;\n-\tunsigned int nb_rx_queues;\n-\tunsigned int i;\n-\n-\t/* priv must be valid at this point. */\n-\tassert(priv != NULL);\n-\t/* priv->dev must also be valid but may point to local memory from\n-\t * another process, possibly with the same address and must not\n-\t * be dereferenced yet. */\n-\tassert(priv->dev != NULL);\n-\t/* Determine port ID by finding out where priv comes from. */\n-\twhile (1) {\n-\t\tsd = &mlx4_secondary_data[port_id];\n-\t\trte_spinlock_lock(&sd->lock);\n-\t\t/* Primary process? */\n-\t\tif (sd->primary_priv == priv)\n-\t\t\tbreak;\n-\t\t/* Secondary process? */\n-\t\tif (sd->data.dev_private == priv)\n-\t\t\tbreak;\n-\t\trte_spinlock_unlock(&sd->lock);\n-\t\tif (++port_id == RTE_DIM(mlx4_secondary_data))\n-\t\t\tport_id = 0;\n-\t}\n-\t/* Switch to secondary private structure. If private data has already\n-\t * been updated by another thread, there is nothing else to do. */\n-\tpriv = sd->data.dev_private;\n-\tif (priv->dev->data == &sd->data)\n-\t\tgoto end;\n-\t/* Sanity checks. Secondary private structure is supposed to point\n-\t * to local eth_dev, itself still pointing to the shared device data\n-\t * structure allocated by the primary process. */\n-\tassert(sd->shared_dev_data != &sd->data);\n-\tassert(sd->data.nb_tx_queues == 0);\n-\tassert(sd->data.tx_queues == NULL);\n-\tassert(sd->data.nb_rx_queues == 0);\n-\tassert(sd->data.rx_queues == NULL);\n-\tassert(priv != sd->primary_priv);\n-\tassert(priv->dev->data == sd->shared_dev_data);\n-\tassert(priv->txqs_n == 0);\n-\tassert(priv->txqs == NULL);\n-\tassert(priv->rxqs_n == 0);\n-\tassert(priv->rxqs == NULL);\n-\tnb_tx_queues = sd->shared_dev_data->nb_tx_queues;\n-\tnb_rx_queues = sd->shared_dev_data->nb_rx_queues;\n-\t/* Allocate local storage for queues. */\n-\ttx_queues = rte_zmalloc(\"secondary ethdev->tx_queues\",\n-\t\t\t\tsizeof(sd->data.tx_queues[0]) * nb_tx_queues,\n-\t\t\t\tRTE_CACHE_LINE_SIZE);\n-\trx_queues = rte_zmalloc(\"secondary ethdev->rx_queues\",\n-\t\t\t\tsizeof(sd->data.rx_queues[0]) * nb_rx_queues,\n-\t\t\t\tRTE_CACHE_LINE_SIZE);\n-\tif (tx_queues == NULL || rx_queues == NULL)\n-\t\tgoto error;\n-\t/* Lock to prevent control operations during setup. */\n-\tpriv_lock(priv);\n-\t/* TX queues. */\n-\tfor (i = 0; i != nb_tx_queues; ++i) {\n-\t\tstruct txq *primary_txq = (*sd->primary_priv->txqs)[i];\n-\t\tstruct txq *txq;\n-\n-\t\tif (primary_txq == NULL)\n-\t\t\tcontinue;\n-\t\ttxq = rte_calloc_socket(\"TXQ\", 1, sizeof(*txq), 0,\n-\t\t\t\t\tprimary_txq->socket);\n-\t\tif (txq != NULL) {\n-\t\t\tif (txq_setup(priv->dev,\n-\t\t\t\t txq,\n-\t\t\t\t primary_txq->elts_n * MLX4_PMD_SGE_WR_N,\n-\t\t\t\t primary_txq->socket,\n-\t\t\t\t NULL) == 0) {\n-\t\t\t\ttxq->stats.idx = primary_txq->stats.idx;\n-\t\t\t\ttx_queues[i] = txq;\n-\t\t\t\tcontinue;\n-\t\t\t}\n-\t\t\trte_free(txq);\n-\t\t}\n-\t\twhile (i) {\n-\t\t\ttxq = tx_queues[--i];\n-\t\t\ttxq_cleanup(txq);\n-\t\t\trte_free(txq);\n-\t\t}\n-\t\tgoto error;\n-\t}\n-\t/* RX queues. */\n-\tfor (i = 0; i != nb_rx_queues; ++i) {\n-\t\tstruct rxq *primary_rxq = (*sd->primary_priv->rxqs)[i];\n-\n-\t\tif (primary_rxq == NULL)\n-\t\t\tcontinue;\n-\t\t/* Not supported yet. */\n-\t\trx_queues[i] = NULL;\n-\t}\n-\t/* Update everything. */\n-\tpriv->txqs = (void *)tx_queues;\n-\tpriv->txqs_n = nb_tx_queues;\n-\tpriv->rxqs = (void *)rx_queues;\n-\tpriv->rxqs_n = nb_rx_queues;\n-\tsd->data.rx_queues = rx_queues;\n-\tsd->data.tx_queues = tx_queues;\n-\tsd->data.nb_rx_queues = nb_rx_queues;\n-\tsd->data.nb_tx_queues = nb_tx_queues;\n-\tsd->data.dev_link = sd->shared_dev_data->dev_link;\n-\tsd->data.mtu = sd->shared_dev_data->mtu;\n-\tmemcpy(sd->data.rx_queue_state, sd->shared_dev_data->rx_queue_state,\n-\t sizeof(sd->data.rx_queue_state));\n-\tmemcpy(sd->data.tx_queue_state, sd->shared_dev_data->tx_queue_state,\n-\t sizeof(sd->data.tx_queue_state));\n-\tsd->data.dev_flags = sd->shared_dev_data->dev_flags;\n-\t/* Use local data from now on. */\n-\trte_mb();\n-\tpriv->dev->data = &sd->data;\n-\trte_mb();\n-\tpriv->dev->tx_pkt_burst = mlx4_tx_burst;\n-\tpriv->dev->rx_pkt_burst = removed_rx_burst;\n-\tpriv_unlock(priv);\n-end:\n-\t/* More sanity checks. */\n-\tassert(priv->dev->tx_pkt_burst == mlx4_tx_burst);\n-\tassert(priv->dev->rx_pkt_burst == removed_rx_burst);\n-\tassert(priv->dev->data == &sd->data);\n-\trte_spinlock_unlock(&sd->lock);\n-\treturn priv;\n-error:\n-\tpriv_unlock(priv);\n-\trte_free(tx_queues);\n-\trte_free(rx_queues);\n-\trte_spinlock_unlock(&sd->lock);\n-\treturn NULL;\n-}\n-\n /* TX queues handling. */\n \n /**\n@@ -1704,46 +1511,6 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)\n }\n \n /**\n- * DPDK callback for TX in secondary processes.\n- *\n- * This function configures all queues from primary process information\n- * if necessary before reverting to the normal TX burst callback.\n- *\n- * @param dpdk_txq\n- * Generic pointer to TX queue structure.\n- * @param[in] pkts\n- * Packets to transmit.\n- * @param pkts_n\n- * Number of packets in array.\n- *\n- * @return\n- * Number of packets successfully transmitted (<= pkts_n).\n- */\n-static uint16_t\n-mlx4_tx_burst_secondary_setup(void *dpdk_txq, struct rte_mbuf **pkts,\n-\t\t\t uint16_t pkts_n)\n-{\n-\tstruct txq *txq = dpdk_txq;\n-\tstruct priv *priv = mlx4_secondary_data_setup(txq->priv);\n-\tstruct priv *primary_priv;\n-\tunsigned int index;\n-\n-\tif (priv == NULL)\n-\t\treturn 0;\n-\tprimary_priv =\n-\t\tmlx4_secondary_data[priv->dev->data->port_id].primary_priv;\n-\t/* Look for queue index in both private structures. */\n-\tfor (index = 0; index != priv->txqs_n; ++index)\n-\t\tif (((*primary_priv->txqs)[index] == txq) ||\n-\t\t ((*priv->txqs)[index] == txq))\n-\t\t\tbreak;\n-\tif (index == priv->txqs_n)\n-\t\treturn 0;\n-\ttxq = (*priv->txqs)[index];\n-\treturn priv->dev->tx_pkt_burst(txq, pkts, pkts_n);\n-}\n-\n-/**\n * Configure a TX queue.\n *\n * @param dev\n@@ -1764,7 +1531,7 @@ static int\n txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,\n \t unsigned int socket, const struct rte_eth_txconf *conf)\n {\n-\tstruct priv *priv = mlx4_get_priv(dev);\n+\tstruct priv *priv = dev->data->dev_private;\n \tstruct txq tmpl = {\n \t\t.priv = priv,\n \t\t.socket = socket\n@@ -1960,8 +1727,6 @@ mlx4_tx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,\n \tstruct txq *txq = (*priv->txqs)[idx];\n \tint ret;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn -E_RTE_SECONDARY;\n \tpriv_lock(priv);\n \tDEBUG(\"%p: configuring queue %u for %u descriptors\",\n \t (void *)dev, idx, desc);\n@@ -2017,8 +1782,6 @@ mlx4_tx_queue_release(void *dpdk_txq)\n \tstruct priv *priv;\n \tunsigned int i;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn;\n \tif (txq == NULL)\n \t\treturn;\n \tpriv = txq->priv;\n@@ -3328,46 +3091,6 @@ mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n }\n \n /**\n- * DPDK callback for RX in secondary processes.\n- *\n- * This function configures all queues from primary process information\n- * if necessary before reverting to the normal RX burst callback.\n- *\n- * @param dpdk_rxq\n- * Generic pointer to RX queue structure.\n- * @param[out] pkts\n- * Array to store received packets.\n- * @param pkts_n\n- * Maximum number of packets in array.\n- *\n- * @return\n- * Number of packets successfully received (<= pkts_n).\n- */\n-static uint16_t\n-mlx4_rx_burst_secondary_setup(void *dpdk_rxq, struct rte_mbuf **pkts,\n-\t\t\t uint16_t pkts_n)\n-{\n-\tstruct rxq *rxq = dpdk_rxq;\n-\tstruct priv *priv = mlx4_secondary_data_setup(rxq->priv);\n-\tstruct priv *primary_priv;\n-\tunsigned int index;\n-\n-\tif (priv == NULL)\n-\t\treturn 0;\n-\tprimary_priv =\n-\t\tmlx4_secondary_data[priv->dev->data->port_id].primary_priv;\n-\t/* Look for queue index in both private structures. */\n-\tfor (index = 0; index != priv->rxqs_n; ++index)\n-\t\tif (((*primary_priv->rxqs)[index] == rxq) ||\n-\t\t ((*priv->rxqs)[index] == rxq))\n-\t\t\tbreak;\n-\tif (index == priv->rxqs_n)\n-\t\treturn 0;\n-\trxq = (*priv->rxqs)[index];\n-\treturn priv->dev->rx_pkt_burst(rxq, pkts, pkts_n);\n-}\n-\n-/**\n * Allocate a Queue Pair.\n * Optionally setup inline receive if supported.\n *\n@@ -3998,8 +3721,6 @@ mlx4_rx_queue_setup(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,\n \tint inactive = 0;\n \tint ret;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn -E_RTE_SECONDARY;\n \tpriv_lock(priv);\n \tDEBUG(\"%p: configuring queue %u for %u descriptors\",\n \t (void *)dev, idx, desc);\n@@ -4067,8 +3788,6 @@ mlx4_rx_queue_release(void *dpdk_rxq)\n \tstruct priv *priv;\n \tunsigned int i;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn;\n \tif (rxq == NULL)\n \t\treturn;\n \tpriv = rxq->priv;\n@@ -4114,8 +3833,6 @@ mlx4_dev_start(struct rte_eth_dev *dev)\n \tstruct rxq *rxq;\n \tint ret;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn -E_RTE_SECONDARY;\n \tpriv_lock(priv);\n \tif (priv->started) {\n \t\tpriv_unlock(priv);\n@@ -4206,8 +3923,6 @@ mlx4_dev_stop(struct rte_eth_dev *dev)\n \tunsigned int r;\n \tstruct rxq *rxq;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn;\n \tpriv_lock(priv);\n \tif (!priv->started) {\n \t\tpriv_unlock(priv);\n@@ -4309,7 +4024,7 @@ priv_dev_link_interrupt_handler_uninstall(struct priv *, struct rte_eth_dev *);\n static void\n mlx4_dev_close(struct rte_eth_dev *dev)\n {\n-\tstruct priv *priv = mlx4_get_priv(dev);\n+\tstruct priv *priv = dev->data->dev_private;\n \tvoid *tmp;\n \tunsigned int i;\n \n@@ -4462,7 +4177,7 @@ mlx4_set_link_up(struct rte_eth_dev *dev)\n static void\n mlx4_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)\n {\n-\tstruct priv *priv = mlx4_get_priv(dev);\n+\tstruct priv *priv = dev->data->dev_private;\n \tunsigned int max;\n \tchar ifname[IF_NAMESIZE];\n \n@@ -4539,7 +4254,7 @@ mlx4_dev_supported_ptypes_get(struct rte_eth_dev *dev)\n static void\n mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)\n {\n-\tstruct priv *priv = mlx4_get_priv(dev);\n+\tstruct priv *priv = dev->data->dev_private;\n \tstruct rte_eth_stats tmp = {0};\n \tunsigned int i;\n \tunsigned int idx;\n@@ -4604,7 +4319,7 @@ mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)\n static void\n mlx4_stats_reset(struct rte_eth_dev *dev)\n {\n-\tstruct priv *priv = mlx4_get_priv(dev);\n+\tstruct priv *priv = dev->data->dev_private;\n \tunsigned int i;\n \tunsigned int idx;\n \n@@ -4644,8 +4359,6 @@ mlx4_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)\n {\n \tstruct priv *priv = dev->data->dev_private;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn;\n \tpriv_lock(priv);\n \tif (priv->isolated)\n \t\tgoto end;\n@@ -4678,8 +4391,6 @@ mlx4_mac_addr_add(struct rte_eth_dev *dev, struct ether_addr *mac_addr,\n \tstruct priv *priv = dev->data->dev_private;\n \tint re;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn -ENOTSUP;\n \t(void)vmdq;\n \tpriv_lock(priv);\n \tif (priv->isolated) {\n@@ -4732,8 +4443,6 @@ mlx4_promiscuous_enable(struct rte_eth_dev *dev)\n \tunsigned int i;\n \tint ret;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn;\n \tpriv_lock(priv);\n \tif (priv->isolated) {\n \t\tDEBUG(\"%p: cannot enable promiscuous, \"\n@@ -4786,8 +4495,6 @@ mlx4_promiscuous_disable(struct rte_eth_dev *dev)\n \tstruct priv *priv = dev->data->dev_private;\n \tunsigned int i;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn;\n \tpriv_lock(priv);\n \tif (!priv->promisc || priv->isolated) {\n \t\tpriv_unlock(priv);\n@@ -4818,8 +4525,6 @@ mlx4_allmulticast_enable(struct rte_eth_dev *dev)\n \tunsigned int i;\n \tint ret;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn;\n \tpriv_lock(priv);\n \tif (priv->isolated) {\n \t\tDEBUG(\"%p: cannot enable allmulticast, \"\n@@ -4872,8 +4577,6 @@ mlx4_allmulticast_disable(struct rte_eth_dev *dev)\n \tstruct priv *priv = dev->data->dev_private;\n \tunsigned int i;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn;\n \tpriv_lock(priv);\n \tif (!priv->allmulti || priv->isolated) {\n \t\tpriv_unlock(priv);\n@@ -4902,7 +4605,7 @@ mlx4_allmulticast_disable(struct rte_eth_dev *dev)\n static int\n mlx4_link_update(struct rte_eth_dev *dev, int wait_to_complete)\n {\n-\tconst struct priv *priv = mlx4_get_priv(dev);\n+\tconst struct priv *priv = dev->data->dev_private;\n \tstruct ethtool_cmd edata = {\n \t\t.cmd = ETHTOOL_GSET\n \t};\n@@ -4976,8 +4679,6 @@ mlx4_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)\n \tuint16_t (*rx_func)(void *, struct rte_mbuf **, uint16_t) =\n \t\tmlx4_rx_burst;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn -E_RTE_SECONDARY;\n \tpriv_lock(priv);\n \t/* Set kernel interface MTU first. */\n \tif (priv_set_mtu(priv, mtu)) {\n@@ -5059,8 +4760,6 @@ mlx4_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)\n \t};\n \tint ret;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn -E_RTE_SECONDARY;\n \tifr.ifr_data = (void *)ðpause;\n \tpriv_lock(priv);\n \tif (priv_ifreq(priv, SIOCETHTOOL, &ifr)) {\n@@ -5109,8 +4808,6 @@ mlx4_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)\n \t};\n \tint ret;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn -E_RTE_SECONDARY;\n \tifr.ifr_data = (void *)ðpause;\n \tethpause.autoneg = fc_conf->autoneg;\n \tif (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||\n@@ -5250,8 +4947,6 @@ mlx4_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)\n \tstruct priv *priv = dev->data->dev_private;\n \tint ret;\n \n-\tif (mlx4_is_secondary())\n-\t\treturn -E_RTE_SECONDARY;\n \tpriv_lock(priv);\n \tif (priv->isolated) {\n \t\tDEBUG(\"%p: cannot set vlan filter, \"\n@@ -6263,36 +5958,8 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n \t\t\tgoto port_error;\n \t\t}\n \n-\t\t/* Secondary processes have to use local storage for their\n-\t\t * private data as well as a copy of eth_dev->data, but this\n-\t\t * pointer must not be modified before burst functions are\n-\t\t * actually called. */\n-\t\tif (mlx4_is_secondary()) {\n-\t\t\tstruct mlx4_secondary_data *sd =\n-\t\t\t\t&mlx4_secondary_data[eth_dev->data->port_id];\n-\n-\t\t\tsd->primary_priv = eth_dev->data->dev_private;\n-\t\t\tif (sd->primary_priv == NULL) {\n-\t\t\t\tERROR(\"no private data for port %u\",\n-\t\t\t\t eth_dev->data->port_id);\n-\t\t\t\terr = EINVAL;\n-\t\t\t\tgoto port_error;\n-\t\t\t}\n-\t\t\tsd->shared_dev_data = eth_dev->data;\n-\t\t\trte_spinlock_init(&sd->lock);\n-\t\t\tmemcpy(sd->data.name, sd->shared_dev_data->name,\n-\t\t\t sizeof(sd->data.name));\n-\t\t\tsd->data.dev_private = priv;\n-\t\t\tsd->data.rx_mbuf_alloc_failed = 0;\n-\t\t\tsd->data.mtu = ETHER_MTU;\n-\t\t\tsd->data.port_id = sd->shared_dev_data->port_id;\n-\t\t\tsd->data.mac_addrs = priv->mac;\n-\t\t\teth_dev->tx_pkt_burst = mlx4_tx_burst_secondary_setup;\n-\t\t\teth_dev->rx_pkt_burst = mlx4_rx_burst_secondary_setup;\n-\t\t} else {\n-\t\t\teth_dev->data->dev_private = priv;\n-\t\t\teth_dev->data->mac_addrs = priv->mac;\n-\t\t}\n+\t\teth_dev->data->dev_private = priv;\n+\t\teth_dev->data->mac_addrs = priv->mac;\n \t\teth_dev->device = &pci_dev->device;\n \n \t\trte_eth_copy_pci_info(eth_dev, pci_dev);\n", "prefixes": [ "dpdk-dev", "v1", "05/48" ] }