Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2007/?format=api
{ "id": 2007, "url": "https://patches.dpdk.org/api/patches/2007/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1418718200-31924-1-git-send-email-helin.zhang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1418718200-31924-1-git-send-email-helin.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1418718200-31924-1-git-send-email-helin.zhang@intel.com", "date": "2014-12-16T08:23:20", "name": "[dpdk-dev,v3] i40e: workaround for X710 performance issues", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "fdd931d94cbdcd1ad7ad2a7590feb4378592ff5c", "submitter": { "id": 14, "url": "https://patches.dpdk.org/api/people/14/?format=api", "name": "Zhang, Helin", "email": "helin.zhang@intel.com" }, "delegate": null, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1418718200-31924-1-git-send-email-helin.zhang@intel.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/2007/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/2007/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id D8CF6683A;\n\tTue, 16 Dec 2014 09:23:31 +0100 (CET)", "from mga03.intel.com (mga03.intel.com [134.134.136.65])\n\tby dpdk.org (Postfix) with ESMTP id 69629959\n\tfor <dev@dpdk.org>; Tue, 16 Dec 2014 09:23:29 +0100 (CET)", "from orsmga002.jf.intel.com ([10.7.209.21])\n\tby orsmga103.jf.intel.com with ESMTP; 16 Dec 2014 00:21:13 -0800", "from shvmail01.sh.intel.com ([10.239.29.42])\n\tby orsmga002.jf.intel.com with ESMTP; 16 Dec 2014 00:23:27 -0800", "from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com\n\t[10.239.29.89])\n\tby shvmail01.sh.intel.com with ESMTP id sBG8NONu018346;\n\tTue, 16 Dec 2014 16:23:24 +0800", "from shecgisg004.sh.intel.com (localhost [127.0.0.1])\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP\n\tid sBG8NMSC031958; Tue, 16 Dec 2014 16:23:24 +0800", "(from hzhan75@localhost)\n\tby shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id sBG8NMP4031954; \n\tTue, 16 Dec 2014 16:23:22 +0800" ], "X-ExtLoop1": "1", "X-IronPort-AV": "E=Sophos;i=\"5.07,585,1413270000\"; d=\"scan'208\";a=\"654707912\"", "From": "Helin Zhang <helin.zhang@intel.com>", "To": "dev@dpdk.org", "Date": "Tue, 16 Dec 2014 16:23:20 +0800", "Message-Id": "<1418718200-31924-1-git-send-email-helin.zhang@intel.com>", "X-Mailer": "git-send-email 1.7.4.1", "In-Reply-To": "<1418630187-28917-1-git-send-email-helin.zhang@intel.com>", "References": "<1418630187-28917-1-git-send-email-helin.zhang@intel.com>", "Cc": "aaron.f.rowden@intel.com", "Subject": "[dpdk-dev] [PATCH v3] i40e: workaround for X710 performance issues", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "On X710, performance number is far from the expectation on recent\nfirmware versions. The fix for this issue may not be integrated in\nthe following firmware version. So the workaround in software driver\nis needed. It needs to modify the initial values of 3 internal only\nregisters. Note that the workaround can be removed when it is fixed\nin firmware in the future.\n\nSigned-off-by: Helin Zhang <helin.zhang@intel.com>\n---\n lib/librte_pmd_i40e/i40e_ethdev.c | 89 +++++++++++++++++++++++++++++++++++++++\n 1 file changed, 89 insertions(+)\n\nv2 changes:\n* Added a compile error fix.\n\nv3 changes:\n* Used PRIx32 and PRIx64 instead for printing uint32_t and uint64_t\n variables.\n* Re-worded annotations, and commit logs.", "diff": "diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c\nindex 008d62c..624f0ce 100644\n--- a/lib/librte_pmd_i40e/i40e_ethdev.c\n+++ b/lib/librte_pmd_i40e/i40e_ethdev.c\n@@ -198,6 +198,7 @@ static int i40e_dev_filter_ctrl(struct rte_eth_dev *dev,\n \t\t\t\tenum rte_filter_type filter_type,\n \t\t\t\tenum rte_filter_op filter_op,\n \t\t\t\tvoid *arg);\n+static void i40e_configure_registers(struct i40e_hw *hw);\n \n /* Default hash key buffer for RSS */\n static uint32_t rss_key_default[I40E_PFQF_HKEY_MAX_INDEX + 1];\n@@ -443,6 +444,16 @@ eth_i40e_dev_init(__rte_unused struct eth_driver *eth_drv,\n \t/* Clear PXE mode */\n \ti40e_clear_pxe_mode(hw);\n \n+\t/*\n+\t * On X710, performance number is far from the expectation on recent\n+\t * firmware versions. The fix for this issue may not be integrated in\n+\t * the following firmware version. So the workaround in software driver\n+\t * is needed. It needs to modify the initial values of 3 internal only\n+\t * registers. Note that the workaround can be removed when it is fixed\n+\t * in firmware in the future.\n+\t */\n+\ti40e_configure_registers(hw);\n+\n \t/* Get hw capabilities */\n \tret = i40e_get_cap(hw);\n \tif (ret != I40E_SUCCESS) {\n@@ -5294,3 +5305,81 @@ i40e_pctype_to_flowtype(enum i40e_filter_pctype pctype)\n \n \treturn flowtype_table[pctype];\n }\n+\n+static int\n+i40e_debug_read_register(struct i40e_hw *hw, uint32_t addr, uint64_t *val)\n+{\n+\tstruct i40e_aq_desc desc;\n+\tstruct i40e_aqc_debug_reg_read_write *cmd =\n+\t\t(struct i40e_aqc_debug_reg_read_write *)&desc.params.raw;\n+\tenum i40e_status_code status;\n+\n+\ti40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_debug_read_reg);\n+\tcmd->address = rte_cpu_to_le_32(addr);\n+\tstatus = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);\n+\tif (status < 0)\n+\t\treturn status;\n+\n+\t*val = ((uint64_t)(rte_le_to_cpu_32(cmd->value_high)) << (CHAR_BIT *\n+\t\t\tsizeof(uint32_t))) + rte_le_to_cpu_32(cmd->value_low);\n+\n+\treturn status;\n+}\n+\n+/*\n+ * On X710, performance number is far from the expectation on recent firmware\n+ * versions. The fix for this issue may not be integrated in the following\n+ * firmware version. So the workaround in software driver is needed. It needs\n+ * to modify the initial values of 3 internal only registers. Note that the\n+ * workaround can be removed when it is fixed in firmware in the future.\n+ */\n+static void\n+i40e_configure_registers(struct i40e_hw *hw)\n+{\n+#define I40E_GL_SWR_PRI_JOIN_MAP_0 0x26CE00\n+#define I40E_GL_SWR_PRI_JOIN_MAP_2 0x26CE08\n+#define I40E_GL_SWR_PM_UP_THR 0x269FBC\n+#define I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE 0x10000200\n+#define I40E_GL_SWR_PRI_JOIN_MAP_2_VALUE 0x011f0200\n+#define I40E_GL_SWR_PM_UP_THR_VALUE 0x03030303\n+\n+\tstatic const struct {\n+\t\tuint32_t addr;\n+\t\tuint64_t val;\n+\t} reg_table[] = {\n+\t\t{I40E_GL_SWR_PRI_JOIN_MAP_0, I40E_GL_SWR_PRI_JOIN_MAP_0_VALUE},\n+\t\t{I40E_GL_SWR_PRI_JOIN_MAP_2, I40E_GL_SWR_PRI_JOIN_MAP_2_VALUE},\n+\t\t{I40E_GL_SWR_PM_UP_THR, I40E_GL_SWR_PM_UP_THR_VALUE},\n+\t};\n+\tuint64_t reg;\n+\tuint32_t i;\n+\tint ret;\n+\n+\t/* Below fix is for X710 only */\n+\tif (i40e_is_40G_device(hw->device_id))\n+\t\treturn;\n+\n+\tfor (i = 0; i < RTE_DIM(reg_table); i++) {\n+\t\tret = i40e_debug_read_register(hw, reg_table[i].addr, ®);\n+\t\tif (ret < 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Failed to read from 0x%\"PRIx32,\n+\t\t\t\t\t\t\treg_table[i].addr);\n+\t\t\tbreak;\n+\t\t}\n+\t\tPMD_DRV_LOG(DEBUG, \"Read from 0x%\"PRIx32\": 0x%\"PRIx64,\n+\t\t\t\t\t\treg_table[i].addr, reg);\n+\t\tif (reg == reg_table[i].val)\n+\t\t\tcontinue;\n+\n+\t\tret = i40e_aq_debug_write_register(hw, reg_table[i].addr,\n+\t\t\t\t\t\treg_table[i].val, NULL);\n+\t\tif (ret < 0) {\n+\t\t\tPMD_DRV_LOG(ERR, \"Failed to write 0x%\"PRIx64\" to the \"\n+\t\t\t\t\"address of 0x%\"PRIx32, reg_table[i].val,\n+\t\t\t\t\t\t\treg_table[i].addr);\n+\t\t\tbreak;\n+\t\t}\n+\t\tPMD_DRV_LOG(DEBUG, \"Write 0x%\"PRIx64\" to the address of \"\n+\t\t\t\"0x%\"PRIx32, reg_table[i].val, reg_table[i].addr);\n+\t}\n+}\n", "prefixes": [ "dpdk-dev", "v3" ] }