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GET /api/patches/17295/?format=api
{ "id": 17295, "url": "https://patches.dpdk.org/api/patches/17295/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1480436367-20749-14-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1480436367-20749-14-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1480436367-20749-14-git-send-email-arybchenko@solarflare.com", "date": "2016-11-29T16:18:45", "name": "[dpdk-dev,v2,13/55] net/sfc: import libefx built-in selftest support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "8b85c7f1bcf0462d92e3aedf5f7b048e7312e328", "submitter": { "id": 607, "url": "https://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1480436367-20749-14-git-send-email-arybchenko@solarflare.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/17295/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/17295/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id A07EBFA47;\n\tTue, 29 Nov 2016 17:21:55 +0100 (CET)", "from nbfkord-smmo01.seg.att.com (nbfkord-smmo01.seg.att.com\n\t[209.65.160.76]) by dpdk.org (Postfix) with ESMTP id 51F70376D\n\tfor <dev@dpdk.org>; Tue, 29 Nov 2016 17:20:49 +0100 (CET)", "from unknown [12.187.104.26] (EHLO nbfkord-smmo01.seg.att.com)\n\tby nbfkord-smmo01.seg.att.com(mxl_mta-7.2.4-7) with ESMTP id\n\t1eaad385.2b3e7f63e940.83546.00-2487.173808.nbfkord-smmo01.seg.att.com\n\t(envelope-from <arybchenko@solarflare.com>); \n\tTue, 29 Nov 2016 16:20:49 +0000 (UTC)", "from unknown [12.187.104.26]\n\tby nbfkord-smmo01.seg.att.com(mxl_mta-7.2.4-7) with SMTP id\n\t5daad385.0.83424.00-2366.173633.nbfkord-smmo01.seg.att.com\n\t(envelope-from <arybchenko@solarflare.com>); \n\tTue, 29 Nov 2016 16:20:39 +0000 (UTC)", "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1044.25; Tue, 29 Nov 2016 08:20:25 -0800", "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1044.25 via Frontend Transport; Tue, 29 Nov 2016 08:20:24 -0800", "from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com\n\t[10.17.10.10])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tuATGKNJ3029928; Tue, 29 Nov 2016 16:20:23 GMT", "from uklogin.uk.solarflarecom.com (localhost.localdomain\n\t[127.0.0.1])\n\tby uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tuATGKM1L021233; Tue, 29 Nov 2016 16:20:23 GMT" ], "X-MXL-Hash": [ "583daae115aeaca8-a16f32a1a98b1d40e1383a458007a101cb616322", "583daad75d335440-5ff1d640f51c3eee7438aee55b51f8987acd023f" ], "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "CC": "<ferruh.yigit@intel.com>", "Date": "Tue, 29 Nov 2016 16:18:45 +0000", "Message-ID": "<1480436367-20749-14-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.2.3", "In-Reply-To": "<1480436367-20749-1-git-send-email-arybchenko@solarflare.com>", "References": "<1479740470-6723-1-git-send-email-arybchenko@solarflare.com>\n\t<1480436367-20749-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-AnalysisOut": [ "[v=2.1 cv=UoJlQrEB c=1 sm=1 tr=0 a=8BlWFWvVlq5taO8ncb8nKg==]", "[:17 a=L24OOQBejmoA:10 a=zRKbQ67AAAAA:8 a=rQE43JCDXAeR0Fs_g]", "[E0A:9 a=_Drj-NbpIfy4YIO8:21 a=YMvQ95k1-b8KWrBF:21 a=IpA2b6]", "[oPnhgDVG3_:21 a=PA03WX8tBzeizutn5_OT:22]" ], "X-Spam": "[F=0.5007121426; CM=0.500; S=0.500(2015072901)]", "X-MAIL-FROM": "<arybchenko@solarflare.com>", "X-SOURCE-IP": "[12.187.104.26]", "Subject": "[dpdk-dev] [PATCH v2 13/55] net/sfc: import libefx built-in\n\tselftest support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "EFSYS_OPT_BIST should be enabled to use it.\n\nFrom Solarflare Communications Inc.\n\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/base/ef10_impl.h | 29 ++++++\n drivers/net/sfc/base/ef10_phy.c | 153 ++++++++++++++++++++++++++++\n drivers/net/sfc/base/efx.h | 80 +++++++++++++++\n drivers/net/sfc/base/efx_check.h | 7 ++\n drivers/net/sfc/base/efx_impl.h | 11 ++\n drivers/net/sfc/base/efx_mcdi.c | 115 +++++++++++++++++++++\n drivers/net/sfc/base/efx_mcdi.h | 12 +++\n drivers/net/sfc/base/efx_phy.c | 140 ++++++++++++++++++++++++++\n drivers/net/sfc/base/siena_impl.h | 25 +++++\n drivers/net/sfc/base/siena_phy.c | 205 ++++++++++++++++++++++++++++++++++++++\n 10 files changed, 777 insertions(+)", "diff": "diff --git a/drivers/net/sfc/base/ef10_impl.h b/drivers/net/sfc/base/ef10_impl.h\nindex 6afe0bc..1cc6a72 100644\n--- a/drivers/net/sfc/base/ef10_impl.h\n+++ b/drivers/net/sfc/base/ef10_impl.h\n@@ -345,6 +345,35 @@ ef10_phy_oui_get(\n \t__in\t\tefx_nic_t *enp,\n \t__out\t\tuint32_t *ouip);\n \n+#if EFSYS_OPT_BIST\n+\n+extern\t__checkReturn\t\tefx_rc_t\n+ef10_bist_enable_offline(\n+\t__in\t\t\tefx_nic_t *enp);\n+\n+extern\t__checkReturn\t\tefx_rc_t\n+ef10_bist_start(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type);\n+\n+extern\t__checkReturn\t\tefx_rc_t\n+ef10_bist_poll(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type,\n+\t__out\t\t\tefx_bist_result_t *resultp,\n+\t__out_opt __drv_when(count > 0, __notnull)\n+\tuint32_t\t*value_maskp,\n+\t__out_ecount_opt(count)\t__drv_when(count > 0, __notnull)\n+\tunsigned long\t*valuesp,\n+\t__in\t\t\tsize_t count);\n+\n+extern\t\t\t\tvoid\n+ef10_bist_stop(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type);\n+\n+#endif\t/* EFSYS_OPT_BIST */\n+\n /* TX */\n \n extern\t__checkReturn\tefx_rc_t\ndiff --git a/drivers/net/sfc/base/ef10_phy.c b/drivers/net/sfc/base/ef10_phy.c\nindex 36e2603..9e1b9c2 100644\n--- a/drivers/net/sfc/base/ef10_phy.c\n+++ b/drivers/net/sfc/base/ef10_phy.c\n@@ -390,4 +390,157 @@ ef10_phy_oui_get(\n \treturn (ENOTSUP);\n }\n \n+#if EFSYS_OPT_BIST\n+\n+\t__checkReturn\t\tefx_rc_t\n+ef10_bist_enable_offline(\n+\t__in\t\t\tefx_nic_t *enp)\n+{\n+\tefx_rc_t rc;\n+\n+\tif ((rc = efx_mcdi_bist_enable_offline(enp)) != 0)\n+\t\tgoto fail1;\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t__checkReturn\t\tefx_rc_t\n+ef10_bist_start(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type)\n+{\n+\tefx_rc_t rc;\n+\n+\tif ((rc = efx_mcdi_bist_start(enp, type)) != 0)\n+\t\tgoto fail1;\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t__checkReturn\t\tefx_rc_t\n+ef10_bist_poll(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type,\n+\t__out\t\t\tefx_bist_result_t *resultp,\n+\t__out_opt __drv_when(count > 0, __notnull)\n+\tuint32_t *value_maskp,\n+\t__out_ecount_opt(count)\t__drv_when(count > 0, __notnull)\n+\tunsigned long *valuesp,\n+\t__in\t\t\tsize_t count)\n+{\n+\tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n+\tefx_mcdi_req_t req;\n+\tuint8_t payload[MAX(MC_CMD_POLL_BIST_IN_LEN,\n+\t\t\t MCDI_CTL_SDU_LEN_MAX)];\n+\tuint32_t value_mask = 0;\n+\tuint32_t result;\n+\tefx_rc_t rc;\n+\n+\t_NOTE(ARGUNUSED(type))\n+\n+\t(void) memset(payload, 0, sizeof (payload));\n+\treq.emr_cmd = MC_CMD_POLL_BIST;\n+\treq.emr_in_buf = payload;\n+\treq.emr_in_length = MC_CMD_POLL_BIST_IN_LEN;\n+\treq.emr_out_buf = payload;\n+\treq.emr_out_length = MCDI_CTL_SDU_LEN_MAX;\n+\n+\tefx_mcdi_execute(enp, &req);\n+\n+\tif (req.emr_rc != 0) {\n+\t\trc = req.emr_rc;\n+\t\tgoto fail1;\n+\t}\n+\n+\tif (req.emr_out_length_used < MC_CMD_POLL_BIST_OUT_RESULT_OFST + 4) {\n+\t\trc = EMSGSIZE;\n+\t\tgoto fail2;\n+\t}\n+\n+\tif (count > 0)\n+\t\t(void) memset(valuesp, '\\0', count * sizeof (unsigned long));\n+\n+\tresult = MCDI_OUT_DWORD(req, POLL_BIST_OUT_RESULT);\n+\n+\tif (result == MC_CMD_POLL_BIST_FAILED &&\n+\t req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MEM_LEN &&\n+\t count > EFX_BIST_MEM_ECC_FATAL) {\n+\t\tif (valuesp != NULL) {\n+\t\t\tvaluesp[EFX_BIST_MEM_TEST] =\n+\t\t\t MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_TEST);\n+\t\t\tvaluesp[EFX_BIST_MEM_ADDR] =\n+\t\t\t MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ADDR);\n+\t\t\tvaluesp[EFX_BIST_MEM_BUS] =\n+\t\t\t MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_BUS);\n+\t\t\tvaluesp[EFX_BIST_MEM_EXPECT] =\n+\t\t\t MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_EXPECT);\n+\t\t\tvaluesp[EFX_BIST_MEM_ACTUAL] =\n+\t\t\t MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ACTUAL);\n+\t\t\tvaluesp[EFX_BIST_MEM_ECC] =\n+\t\t\t MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC);\n+\t\t\tvaluesp[EFX_BIST_MEM_ECC_PARITY] =\n+\t\t\t MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_PARITY);\n+\t\t\tvaluesp[EFX_BIST_MEM_ECC_FATAL] =\n+\t\t\t MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_FATAL);\n+\t\t}\n+\t\tvalue_mask |= (1 << EFX_BIST_MEM_TEST) |\n+\t\t (1 << EFX_BIST_MEM_ADDR) |\n+\t\t (1 << EFX_BIST_MEM_BUS) |\n+\t\t (1 << EFX_BIST_MEM_EXPECT) |\n+\t\t (1 << EFX_BIST_MEM_ACTUAL) |\n+\t\t (1 << EFX_BIST_MEM_ECC) |\n+\t\t (1 << EFX_BIST_MEM_ECC_PARITY) |\n+\t\t (1 << EFX_BIST_MEM_ECC_FATAL);\n+\t} else if (result == MC_CMD_POLL_BIST_FAILED &&\n+\t encp->enc_phy_type == EFX_PHY_XFI_FARMI &&\n+\t req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MRSFP_LEN &&\n+\t count > EFX_BIST_FAULT_CODE) {\n+\t\tif (valuesp != NULL)\n+\t\t\tvaluesp[EFX_BIST_FAULT_CODE] =\n+\t\t\t MCDI_OUT_DWORD(req, POLL_BIST_OUT_MRSFP_TEST);\n+\t\tvalue_mask |= 1 << EFX_BIST_FAULT_CODE;\n+\t}\n+\n+\tif (value_maskp != NULL)\n+\t\t*value_maskp = value_mask;\n+\n+\tEFSYS_ASSERT(resultp != NULL);\n+\tif (result == MC_CMD_POLL_BIST_RUNNING)\n+\t\t*resultp = EFX_BIST_RESULT_RUNNING;\n+\telse if (result == MC_CMD_POLL_BIST_PASSED)\n+\t\t*resultp = EFX_BIST_RESULT_PASSED;\n+\telse\n+\t\t*resultp = EFX_BIST_RESULT_FAILED;\n+\n+\treturn (0);\n+\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t\t\tvoid\n+ef10_bist_stop(\n+\t__in\t\tefx_nic_t *enp,\n+\t__in\t\tefx_bist_type_t type)\n+{\n+\t/* There is no way to stop BIST on EF10. */\n+\t_NOTE(ARGUNUSED(enp, type))\n+}\n+\n+#endif\t/* EFSYS_OPT_BIST */\n+\n #endif\t/* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */\ndiff --git a/drivers/net/sfc/base/efx.h b/drivers/net/sfc/base/efx.h\nindex c7108a9..84d60b6 100644\n--- a/drivers/net/sfc/base/efx.h\n+++ b/drivers/net/sfc/base/efx.h\n@@ -549,6 +549,83 @@ efx_phy_module_get_info(\n \t__out_bcount(len)\t\tuint8_t *data);\n \n \n+#if EFSYS_OPT_BIST\n+\n+typedef enum efx_bist_type_e {\n+\tEFX_BIST_TYPE_UNKNOWN,\n+\tEFX_BIST_TYPE_PHY_NORMAL,\n+\tEFX_BIST_TYPE_PHY_CABLE_SHORT,\n+\tEFX_BIST_TYPE_PHY_CABLE_LONG,\n+\tEFX_BIST_TYPE_MC_MEM,\t/* Test the MC DMEM and IMEM */\n+\tEFX_BIST_TYPE_SAT_MEM,\t/* Test the DMEM and IMEM of satellite cpus*/\n+\tEFX_BIST_TYPE_REG,\t/* Test the register memories */\n+\tEFX_BIST_TYPE_NTYPES,\n+} efx_bist_type_t;\n+\n+typedef enum efx_bist_result_e {\n+\tEFX_BIST_RESULT_UNKNOWN,\n+\tEFX_BIST_RESULT_RUNNING,\n+\tEFX_BIST_RESULT_PASSED,\n+\tEFX_BIST_RESULT_FAILED,\n+} efx_bist_result_t;\n+\n+typedef enum efx_phy_cable_status_e {\n+\tEFX_PHY_CABLE_STATUS_OK,\n+\tEFX_PHY_CABLE_STATUS_INVALID,\n+\tEFX_PHY_CABLE_STATUS_OPEN,\n+\tEFX_PHY_CABLE_STATUS_INTRAPAIRSHORT,\n+\tEFX_PHY_CABLE_STATUS_INTERPAIRSHORT,\n+\tEFX_PHY_CABLE_STATUS_BUSY,\n+} efx_phy_cable_status_t;\n+\n+typedef enum efx_bist_value_e {\n+\tEFX_BIST_PHY_CABLE_LENGTH_A,\n+\tEFX_BIST_PHY_CABLE_LENGTH_B,\n+\tEFX_BIST_PHY_CABLE_LENGTH_C,\n+\tEFX_BIST_PHY_CABLE_LENGTH_D,\n+\tEFX_BIST_PHY_CABLE_STATUS_A,\n+\tEFX_BIST_PHY_CABLE_STATUS_B,\n+\tEFX_BIST_PHY_CABLE_STATUS_C,\n+\tEFX_BIST_PHY_CABLE_STATUS_D,\n+\tEFX_BIST_FAULT_CODE,\n+\t/* Memory BIST specific values. These match to the MC_CMD_BIST_POLL\n+\t * response. */\n+\tEFX_BIST_MEM_TEST,\n+\tEFX_BIST_MEM_ADDR,\n+\tEFX_BIST_MEM_BUS,\n+\tEFX_BIST_MEM_EXPECT,\n+\tEFX_BIST_MEM_ACTUAL,\n+\tEFX_BIST_MEM_ECC,\n+\tEFX_BIST_MEM_ECC_PARITY,\n+\tEFX_BIST_MEM_ECC_FATAL,\n+\tEFX_BIST_NVALUES,\n+} efx_bist_value_t;\n+\n+extern\t__checkReturn\t\tefx_rc_t\n+efx_bist_enable_offline(\n+\t__in\t\t\tefx_nic_t *enp);\n+\n+extern\t__checkReturn\t\tefx_rc_t\n+efx_bist_start(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type);\n+\n+extern\t__checkReturn\t\tefx_rc_t\n+efx_bist_poll(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type,\n+\t__out\t\t\tefx_bist_result_t *resultp,\n+\t__out_opt\t\tuint32_t *value_maskp,\n+\t__out_ecount_opt(count)\tunsigned long *valuesp,\n+\t__in\t\t\tsize_t count);\n+\n+extern\t\t\t\tvoid\n+efx_bist_stop(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type);\n+\n+#endif\t/* EFSYS_OPT_BIST */\n+\n #define\tEFX_FEATURE_IPV6\t\t0x00000001\n #define\tEFX_FEATURE_LFSR_HASH_INSERT\t0x00000002\n #define\tEFX_FEATURE_LINK_EVENTS\t\t0x00000004\n@@ -594,6 +671,9 @@ typedef struct efx_nic_cfg_s {\n #if EFSYS_OPT_MCDI\n \tuint8_t\t\t\tenc_mcdi_mdio_channel;\n #endif\t/* EFSYS_OPT_MCDI */\n+#if EFSYS_OPT_BIST\n+\tuint32_t\t\tenc_bist_mask;\n+#endif\t/* EFSYS_OPT_BIST */\n #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD\n \tuint32_t\t\tenc_pf;\n \tuint32_t\t\tenc_vf;\ndiff --git a/drivers/net/sfc/base/efx_check.h b/drivers/net/sfc/base/efx_check.h\nindex feaccd0..c78c5b6 100644\n--- a/drivers/net/sfc/base/efx_check.h\n+++ b/drivers/net/sfc/base/efx_check.h\n@@ -214,6 +214,13 @@\n # error \"MCAST_FILTER_LIST is obsolete and is not supported\"\n #endif\n \n+#if EFSYS_OPT_BIST\n+/* Support BIST */\n+# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD)\n+# error \"BIST requires SIENA or HUNTINGTON or MEDFORD\"\n+# endif\n+#endif /* EFSYS_OPT_BIST */\n+\n #if EFSYS_OPT_ALLOW_UNCONFIGURED_NIC\n /* Support adapters with missing static config (for factory use only) */\n # if !EFSYS_OPT_MEDFORD\ndiff --git a/drivers/net/sfc/base/efx_impl.h b/drivers/net/sfc/base/efx_impl.h\nindex a7c6b29..a6853b3 100644\n--- a/drivers/net/sfc/base/efx_impl.h\n+++ b/drivers/net/sfc/base/efx_impl.h\n@@ -175,6 +175,14 @@ typedef struct efx_phy_ops_s {\n \tefx_rc_t\t(*epo_reconfigure)(efx_nic_t *);\n \tefx_rc_t\t(*epo_verify)(efx_nic_t *);\n \tefx_rc_t\t(*epo_oui_get)(efx_nic_t *, uint32_t *);\n+#if EFSYS_OPT_BIST\n+\tefx_rc_t\t(*epo_bist_enable_offline)(efx_nic_t *);\n+\tefx_rc_t\t(*epo_bist_start)(efx_nic_t *, efx_bist_type_t);\n+\tefx_rc_t\t(*epo_bist_poll)(efx_nic_t *, efx_bist_type_t,\n+\t\t\t\t\t efx_bist_result_t *, uint32_t *,\n+\t\t\t\t\t unsigned long *, size_t);\n+\tvoid\t\t(*epo_bist_stop)(efx_nic_t *, efx_bist_type_t);\n+#endif\t/* EFSYS_OPT_BIST */\n } efx_phy_ops_t;\n \n #if EFSYS_OPT_FILTER\n@@ -230,6 +238,9 @@ typedef struct efx_port_s {\n \tuint32_t\t\tep_phy_cap_mask;\n \tboolean_t\t\tep_mac_drain;\n \tboolean_t\t\tep_mac_stats_pending;\n+#if EFSYS_OPT_BIST\n+\tefx_bist_type_t\t\tep_current_bist;\n+#endif\n \tconst efx_mac_ops_t\t*ep_emop;\n \tconst efx_phy_ops_t\t*ep_epop;\n } efx_port_t;\ndiff --git a/drivers/net/sfc/base/efx_mcdi.c b/drivers/net/sfc/base/efx_mcdi.c\nindex 8d91812..b14cba1 100644\n--- a/drivers/net/sfc/base/efx_mcdi.c\n+++ b/drivers/net/sfc/base/efx_mcdi.c\n@@ -1432,6 +1432,19 @@ efx_mcdi_get_phy_cfg(\n \tencp->enc_mcdi_mdio_channel =\n \t\t(uint8_t)MCDI_OUT_DWORD(req, GET_PHY_CFG_OUT_CHANNEL);\n \n+#if EFSYS_OPT_BIST\n+\tencp->enc_bist_mask = 0;\n+\tif (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,\n+\t GET_PHY_CFG_OUT_BIST_CABLE_SHORT))\n+\t\tencp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_SHORT);\n+\tif (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,\n+\t GET_PHY_CFG_OUT_BIST_CABLE_LONG))\n+\t\tencp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_CABLE_LONG);\n+\tif (MCDI_OUT_DWORD_FIELD(req, GET_PHY_CFG_OUT_FLAGS,\n+\t GET_PHY_CFG_OUT_BIST))\n+\t\tencp->enc_bist_mask |= (1 << EFX_BIST_TYPE_PHY_NORMAL);\n+#endif /* EFSYS_OPT_BIST */\n+\n \treturn (0);\n \n fail2:\n@@ -1542,6 +1555,108 @@ efx_mcdi_mac_spoofing_supported(\n \treturn (rc);\n }\n \n+#if EFSYS_OPT_BIST\n+\n+#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD\n+/*\n+ * Enter bist offline mode. This is a fw mode which puts the NIC into a state\n+ * where memory BIST tests can be run and not much else can interfere or happen.\n+ * A reboot is required to exit this mode.\n+ */\n+\t__checkReturn\t\tefx_rc_t\n+efx_mcdi_bist_enable_offline(\n+\t__in\t\t\tefx_nic_t *enp)\n+{\n+\tefx_mcdi_req_t req;\n+\tefx_rc_t rc;\n+\n+\tEFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_IN_LEN == 0);\n+\tEFX_STATIC_ASSERT(MC_CMD_ENABLE_OFFLINE_BIST_OUT_LEN == 0);\n+\n+\treq.emr_cmd = MC_CMD_ENABLE_OFFLINE_BIST;\n+\treq.emr_in_buf = NULL;\n+\treq.emr_in_length = 0;\n+\treq.emr_out_buf = NULL;\n+\treq.emr_out_length = 0;\n+\n+\tefx_mcdi_execute(enp, &req);\n+\n+\tif (req.emr_rc != 0) {\n+\t\trc = req.emr_rc;\n+\t\tgoto fail1;\n+\t}\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */\n+\n+\t__checkReturn\t\tefx_rc_t\n+efx_mcdi_bist_start(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type)\n+{\n+\tefx_mcdi_req_t req;\n+\tuint8_t payload[MAX(MC_CMD_START_BIST_IN_LEN,\n+\t\t\t MC_CMD_START_BIST_OUT_LEN)];\n+\tefx_rc_t rc;\n+\n+\t(void) memset(payload, 0, sizeof (payload));\n+\treq.emr_cmd = MC_CMD_START_BIST;\n+\treq.emr_in_buf = payload;\n+\treq.emr_in_length = MC_CMD_START_BIST_IN_LEN;\n+\treq.emr_out_buf = payload;\n+\treq.emr_out_length = MC_CMD_START_BIST_OUT_LEN;\n+\n+\tswitch (type) {\n+\tcase EFX_BIST_TYPE_PHY_NORMAL:\n+\t\tMCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE, MC_CMD_PHY_BIST);\n+\t\tbreak;\n+\tcase EFX_BIST_TYPE_PHY_CABLE_SHORT:\n+\t\tMCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,\n+\t\t MC_CMD_PHY_BIST_CABLE_SHORT);\n+\t\tbreak;\n+\tcase EFX_BIST_TYPE_PHY_CABLE_LONG:\n+\t\tMCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,\n+\t\t MC_CMD_PHY_BIST_CABLE_LONG);\n+\t\tbreak;\n+\tcase EFX_BIST_TYPE_MC_MEM:\n+\t\tMCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,\n+\t\t MC_CMD_MC_MEM_BIST);\n+\t\tbreak;\n+\tcase EFX_BIST_TYPE_SAT_MEM:\n+\t\tMCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,\n+\t\t MC_CMD_PORT_MEM_BIST);\n+\t\tbreak;\n+\tcase EFX_BIST_TYPE_REG:\n+\t\tMCDI_IN_SET_DWORD(req, START_BIST_IN_TYPE,\n+\t\t MC_CMD_REG_BIST);\n+\t\tbreak;\n+\tdefault:\n+\t\tEFSYS_ASSERT(0);\n+\t}\n+\n+\tefx_mcdi_execute(enp, &req);\n+\n+\tif (req.emr_rc != 0) {\n+\t\trc = req.emr_rc;\n+\t\tgoto fail1;\n+\t}\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+#endif /* EFSYS_OPT_BIST */\n+\n \n /* Enable logging of some events (e.g. link state changes) */\n \t__checkReturn\tefx_rc_t\ndiff --git a/drivers/net/sfc/base/efx_mcdi.h b/drivers/net/sfc/base/efx_mcdi.h\nindex a62e921..6e24313 100644\n--- a/drivers/net/sfc/base/efx_mcdi.h\n+++ b/drivers/net/sfc/base/efx_mcdi.h\n@@ -180,6 +180,18 @@ efx_mcdi_mac_spoofing_supported(\n \t__out\t\t\tboolean_t *supportedp);\n \n \n+#if EFSYS_OPT_BIST\n+#if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD\n+extern\t__checkReturn\t\tefx_rc_t\n+efx_mcdi_bist_enable_offline(\n+\t__in\t\t\tefx_nic_t *enp);\n+#endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */\n+extern\t__checkReturn\t\tefx_rc_t\n+efx_mcdi_bist_start(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type);\n+#endif /* EFSYS_OPT_BIST */\n+\n extern\t__checkReturn\t\tefx_rc_t\n efx_mcdi_get_resource_limits(\n \t__in\t\t\tefx_nic_t *enp,\ndiff --git a/drivers/net/sfc/base/efx_phy.c b/drivers/net/sfc/base/efx_phy.c\nindex e7e915e..f07f127 100644\n--- a/drivers/net/sfc/base/efx_phy.c\n+++ b/drivers/net/sfc/base/efx_phy.c\n@@ -39,6 +39,12 @@ static const efx_phy_ops_t\t__efx_phy_siena_ops = {\n \tsiena_phy_reconfigure,\t\t/* epo_reconfigure */\n \tsiena_phy_verify,\t\t/* epo_verify */\n \tsiena_phy_oui_get,\t\t/* epo_oui_get */\n+#if EFSYS_OPT_BIST\n+\tNULL,\t\t\t\t/* epo_bist_enable_offline */\n+\tsiena_phy_bist_start,\t\t/* epo_bist_start */\n+\tsiena_phy_bist_poll,\t\t/* epo_bist_poll */\n+\tsiena_phy_bist_stop,\t\t/* epo_bist_stop */\n+#endif\t/* EFSYS_OPT_BIST */\n };\n #endif\t/* EFSYS_OPT_SIENA */\n \n@@ -49,6 +55,12 @@ static const efx_phy_ops_t\t__efx_phy_ef10_ops = {\n \tef10_phy_reconfigure,\t\t/* epo_reconfigure */\n \tef10_phy_verify,\t\t/* epo_verify */\n \tef10_phy_oui_get,\t\t/* epo_oui_get */\n+#if EFSYS_OPT_BIST\n+\tef10_bist_enable_offline,\t/* epo_bist_enable_offline */\n+\tef10_bist_start,\t\t/* epo_bist_start */\n+\tef10_bist_poll,\t\t\t/* epo_bist_poll */\n+\tef10_bist_stop,\t\t\t/* epo_bist_stop */\n+#endif\t/* EFSYS_OPT_BIST */\n };\n #endif\t/* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */\n \n@@ -266,6 +278,134 @@ efx_phy_module_get_info(\n }\n \n \n+#if EFSYS_OPT_BIST\n+\n+\t__checkReturn\t\tefx_rc_t\n+efx_bist_enable_offline(\n+\t__in\t\t\tefx_nic_t *enp)\n+{\n+\tefx_port_t *epp = &(enp->en_port);\n+\tconst efx_phy_ops_t *epop = epp->ep_epop;\n+\tefx_rc_t rc;\n+\n+\tEFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);\n+\n+\tif (epop->epo_bist_enable_offline == NULL) {\n+\t\trc = ENOTSUP;\n+\t\tgoto fail1;\n+\t}\n+\n+\tif ((rc = epop->epo_bist_enable_offline(enp)) != 0)\n+\t\tgoto fail2;\n+\n+\treturn (0);\n+\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+\n+}\n+\n+\t__checkReturn\t\tefx_rc_t\n+efx_bist_start(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type)\n+{\n+\tefx_port_t *epp = &(enp->en_port);\n+\tconst efx_phy_ops_t *epop = epp->ep_epop;\n+\tefx_rc_t rc;\n+\n+\tEFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);\n+\n+\tEFSYS_ASSERT3U(type, !=, EFX_BIST_TYPE_UNKNOWN);\n+\tEFSYS_ASSERT3U(type, <, EFX_BIST_TYPE_NTYPES);\n+\tEFSYS_ASSERT3U(epp->ep_current_bist, ==, EFX_BIST_TYPE_UNKNOWN);\n+\n+\tif (epop->epo_bist_start == NULL) {\n+\t\trc = ENOTSUP;\n+\t\tgoto fail1;\n+\t}\n+\n+\tif ((rc = epop->epo_bist_start(enp, type)) != 0)\n+\t\tgoto fail2;\n+\n+\tepp->ep_current_bist = type;\n+\n+\treturn (0);\n+\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t__checkReturn\t\tefx_rc_t\n+efx_bist_poll(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type,\n+\t__out\t\t\tefx_bist_result_t *resultp,\n+\t__out_opt\t\tuint32_t *value_maskp,\n+\t__out_ecount_opt(count)\tunsigned long *valuesp,\n+\t__in\t\t\tsize_t count)\n+{\n+\tefx_port_t *epp = &(enp->en_port);\n+\tconst efx_phy_ops_t *epop = epp->ep_epop;\n+\tefx_rc_t rc;\n+\n+\tEFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);\n+\n+\tEFSYS_ASSERT3U(type, !=, EFX_BIST_TYPE_UNKNOWN);\n+\tEFSYS_ASSERT3U(type, <, EFX_BIST_TYPE_NTYPES);\n+\tEFSYS_ASSERT3U(epp->ep_current_bist, ==, type);\n+\n+\tEFSYS_ASSERT(epop->epo_bist_poll != NULL);\n+\tif (epop->epo_bist_poll == NULL) {\n+\t\trc = ENOTSUP;\n+\t\tgoto fail1;\n+\t}\n+\n+\tif ((rc = epop->epo_bist_poll(enp, type, resultp, value_maskp,\n+\t valuesp, count)) != 0)\n+\t\tgoto fail2;\n+\n+\treturn (0);\n+\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t\t\tvoid\n+efx_bist_stop(\n+\t__in\t\tefx_nic_t *enp,\n+\t__in\t\tefx_bist_type_t type)\n+{\n+\tefx_port_t *epp = &(enp->en_port);\n+\tconst efx_phy_ops_t *epop = epp->ep_epop;\n+\n+\tEFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);\n+\n+\tEFSYS_ASSERT3U(type, !=, EFX_BIST_TYPE_UNKNOWN);\n+\tEFSYS_ASSERT3U(type, <, EFX_BIST_TYPE_NTYPES);\n+\tEFSYS_ASSERT3U(epp->ep_current_bist, ==, type);\n+\n+\tEFSYS_ASSERT(epop->epo_bist_stop != NULL);\n+\n+\tif (epop->epo_bist_stop != NULL)\n+\t\tepop->epo_bist_stop(enp, type);\n+\n+\tepp->ep_current_bist = EFX_BIST_TYPE_UNKNOWN;\n+}\n+\n+#endif\t/* EFSYS_OPT_BIST */\n \t\t\tvoid\n efx_phy_unprobe(\n \t__in\tefx_nic_t *enp)\ndiff --git a/drivers/net/sfc/base/siena_impl.h b/drivers/net/sfc/base/siena_impl.h\nindex c316867..bdaa4a3 100644\n--- a/drivers/net/sfc/base/siena_impl.h\n+++ b/drivers/net/sfc/base/siena_impl.h\n@@ -170,6 +170,31 @@ siena_phy_oui_get(\n \t__in\t\tefx_nic_t *enp,\n \t__out\t\tuint32_t *ouip);\n \n+#if EFSYS_OPT_BIST\n+\n+extern\t__checkReturn\t\tefx_rc_t\n+siena_phy_bist_start(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type);\n+\n+extern\t__checkReturn\t\tefx_rc_t\n+siena_phy_bist_poll(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type,\n+\t__out\t\t\tefx_bist_result_t *resultp,\n+\t__out_opt __drv_when(count > 0, __notnull)\n+\tuint32_t\t*value_maskp,\n+\t__out_ecount_opt(count)\t__drv_when(count > 0, __notnull)\n+\tunsigned long\t*valuesp,\n+\t__in\t\t\tsize_t count);\n+\n+extern\t\t\t\tvoid\n+siena_phy_bist_stop(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type);\n+\n+#endif\t/* EFSYS_OPT_BIST */\n+\n extern\t__checkReturn\tefx_rc_t\n siena_mac_poll(\n \t__in\t\tefx_nic_t *enp,\ndiff --git a/drivers/net/sfc/base/siena_phy.c b/drivers/net/sfc/base/siena_phy.c\nindex 0e3fc34..d7e7d77 100644\n--- a/drivers/net/sfc/base/siena_phy.c\n+++ b/drivers/net/sfc/base/siena_phy.c\n@@ -372,4 +372,209 @@ siena_phy_oui_get(\n \treturn (ENOTSUP);\n }\n \n+#if EFSYS_OPT_BIST\n+\n+\t__checkReturn\t\tefx_rc_t\n+siena_phy_bist_start(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type)\n+{\n+\tefx_rc_t rc;\n+\n+\tif ((rc = efx_mcdi_bist_start(enp, type)) != 0)\n+\t\tgoto fail1;\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+static\t__checkReturn\t\tunsigned long\n+siena_phy_sft9001_bist_status(\n+\t__in\t\t\tuint16_t code)\n+{\n+\tswitch (code) {\n+\tcase MC_CMD_POLL_BIST_SFT9001_PAIR_BUSY:\n+\t\treturn (EFX_PHY_CABLE_STATUS_BUSY);\n+\tcase MC_CMD_POLL_BIST_SFT9001_INTER_PAIR_SHORT:\n+\t\treturn (EFX_PHY_CABLE_STATUS_INTERPAIRSHORT);\n+\tcase MC_CMD_POLL_BIST_SFT9001_INTRA_PAIR_SHORT:\n+\t\treturn (EFX_PHY_CABLE_STATUS_INTRAPAIRSHORT);\n+\tcase MC_CMD_POLL_BIST_SFT9001_PAIR_OPEN:\n+\t\treturn (EFX_PHY_CABLE_STATUS_OPEN);\n+\tcase MC_CMD_POLL_BIST_SFT9001_PAIR_OK:\n+\t\treturn (EFX_PHY_CABLE_STATUS_OK);\n+\tdefault:\n+\t\treturn (EFX_PHY_CABLE_STATUS_INVALID);\n+\t}\n+}\n+\n+\t__checkReturn\t\tefx_rc_t\n+siena_phy_bist_poll(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__in\t\t\tefx_bist_type_t type,\n+\t__out\t\t\tefx_bist_result_t *resultp,\n+\t__out_opt __drv_when(count > 0, __notnull)\n+\tuint32_t *value_maskp,\n+\t__out_ecount_opt(count)\t__drv_when(count > 0, __notnull)\n+\tunsigned long *valuesp,\n+\t__in\t\t\tsize_t count)\n+{\n+\tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n+\tuint8_t payload[MAX(MC_CMD_POLL_BIST_IN_LEN,\n+\t\t\t MCDI_CTL_SDU_LEN_MAX)];\n+\tuint32_t value_mask = 0;\n+\tefx_mcdi_req_t req;\n+\tuint32_t result;\n+\tefx_rc_t rc;\n+\n+\t(void) memset(payload, 0, sizeof (payload));\n+\treq.emr_cmd = MC_CMD_POLL_BIST;\n+\treq.emr_in_buf = payload;\n+\treq.emr_in_length = MC_CMD_POLL_BIST_IN_LEN;\n+\treq.emr_out_buf = payload;\n+\treq.emr_out_length = MCDI_CTL_SDU_LEN_MAX;\n+\n+\tefx_mcdi_execute(enp, &req);\n+\n+\tif (req.emr_rc != 0) {\n+\t\trc = req.emr_rc;\n+\t\tgoto fail1;\n+\t}\n+\n+\tif (req.emr_out_length_used < MC_CMD_POLL_BIST_OUT_RESULT_OFST + 4) {\n+\t\trc = EMSGSIZE;\n+\t\tgoto fail2;\n+\t}\n+\n+\tif (count > 0)\n+\t\t(void) memset(valuesp, '\\0', count * sizeof (unsigned long));\n+\n+\tresult = MCDI_OUT_DWORD(req, POLL_BIST_OUT_RESULT);\n+\n+\t/* Extract PHY specific results */\n+\tif (result == MC_CMD_POLL_BIST_PASSED &&\n+\t encp->enc_phy_type == EFX_PHY_SFT9001B &&\n+\t req.emr_out_length_used >= MC_CMD_POLL_BIST_OUT_SFT9001_LEN &&\n+\t (type == EFX_BIST_TYPE_PHY_CABLE_SHORT ||\n+\t type == EFX_BIST_TYPE_PHY_CABLE_LONG)) {\n+\t\tuint16_t word;\n+\n+\t\tif (count > EFX_BIST_PHY_CABLE_LENGTH_A) {\n+\t\t\tif (valuesp != NULL)\n+\t\t\t\tvaluesp[EFX_BIST_PHY_CABLE_LENGTH_A] =\n+\t\t\t\t MCDI_OUT_DWORD(req,\n+\t\t\t\t POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A);\n+\t\t\tvalue_mask |= (1 << EFX_BIST_PHY_CABLE_LENGTH_A);\n+\t\t}\n+\n+\t\tif (count > EFX_BIST_PHY_CABLE_LENGTH_B) {\n+\t\t\tif (valuesp != NULL)\n+\t\t\t\tvaluesp[EFX_BIST_PHY_CABLE_LENGTH_B] =\n+\t\t\t\t MCDI_OUT_DWORD(req,\n+\t\t\t\t POLL_BIST_OUT_SFT9001_CABLE_LENGTH_B);\n+\t\t\tvalue_mask |= (1 << EFX_BIST_PHY_CABLE_LENGTH_B);\n+\t\t}\n+\n+\t\tif (count > EFX_BIST_PHY_CABLE_LENGTH_C) {\n+\t\t\tif (valuesp != NULL)\n+\t\t\t\tvaluesp[EFX_BIST_PHY_CABLE_LENGTH_C] =\n+\t\t\t\t MCDI_OUT_DWORD(req,\n+\t\t\t\t POLL_BIST_OUT_SFT9001_CABLE_LENGTH_C);\n+\t\t\tvalue_mask |= (1 << EFX_BIST_PHY_CABLE_LENGTH_C);\n+\t\t}\n+\n+\t\tif (count > EFX_BIST_PHY_CABLE_LENGTH_D) {\n+\t\t\tif (valuesp != NULL)\n+\t\t\t\tvaluesp[EFX_BIST_PHY_CABLE_LENGTH_D] =\n+\t\t\t\t MCDI_OUT_DWORD(req,\n+\t\t\t\t POLL_BIST_OUT_SFT9001_CABLE_LENGTH_D);\n+\t\t\tvalue_mask |= (1 << EFX_BIST_PHY_CABLE_LENGTH_D);\n+\t\t}\n+\n+\t\tif (count > EFX_BIST_PHY_CABLE_STATUS_A) {\n+\t\t\tif (valuesp != NULL) {\n+\t\t\t\tword = MCDI_OUT_WORD(req,\n+\t\t\t\t POLL_BIST_OUT_SFT9001_CABLE_STATUS_A);\n+\t\t\t\tvaluesp[EFX_BIST_PHY_CABLE_STATUS_A] =\n+\t\t\t\t siena_phy_sft9001_bist_status(word);\n+\t\t\t}\n+\t\t\tvalue_mask |= (1 << EFX_BIST_PHY_CABLE_STATUS_A);\n+\t\t}\n+\n+\t\tif (count > EFX_BIST_PHY_CABLE_STATUS_B) {\n+\t\t\tif (valuesp != NULL) {\n+\t\t\t\tword = MCDI_OUT_WORD(req,\n+\t\t\t\t POLL_BIST_OUT_SFT9001_CABLE_STATUS_B);\n+\t\t\t\tvaluesp[EFX_BIST_PHY_CABLE_STATUS_B] =\n+\t\t\t\t siena_phy_sft9001_bist_status(word);\n+\t\t\t}\n+\t\t\tvalue_mask |= (1 << EFX_BIST_PHY_CABLE_STATUS_B);\n+\t\t}\n+\n+\t\tif (count > EFX_BIST_PHY_CABLE_STATUS_C) {\n+\t\t\tif (valuesp != NULL) {\n+\t\t\t\tword = MCDI_OUT_WORD(req,\n+\t\t\t\t POLL_BIST_OUT_SFT9001_CABLE_STATUS_C);\n+\t\t\t\tvaluesp[EFX_BIST_PHY_CABLE_STATUS_C] =\n+\t\t\t\t siena_phy_sft9001_bist_status(word);\n+\t\t\t}\n+\t\t\tvalue_mask |= (1 << EFX_BIST_PHY_CABLE_STATUS_C);\n+\t\t}\n+\n+\t\tif (count > EFX_BIST_PHY_CABLE_STATUS_D) {\n+\t\t\tif (valuesp != NULL) {\n+\t\t\t\tword = MCDI_OUT_WORD(req,\n+\t\t\t\t POLL_BIST_OUT_SFT9001_CABLE_STATUS_D);\n+\t\t\t\tvaluesp[EFX_BIST_PHY_CABLE_STATUS_D] =\n+\t\t\t\t siena_phy_sft9001_bist_status(word);\n+\t\t\t}\n+\t\t\tvalue_mask |= (1 << EFX_BIST_PHY_CABLE_STATUS_D);\n+\t\t}\n+\n+\t} else if (result == MC_CMD_POLL_BIST_FAILED &&\n+\t\t encp->enc_phy_type == EFX_PHY_QLX111V &&\n+\t\t req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MRSFP_LEN &&\n+\t\t count > EFX_BIST_FAULT_CODE) {\n+\t\tif (valuesp != NULL)\n+\t\t\tvaluesp[EFX_BIST_FAULT_CODE] =\n+\t\t\t MCDI_OUT_DWORD(req, POLL_BIST_OUT_MRSFP_TEST);\n+\t\tvalue_mask |= 1 << EFX_BIST_FAULT_CODE;\n+\t}\n+\n+\tif (value_maskp != NULL)\n+\t\t*value_maskp = value_mask;\n+\n+\tEFSYS_ASSERT(resultp != NULL);\n+\tif (result == MC_CMD_POLL_BIST_RUNNING)\n+\t\t*resultp = EFX_BIST_RESULT_RUNNING;\n+\telse if (result == MC_CMD_POLL_BIST_PASSED)\n+\t\t*resultp = EFX_BIST_RESULT_PASSED;\n+\telse\n+\t\t*resultp = EFX_BIST_RESULT_FAILED;\n+\n+\treturn (0);\n+\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t\t\tvoid\n+siena_phy_bist_stop(\n+\t__in\t\tefx_nic_t *enp,\n+\t__in\t\tefx_bist_type_t type)\n+{\n+\t/* There is no way to stop BIST on Siena */\n+\t_NOTE(ARGUNUSED(enp, type))\n+}\n+\n+#endif\t/* EFSYS_OPT_BIST */\n+\n #endif\t/* EFSYS_OPT_SIENA */\n", "prefixes": [ "dpdk-dev", "v2", "13/55" ] }