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{
    "id": 17164,
    "url": "https://patches.dpdk.org/api/patches/17164/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1479747322-5774-3-git-send-email-jblunck@infradead.org/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1479747322-5774-3-git-send-email-jblunck@infradead.org>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1479747322-5774-3-git-send-email-jblunck@infradead.org",
    "date": "2016-11-21T16:55:17",
    "name": "[dpdk-dev,v2,3/8] drivers: Use ETH_DEV_PCI_DEV() helper",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "7935f6609d3d37e18388d214d29fe659742e959c",
    "submitter": {
        "id": 249,
        "url": "https://patches.dpdk.org/api/people/249/?format=api",
        "name": "Jan Blunck",
        "email": "jblunck@infradead.org"
    },
    "delegate": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1479747322-5774-3-git-send-email-jblunck@infradead.org/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/17164/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/17164/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id CC97D58EC;\n\tMon, 21 Nov 2016 17:57:15 +0100 (CET)",
            "from mail-wm0-f67.google.com (mail-wm0-f67.google.com\n\t[74.125.82.67]) by dpdk.org (Postfix) with ESMTP id 12D51558C\n\tfor <dev@dpdk.org>; Mon, 21 Nov 2016 17:57:08 +0100 (CET)",
            "by mail-wm0-f67.google.com with SMTP id g23so3623066wme.1\n\tfor <dev@dpdk.org>; Mon, 21 Nov 2016 08:57:08 -0800 (PST)",
            "from weierstrass.local.net ([91.200.110.70])\n\tby smtp.gmail.com with ESMTPSA id\n\tv202sm20536051wmv.8.2016.11.21.08.57.06\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tMon, 21 Nov 2016 08:57:06 -0800 (PST)"
        ],
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        "X-Received": "by 10.28.45.212 with SMTP id t203mr17129226wmt.46.1479747427959; \n\tMon, 21 Nov 2016 08:57:07 -0800 (PST)",
        "From": "Jan Blunck <jblunck@infradead.org>",
        "To": "dev@dpdk.org",
        "Cc": "shreyansh.jain@nxp.com,\n\tdavid.marchand@6wind.com",
        "Date": "Mon, 21 Nov 2016 17:55:17 +0100",
        "Message-Id": "<1479747322-5774-3-git-send-email-jblunck@infradead.org>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1479747322-5774-1-git-send-email-jblunck@infradead.org>",
        "References": "<1479747322-5774-1-git-send-email-jblunck@infradead.org>",
        "Subject": "[dpdk-dev] [PATCH v2 3/8] drivers: Use ETH_DEV_PCI_DEV() helper",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
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        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "The drivers should not directly access the rte_eth_dev->pci_dev but use\na macro instead. This is a preparation for replacing the pci_dev with\na struct rte_device member in the future.\n\nSigned-off-by: Jan Blunck <jblunck@infradead.org>\n---\n drivers/net/bnxt/bnxt_ethdev.c       | 19 ++++++-----\n drivers/net/bnxt/bnxt_ring.c         | 11 +++---\n drivers/net/cxgbe/cxgbe_ethdev.c     |  2 +-\n drivers/net/e1000/em_ethdev.c        | 20 ++++++-----\n drivers/net/e1000/igb_ethdev.c       | 50 +++++++++++++++------------\n drivers/net/e1000/igb_pf.c           |  3 +-\n drivers/net/ena/ena_ethdev.c         |  2 +-\n drivers/net/enic/enic_ethdev.c       |  2 +-\n drivers/net/fm10k/fm10k_ethdev.c     | 49 ++++++++++++++-------------\n drivers/net/i40e/i40e_ethdev.c       | 44 ++++++++++++------------\n drivers/net/i40e/i40e_ethdev.h       |  4 +++\n drivers/net/i40e/i40e_ethdev_vf.c    | 38 ++++++++++-----------\n drivers/net/ixgbe/ixgbe_ethdev.c     | 65 +++++++++++++++++++++---------------\n drivers/net/ixgbe/ixgbe_pf.c         |  2 +-\n drivers/net/qede/qede_ethdev.c       | 17 +++++-----\n drivers/net/vmxnet3/vmxnet3_ethdev.c |  4 +--\n 16 files changed, 185 insertions(+), 147 deletions(-)",
    "diff": "diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c\nindex 035fe07..cd50f11 100644\n--- a/drivers/net/bnxt/bnxt_ethdev.c\n+++ b/drivers/net/bnxt/bnxt_ethdev.c\n@@ -743,6 +743,7 @@ static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,\n {\n \tstruct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;\n \tstruct bnxt_vnic_info *vnic = &bp->vnic_info[0];\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \t/* Retrieve from the default VNIC */\n \tif (!vnic)\n@@ -759,7 +760,7 @@ static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,\n \t/* EW - need to revisit here copying from u64 to u16 */\n \tmemcpy(reta_conf, vnic->rss_table, reta_size);\n \n-\tif (rte_intr_allow_others(&eth_dev->pci_dev->intr_handle)) {\n+\tif (rte_intr_allow_others(&pci_dev->intr_handle)) {\n \t\tif (eth_dev->data->dev_conf.intr_conf.lsc != 0)\n \t\t\tbnxt_dev_lsc_intr_setup(eth_dev);\n \t}\n@@ -1011,9 +1012,10 @@ static int bnxt_init_board(struct rte_eth_dev *eth_dev)\n {\n \tint rc;\n \tstruct bnxt *bp = eth_dev->data->dev_private;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \t/* enable device (incl. PCI PM wakeup), and bus-mastering */\n-\tif (!eth_dev->pci_dev->mem_resource[0].addr) {\n+\tif (!pci_dev->mem_resource[0].addr) {\n \t\tRTE_LOG(ERR, PMD,\n \t\t\t\"Cannot find PCI device base address, aborting\\n\");\n \t\trc = -ENODEV;\n@@ -1021,9 +1023,9 @@ static int bnxt_init_board(struct rte_eth_dev *eth_dev)\n \t}\n \n \tbp->eth_dev = eth_dev;\n-\tbp->pdev = eth_dev->pci_dev;\n+\tbp->pdev = pci_dev;\n \n-\tbp->bar0 = (void *)eth_dev->pci_dev->mem_resource[0].addr;\n+\tbp->bar0 = (void *)pci_dev->mem_resource[0].addr;\n \tif (!bp->bar0) {\n \t\tRTE_LOG(ERR, PMD, \"Cannot map device registers, aborting\\n\");\n \t\trc = -ENOMEM;\n@@ -1043,6 +1045,7 @@ static int bnxt_init_board(struct rte_eth_dev *eth_dev)\n static int\n bnxt_dev_init(struct rte_eth_dev *eth_dev)\n {\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \tstatic int version_printed;\n \tstruct bnxt *bp;\n \tint rc;\n@@ -1050,10 +1053,10 @@ bnxt_dev_init(struct rte_eth_dev *eth_dev)\n \tif (version_printed++ == 0)\n \t\tRTE_LOG(INFO, PMD, \"%s\", bnxt_version);\n \n-\trte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);\n+\trte_eth_copy_pci_info(eth_dev, pci_dev);\n \tbp = eth_dev->data->dev_private;\n \n-\tif (bnxt_vf_pciid(eth_dev->pci_dev->id.device_id))\n+\tif (bnxt_vf_pciid(pci_dev->id.device_id))\n \t\tbp->flags |= BNXT_FLAG_VF;\n \n \trc = bnxt_init_board(eth_dev);\n@@ -1121,8 +1124,8 @@ bnxt_dev_init(struct rte_eth_dev *eth_dev)\n \n \tRTE_LOG(INFO, PMD,\n \t\tDRV_MODULE_NAME \" found at mem %\" PRIx64 \", node addr %pM\\n\",\n-\t\teth_dev->pci_dev->mem_resource[0].phys_addr,\n-\t\teth_dev->pci_dev->mem_resource[0].addr);\n+\t\tpci_dev->mem_resource[0].phys_addr,\n+\t\tpci_dev->mem_resource[0].addr);\n \n \tbp->dev_stopped = 0;\n \ndiff --git a/drivers/net/bnxt/bnxt_ring.c b/drivers/net/bnxt/bnxt_ring.c\nindex 3f81ffc..6793d75 100644\n--- a/drivers/net/bnxt/bnxt_ring.c\n+++ b/drivers/net/bnxt/bnxt_ring.c\n@@ -209,6 +209,7 @@ int bnxt_alloc_rings(struct bnxt *bp, uint16_t qidx,\n  */\n int bnxt_alloc_hwrm_rings(struct bnxt *bp)\n {\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(bp->eth_dev);\n \tunsigned int i;\n \tint rc = 0;\n \n@@ -223,7 +224,7 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp)\n \t\tif (rc)\n \t\t\tgoto err_out;\n \t\tcpr->cp_doorbell =\n-\t\t    (char *)bp->eth_dev->pci_dev->mem_resource[2].addr;\n+\t\t    (char *)pci_dev->mem_resource[2].addr;\n \t\tB_CP_DIS_DB(cpr, cpr->cp_raw_cons);\n \t\tbp->grp_info[0].cp_fw_ring_id = cp_ring->fw_ring_id;\n \t}\n@@ -243,7 +244,7 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp)\n \t\tif (rc)\n \t\t\tgoto err_out;\n \t\tcpr->cp_doorbell =\n-\t\t    (char *)bp->eth_dev->pci_dev->mem_resource[2].addr +\n+\t\t    (char *)pci_dev->mem_resource[2].addr +\n \t\t    idx * 0x80;\n \t\tbp->grp_info[idx].cp_fw_ring_id = cp_ring->fw_ring_id;\n \t\tB_CP_DIS_DB(cpr, cpr->cp_raw_cons);\n@@ -256,7 +257,7 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp)\n \t\t\tgoto err_out;\n \t\trxr->rx_prod = 0;\n \t\trxr->rx_doorbell =\n-\t\t    (char *)bp->eth_dev->pci_dev->mem_resource[2].addr +\n+\t\t    (char *)pci_dev->mem_resource[2].addr +\n \t\t    idx * 0x80;\n \t\tbp->grp_info[idx].rx_fw_ring_id = ring->fw_ring_id;\n \t\tB_RX_DB(rxr->rx_doorbell, rxr->rx_prod);\n@@ -284,7 +285,7 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp)\n \t\t\tgoto err_out;\n \n \t\tcpr->cp_doorbell =\n-\t\t    (char *)bp->eth_dev->pci_dev->mem_resource[2].addr +\n+\t\t    (char *)pci_dev->mem_resource[2].addr +\n \t\t    idx * 0x80;\n \t\tbp->grp_info[idx].cp_fw_ring_id = cp_ring->fw_ring_id;\n \t\tB_CP_DIS_DB(cpr, cpr->cp_raw_cons);\n@@ -297,7 +298,7 @@ int bnxt_alloc_hwrm_rings(struct bnxt *bp)\n \t\t\tgoto err_out;\n \n \t\ttxr->tx_doorbell =\n-\t\t    (char *)bp->eth_dev->pci_dev->mem_resource[2].addr +\n+\t\t    (char *)pci_dev->mem_resource[2].addr +\n \t\t    idx * 0x80;\n \t}\n \ndiff --git a/drivers/net/cxgbe/cxgbe_ethdev.c b/drivers/net/cxgbe/cxgbe_ethdev.c\nindex b7f28eb..8bfdda8 100644\n--- a/drivers/net/cxgbe/cxgbe_ethdev.c\n+++ b/drivers/net/cxgbe/cxgbe_ethdev.c\n@@ -1005,7 +1005,7 @@ static int eth_cxgbe_dev_init(struct rte_eth_dev *eth_dev)\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n \n-\tpci_dev = eth_dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \tsnprintf(name, sizeof(name), \"cxgbeadapter%d\", eth_dev->data->port_id);\n \tadapter = rte_zmalloc(name, sizeof(*adapter), 0);\ndiff --git a/drivers/net/e1000/em_ethdev.c b/drivers/net/e1000/em_ethdev.c\nindex aee3d34..7f2f521 100644\n--- a/drivers/net/e1000/em_ethdev.c\n+++ b/drivers/net/e1000/em_ethdev.c\n@@ -295,7 +295,7 @@ eth_em_dev_init(struct rte_eth_dev *eth_dev)\n \tstruct e1000_vfta * shadow_vfta =\n \t\tE1000_DEV_PRIVATE_TO_VFTA(eth_dev->data->dev_private);\n \n-\tpci_dev = eth_dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \teth_dev->dev_ops = &eth_em_ops;\n \teth_dev->rx_pkt_burst = (eth_rx_burst_t)&eth_em_recv_pkts;\n@@ -369,7 +369,7 @@ eth_em_dev_uninit(struct rte_eth_dev *eth_dev)\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn -EPERM;\n \n-\tpci_dev = eth_dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \tif (adapter->stopped == 0)\n \t\teth_em_close(eth_dev);\n@@ -556,7 +556,8 @@ eth_em_start(struct rte_eth_dev *dev)\n \t\tE1000_DEV_PRIVATE(dev->data->dev_private);\n \tstruct e1000_hw *hw =\n \t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n+\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n \tint ret, mask;\n \tuint32_t intr_vector = 0;\n \tuint32_t *speeds;\n@@ -738,7 +739,8 @@ eth_em_stop(struct rte_eth_dev *dev)\n {\n \tstruct rte_eth_link link;\n \tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n+\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n \n \tem_rxq_intr_disable(hw);\n \tem_lsc_intr_disable(hw);\n@@ -999,9 +1001,10 @@ static int\n eth_em_rx_queue_intr_enable(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id)\n {\n \tstruct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \n \tem_rxq_intr_enable(hw);\n-\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\trte_intr_enable(&pci_dev->intr_handle);\n \n \treturn 0;\n }\n@@ -1542,6 +1545,7 @@ eth_em_interrupt_action(struct rte_eth_dev *dev)\n \t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct e1000_interrupt *intr =\n \t\tE1000_DEV_PRIVATE_TO_INTR(dev->data->dev_private);\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \tuint32_t tctl, rctl;\n \tstruct rte_eth_link link;\n \tint ret;\n@@ -1550,7 +1554,7 @@ eth_em_interrupt_action(struct rte_eth_dev *dev)\n \t\treturn -1;\n \n \tintr->flags &= ~E1000_FLAG_NEED_LINK_UPDATE;\n-\trte_intr_enable(&(dev->pci_dev->intr_handle));\n+\trte_intr_enable(&pci_dev->intr_handle);\n \n \t/* set get_link_status to check register later */\n \thw->mac.get_link_status = 1;\n@@ -1571,8 +1575,8 @@ eth_em_interrupt_action(struct rte_eth_dev *dev)\n \t\tPMD_INIT_LOG(INFO, \" Port %d: Link Down\", dev->data->port_id);\n \t}\n \tPMD_INIT_LOG(DEBUG, \"PCI Address: %04d:%02d:%02d:%d\",\n-\t\t     dev->pci_dev->addr.domain, dev->pci_dev->addr.bus,\n-\t\t     dev->pci_dev->addr.devid, dev->pci_dev->addr.function);\n+\t\t     pci_dev->addr.domain, pci_dev->addr.bus,\n+\t\t     pci_dev->addr.devid, pci_dev->addr.function);\n \n \ttctl = E1000_READ_REG(hw, E1000_TCTL);\n \trctl = E1000_READ_REG(hw, E1000_RCTL);\ndiff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c\nindex 2fddf0c..b25c66e 100644\n--- a/drivers/net/e1000/igb_ethdev.c\n+++ b/drivers/net/e1000/igb_ethdev.c\n@@ -672,11 +672,11 @@ igb_identify_hardware(struct rte_eth_dev *dev)\n {\n \tstruct e1000_hw *hw =\n \t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\n-\thw->vendor_id = dev->pci_dev->id.vendor_id;\n-\thw->device_id = dev->pci_dev->id.device_id;\n-\thw->subsystem_vendor_id = dev->pci_dev->id.subsystem_vendor_id;\n-\thw->subsystem_device_id = dev->pci_dev->id.subsystem_device_id;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n+\thw->vendor_id = pci_dev->id.vendor_id;\n+\thw->device_id = pci_dev->id.device_id;\n+\thw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;\n+\thw->subsystem_device_id = pci_dev->id.subsystem_device_id;\n \n \te1000_set_mac_type(hw);\n \n@@ -755,7 +755,7 @@ eth_igb_dev_init(struct rte_eth_dev *eth_dev)\n \n \tuint32_t ctrl_ext;\n \n-\tpci_dev = eth_dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \teth_dev->dev_ops = &eth_igb_ops;\n \teth_dev->rx_pkt_burst = &eth_igb_recv_pkts;\n@@ -918,7 +918,7 @@ eth_igb_dev_uninit(struct rte_eth_dev *eth_dev)\n \t\treturn -EPERM;\n \n \thw = E1000_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);\n-\tpci_dev = eth_dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \tif (adapter->stopped == 0)\n \t\teth_igb_close(eth_dev);\n@@ -973,7 +973,7 @@ eth_igbvf_dev_init(struct rte_eth_dev *eth_dev)\n \t\treturn 0;\n \t}\n \n-\tpci_dev = eth_dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \trte_eth_copy_pci_info(eth_dev, pci_dev);\n \n@@ -1050,7 +1050,7 @@ eth_igbvf_dev_uninit(struct rte_eth_dev *eth_dev)\n {\n \tstruct e1000_adapter *adapter =\n \t\tE1000_DEV_PRIVATE(eth_dev->data->dev_private);\n-\tstruct rte_pci_device *pci_dev = eth_dev->pci_dev;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \tPMD_INIT_FUNC_TRACE();\n \n@@ -1217,7 +1217,8 @@ eth_igb_start(struct rte_eth_dev *dev)\n \t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct e1000_adapter *adapter =\n \t\tE1000_DEV_PRIVATE(dev->data->dev_private);\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle =\n+\t\t&ETH_DEV_PCI_DEV(dev)->intr_handle;\n \tint ret, mask;\n \tuint32_t intr_vector = 0;\n \tuint32_t ctrl_ext;\n@@ -1429,7 +1430,8 @@ eth_igb_stop(struct rte_eth_dev *dev)\n \tstruct e1000_flex_filter *p_flex;\n \tstruct e1000_5tuple_filter *p_5tuple, *p_5tuple_next;\n \tstruct e1000_2tuple_filter *p_2tuple, *p_2tuple_next;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle =\n+\t\t&ETH_DEV_PCI_DEV(dev)->intr_handle;\n \n \tigb_intr_disable(hw);\n \n@@ -1549,7 +1551,7 @@ eth_igb_close(struct rte_eth_dev *dev)\n \n \tigb_dev_free_queues(dev);\n \n-\tpci_dev = dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(dev);\n \tif (pci_dev->intr_handle.intr_vec) {\n \t\trte_free(pci_dev->intr_handle.intr_vec);\n \t\tpci_dev->intr_handle.intr_vec = NULL;\n@@ -2639,6 +2641,7 @@ eth_igb_interrupt_action(struct rte_eth_dev *dev)\n \t\tE1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct e1000_interrupt *intr =\n \t\tE1000_DEV_PRIVATE_TO_INTR(dev->data->dev_private);\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \tuint32_t tctl, rctl;\n \tstruct rte_eth_link link;\n \tint ret;\n@@ -2649,7 +2652,7 @@ eth_igb_interrupt_action(struct rte_eth_dev *dev)\n \t}\n \n \tigb_intr_enable(dev);\n-\trte_intr_enable(&(dev->pci_dev->intr_handle));\n+\trte_intr_enable(&pci_dev->intr_handle);\n \n \tif (intr->flags & E1000_FLAG_NEED_LINK_UPDATE) {\n \t\tintr->flags &= ~E1000_FLAG_NEED_LINK_UPDATE;\n@@ -2677,10 +2680,10 @@ eth_igb_interrupt_action(struct rte_eth_dev *dev)\n \t\t}\n \n \t\tPMD_INIT_LOG(DEBUG, \"PCI Address: %04d:%02d:%02d:%d\",\n-\t\t\t     dev->pci_dev->addr.domain,\n-\t\t\t     dev->pci_dev->addr.bus,\n-\t\t\t     dev->pci_dev->addr.devid,\n-\t\t\t     dev->pci_dev->addr.function);\n+\t\t\t     pci_dev->addr.domain,\n+\t\t\t     pci_dev->addr.bus,\n+\t\t\t     pci_dev->addr.devid,\n+\t\t\t     pci_dev->addr.function);\n \t\ttctl = E1000_READ_REG(hw, E1000_TCTL);\n \t\trctl = E1000_READ_REG(hw, E1000_RCTL);\n \t\tif (link.link_status) {\n@@ -2770,7 +2773,7 @@ eth_igbvf_interrupt_action(struct rte_eth_dev *dev)\n \t}\n \n \tigbvf_intr_enable(dev);\n-\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\trte_intr_enable(&ETH_DEV_PCI_DEV(dev)->intr_handle);\n \n \treturn 0;\n }\n@@ -3056,7 +3059,8 @@ igbvf_dev_start(struct rte_eth_dev *dev)\n \tstruct e1000_adapter *adapter =\n \t\tE1000_DEV_PRIVATE(dev->data->dev_private);\n \tint ret;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle =\n+\t\t&ETH_DEV_PCI_DEV(dev)->intr_handle;\n \tuint32_t intr_vector = 0;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -3110,7 +3114,8 @@ igbvf_dev_start(struct rte_eth_dev *dev)\n static void\n igbvf_dev_stop(struct rte_eth_dev *dev)\n {\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle =\n+\t\t&ETH_DEV_PCI_DEV(dev)->intr_handle;\n \n \tPMD_INIT_FUNC_TRACE();\n \n@@ -5102,7 +5107,7 @@ eth_igb_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \tE1000_WRITE_REG(hw, E1000_EIMS, regval | mask);\n \tE1000_WRITE_FLUSH(hw);\n \n-\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\trte_intr_enable(&ETH_DEV_PCI_DEV(dev)->intr_handle);\n \n \treturn 0;\n }\n@@ -5167,7 +5172,8 @@ eth_igb_configure_msix_intr(struct rte_eth_dev *dev)\n \tuint32_t base = E1000_MISC_VEC_ID;\n \tuint32_t misc_shift = 0;\n \n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle =\n+\t\t&ETH_DEV_PCI_DEV(dev)->intr_handle;\n \n \t/* won't configure msix register if no mapping is done\n \t * between intr vector and event fd\ndiff --git a/drivers/net/e1000/igb_pf.c b/drivers/net/e1000/igb_pf.c\nindex 5845bc2..6a72ee1 100644\n--- a/drivers/net/e1000/igb_pf.c\n+++ b/drivers/net/e1000/igb_pf.c\n@@ -57,7 +57,8 @@\n static inline uint16_t\n dev_num_vf(struct rte_eth_dev *eth_dev)\n {\n-\treturn eth_dev->pci_dev->max_vfs;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(eth_dev);\n+\treturn pci_dev->max_vfs;\n }\n \n static inline\ndiff --git a/drivers/net/ena/ena_ethdev.c b/drivers/net/ena/ena_ethdev.c\nindex ab9a178..c17d969 100644\n--- a/drivers/net/ena/ena_ethdev.c\n+++ b/drivers/net/ena/ena_ethdev.c\n@@ -1278,7 +1278,7 @@ static int eth_ena_dev_init(struct rte_eth_dev *eth_dev)\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n \n-\tpci_dev = eth_dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \tadapter->pdev = pci_dev;\n \n \tPMD_INIT_LOG(INFO, \"Initializing %x:%x:%x.%d\\n\",\ndiff --git a/drivers/net/enic/enic_ethdev.c b/drivers/net/enic/enic_ethdev.c\nindex 2b154ec..553a88e 100644\n--- a/drivers/net/enic/enic_ethdev.c\n+++ b/drivers/net/enic/enic_ethdev.c\n@@ -621,7 +621,7 @@ static int eth_enicpmd_dev_init(struct rte_eth_dev *eth_dev)\n \teth_dev->rx_pkt_burst = &enic_recv_pkts;\n \teth_dev->tx_pkt_burst = &enic_xmit_pkts;\n \n-\tpdev = eth_dev->pci_dev;\n+\tpdev = ETH_DEV_PCI_DEV(eth_dev);\n \trte_eth_copy_pci_info(eth_dev, pdev);\n \tenic->pdev = pdev;\n \taddr = &pdev->addr;\ndiff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c\nindex 923690c..e1250f6 100644\n--- a/drivers/net/fm10k/fm10k_ethdev.c\n+++ b/drivers/net/fm10k/fm10k_ethdev.c\n@@ -59,7 +59,8 @@\n #define BIT_MASK_PER_UINT32 ((1 << CHARS_PER_UINT32) - 1)\n \n /* default 1:1 map from queue ID to interrupt vector ID */\n-#define Q2V(dev, queue_id) (dev->pci_dev->intr_handle.intr_vec[queue_id])\n+#define D2IH(dev) (&ETH_DEV_PCI_DEV(dev)->intr_handle)\n+#define Q2V(dev, queue_id) (D2IH(dev)->intr_vec[queue_id])\n \n /* First 64 Logical ports for PF/VMDQ, second 64 for Flow director */\n #define MAX_LPORT_NUM    128\n@@ -711,7 +712,7 @@ fm10k_dev_rx_init(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct fm10k_macvlan_filter_info *macvlan;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = D2IH(dev);\n \tint i, ret;\n \tstruct fm10k_rx_queue *rxq;\n \tuint64_t base_addr;\n@@ -1171,7 +1172,7 @@ static void\n fm10k_dev_stop(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = D2IH(dev);\n \tint i;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -1387,6 +1388,7 @@ fm10k_dev_infos_get(struct rte_eth_dev *dev,\n \tstruct rte_eth_dev_info *dev_info)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \n \tPMD_INIT_FUNC_TRACE();\n \n@@ -1396,7 +1398,7 @@ fm10k_dev_infos_get(struct rte_eth_dev *dev,\n \tdev_info->max_tx_queues      = hw->mac.max_queues;\n \tdev_info->max_mac_addrs      = FM10K_MAX_MACADDR_NUM;\n \tdev_info->max_hash_mac_addrs = 0;\n-\tdev_info->max_vfs            = dev->pci_dev->max_vfs;\n+\tdev_info->max_vfs            = pci_dev->max_vfs;\n \tdev_info->vmdq_pool_base     = 0;\n \tdev_info->vmdq_queue_base    = 0;\n \tdev_info->max_vmdq_pools     = ETH_32_POOLS;\n@@ -2341,7 +2343,7 @@ fm10k_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \telse\n \t\tFM10K_WRITE_REG(hw, FM10K_VFITR(Q2V(dev, queue_id)),\n \t\t\tFM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR);\n-\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\trte_intr_enable(D2IH(dev));\n \treturn 0;\n }\n \n@@ -2364,7 +2366,7 @@ static int\n fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = D2IH(dev);\n \tuint32_t intr_vector, vec;\n \tuint16_t queue_id;\n \tint result = 0;\n@@ -2380,7 +2382,7 @@ fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev)\n \tintr_vector = dev->data->nb_rx_queues;\n \n \t/* disable interrupt first */\n-\trte_intr_disable(&dev->pci_dev->intr_handle);\n+\trte_intr_disable(intr_handle);\n \tif (hw->mac.type == fm10k_mac_pf)\n \t\tfm10k_dev_disable_intr_pf(dev);\n \telse\n@@ -2415,7 +2417,7 @@ fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev)\n \t\tfm10k_dev_enable_intr_pf(dev);\n \telse\n \t\tfm10k_dev_enable_intr_vf(dev);\n-\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\trte_intr_enable(intr_handle);\n \thw->mac.ops.update_int_moderator(hw);\n \treturn result;\n }\n@@ -2581,7 +2583,7 @@ fm10k_dev_interrupt_handler_pf(\n \tFM10K_WRITE_REG(hw, FM10K_ITR(0), FM10K_ITR_AUTOMASK |\n \t\t\t\t\tFM10K_ITR_MASK_CLEAR);\n \t/* Re-enable interrupt from host side */\n-\trte_intr_enable(&(dev->pci_dev->intr_handle));\n+\trte_intr_enable(D2IH(dev));\n }\n \n /**\n@@ -2615,7 +2617,7 @@ fm10k_dev_interrupt_handler_vf(\n \tFM10K_WRITE_REG(hw, FM10K_VFITR(0), FM10K_ITR_AUTOMASK |\n \t\t\t\t\tFM10K_ITR_MASK_CLEAR);\n \t/* Re-enable interrupt from host side */\n-\trte_intr_enable(&(dev->pci_dev->intr_handle));\n+\trte_intr_enable(D2IH(dev));\n }\n \n /* Mailbox message handler in VF */\n@@ -2827,6 +2829,7 @@ static int\n eth_fm10k_dev_init(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \tint diag, i;\n \tstruct fm10k_macvlan_filter_info *macvlan;\n \n@@ -2840,18 +2843,18 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev)\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n \n-\trte_eth_copy_pci_info(dev, dev->pci_dev);\n+\trte_eth_copy_pci_info(dev, pci_dev);\n \n \tmacvlan = FM10K_DEV_PRIVATE_TO_MACVLAN(dev->data->dev_private);\n \tmemset(macvlan, 0, sizeof(*macvlan));\n \t/* Vendor and Device ID need to be set before init of shared code */\n \tmemset(hw, 0, sizeof(*hw));\n-\thw->device_id = dev->pci_dev->id.device_id;\n-\thw->vendor_id = dev->pci_dev->id.vendor_id;\n-\thw->subsystem_device_id = dev->pci_dev->id.subsystem_device_id;\n-\thw->subsystem_vendor_id = dev->pci_dev->id.subsystem_vendor_id;\n+\thw->device_id = pci_dev->id.device_id;\n+\thw->vendor_id = pci_dev->id.vendor_id;\n+\thw->subsystem_device_id = pci_dev->id.subsystem_device_id;\n+\thw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;\n \thw->revision_id = 0;\n-\thw->hw_addr = (void *)dev->pci_dev->mem_resource[0].addr;\n+\thw->hw_addr = (void *)pci_dev->mem_resource[0].addr;\n \tif (hw->hw_addr == NULL) {\n \t\tPMD_INIT_LOG(ERR, \"Bad mem resource.\"\n \t\t\t\" Try to blacklist unused devices.\");\n@@ -2921,20 +2924,20 @@ eth_fm10k_dev_init(struct rte_eth_dev *dev)\n \t/*PF/VF has different interrupt handling mechanism */\n \tif (hw->mac.type == fm10k_mac_pf) {\n \t\t/* register callback func to eal lib */\n-\t\trte_intr_callback_register(&(dev->pci_dev->intr_handle),\n+\t\trte_intr_callback_register(D2IH(dev),\n \t\t\tfm10k_dev_interrupt_handler_pf, (void *)dev);\n \n \t\t/* enable MISC interrupt */\n \t\tfm10k_dev_enable_intr_pf(dev);\n \t} else { /* VF */\n-\t\trte_intr_callback_register(&(dev->pci_dev->intr_handle),\n+\t\trte_intr_callback_register(D2IH(dev),\n \t\t\tfm10k_dev_interrupt_handler_vf, (void *)dev);\n \n \t\tfm10k_dev_enable_intr_vf(dev);\n \t}\n \n \t/* Enable intr after callback registered */\n-\trte_intr_enable(&(dev->pci_dev->intr_handle));\n+\trte_intr_enable(D2IH(dev));\n \n \thw->mac.ops.update_int_moderator(hw);\n \n@@ -3004,7 +3007,7 @@ static int\n eth_fm10k_dev_uninit(struct rte_eth_dev *dev)\n {\n \tstruct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\n+\tstruct rte_intr_handle *intr_handle = D2IH(dev);\n \tPMD_INIT_FUNC_TRACE();\n \n \t/* only uninitialize in the primary process */\n@@ -3019,7 +3022,7 @@ eth_fm10k_dev_uninit(struct rte_eth_dev *dev)\n \tdev->tx_pkt_burst = NULL;\n \n \t/* disable uio/vfio intr */\n-\trte_intr_disable(&(dev->pci_dev->intr_handle));\n+\trte_intr_disable(intr_handle);\n \n \t/*PF/VF has different interrupt handling mechanism */\n \tif (hw->mac.type == fm10k_mac_pf) {\n@@ -3027,13 +3030,13 @@ eth_fm10k_dev_uninit(struct rte_eth_dev *dev)\n \t\tfm10k_dev_disable_intr_pf(dev);\n \n \t\t/* unregister callback func to eal lib */\n-\t\trte_intr_callback_unregister(&(dev->pci_dev->intr_handle),\n+\t\trte_intr_callback_unregister(intr_handle,\n \t\t\tfm10k_dev_interrupt_handler_pf, (void *)dev);\n \t} else {\n \t\t/* disable interrupt */\n \t\tfm10k_dev_disable_intr_vf(dev);\n \n-\t\trte_intr_callback_unregister(&(dev->pci_dev->intr_handle),\n+\t\trte_intr_callback_unregister(intr_handle,\n \t\t\tfm10k_dev_interrupt_handler_vf, (void *)dev);\n \t}\n \ndiff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 67778ba..8a63a8c 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -907,7 +907,7 @@ is_floating_veb_supported(struct rte_devargs *devargs)\n static void\n config_floating_veb(struct rte_eth_dev *dev)\n {\n-\tstruct rte_pci_device *pci_dev = dev->pci_dev;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \n@@ -952,7 +952,7 @@ eth_i40e_dev_init(struct rte_eth_dev *dev)\n \t\ti40e_set_tx_function(dev);\n \t\treturn 0;\n \t}\n-\tpci_dev = dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(dev);\n \n \trte_eth_copy_pci_info(dev, pci_dev);\n \n@@ -1215,7 +1215,7 @@ eth_i40e_dev_uninit(struct rte_eth_dev *dev)\n \t\treturn 0;\n \n \thw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tpci_dev = dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(dev);\n \n \tif (hw->adapter_stopped == 0)\n \t\ti40e_dev_close(dev);\n@@ -1335,7 +1335,7 @@ void\n i40e_vsi_queues_unbind_intr(struct i40e_vsi *vsi)\n {\n \tstruct rte_eth_dev *dev = vsi->adapter->eth_dev;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tstruct i40e_hw *hw = I40E_VSI_TO_HW(vsi);\n \tuint16_t msix_vect = vsi->msix_intr;\n \tuint16_t i;\n@@ -1448,7 +1448,7 @@ void\n i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi)\n {\n \tstruct rte_eth_dev *dev = vsi->adapter->eth_dev;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tstruct i40e_hw *hw = I40E_VSI_TO_HW(vsi);\n \tuint16_t msix_vect = vsi->msix_intr;\n \tuint16_t nb_msix = RTE_MIN(vsi->nb_msix, intr_handle->nb_efd);\n@@ -1519,7 +1519,7 @@ static void\n i40e_vsi_enable_queues_intr(struct i40e_vsi *vsi)\n {\n \tstruct rte_eth_dev *dev = vsi->adapter->eth_dev;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tstruct i40e_hw *hw = I40E_VSI_TO_HW(vsi);\n \tuint16_t interval = i40e_calc_itr_interval(\\\n \t\tRTE_LIBRTE_I40E_ITR_INTERVAL);\n@@ -1550,7 +1550,7 @@ static void\n i40e_vsi_disable_queues_intr(struct i40e_vsi *vsi)\n {\n \tstruct rte_eth_dev *dev = vsi->adapter->eth_dev;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tstruct i40e_hw *hw = I40E_VSI_TO_HW(vsi);\n \tuint16_t msix_intr, i;\n \n@@ -1675,7 +1675,7 @@ i40e_dev_start(struct rte_eth_dev *dev)\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct i40e_vsi *main_vsi = pf->main_vsi;\n \tint ret, i;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tuint32_t intr_vector = 0;\n \n \thw->adapter_stopped = 0;\n@@ -1808,7 +1808,7 @@ i40e_dev_stop(struct rte_eth_dev *dev)\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct i40e_vsi *main_vsi = pf->main_vsi;\n \tstruct i40e_mirror_rule *p_mirror;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tint i;\n \n \t/* Disable all queues */\n@@ -1870,7 +1870,7 @@ i40e_dev_close(struct rte_eth_dev *dev)\n \n \t/* Disable interrupt */\n \ti40e_pf_disable_irq0(hw);\n-\trte_intr_disable(&(dev->pci_dev->intr_handle));\n+\trte_intr_disable(ETH_DEV_TO_INTR_HANDLE(dev));\n \n \t/* shutdown and destroy the HMC */\n \ti40e_shutdown_lan_hmc(hw);\n@@ -2588,7 +2588,7 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \tdev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;\n \tdev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;\n \tdev_info->max_mac_addrs = vsi->max_macaddrs;\n-\tdev_info->max_vfs = dev->pci_dev->max_vfs;\n+\tdev_info->max_vfs = ETH_DEV_PCI_DEV(dev)->max_vfs;\n \tdev_info->rx_offload_capa =\n \t\tDEV_RX_OFFLOAD_VLAN_STRIP |\n \t\tDEV_RX_OFFLOAD_QINQ_STRIP |\n@@ -3488,11 +3488,12 @@ i40e_get_cap(struct i40e_hw *hw)\n static int\n i40e_pf_parameter_init(struct rte_eth_dev *dev)\n {\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct i40e_hw *hw = I40E_PF_TO_HW(pf);\n \tuint16_t qp_count = 0, vsi_count = 0;\n \n-\tif (dev->pci_dev->max_vfs && !hw->func_caps.sr_iov_1_1) {\n+\tif (pci_dev->max_vfs && !hw->func_caps.sr_iov_1_1) {\n \t\tPMD_INIT_LOG(ERR, \"HW configuration doesn't support SRIOV\");\n \t\treturn -EINVAL;\n \t}\n@@ -3533,10 +3534,10 @@ i40e_pf_parameter_init(struct rte_eth_dev *dev)\n \n \t/* VF queue/VSI allocation */\n \tpf->vf_qp_offset = pf->lan_qp_offset + pf->lan_nb_qps;\n-\tif (hw->func_caps.sr_iov_1_1 && dev->pci_dev->max_vfs) {\n+\tif (hw->func_caps.sr_iov_1_1 && pci_dev->max_vfs) {\n \t\tpf->flags |= I40E_FLAG_SRIOV;\n \t\tpf->vf_nb_qps = RTE_LIBRTE_I40E_QUEUE_NUM_PER_VF;\n-\t\tpf->vf_num = dev->pci_dev->max_vfs;\n+\t\tpf->vf_num = pci_dev->max_vfs;\n \t\tPMD_DRV_LOG(DEBUG, \"%u VF VSIs, %u queues per VF VSI, \"\n \t\t\t    \"in total %u queues\", pf->vf_num, pf->vf_nb_qps,\n \t\t\t    pf->vf_nb_qps * pf->vf_num);\n@@ -5573,7 +5574,7 @@ i40e_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle,\n done:\n \t/* Enable interrupt */\n \ti40e_pf_enable_irq0(hw);\n-\trte_intr_enable(&(dev->pci_dev->intr_handle));\n+\trte_intr_enable(ETH_DEV_TO_INTR_HANDLE(dev));\n }\n \n static int\n@@ -8124,10 +8125,11 @@ i40e_dev_filter_ctrl(struct rte_eth_dev *dev,\n static void\n i40e_enable_extended_tag(struct rte_eth_dev *dev)\n {\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \tuint32_t buf = 0;\n \tint ret;\n \n-\tret = rte_eal_pci_read_config(dev->pci_dev, &buf, sizeof(buf),\n+\tret = rte_eal_pci_read_config(pci_dev, &buf, sizeof(buf),\n \t\t\t\t      PCI_DEV_CAP_REG);\n \tif (ret < 0) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to read PCI offset 0x%x\",\n@@ -8140,7 +8142,7 @@ i40e_enable_extended_tag(struct rte_eth_dev *dev)\n \t}\n \n \tbuf = 0;\n-\tret = rte_eal_pci_read_config(dev->pci_dev, &buf, sizeof(buf),\n+\tret = rte_eal_pci_read_config(pci_dev, &buf, sizeof(buf),\n \t\t\t\t      PCI_DEV_CTRL_REG);\n \tif (ret < 0) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to read PCI offset 0x%x\",\n@@ -8152,7 +8154,7 @@ i40e_enable_extended_tag(struct rte_eth_dev *dev)\n \t\treturn;\n \t}\n \tbuf |= PCI_DEV_CTRL_EXT_TAG_MASK;\n-\tret = rte_eal_pci_write_config(dev->pci_dev, &buf, sizeof(buf),\n+\tret = rte_eal_pci_write_config(pci_dev, &buf, sizeof(buf),\n \t\t\t\t       PCI_DEV_CTRL_REG);\n \tif (ret < 0) {\n \t\tPMD_DRV_LOG(ERR, \"Failed to write PCI offset 0x%x\",\n@@ -9555,7 +9557,7 @@ i40e_dev_get_dcb_info(struct rte_eth_dev *dev,\n static int\n i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint16_t interval =\n \t\ti40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);\n@@ -9580,7 +9582,7 @@ i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \t\t\t\tI40E_PFINT_DYN_CTLN_INTERVAL_SHIFT));\n \n \tI40E_WRITE_FLUSH(hw);\n-\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\trte_intr_enable(ETH_DEV_TO_INTR_HANDLE(dev));\n \n \treturn 0;\n }\n@@ -9588,7 +9590,7 @@ i40e_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n static int\n i40e_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint16_t msix_intr;\n \ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex 298cef4..9d4bea7 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -671,6 +671,10 @@ i40e_get_vsi_from_adapter(struct i40e_adapter *adapter)\n #define I40E_VF_TO_HW(vf) \\\n \t(&(((struct i40e_vf *)vf)->adapter->hw))\n \n+/* ETH_DEV_TO_INTR_HANDLE */\n+#define ETH_DEV_TO_INTR_HANDLE(ptr) \\\n+\t(&(ETH_DEV_PCI_DEV(ptr)->intr_handle))\n+\n static inline void\n i40e_init_adminq_parameter(struct i40e_hw *hw)\n {\ndiff --git a/drivers/net/i40e/i40e_ethdev_vf.c b/drivers/net/i40e/i40e_ethdev_vf.c\nindex aa306d6..781e658 100644\n--- a/drivers/net/i40e/i40e_ethdev_vf.c\n+++ b/drivers/net/i40e/i40e_ethdev_vf.c\n@@ -718,7 +718,7 @@ i40evf_config_irq_map(struct rte_eth_dev *dev)\n \tuint8_t cmd_buffer[sizeof(struct i40e_virtchnl_irq_map_info) + \\\n \t\tsizeof(struct i40e_virtchnl_vector_map)];\n \tstruct i40e_virtchnl_irq_map_info *map_info;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tuint32_t vector_id;\n \tint i, err;\n \n@@ -1431,7 +1431,7 @@ i40evf_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle,\n \n done:\n \ti40evf_enable_irq0(hw);\n-\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\trte_intr_enable(ETH_DEV_TO_INTR_HANDLE(dev));\n }\n \n static int\n@@ -1439,7 +1439,7 @@ i40evf_dev_init(struct rte_eth_dev *eth_dev)\n {\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(\\\n \t\t\teth_dev->data->dev_private);\n-\tstruct rte_pci_device *pci_dev = eth_dev->pci_dev;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \tPMD_INIT_FUNC_TRACE();\n \n@@ -1458,15 +1458,15 @@ i40evf_dev_init(struct rte_eth_dev *eth_dev)\n \t\treturn 0;\n \t}\n \n-\trte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);\n+\trte_eth_copy_pci_info(eth_dev, pci_dev);\n \n-\thw->vendor_id = eth_dev->pci_dev->id.vendor_id;\n-\thw->device_id = eth_dev->pci_dev->id.device_id;\n-\thw->subsystem_vendor_id = eth_dev->pci_dev->id.subsystem_vendor_id;\n-\thw->subsystem_device_id = eth_dev->pci_dev->id.subsystem_device_id;\n-\thw->bus.device = eth_dev->pci_dev->addr.devid;\n-\thw->bus.func = eth_dev->pci_dev->addr.function;\n-\thw->hw_addr = (void *)eth_dev->pci_dev->mem_resource[0].addr;\n+\thw->vendor_id = pci_dev->id.vendor_id;\n+\thw->device_id = pci_dev->id.device_id;\n+\thw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;\n+\thw->subsystem_device_id = pci_dev->id.subsystem_device_id;\n+\thw->bus.device = pci_dev->addr.devid;\n+\thw->bus.func = pci_dev->addr.function;\n+\thw->hw_addr = (void *)pci_dev->mem_resource[0].addr;\n \thw->adapter_stopped = 0;\n \n \tif(i40evf_init_vf(eth_dev) != 0) {\n@@ -1853,7 +1853,7 @@ i40evf_enable_queues_intr(struct rte_eth_dev *dev)\n {\n \tstruct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \n \tif (!rte_intr_allow_others(intr_handle)) {\n \t\tI40E_WRITE_REG(hw,\n@@ -1885,7 +1885,7 @@ i40evf_disable_queues_intr(struct rte_eth_dev *dev)\n {\n \tstruct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \n \tif (!rte_intr_allow_others(intr_handle)) {\n \t\tI40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,\n@@ -1911,7 +1911,7 @@ i40evf_disable_queues_intr(struct rte_eth_dev *dev)\n static int\n i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint16_t interval =\n \t\ti40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL);\n@@ -1937,7 +1937,7 @@ i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \n \tI40EVF_WRITE_FLUSH(hw);\n \n-\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\trte_intr_enable(ETH_DEV_TO_INTR_HANDLE(dev));\n \n \treturn 0;\n }\n@@ -1945,7 +1945,7 @@ i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n static int\n i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)\n {\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint16_t msix_intr;\n \n@@ -2025,7 +2025,7 @@ i40evf_dev_start(struct rte_eth_dev *dev)\n {\n \tstruct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tuint32_t intr_vector = 0;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -2090,7 +2090,7 @@ i40evf_dev_start(struct rte_eth_dev *dev)\n static void\n i40evf_dev_stop(struct rte_eth_dev *dev)\n {\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \n \tPMD_INIT_FUNC_TRACE();\n \n@@ -2285,7 +2285,7 @@ static void\n i40evf_dev_close(struct rte_eth_dev *dev)\n {\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tstruct rte_pci_device *pci_dev = dev->pci_dev;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \n \ti40evf_dev_stop(dev);\n \thw->adapter_stopped = 1;\ndiff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c\nindex edc9b22..f17da46 100644\n--- a/drivers/net/ixgbe/ixgbe_ethdev.c\n+++ b/drivers/net/ixgbe/ixgbe_ethdev.c\n@@ -427,6 +427,9 @@ static int ixgbe_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,\n \t\t(r) = (h)->bitmap[idx] >> bit & 1;\\\n \t} while (0)\n \n+#define ETH_DEV_TO_INTR_HANDLE(ptr)\t\t\t\\\n+\t(&(ETH_DEV_PCI_DEV(ptr)->intr_handle))\n+\n /*\n  * The set of PCI devices this driver supports\n  */\n@@ -1127,7 +1130,7 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev)\n \n \t\treturn 0;\n \t}\n-\tpci_dev = eth_dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \trte_eth_copy_pci_info(eth_dev, pci_dev);\n \n@@ -1302,7 +1305,7 @@ eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev)\n \t\treturn -EPERM;\n \n \thw = IXGBE_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);\n-\tpci_dev = eth_dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \tif (hw->adapter_stopped == 0)\n \t\tixgbe_dev_close(eth_dev);\n@@ -1419,7 +1422,7 @@ eth_ixgbevf_dev_init(struct rte_eth_dev *eth_dev)\n \t\treturn 0;\n \t}\n \n-\tpci_dev = eth_dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \trte_eth_copy_pci_info(eth_dev, pci_dev);\n \n@@ -1532,7 +1535,9 @@ static int\n eth_ixgbevf_dev_uninit(struct rte_eth_dev *eth_dev)\n {\n \tstruct ixgbe_hw *hw;\n-\tstruct rte_pci_device *pci_dev = eth_dev->pci_dev;\n+\tstruct rte_pci_device *pci_dev;\n+\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \tPMD_INIT_FUNC_TRACE();\n \n@@ -1960,7 +1965,8 @@ ixgbe_check_vf_rss_rxq_num(struct rte_eth_dev *dev, uint16_t nb_rx_q)\n \t}\n \n \tRTE_ETH_DEV_SRIOV(dev).nb_q_per_pool = nb_rx_q;\n-\tRTE_ETH_DEV_SRIOV(dev).def_pool_q_idx = dev->pci_dev->max_vfs * nb_rx_q;\n+\tRTE_ETH_DEV_SRIOV(dev).def_pool_q_idx =\n+\t\tETH_DEV_PCI_DEV(dev)->max_vfs * nb_rx_q;\n \n \treturn 0;\n }\n@@ -2191,7 +2197,8 @@ ixgbe_dev_start(struct rte_eth_dev *dev)\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct ixgbe_vf_info *vfinfo =\n \t\t*IXGBE_DEV_PRIVATE_TO_P_VFDATA(dev->data->dev_private);\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n+\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n \tuint32_t intr_vector = 0;\n \tint err, link_up = 0, negotiate = 0;\n \tuint32_t speed = 0;\n@@ -2291,7 +2298,7 @@ ixgbe_dev_start(struct rte_eth_dev *dev)\n \n \t/* Restore vf rate limit */\n \tif (vfinfo != NULL) {\n-\t\tfor (vf = 0; vf < dev->pci_dev->max_vfs; vf++)\n+\t\tfor (vf = 0; vf < pci_dev->max_vfs; vf++)\n \t\t\tfor (idx = 0; idx < IXGBE_MAX_QUEUE_NUM_PER_VF; idx++)\n \t\t\t\tif (vfinfo[vf].tx_rate[idx] != 0)\n \t\t\t\t\tixgbe_set_vf_rate_limit(dev, vf,\n@@ -2408,7 +2415,8 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)\n \tstruct ixgbe_filter_info *filter_info =\n \t\tIXGBE_DEV_PRIVATE_TO_FILTER_INFO(dev->data->dev_private);\n \tstruct ixgbe_5tuple_filter *p_5tuple, *p_5tuple_next;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n+\tstruct rte_intr_handle *intr_handle = &pci_dev->intr_handle;\n \tint vf;\n \n \tPMD_INIT_FUNC_TRACE();\n@@ -2424,7 +2432,7 @@ ixgbe_dev_stop(struct rte_eth_dev *dev)\n \tixgbe_stop_adapter(hw);\n \n \tfor (vf = 0; vfinfo != NULL &&\n-\t\t     vf < dev->pci_dev->max_vfs; vf++)\n+\t\t     vf < pci_dev->max_vfs; vf++)\n \t\tvfinfo[vf].clear_to_send = false;\n \n \tif (hw->mac.ops.get_media_type(hw) == ixgbe_media_type_copper) {\n@@ -3033,6 +3041,7 @@ ixgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n {\n \tstruct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct rte_eth_conf *dev_conf = &dev->data->dev_conf;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \n \tdev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues;\n \tdev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues;\n@@ -3049,7 +3058,7 @@ ixgbe_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)\n \tdev_info->max_rx_pktlen = 15872; /* includes CRC, cf MAXFRS register */\n \tdev_info->max_mac_addrs = hw->mac.num_rar_entries;\n \tdev_info->max_hash_mac_addrs = IXGBE_VMDQ_NUM_UC_MAC;\n-\tdev_info->max_vfs = dev->pci_dev->max_vfs;\n+\tdev_info->max_vfs = pci_dev->max_vfs;\n \tif (hw->mac.type == ixgbe_mac_82598EB)\n \t\tdev_info->max_vmdq_pools = ETH_16_POOLS;\n \telse\n@@ -3164,6 +3173,7 @@ ixgbevf_dev_info_get(struct rte_eth_dev *dev,\n \t\t     struct rte_eth_dev_info *dev_info)\n {\n \tstruct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \n \tdev_info->max_rx_queues = (uint16_t)hw->mac.max_rx_queues;\n \tdev_info->max_tx_queues = (uint16_t)hw->mac.max_tx_queues;\n@@ -3171,7 +3181,7 @@ ixgbevf_dev_info_get(struct rte_eth_dev *dev,\n \tdev_info->max_rx_pktlen = 15872; /* includes CRC, cf MAXFRS reg */\n \tdev_info->max_mac_addrs = hw->mac.num_rar_entries;\n \tdev_info->max_hash_mac_addrs = IXGBE_VMDQ_NUM_UC_MAC;\n-\tdev_info->max_vfs = dev->pci_dev->max_vfs;\n+\tdev_info->max_vfs = pci_dev->max_vfs;\n \tif (hw->mac.type == ixgbe_mac_82598EB)\n \t\tdev_info->max_vmdq_pools = ETH_16_POOLS;\n \telse\n@@ -3434,6 +3444,7 @@ static void\n ixgbe_dev_link_status_print(struct rte_eth_dev *dev)\n {\n \tstruct rte_eth_link link;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \n \tmemset(&link, 0, sizeof(link));\n \trte_ixgbe_dev_atomic_read_link_status(dev, &link);\n@@ -3448,10 +3459,10 @@ ixgbe_dev_link_status_print(struct rte_eth_dev *dev)\n \t\t\t\t(int)(dev->data->port_id));\n \t}\n \tPMD_INIT_LOG(DEBUG, \"PCI Address: \" PCI_PRI_FMT,\n-\t\t\t\tdev->pci_dev->addr.domain,\n-\t\t\t\tdev->pci_dev->addr.bus,\n-\t\t\t\tdev->pci_dev->addr.devid,\n-\t\t\t\tdev->pci_dev->addr.function);\n+\t\t\t\tpci_dev->addr.domain,\n+\t\t\t\tpci_dev->addr.bus,\n+\t\t\t\tpci_dev->addr.devid,\n+\t\t\t\tpci_dev->addr.function);\n }\n \n /*\n@@ -3515,7 +3526,7 @@ ixgbe_dev_interrupt_action(struct rte_eth_dev *dev)\n \t} else {\n \t\tPMD_DRV_LOG(DEBUG, \"enable intr immediately\");\n \t\tixgbe_enable_intr(dev);\n-\t\trte_intr_enable(&(dev->pci_dev->intr_handle));\n+\t\trte_intr_enable(ETH_DEV_TO_INTR_HANDLE(dev));\n \t}\n \n \n@@ -3564,7 +3575,7 @@ ixgbe_dev_interrupt_delayed_handler(void *param)\n \n \tPMD_DRV_LOG(DEBUG, \"enable intr in delayed handler S[%08x]\", eicr);\n \tixgbe_enable_intr(dev);\n-\trte_intr_enable(&(dev->pci_dev->intr_handle));\n+\trte_intr_enable(ETH_DEV_TO_INTR_HANDLE(dev));\n }\n \n /**\n@@ -4196,7 +4207,7 @@ ixgbevf_dev_start(struct rte_eth_dev *dev)\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint32_t intr_vector = 0;\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \n \tint err, mask = 0;\n \n@@ -4259,7 +4270,7 @@ static void\n ixgbevf_dev_stop(struct rte_eth_dev *dev)\n {\n \tstruct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \n \tPMD_INIT_FUNC_TRACE();\n \n@@ -5070,7 +5081,7 @@ ixgbevf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \tRTE_SET_USED(queue_id);\n \tIXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);\n \n-\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\trte_intr_enable(ETH_DEV_TO_INTR_HANDLE(dev));\n \n \treturn 0;\n }\n@@ -5112,7 +5123,7 @@ ixgbe_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)\n \t\tmask &= (1 << (queue_id - 32));\n \t\tIXGBE_WRITE_REG(hw, IXGBE_EIMS_EX(1), mask);\n \t}\n-\trte_intr_enable(&dev->pci_dev->intr_handle);\n+\trte_intr_enable(ETH_DEV_TO_INTR_HANDLE(dev));\n \n \treturn 0;\n }\n@@ -5216,7 +5227,7 @@ ixgbe_set_ivar_map(struct ixgbe_hw *hw, int8_t direction,\n static void\n ixgbevf_configure_msix(struct rte_eth_dev *dev)\n {\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint32_t q_idx;\n@@ -5249,7 +5260,7 @@ ixgbevf_configure_msix(struct rte_eth_dev *dev)\n static void\n ixgbe_configure_msix(struct rte_eth_dev *dev)\n {\n-\tstruct rte_intr_handle *intr_handle = &dev->pci_dev->intr_handle;\n+\tstruct rte_intr_handle *intr_handle = ETH_DEV_TO_INTR_HANDLE(dev);\n \tstruct ixgbe_hw *hw =\n \t\tIXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tuint32_t queue_id, base = IXGBE_MISC_VEC_ID;\n@@ -5381,7 +5392,8 @@ static int ixgbe_set_vf_rate_limit(struct rte_eth_dev *dev, uint16_t vf,\n \t\treturn -EINVAL;\n \n \tif (vfinfo != NULL) {\n-\t\tfor (vf_idx = 0; vf_idx < dev->pci_dev->max_vfs; vf_idx++) {\n+\t\tfor (vf_idx = 0; vf_idx < ETH_DEV_PCI_DEV(dev)->max_vfs;\n+\t\t     vf_idx++) {\n \t\t\tif (vf_idx == vf)\n \t\t\t\tcontinue;\n \t\t\tfor (idx = 0; idx < RTE_DIM(vfinfo[vf_idx].tx_rate);\n@@ -7197,12 +7209,13 @@ ixgbe_e_tag_insertion_en_dis(struct rte_eth_dev *dev,\n \tint ret = 0;\n \tuint32_t vmtir, vmvir;\n \tstruct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(dev);\n \n-\tif (l2_tunnel->vf_id >= dev->pci_dev->max_vfs) {\n+\tif (l2_tunnel->vf_id >= pci_dev->max_vfs) {\n \t\tPMD_DRV_LOG(ERR,\n \t\t\t    \"VF id %u should be less than %u\",\n \t\t\t    l2_tunnel->vf_id,\n-\t\t\t    dev->pci_dev->max_vfs);\n+\t\t\t    pci_dev->max_vfs);\n \t\treturn -EINVAL;\n \t}\n \ndiff --git a/drivers/net/ixgbe/ixgbe_pf.c b/drivers/net/ixgbe/ixgbe_pf.c\nindex 26395e4..139d816 100644\n--- a/drivers/net/ixgbe/ixgbe_pf.c\n+++ b/drivers/net/ixgbe/ixgbe_pf.c\n@@ -61,7 +61,7 @@\n static inline uint16_t\n dev_num_vf(struct rte_eth_dev *eth_dev)\n {\n-\treturn eth_dev->pci_dev->max_vfs;\n+\treturn ETH_DEV_PCI_DEV(eth_dev)->max_vfs;\n }\n \n static inline\ndiff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c\nindex d106dd0..959ff0f 100644\n--- a/drivers/net/qede/qede_ethdev.c\n+++ b/drivers/net/qede/qede_ethdev.c\n@@ -178,11 +178,12 @@ static void\n qede_interrupt_handler(__rte_unused struct rte_intr_handle *handle, void *param)\n {\n \tstruct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \tstruct qede_dev *qdev = eth_dev->data->dev_private;\n \tstruct ecore_dev *edev = &qdev->edev;\n \n \tqede_interrupt_action(ECORE_LEADING_HWFN(edev));\n-\tif (rte_intr_enable(&eth_dev->pci_dev->intr_handle))\n+\tif (rte_intr_enable(&pci_dev->intr_handle))\n \t\tDP_ERR(edev, \"rte_intr_enable failed\\n\");\n }\n \n@@ -809,6 +810,7 @@ static void qede_poll_sp_sb_cb(void *param)\n \n static void qede_dev_close(struct rte_eth_dev *eth_dev)\n {\n+\tstruct rte_pci_device *pci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \tstruct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);\n \tstruct ecore_dev *edev = QEDE_INIT_EDEV(qdev);\n \tint rc;\n@@ -835,9 +837,9 @@ static void qede_dev_close(struct rte_eth_dev *eth_dev)\n \n \tqdev->ops->common->remove(edev);\n \n-\trte_intr_disable(&eth_dev->pci_dev->intr_handle);\n+\trte_intr_disable(&pci_dev->intr_handle);\n \n-\trte_intr_callback_unregister(&eth_dev->pci_dev->intr_handle,\n+\trte_intr_callback_unregister(&pci_dev->intr_handle,\n \t\t\t\t     qede_interrupt_handler, (void *)eth_dev);\n \n \tif (edev->num_hwfns > 1)\n@@ -1403,7 +1405,8 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)\n \t/* Extract key data structures */\n \tadapter = eth_dev->data->dev_private;\n \tedev = &adapter->edev;\n-\tpci_addr = eth_dev->pci_dev->addr;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n+\tpci_addr = pci_dev->addr;\n \n \tPMD_INIT_FUNC_TRACE(edev);\n \n@@ -1420,8 +1423,6 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)\n \t\treturn 0;\n \t}\n \n-\tpci_dev = eth_dev->pci_dev;\n-\n \trte_eth_copy_pci_info(eth_dev, pci_dev);\n \n \tqed_ops = qed_get_eth_ops();\n@@ -1442,10 +1443,10 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)\n \n \tqede_update_pf_params(edev);\n \n-\trte_intr_callback_register(&eth_dev->pci_dev->intr_handle,\n+\trte_intr_callback_register(&pci_dev->intr_handle,\n \t\t\t\t   qede_interrupt_handler, (void *)eth_dev);\n \n-\tif (rte_intr_enable(&eth_dev->pci_dev->intr_handle)) {\n+\tif (rte_intr_enable(&pci_dev->intr_handle)) {\n \t\tDP_ERR(edev, \"rte_intr_enable() failed\\n\");\n \t\treturn -ENODEV;\n \t}\ndiff --git a/drivers/net/vmxnet3/vmxnet3_ethdev.c b/drivers/net/vmxnet3/vmxnet3_ethdev.c\nindex 8bb13e5..bcb3751 100644\n--- a/drivers/net/vmxnet3/vmxnet3_ethdev.c\n+++ b/drivers/net/vmxnet3/vmxnet3_ethdev.c\n@@ -138,7 +138,7 @@ gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,\n \tconst struct rte_memzone *mz;\n \n \tsnprintf(z_name, sizeof(z_name), \"%s_%d_%s\",\n-\t\t dev->driver->pci_drv.driver.name, dev->data->port_id, post_string);\n+\t\t dev->data->drv_name, dev->data->port_id, post_string);\n \n \tmz = rte_memzone_lookup(z_name);\n \tif (!reuse) {\n@@ -237,7 +237,7 @@ eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)\n \teth_dev->dev_ops = &vmxnet3_eth_dev_ops;\n \teth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;\n \teth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;\n-\tpci_dev = eth_dev->pci_dev;\n+\tpci_dev = ETH_DEV_PCI_DEV(eth_dev);\n \n \t/*\n \t * for secondary processes, we don't initialize any further as primary\n",
    "prefixes": [
        "dpdk-dev",
        "v2",
        "3/8"
    ]
}