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GET /api/patches/17141/?format=api
{ "id": 17141, "url": "https://patches.dpdk.org/api/patches/17141/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1479740470-6723-25-git-send-email-arybchenko@solarflare.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1479740470-6723-25-git-send-email-arybchenko@solarflare.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1479740470-6723-25-git-send-email-arybchenko@solarflare.com", "date": "2016-11-21T15:00:38", "name": "[dpdk-dev,24/56] net/sfc: import libefx support to access monitors via MCDI", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "7f5848d5757c045cd1e89f3df40609919b8712fe", "submitter": { "id": 607, "url": "https://patches.dpdk.org/api/people/607/?format=api", "name": "Andrew Rybchenko", "email": "arybchenko@solarflare.com" }, "delegate": { "id": 319, "url": "https://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1479740470-6723-25-git-send-email-arybchenko@solarflare.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/17141/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/17141/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 3DAD2D5BC;\n\tMon, 21 Nov 2016 16:03:30 +0100 (CET)", "from nbfkord-smmo02.seg.att.com (nbfkord-smmo02.seg.att.com\n\t[209.65.160.78]) by dpdk.org (Postfix) with ESMTP id 26679377A\n\tfor <dev@dpdk.org>; Mon, 21 Nov 2016 16:01:40 +0100 (CET)", "from unknown [12.187.104.26]\n\tby nbfkord-smmo02.seg.att.com(mxl_mta-7.2.4-7) with SMTP id\n\t35c03385.0.1541296.00-2318.3424237.nbfkord-smmo02.seg.att.com\n\t(envelope-from <arybchenko@solarflare.com>); \n\tMon, 21 Nov 2016 15:01:40 +0000 (UTC)", "from ocex03.SolarFlarecom.com (10.20.40.36) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id 15.0.1044.25; Mon, 21 Nov 2016 07:01:21 -0800", "from opal.uk.solarflarecom.com (10.17.10.1) by\n\tocex03.SolarFlarecom.com (10.20.40.36) with Microsoft SMTP Server\n\t(TLS) id\n\t15.0.1044.25 via Frontend Transport; Mon, 21 Nov 2016 07:01:21 -0800", "from uklogin.uk.solarflarecom.com (uklogin.uk.solarflarecom.com\n\t[10.17.10.10])\n\tby opal.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tuALF1KZC007168 for <dev@dpdk.org>; Mon, 21 Nov 2016 15:01:20 GMT", "from uklogin.uk.solarflarecom.com (localhost.localdomain\n\t[127.0.0.1])\n\tby uklogin.uk.solarflarecom.com (8.13.8/8.13.8) with ESMTP id\n\tuALF1J3F006765 for <dev@dpdk.org>; Mon, 21 Nov 2016 15:01:20 GMT" ], "X-MXL-Hash": "58330c54335fcc52-0066ce29ba15a7acc1515ea43d4e8471245d05c3", "From": "Andrew Rybchenko <arybchenko@solarflare.com>", "To": "<dev@dpdk.org>", "Date": "Mon, 21 Nov 2016 15:00:38 +0000", "Message-ID": "<1479740470-6723-25-git-send-email-arybchenko@solarflare.com>", "X-Mailer": "git-send-email 1.8.2.3", "In-Reply-To": "<1479740470-6723-1-git-send-email-arybchenko@solarflare.com>", "References": "<1479740470-6723-1-git-send-email-arybchenko@solarflare.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-AnalysisOut": [ "[v=2.1 cv=UI/baXry c=1 sm=1 tr=0 a=8BlWFWvVlq5taO8ncb8nKg==]", "[:17 a=L24OOQBejmoA:10 a=zRKbQ67AAAAA:8 a=sCGIt9ieJHR2VkqI4]", "[G0A:9 a=qO2MT3ZJsOKLasTJ:21 a=asFBBw8icJ-nqHx2:21 a=oHZyok]", "[0XAA8Z28eB:21 a=PA03WX8tBzeizutn5_OT:22]" ], "X-Spam": "[F=0.4999452090; CM=0.500; S=0.499(2015072901)]", "X-MAIL-FROM": "<arybchenko@solarflare.com>", "X-SOURCE-IP": "[12.187.104.26]", "Subject": "[dpdk-dev] [PATCH 24/56] net/sfc: import libefx support to access\n\tmonitors via MCDI", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "EFSYS_OPT_MON_MCDI should be enabled to use it.\n\nFrom Solarflare Communications Inc.\n\nSigned-off-by: Andrew Rybchenko <arybchenko@solarflare.com>\n---\n drivers/net/sfc/efx/base/ef10_nic.c | 3 +\n drivers/net/sfc/efx/base/efx_check.h | 7 +\n drivers/net/sfc/efx/base/efx_ev.c | 3 +\n drivers/net/sfc/efx/base/efx_mon.c | 21 +-\n drivers/net/sfc/efx/base/hunt_nic.c | 3 +\n drivers/net/sfc/efx/base/mcdi_mon.c | 565 +++++++++++++++++++++++++++++++++++\n drivers/net/sfc/efx/base/mcdi_mon.h | 74 +++++\n 7 files changed, 675 insertions(+), 1 deletion(-)\n create mode 100644 drivers/net/sfc/efx/base/mcdi_mon.c\n create mode 100644 drivers/net/sfc/efx/base/mcdi_mon.h", "diff": "diff --git a/drivers/net/sfc/efx/base/ef10_nic.c b/drivers/net/sfc/efx/base/ef10_nic.c\nindex 32706f4..7af8935 100644\n--- a/drivers/net/sfc/efx/base/ef10_nic.c\n+++ b/drivers/net/sfc/efx/base/ef10_nic.c\n@@ -30,6 +30,9 @@\n \n #include \"efx.h\"\n #include \"efx_impl.h\"\n+#if EFSYS_OPT_MON_MCDI\n+#include \"mcdi_mon.h\"\n+#endif\n \n #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD\n \ndiff --git a/drivers/net/sfc/efx/base/efx_check.h b/drivers/net/sfc/efx/base/efx_check.h\nindex 3e4e9ba..35615e6 100644\n--- a/drivers/net/sfc/efx/base/efx_check.h\n+++ b/drivers/net/sfc/efx/base/efx_check.h\n@@ -166,6 +166,13 @@\n # endif\n #endif /* EFSYS_OPT_MON_STATS */\n \n+#if EFSYS_OPT_MON_MCDI\n+/* Support Monitor via mcdi */\n+# if !(EFSYS_OPT_SIENA || EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD)\n+# error \"MON_MCDI requires SIENA or HUNTINGTON or MEDFORD\"\n+# endif\n+#endif /* EFSYS_OPT_MON_MCDI*/\n+\n #if EFSYS_OPT_NAMES\n /* Support printable names for statistics */\n # if !(EFSYS_OPT_LOOPBACK || EFSYS_OPT_MAC_STATS || EFSYS_OPT_MCDI || \\\ndiff --git a/drivers/net/sfc/efx/base/efx_ev.c b/drivers/net/sfc/efx/base/efx_ev.c\nindex ac3ebe3..42ded5a 100644\n--- a/drivers/net/sfc/efx/base/efx_ev.c\n+++ b/drivers/net/sfc/efx/base/efx_ev.c\n@@ -30,6 +30,9 @@\n \n #include \"efx.h\"\n #include \"efx_impl.h\"\n+#if EFSYS_OPT_MON_MCDI\n+#include \"mcdi_mon.h\"\n+#endif\n \n #if EFSYS_OPT_QSTATS\n #define\tEFX_EV_QSTAT_INCR(_eep, _stat)\t\t\t\t\t\\\ndiff --git a/drivers/net/sfc/efx/base/efx_mon.c b/drivers/net/sfc/efx/base/efx_mon.c\nindex 68314cf..c2f1e97 100644\n--- a/drivers/net/sfc/efx/base/efx_mon.c\n+++ b/drivers/net/sfc/efx/base/efx_mon.c\n@@ -31,6 +31,10 @@\n #include \"efx.h\"\n #include \"efx_impl.h\"\n \n+#if EFSYS_OPT_MON_MCDI\n+#include \"mcdi_mon.h\"\n+#endif\n+\n #if EFSYS_OPT_NAMES\n \n static const char * const __efx_mon_name[] = {\n@@ -55,6 +59,14 @@ efx_mon_name(\n \n #endif\t/* EFSYS_OPT_NAMES */\n \n+#if EFSYS_OPT_MON_MCDI\n+static const efx_mon_ops_t\t__efx_mon_mcdi_ops = {\n+#if EFSYS_OPT_MON_STATS\n+\tmcdi_mon_stats_update\t\t/* emo_stats_update */\n+#endif\t/* EFSYS_OPT_MON_STATS */\n+};\n+#endif\n+\n \n \t__checkReturn\tefx_rc_t\n efx_mon_init(\n@@ -79,6 +91,13 @@ efx_mon_init(\n \n \tEFSYS_ASSERT(encp->enc_mon_type != EFX_MON_INVALID);\n \tswitch (emp->em_type) {\n+#if EFSYS_OPT_MON_MCDI\n+\tcase EFX_MON_SFC90X0:\n+\tcase EFX_MON_SFC91X0:\n+\tcase EFX_MON_SFC92X0:\n+\t\temop = &__efx_mon_mcdi_ops;\n+\t\tbreak;\n+#endif\n \tdefault:\n \t\trc = ENOTSUP;\n \t\tgoto fail2;\n@@ -104,7 +123,7 @@ efx_mon_init(\n \n #if EFSYS_OPT_NAMES\n \n-/* START MKCONFIG GENERATED MonitorStatNamesBlock 31f437eafb0b0437 */\n+/* START MKCONFIG GENERATED MonitorStatNamesBlock 5daa2a5725ba734b */\n static const char * const __mon_stat_name[] = {\n \t\"value_2_5v\",\n \t\"value_vccp1\",\ndiff --git a/drivers/net/sfc/efx/base/hunt_nic.c b/drivers/net/sfc/efx/base/hunt_nic.c\nindex 263f474..c2c4d74 100644\n--- a/drivers/net/sfc/efx/base/hunt_nic.c\n+++ b/drivers/net/sfc/efx/base/hunt_nic.c\n@@ -30,6 +30,9 @@\n \n #include \"efx.h\"\n #include \"efx_impl.h\"\n+#if EFSYS_OPT_MON_MCDI\n+#include \"mcdi_mon.h\"\n+#endif\n \n #if EFSYS_OPT_HUNTINGTON\n \ndiff --git a/drivers/net/sfc/efx/base/mcdi_mon.c b/drivers/net/sfc/efx/base/mcdi_mon.c\nnew file mode 100644\nindex 0000000..c5360c3\n--- /dev/null\n+++ b/drivers/net/sfc/efx/base/mcdi_mon.c\n@@ -0,0 +1,565 @@\n+/*\n+ * Copyright (c) 2009-2016 Solarflare Communications Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright notice,\n+ * this list of conditions and the following disclaimer.\n+ * 2. Redistributions in binary form must reproduce the above copyright notice,\n+ * this list of conditions and the following disclaimer in the documentation\n+ * and/or other materials provided with the distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,\n+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR\n+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR\n+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\n+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\n+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;\n+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\n+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR\n+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\n+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ * The views and conclusions contained in the software and documentation are\n+ * those of the authors and should not be interpreted as representing official\n+ * policies, either expressed or implied, of the FreeBSD Project.\n+ */\n+\n+#include \"efx.h\"\n+#include \"efx_impl.h\"\n+\n+#if EFSYS_OPT_MON_MCDI\n+\n+#if EFSYS_OPT_MON_STATS\n+\n+#define\tMCDI_MON_NEXT_PAGE ((uint16_t)0xfffe)\n+#define\tMCDI_MON_INVALID_SENSOR ((uint16_t)0xfffd)\n+#define\tMCDI_MON_PAGE_SIZE 0x20\n+\n+/* Bitmasks of valid port(s) for each sensor */\n+#define\tMCDI_MON_PORT_NONE\t(0x00)\n+#define\tMCDI_MON_PORT_P1\t(0x01)\n+#define\tMCDI_MON_PORT_P2\t(0x02)\n+#define\tMCDI_MON_PORT_P3\t(0x04)\n+#define\tMCDI_MON_PORT_P4\t(0x08)\n+#define\tMCDI_MON_PORT_Px\t(0xFFFF)\n+\n+/* Get port mask from one-based MCDI port number */\n+#define\tMCDI_MON_PORT_MASK(_emip) (1U << ((_emip)->emi_port - 1))\n+\n+/* Entry for MCDI sensor in sensor map */\n+#define\tSTAT(portmask, stat)\t\\\n+\t{ (MCDI_MON_PORT_##portmask), (EFX_MON_STAT_##stat) }\n+\n+/* Entry for sensor next page flag in sensor map */\n+#define\tSTAT_NEXT_PAGE()\t\\\n+\t{ MCDI_MON_PORT_NONE, MCDI_MON_NEXT_PAGE }\n+\n+/* Placeholder for gaps in the array */\n+#define\tSTAT_NO_SENSOR()\t\\\n+\t{ MCDI_MON_PORT_NONE, MCDI_MON_INVALID_SENSOR }\n+\n+/* Map from MC sensors to monitor statistics */\n+static const struct mcdi_sensor_map_s {\n+\tuint16_t\tmsm_port_mask;\n+\tuint16_t\tmsm_stat;\n+} mcdi_sensor_map[] = {\n+\t/* Sensor page 0\t\tMC_CMD_SENSOR_xxx */\n+\tSTAT(Px, INT_TEMP),\t\t/* 0x00 CONTROLLER_TEMP */\n+\tSTAT(Px, EXT_TEMP),\t\t/* 0x01 PHY_COMMON_TEMP */\n+\tSTAT(Px, INT_COOLING),\t\t/* 0x02 CONTROLLER_COOLING */\n+\tSTAT(P1, EXT_TEMP),\t\t/* 0x03 PHY0_TEMP */\n+\tSTAT(P1, EXT_COOLING),\t\t/* 0x04 PHY0_COOLING */\n+\tSTAT(P2, EXT_TEMP),\t\t/* 0x05 PHY1_TEMP */\n+\tSTAT(P2, EXT_COOLING),\t\t/* 0x06 PHY1_COOLING */\n+\tSTAT(Px, 1V),\t\t\t/* 0x07 IN_1V0 */\n+\tSTAT(Px, 1_2V),\t\t\t/* 0x08 IN_1V2 */\n+\tSTAT(Px, 1_8V),\t\t\t/* 0x09 IN_1V8 */\n+\tSTAT(Px, 2_5V),\t\t\t/* 0x0a IN_2V5 */\n+\tSTAT(Px, 3_3V),\t\t\t/* 0x0b IN_3V3 */\n+\tSTAT(Px, 12V),\t\t\t/* 0x0c IN_12V0 */\n+\tSTAT(Px, 1_2VA),\t\t/* 0x0d IN_1V2A */\n+\tSTAT(Px, VREF),\t\t\t/* 0x0e IN_VREF */\n+\tSTAT(Px, VAOE),\t\t\t/* 0x0f OUT_VAOE */\n+\tSTAT(Px, AOE_TEMP),\t\t/* 0x10 AOE_TEMP */\n+\tSTAT(Px, PSU_AOE_TEMP),\t\t/* 0x11 PSU_AOE_TEMP */\n+\tSTAT(Px, PSU_TEMP),\t\t/* 0x12 PSU_TEMP */\n+\tSTAT(Px, FAN0),\t\t\t/* 0x13 FAN_0 */\n+\tSTAT(Px, FAN1),\t\t\t/* 0x14 FAN_1 */\n+\tSTAT(Px, FAN2),\t\t\t/* 0x15 FAN_2 */\n+\tSTAT(Px, FAN3),\t\t\t/* 0x16 FAN_3 */\n+\tSTAT(Px, FAN4),\t\t\t/* 0x17 FAN_4 */\n+\tSTAT(Px, VAOE_IN),\t\t/* 0x18 IN_VAOE */\n+\tSTAT(Px, IAOE),\t\t\t/* 0x19 OUT_IAOE */\n+\tSTAT(Px, IAOE_IN),\t\t/* 0x1a IN_IAOE */\n+\tSTAT(Px, NIC_POWER),\t\t/* 0x1b NIC_POWER */\n+\tSTAT(Px, 0_9V),\t\t\t/* 0x1c IN_0V9 */\n+\tSTAT(Px, I0_9V),\t\t/* 0x1d IN_I0V9 */\n+\tSTAT(Px, I1_2V),\t\t/* 0x1e IN_I1V2 */\n+\tSTAT_NEXT_PAGE(),\t\t/* 0x1f Next page flag (not a sensor) */\n+\n+\t/* Sensor page 1\t\tMC_CMD_SENSOR_xxx */\n+\tSTAT(Px, 0_9V_ADC),\t\t/* 0x20 IN_0V9_ADC */\n+\tSTAT(Px, INT_TEMP2),\t\t/* 0x21 CONTROLLER_2_TEMP */\n+\tSTAT(Px, VREG_TEMP),\t\t/* 0x22 VREG_INTERNAL_TEMP */\n+\tSTAT(Px, VREG_0_9V_TEMP),\t/* 0x23 VREG_0V9_TEMP */\n+\tSTAT(Px, VREG_1_2V_TEMP),\t/* 0x24 VREG_1V2_TEMP */\n+\tSTAT(Px, INT_VPTAT),\t\t/* 0x25 CTRLR. VPTAT */\n+\tSTAT(Px, INT_ADC_TEMP),\t\t/* 0x26 CTRLR. INTERNAL_TEMP */\n+\tSTAT(Px, EXT_VPTAT),\t\t/* 0x27 CTRLR. VPTAT_EXTADC */\n+\tSTAT(Px, EXT_ADC_TEMP),\t\t/* 0x28 CTRLR. INTERNAL_TEMP_EXTADC */\n+\tSTAT(Px, AMBIENT_TEMP),\t\t/* 0x29 AMBIENT_TEMP */\n+\tSTAT(Px, AIRFLOW),\t\t/* 0x2a AIRFLOW */\n+\tSTAT(Px, VDD08D_VSS08D_CSR),\t/* 0x2b VDD08D_VSS08D_CSR */\n+\tSTAT(Px, VDD08D_VSS08D_CSR_EXTADC), /* 0x2c VDD08D_VSS08D_CSR_EXTADC */\n+\tSTAT(Px, HOTPOINT_TEMP),\t/* 0x2d HOTPOINT_TEMP */\n+\tSTAT(P1, PHY_POWER_SWITCH_PORT0), /* 0x2e PHY_POWER_SWITCH_PORT0 */\n+\tSTAT(P2, PHY_POWER_SWITCH_PORT1), /* 0x2f PHY_POWER_SWITCH_PORT1 */\n+\tSTAT(Px, MUM_VCC),\t\t/* 0x30 MUM_VCC */\n+\tSTAT(Px, 0V9_A),\t\t/* 0x31 0V9_A */\n+\tSTAT(Px, I0V9_A),\t\t/* 0x32 I0V9_A */\n+\tSTAT(Px, 0V9_A_TEMP),\t\t/* 0x33 0V9_A_TEMP */\n+\tSTAT(Px, 0V9_B),\t\t/* 0x34 0V9_B */\n+\tSTAT(Px, I0V9_B),\t\t/* 0x35 I0V9_B */\n+\tSTAT(Px, 0V9_B_TEMP),\t\t/* 0x36 0V9_B_TEMP */\n+\tSTAT(Px, CCOM_AVREG_1V2_SUPPLY), /* 0x37 CCOM_AVREG_1V2_SUPPLY */\n+\tSTAT(Px, CCOM_AVREG_1V2_SUPPLY_EXT_ADC),\n+\t\t\t\t\t/* 0x38 CCOM_AVREG_1V2_SUPPLY_EXT_ADC */\n+\tSTAT(Px, CCOM_AVREG_1V8_SUPPLY), /* 0x39 CCOM_AVREG_1V8_SUPPLY */\n+\tSTAT(Px, CCOM_AVREG_1V8_SUPPLY_EXT_ADC),\n+\t\t\t\t\t/* 0x3a CCOM_AVREG_1V8_SUPPLY_EXT_ADC */\n+\tSTAT_NO_SENSOR(),\t\t/* 0x3b (no sensor) */\n+\tSTAT_NO_SENSOR(),\t\t/* 0x3c (no sensor) */\n+\tSTAT_NO_SENSOR(),\t\t/* 0x3d (no sensor) */\n+\tSTAT_NO_SENSOR(),\t\t/* 0x3e (no sensor) */\n+\tSTAT_NEXT_PAGE(),\t\t/* 0x3f Next page flag (not a sensor) */\n+\n+\t/* Sensor page 2\t\tMC_CMD_SENSOR_xxx */\n+\tSTAT(Px, CONTROLLER_MASTER_VPTAT),\t /* 0x40 MASTER_VPTAT */\n+\tSTAT(Px, CONTROLLER_MASTER_INTERNAL_TEMP), /* 0x41 MASTER_INT_TEMP */\n+\tSTAT(Px, CONTROLLER_MASTER_VPTAT_EXT_ADC), /* 0x42 MAST_VPTAT_EXT_ADC */\n+\tSTAT(Px, CONTROLLER_MASTER_INTERNAL_TEMP_EXT_ADC),\n+\t\t\t\t\t/* 0x43 MASTER_INTERNAL_TEMP_EXT_ADC */\n+\tSTAT(Px, CONTROLLER_SLAVE_VPTAT),\t /* 0x44 SLAVE_VPTAT */\n+\tSTAT(Px, CONTROLLER_SLAVE_INTERNAL_TEMP), /* 0x45 SLAVE_INTERNAL_TEMP */\n+\tSTAT(Px, CONTROLLER_SLAVE_VPTAT_EXT_ADC), /* 0x46 SLAVE_VPTAT_EXT_ADC */\n+\tSTAT(Px, CONTROLLER_SLAVE_INTERNAL_TEMP_EXT_ADC),\n+\t\t\t\t\t/* 0x47 SLAVE_INTERNAL_TEMP_EXT_ADC */\n+\tSTAT_NO_SENSOR(),\t\t/* 0x48 (no sensor) */\n+\tSTAT(Px, SODIMM_VOUT),\t\t/* 0x49 SODIMM_VOUT */\n+\tSTAT(Px, SODIMM_0_TEMP),\t/* 0x4a SODIMM_0_TEMP */\n+\tSTAT(Px, SODIMM_1_TEMP),\t/* 0x4b SODIMM_1_TEMP */\n+\tSTAT(Px, PHY0_VCC),\t\t/* 0x4c PHY0_VCC */\n+\tSTAT(Px, PHY1_VCC),\t\t/* 0x4d PHY1_VCC */\n+\tSTAT(Px, CONTROLLER_TDIODE_TEMP), /* 0x4e CONTROLLER_TDIODE_TEMP */\n+\tSTAT(Px, BOARD_FRONT_TEMP),\t/* 0x4f BOARD_FRONT_TEMP */\n+\tSTAT(Px, BOARD_BACK_TEMP),\t/* 0x50 BOARD_BACK_TEMP */\n+};\n+\n+#define\tMCDI_STATIC_SENSOR_ASSERT(_field)\t\t\t\t\\\n+\tEFX_STATIC_ASSERT(MC_CMD_SENSOR_STATE_ ## _field\t\t\\\n+\t\t\t == EFX_MON_STAT_STATE_ ## _field)\n+\n+static\t\t\t\t\t\tvoid\n+mcdi_mon_decode_stats(\n+\t__in\t\t\t\t\tefx_nic_t *enp,\n+\t__in_bcount(sensor_mask_size)\t\tuint32_t *sensor_mask,\n+\t__in\t\t\t\t\tsize_t sensor_mask_size,\n+\t__in_opt\t\t\t\tefsys_mem_t *esmp,\n+\t__out_bcount_opt(sensor_mask_size)\tuint32_t *stat_maskp,\n+\t__inout_ecount_opt(EFX_MON_NSTATS)\tefx_mon_stat_value_t *stat)\n+{\n+\tefx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);\n+\tuint16_t port_mask;\n+\tuint16_t sensor;\n+\tsize_t sensor_max;\n+\tuint32_t stat_mask[(EFX_ARRAY_SIZE(mcdi_sensor_map) + 31) / 32];\n+\tuint32_t idx = 0;\n+\tuint32_t page = 0;\n+\n+\t/* Assert the MC_CMD_SENSOR and EFX_MON_STATE namespaces agree */\n+\tMCDI_STATIC_SENSOR_ASSERT(OK);\n+\tMCDI_STATIC_SENSOR_ASSERT(WARNING);\n+\tMCDI_STATIC_SENSOR_ASSERT(FATAL);\n+\tMCDI_STATIC_SENSOR_ASSERT(BROKEN);\n+\tMCDI_STATIC_SENSOR_ASSERT(NO_READING);\n+\n+\tEFX_STATIC_ASSERT(sizeof (stat_mask[0]) * 8 ==\n+\t EFX_MON_MASK_ELEMENT_SIZE);\n+\tsensor_max =\n+\t MIN((8 * sensor_mask_size), EFX_ARRAY_SIZE(mcdi_sensor_map));\n+\n+\tEFSYS_ASSERT(emip->emi_port > 0); /* MCDI port number is one-based */\n+\tport_mask = MCDI_MON_PORT_MASK(emip);\n+\n+\tmemset(stat_mask, 0, sizeof (stat_mask));\n+\n+\t/*\n+\t * The MCDI sensor readings in the DMA buffer are a packed array of\n+\t * MC_CMD_SENSOR_VALUE_ENTRY structures, which only includes entries for\n+\t * supported sensors (bit set in sensor_mask). The sensor_mask and\n+\t * sensor readings do not include entries for the per-page NEXT_PAGE\n+\t * flag.\n+\t *\n+\t * sensor_mask may legitimately contain MCDI sensors that the driver\n+\t * does not understand.\n+\t */\n+\tfor (sensor = 0; sensor < sensor_max; ++sensor) {\n+\t\tefx_mon_stat_t id = mcdi_sensor_map[sensor].msm_stat;\n+\n+\t\tif ((sensor % MCDI_MON_PAGE_SIZE) == MC_CMD_SENSOR_PAGE0_NEXT) {\n+\t\t\tEFSYS_ASSERT3U(id, ==, MCDI_MON_NEXT_PAGE);\n+\t\t\tpage++;\n+\t\t\tcontinue;\n+\t\t}\n+\t\tif (~(sensor_mask[page]) & (1U << sensor))\n+\t\t\tcontinue;\n+\t\tidx++;\n+\n+\t\tif ((port_mask & mcdi_sensor_map[sensor].msm_port_mask) == 0)\n+\t\t\tcontinue;\n+\t\tEFSYS_ASSERT(id < EFX_MON_NSTATS);\n+\n+\t\t/*\n+\t\t * stat_mask is a bitmask indexed by EFX_MON_* monitor statistic\n+\t\t * identifiers from efx_mon_stat_t (without NEXT_PAGE bits).\n+\t\t *\n+\t\t * If there is an entry in the MCDI sensor to monitor statistic\n+\t\t * map then the sensor reading is used for the value of the\n+\t\t * monitor statistic.\n+\t\t */\n+\t\tstat_mask[id / EFX_MON_MASK_ELEMENT_SIZE] |=\n+\t\t (1U << (id % EFX_MON_MASK_ELEMENT_SIZE));\n+\n+\t\tif (stat != NULL && esmp != NULL && !EFSYS_MEM_IS_NULL(esmp)) {\n+\t\t\tefx_dword_t dword;\n+\n+\t\t\t/* Get MCDI sensor reading from DMA buffer */\n+\t\t\tEFSYS_MEM_READD(esmp, 4 * (idx - 1), &dword);\n+\n+\t\t\t/* Update EFX monitor stat from MCDI sensor reading */\n+\t\t\tstat[id].emsv_value = (uint16_t)EFX_DWORD_FIELD(dword,\n+\t\t\t MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_VALUE);\n+\n+\t\t\tstat[id].emsv_state = (uint16_t)EFX_DWORD_FIELD(dword,\n+\t\t\t MC_CMD_SENSOR_VALUE_ENTRY_TYPEDEF_STATE);\n+\t\t}\n+\t}\n+\n+\tif (stat_maskp != NULL) {\n+\t\tmemcpy(stat_maskp, stat_mask, sizeof (stat_mask));\n+\t}\n+}\n+\n+\t__checkReturn\t\t\tefx_rc_t\n+mcdi_mon_ev(\n+\t__in\t\t\t\tefx_nic_t *enp,\n+\t__in\t\t\t\tefx_qword_t *eqp,\n+\t__out\t\t\t\tefx_mon_stat_t *idp,\n+\t__out\t\t\t\tefx_mon_stat_value_t *valuep)\n+{\n+\tefx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);\n+\tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n+\tuint16_t port_mask;\n+\tuint16_t sensor;\n+\tuint16_t state;\n+\tuint16_t value;\n+\tefx_mon_stat_t id;\n+\tefx_rc_t rc;\n+\n+\tEFSYS_ASSERT(emip->emi_port > 0); /* MCDI port number is one-based */\n+\tport_mask = MCDI_MON_PORT_MASK(emip);\n+\n+\tsensor = (uint16_t)MCDI_EV_FIELD(eqp, SENSOREVT_MONITOR);\n+\tstate = (uint16_t)MCDI_EV_FIELD(eqp, SENSOREVT_STATE);\n+\tvalue = (uint16_t)MCDI_EV_FIELD(eqp, SENSOREVT_VALUE);\n+\n+\t/* Hardware must support this MCDI sensor */\n+\tEFSYS_ASSERT3U(sensor, <, (8 * encp->enc_mcdi_sensor_mask_size));\n+\tEFSYS_ASSERT((sensor % MCDI_MON_PAGE_SIZE) != MC_CMD_SENSOR_PAGE0_NEXT);\n+\tEFSYS_ASSERT(encp->enc_mcdi_sensor_maskp != NULL);\n+\tEFSYS_ASSERT((encp->enc_mcdi_sensor_maskp[sensor / MCDI_MON_PAGE_SIZE] &\n+\t\t(1U << (sensor % MCDI_MON_PAGE_SIZE))) != 0);\n+\n+\t/* But we don't have to understand it */\n+\tif (sensor >= EFX_ARRAY_SIZE(mcdi_sensor_map)) {\n+\t\trc = ENOTSUP;\n+\t\tgoto fail1;\n+\t}\n+\tid = mcdi_sensor_map[sensor].msm_stat;\n+\tif ((port_mask & mcdi_sensor_map[sensor].msm_port_mask) == 0)\n+\t\treturn (ENODEV);\n+\tEFSYS_ASSERT(id < EFX_MON_NSTATS);\n+\n+\t*idp = id;\n+\tvaluep->emsv_value = value;\n+\tvaluep->emsv_state = state;\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\n+static\t__checkReturn\tefx_rc_t\n+efx_mcdi_read_sensors(\n+\t__in\t\tefx_nic_t *enp,\n+\t__in\t\tefsys_mem_t *esmp,\n+\t__in\t\tuint32_t size)\n+{\n+\tefx_mcdi_req_t req;\n+\tuint8_t payload[MAX(MC_CMD_READ_SENSORS_EXT_IN_LEN,\n+\t\t\t MC_CMD_READ_SENSORS_EXT_OUT_LEN)];\n+\tuint32_t addr_lo, addr_hi;\n+\n+\treq.emr_cmd = MC_CMD_READ_SENSORS;\n+\treq.emr_in_buf = payload;\n+\treq.emr_in_length = MC_CMD_READ_SENSORS_EXT_IN_LEN;\n+\treq.emr_out_buf = payload;\n+\treq.emr_out_length = MC_CMD_READ_SENSORS_EXT_OUT_LEN;\n+\n+\taddr_lo = (uint32_t)(EFSYS_MEM_ADDR(esmp) & 0xffffffff);\n+\taddr_hi = (uint32_t)(EFSYS_MEM_ADDR(esmp) >> 32);\n+\n+\tMCDI_IN_SET_DWORD(req, READ_SENSORS_EXT_IN_DMA_ADDR_LO, addr_lo);\n+\tMCDI_IN_SET_DWORD(req, READ_SENSORS_EXT_IN_DMA_ADDR_HI, addr_hi);\n+\tMCDI_IN_SET_DWORD(req, READ_SENSORS_EXT_IN_LENGTH, size);\n+\n+\tefx_mcdi_execute(enp, &req);\n+\n+\treturn (req.emr_rc);\n+}\n+\n+static\t__checkReturn\tefx_rc_t\n+efx_mcdi_sensor_info_npages(\n+\t__in\t\tefx_nic_t *enp,\n+\t__out\t\tuint32_t *npagesp)\n+{\n+\tefx_mcdi_req_t req;\n+\tuint8_t payload[MAX(MC_CMD_SENSOR_INFO_EXT_IN_LEN,\n+\t\t\t MC_CMD_SENSOR_INFO_OUT_LENMAX)];\n+\tint page;\n+\tefx_rc_t rc;\n+\n+\tEFSYS_ASSERT(npagesp != NULL);\n+\n+\tpage = 0;\n+\tdo {\n+\t\t(void) memset(payload, 0, sizeof (payload));\n+\t\treq.emr_cmd = MC_CMD_SENSOR_INFO;\n+\t\treq.emr_in_buf = payload;\n+\t\treq.emr_in_length = MC_CMD_SENSOR_INFO_EXT_IN_LEN;\n+\t\treq.emr_out_buf = payload;\n+\t\treq.emr_out_length = MC_CMD_SENSOR_INFO_OUT_LENMAX;\n+\n+\t\tMCDI_IN_SET_DWORD(req, SENSOR_INFO_EXT_IN_PAGE, page++);\n+\n+\t\tefx_mcdi_execute_quiet(enp, &req);\n+\n+\t\tif (req.emr_rc != 0) {\n+\t\t\trc = req.emr_rc;\n+\t\t\tgoto fail1;\n+\t\t}\n+\t} while (MCDI_OUT_DWORD(req, SENSOR_INFO_OUT_MASK) &\n+\t (1U << MC_CMD_SENSOR_PAGE0_NEXT));\n+\n+\t*npagesp = page;\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+static\t__checkReturn\t\tefx_rc_t\n+efx_mcdi_sensor_info(\n+\t__in\t\t\tefx_nic_t *enp,\n+\t__out_ecount(npages)\tuint32_t *sensor_maskp,\n+\t__in\t\t\tsize_t npages)\n+{\n+\tefx_mcdi_req_t req;\n+\tuint8_t payload[MAX(MC_CMD_SENSOR_INFO_EXT_IN_LEN,\n+\t\t\t MC_CMD_SENSOR_INFO_OUT_LENMAX)];\n+\tuint32_t page;\n+\tefx_rc_t rc;\n+\n+\tEFSYS_ASSERT(sensor_maskp != NULL);\n+\n+\tfor (page = 0; page < npages; page++) {\n+\t\tuint32_t mask;\n+\n+\t\t(void) memset(payload, 0, sizeof (payload));\n+\t\treq.emr_cmd = MC_CMD_SENSOR_INFO;\n+\t\treq.emr_in_buf = payload;\n+\t\treq.emr_in_length = MC_CMD_SENSOR_INFO_EXT_IN_LEN;\n+\t\treq.emr_out_buf = payload;\n+\t\treq.emr_out_length = MC_CMD_SENSOR_INFO_OUT_LENMAX;\n+\n+\t\tMCDI_IN_SET_DWORD(req, SENSOR_INFO_EXT_IN_PAGE, page);\n+\n+\t\tefx_mcdi_execute(enp, &req);\n+\n+\t\tif (req.emr_rc != 0) {\n+\t\t\trc = req.emr_rc;\n+\t\t\tgoto fail1;\n+\t\t}\n+\n+\t\tmask = MCDI_OUT_DWORD(req, SENSOR_INFO_OUT_MASK);\n+\n+\t\tif ((page != (npages - 1)) &&\n+\t\t ((mask & (1U << MC_CMD_SENSOR_PAGE0_NEXT)) == 0)) {\n+\t\t\trc = EINVAL;\n+\t\t\tgoto fail2;\n+\t\t}\n+\t\tsensor_maskp[page] = mask;\n+\t}\n+\n+\tif (sensor_maskp[npages - 1] & (1U << MC_CMD_SENSOR_PAGE0_NEXT)) {\n+\t\trc = EINVAL;\n+\t\tgoto fail3;\n+\t}\n+\n+\treturn (0);\n+\n+fail3:\n+\tEFSYS_PROBE(fail3);\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t__checkReturn\t\t\tefx_rc_t\n+mcdi_mon_stats_update(\n+\t__in\t\t\t\tefx_nic_t *enp,\n+\t__in\t\t\t\tefsys_mem_t *esmp,\n+\t__inout_ecount(EFX_MON_NSTATS)\tefx_mon_stat_value_t *values)\n+{\n+\tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n+\tuint32_t size = encp->enc_mon_stat_dma_buf_size;\n+\tefx_rc_t rc;\n+\n+\tif ((rc = efx_mcdi_read_sensors(enp, esmp, size)) != 0)\n+\t\tgoto fail1;\n+\n+\tEFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, size);\n+\n+\tmcdi_mon_decode_stats(enp,\n+\t encp->enc_mcdi_sensor_maskp,\n+\t encp->enc_mcdi_sensor_mask_size,\n+\t esmp, NULL, values);\n+\n+\treturn (0);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t__checkReturn\tefx_rc_t\n+mcdi_mon_cfg_build(\n+\t__in\t\tefx_nic_t *enp)\n+{\n+\tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n+\tuint32_t npages;\n+\tefx_rc_t rc;\n+\n+\tswitch (enp->en_family) {\n+#if EFSYS_OPT_SIENA\n+\tcase EFX_FAMILY_SIENA:\n+\t\tencp->enc_mon_type = EFX_MON_SFC90X0;\n+\t\tbreak;\n+#endif\n+#if EFSYS_OPT_HUNTINGTON\n+\tcase EFX_FAMILY_HUNTINGTON:\n+\t\tencp->enc_mon_type = EFX_MON_SFC91X0;\n+\t\tbreak;\n+#endif\n+#if EFSYS_OPT_MEDFORD\n+\tcase EFX_FAMILY_MEDFORD:\n+\t\tencp->enc_mon_type = EFX_MON_SFC92X0;\n+\t\tbreak;\n+#endif\n+\tdefault:\n+\t\trc = EINVAL;\n+\t\tgoto fail1;\n+\t}\n+\n+\t/* Get mc sensor mask size */\n+\tnpages = 0;\n+\tif ((rc = efx_mcdi_sensor_info_npages(enp, &npages)) != 0)\n+\t\tgoto fail2;\n+\n+\tencp->enc_mon_stat_dma_buf_size\t= npages * EFX_MON_STATS_PAGE_SIZE;\n+\tencp->enc_mcdi_sensor_mask_size = npages * sizeof (uint32_t);\n+\n+\t/* Allocate mc sensor mask */\n+\tEFSYS_KMEM_ALLOC(enp->en_esip,\n+\t encp->enc_mcdi_sensor_mask_size,\n+\t encp->enc_mcdi_sensor_maskp);\n+\n+\tif (encp->enc_mcdi_sensor_maskp == NULL) {\n+\t\trc = ENOMEM;\n+\t\tgoto fail3;\n+\t}\n+\n+\t/* Read mc sensor mask */\n+\tif ((rc = efx_mcdi_sensor_info(enp,\n+\t\t encp->enc_mcdi_sensor_maskp,\n+\t\t npages)) != 0)\n+\t\tgoto fail4;\n+\n+\t/* Build monitor statistics mask */\n+\tmcdi_mon_decode_stats(enp,\n+\t encp->enc_mcdi_sensor_maskp,\n+\t encp->enc_mcdi_sensor_mask_size,\n+\t NULL, encp->enc_mon_stat_mask, NULL);\n+\n+\treturn (0);\n+\n+fail4:\n+\tEFSYS_PROBE(fail4);\n+\tEFSYS_KMEM_FREE(enp->en_esip,\n+\t encp->enc_mcdi_sensor_mask_size,\n+\t encp->enc_mcdi_sensor_maskp);\n+\n+fail3:\n+\tEFSYS_PROBE(fail3);\n+\n+fail2:\n+\tEFSYS_PROBE(fail2);\n+\n+fail1:\n+\tEFSYS_PROBE1(fail1, efx_rc_t, rc);\n+\n+\treturn (rc);\n+}\n+\n+\t\t\tvoid\n+mcdi_mon_cfg_free(\n+\t__in\t\tefx_nic_t *enp)\n+{\n+\tefx_nic_cfg_t *encp = &(enp->en_nic_cfg);\n+\n+\tif (encp->enc_mcdi_sensor_maskp != NULL) {\n+\t\tEFSYS_KMEM_FREE(enp->en_esip,\n+\t\t encp->enc_mcdi_sensor_mask_size,\n+\t\t encp->enc_mcdi_sensor_maskp);\n+\t}\n+}\n+\n+\n+#endif\t/* EFSYS_OPT_MON_STATS */\n+\n+#endif\t/* EFSYS_OPT_MON_MCDI */\ndiff --git a/drivers/net/sfc/efx/base/mcdi_mon.h b/drivers/net/sfc/efx/base/mcdi_mon.h\nnew file mode 100644\nindex 0000000..e07b528\n--- /dev/null\n+++ b/drivers/net/sfc/efx/base/mcdi_mon.h\n@@ -0,0 +1,74 @@\n+/*\n+ * Copyright (c) 2009-2016 Solarflare Communications Inc.\n+ * All rights reserved.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ *\n+ * 1. Redistributions of source code must retain the above copyright notice,\n+ * this list of conditions and the following disclaimer.\n+ * 2. Redistributions in binary form must reproduce the above copyright notice,\n+ * this list of conditions and the following disclaimer in the documentation\n+ * and/or other materials provided with the distribution.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\"\n+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,\n+ * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR\n+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR\n+ * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,\n+ * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,\n+ * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;\n+ * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,\n+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR\n+ * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,\n+ * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ *\n+ * The views and conclusions contained in the software and documentation are\n+ * those of the authors and should not be interpreted as representing official\n+ * policies, either expressed or implied, of the FreeBSD Project.\n+ */\n+\n+#ifndef _SYS_MCDI_MON_H\n+#define\t_SYS_MCDI_MON_H\n+\n+#include \"efx.h\"\n+\n+#ifdef\t__cplusplus\n+extern \"C\" {\n+#endif\n+\n+#if EFSYS_OPT_MON_MCDI\n+\n+#if EFSYS_OPT_MON_STATS\n+\n+\t__checkReturn\tefx_rc_t\n+mcdi_mon_cfg_build(\n+ __in\t\tefx_nic_t *enp);\n+\n+\t\t\tvoid\n+mcdi_mon_cfg_free(\n+\t__in\t\tefx_nic_t *enp);\n+\n+\n+extern\t__checkReturn\t\t\tefx_rc_t\n+mcdi_mon_ev(\n+\t__in\t\t\t\tefx_nic_t *enp,\n+\t__in\t\t\t\tefx_qword_t *eqp,\n+\t__out\t\t\t\tefx_mon_stat_t *idp,\n+\t__out\t\t\t\tefx_mon_stat_value_t *valuep);\n+\n+extern\t__checkReturn\t\t\tefx_rc_t\n+mcdi_mon_stats_update(\n+\t__in\t\t\t\tefx_nic_t *enp,\n+\t__in\t\t\t\tefsys_mem_t *esmp,\n+\t__inout_ecount(EFX_MON_NSTATS)\tefx_mon_stat_value_t *values);\n+\n+#endif\t/* EFSYS_OPT_MON_STATS */\n+\n+#endif /* EFSYS_OPT_MON_MCDI */\n+\n+#ifdef\t__cplusplus\n+}\n+#endif\n+\n+#endif\t/* _SYS_MCDI_MON_H */\n", "prefixes": [ "dpdk-dev", "24/56" ] }