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GET /api/patches/15058/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 15058,
    "url": "https://patches.dpdk.org/api/patches/15058/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/1470023815-23108-2-git-send-email-jianfeng.tan@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1470023815-23108-2-git-send-email-jianfeng.tan@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1470023815-23108-2-git-send-email-jianfeng.tan@intel.com",
    "date": "2016-08-01T03:56:53",
    "name": "[dpdk-dev,v4,1/3] mbuf: add Tx side tunneling type",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "496ab43094e8468b571c8bf27e343499717aaf16",
    "submitter": {
        "id": 313,
        "url": "https://patches.dpdk.org/api/people/313/?format=api",
        "name": "Jianfeng Tan",
        "email": "jianfeng.tan@intel.com"
    },
    "delegate": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/1470023815-23108-2-git-send-email-jianfeng.tan@intel.com/mbox/",
    "series": [],
    "comments": "https://patches.dpdk.org/api/patches/15058/comments/",
    "check": "pending",
    "checks": "https://patches.dpdk.org/api/patches/15058/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id A746458C3;\n\tMon,  1 Aug 2016 05:57:08 +0200 (CEST)",
            "from mga04.intel.com (mga04.intel.com [192.55.52.120])\n\tby dpdk.org (Postfix) with ESMTP id 59A955587\n\tfor <dev@dpdk.org>; Mon,  1 Aug 2016 05:57:06 +0200 (CEST)",
            "from fmsmga002.fm.intel.com ([10.253.24.26])\n\tby fmsmga104.fm.intel.com with ESMTP; 31 Jul 2016 20:57:06 -0700",
            "from dpdk06.sh.intel.com ([10.239.129.195])\n\tby fmsmga002.fm.intel.com with ESMTP; 31 Jul 2016 20:57:04 -0700"
        ],
        "X-ExtLoop1": "1",
        "X-IronPort-AV": "E=Sophos; i=\"5.28,453,1464678000\"; d=\"scan'208\";\n\ta=\"1032663349\"",
        "From": "Jianfeng Tan <jianfeng.tan@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "thomas.monjalon@6wind.com, pablo.de.lara.guarch@intel.com,\n\tkonstantin.ananyev@intel.com, jingjing.wu@intel.com,\n\thelin.zhang@intel.com, \n\tJianfeng Tan <jianfeng.tan@intel.com>, Zhe Tao <zhe.tao@intel.com>",
        "Date": "Mon,  1 Aug 2016 03:56:53 +0000",
        "Message-Id": "<1470023815-23108-2-git-send-email-jianfeng.tan@intel.com>",
        "X-Mailer": "git-send-email 2.7.4",
        "In-Reply-To": "<1470023815-23108-1-git-send-email-jianfeng.tan@intel.com>",
        "References": "<1467752375-25984-1-git-send-email-zhe.tao@intel.com>\n\t<1470023815-23108-1-git-send-email-jianfeng.tan@intel.com>",
        "Subject": "[dpdk-dev] [PATCH v4 1/3] mbuf: add Tx side tunneling type",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "To support tunneling packet offload capabilities on Tx side, PMDs\n(e.g., i40e) need to know what kind of tunneling type of this packet.\nInstead of analyzing the packet itself, we depend on applications to\ncorrectly set the tunneling type. These flags are defined inside\nrte_mbuf.ol_flags.\n\nSigned-off-by: Zhe Tao <zhe.tao@intel.com>\nSigned-off-by: Jianfeng Tan <jianfeng.tan@intel.com>\n---\n lib/librte_mbuf/rte_mbuf.c |  4 ++++\n lib/librte_mbuf/rte_mbuf.h | 17 ++++++++++++++++-\n 2 files changed, 20 insertions(+), 1 deletion(-)",
    "diff": "diff --git a/lib/librte_mbuf/rte_mbuf.c b/lib/librte_mbuf/rte_mbuf.c\nindex 4846b89..4505abb 100644\n--- a/lib/librte_mbuf/rte_mbuf.c\n+++ b/lib/librte_mbuf/rte_mbuf.c\n@@ -302,6 +302,10 @@ const char *rte_get_tx_ol_flag_name(uint64_t mask)\n \tcase PKT_TX_OUTER_IP_CKSUM: return \"PKT_TX_OUTER_IP_CKSUM\";\n \tcase PKT_TX_OUTER_IPV4: return \"PKT_TX_OUTER_IPV4\";\n \tcase PKT_TX_OUTER_IPV6: return \"PKT_TX_OUTER_IPV6\";\n+\tcase PKT_TX_TUNNEL_VXLAN: return \"PKT_TX_TUNNEL_VXLAN\";\n+\tcase PKT_TX_TUNNEL_GRE: return \"PKT_TX_TUNNEL_GRE\";\n+\tcase PKT_TX_TUNNEL_IPIP: return \"PKT_TX_TUNNEL_IPIP\";\n+\tcase PKT_TX_TUNNEL_GENEVE: return \"PKT_TX_TUNNEL_GENEVE\";\n \tdefault: return NULL;\n \t}\n }\ndiff --git a/lib/librte_mbuf/rte_mbuf.h b/lib/librte_mbuf/rte_mbuf.h\nindex 101485f..0eec112 100644\n--- a/lib/librte_mbuf/rte_mbuf.h\n+++ b/lib/librte_mbuf/rte_mbuf.h\n@@ -129,6 +129,18 @@ extern \"C\" {\n /* add new TX flags here */\n \n /**\n+ * Bits 45:48 used for the tunnel type.\n+ * When doing Tx offload like TSO or checksum, the HW needs to configure the\n+ * tunnel type into the HW descriptors.\n+ */\n+#define PKT_TX_TUNNEL_VXLAN   (0x1ULL << 45)\n+#define PKT_TX_TUNNEL_GRE     (0x2ULL << 45)\n+#define PKT_TX_TUNNEL_IPIP    (0x3ULL << 45)\n+#define PKT_TX_TUNNEL_GENEVE  (0x4ULL << 45)\n+/* add new TX TUNNEL type here */\n+#define PKT_TX_TUNNEL_MASK    (0xFULL << 45)\n+\n+/**\n  * Second VLAN insertion (QinQ) flag.\n  */\n #define PKT_TX_QINQ_PKT    (1ULL << 49)   /**< TX packet with double VLAN inserted. */\n@@ -863,7 +875,10 @@ struct rte_mbuf {\n \tunion {\n \t\tuint64_t tx_offload;       /**< combined for easy fetch */\n \t\tstruct {\n-\t\t\tuint64_t l2_len:7; /**< L2 (MAC) Header Length. */\n+\t\t\tuint64_t l2_len:7;\n+\t\t\t/**< L2 (MAC) Header Length for non-tunneling pkt.\n+\t\t\t * Outer_L4_len + ... + Inner_L2_len for tunneling pkt.\n+\t\t\t */\n \t\t\tuint64_t l3_len:9; /**< L3 (IP) Header Length. */\n \t\t\tuint64_t l4_len:8; /**< L4 (TCP/UDP) Header Length. */\n \t\t\tuint64_t tso_segsz:16; /**< TCP TSO segment size */\n",
    "prefixes": [
        "dpdk-dev",
        "v4",
        "1/3"
    ]
}