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GET /api/patches/14088/?format=api
{ "id": 14088, "url": "https://patches.dpdk.org/api/patches/14088/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/1466439037-14095-4-git-send-email-nelio.laranjeiro@6wind.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1466439037-14095-4-git-send-email-nelio.laranjeiro@6wind.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1466439037-14095-4-git-send-email-nelio.laranjeiro@6wind.com", "date": "2016-06-20T16:10:15", "name": "[dpdk-dev,v2,03/25] mlx5: remove Tx gather support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a2683a5f58736c49e93432c1bc797c39a43d8642", "submitter": { "id": 243, "url": "https://patches.dpdk.org/api/people/243/?format=api", "name": "Nélio Laranjeiro", "email": "nelio.laranjeiro@6wind.com" }, "delegate": { "id": 10, "url": "https://patches.dpdk.org/api/users/10/?format=api", "username": "bruce", "first_name": "Bruce", "last_name": "Richardson", "email": "bruce.richardson@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/1466439037-14095-4-git-send-email-nelio.laranjeiro@6wind.com/mbox/", "series": [], "comments": "https://patches.dpdk.org/api/patches/14088/comments/", "check": "pending", "checks": "https://patches.dpdk.org/api/patches/14088/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@dpdk.org", "Delivered-To": "patchwork@dpdk.org", "Received": [ "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 9C08CAD7B;\n\tMon, 20 Jun 2016 18:11:25 +0200 (CEST)", "from mail-wm0-f42.google.com (mail-wm0-f42.google.com\n\t[74.125.82.42]) by dpdk.org (Postfix) with ESMTP id 0D5B0AD86\n\tfor <dev@dpdk.org>; Mon, 20 Jun 2016 18:11:17 +0200 (CEST)", "by mail-wm0-f42.google.com with SMTP id r201so68837957wme.1\n\tfor <dev@dpdk.org>; Mon, 20 Jun 2016 09:11:17 -0700 (PDT)", "from ping.vm.6wind.com (guy78-3-82-239-227-177.fbx.proxad.net.\n\t[82.239.227.177]) by smtp.gmail.com with ESMTPSA id\n\tf189sm4543977wmf.19.2016.06.20.09.11.12\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128);\n\tMon, 20 Jun 2016 09:11:12 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=6wind-com.20150623.gappssmtp.com; s=20150623;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:in-reply-to:references;\n\tbh=IicKrIiqQOY/BxFY+KGwuMqlj78qfFzMZ3C36+2TVCA=;\n\tb=oO/C9oSC7erglegaiXmp8ekvE7qlRfukzFI1vpJuaXyLt61qz5tWdFlXOrlTbyfe4T\n\tFiIgDLaRHxYTtzgb5lVrLlwyqiCYPDo33ynIegtNSFHK3NXzeSNtoH+Le2tPogkh1rtZ\n\tyyqivnlXuMhT217wmyP/3OLdCmar/S39SV475dRlFQoCvfbH1rDEUdFz0UcsROFjbUUH\n\ttQJwidcnCTEP4JU0aHR/GXzV6vkmWtf3F2wbf4Tk9RRUfDCBv09yz7iTQIhc9BFMShvw\n\t3OG7Am2Pf2Pyvq5Xnb310qTMZltgjxXUIS9mSCoE2IbXcO7caCV2bGtsxK/qJLNPBYtC\n\tSTWQ==", "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20130820;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:in-reply-to:references;\n\tbh=IicKrIiqQOY/BxFY+KGwuMqlj78qfFzMZ3C36+2TVCA=;\n\tb=YjUrxDkN76DnYhaJt6vvY+7W+Iu66vaIfE3Scg12v+LOyHNFZLALbNnavirSc0oMpZ\n\t4wkukM0FnY6SMOY90FqZKBJCIrgB6jOfXrNRiESRoboaZPr15WQIyNZxAGFJaNFbLRPG\n\tS07Ah61f+scl4NbEZZZLXWtB3y328743tg+0P/9X5po/m/xIrLT4VOOTdM2FrRzDhtBR\n\tXwS21t+/z+nXUuJcRbV7h07FglRQkhwhB/LAlwtxIh2e/EONQA/hjFS/pj7YsuA/x9Ln\n\txB+BgR0frtRlcL7nXaIwoyQOG8t9Q1rXrTLTDF6lRCwewnjewwW4swJaXAf9EgbYsuwR\n\tPN0Q==", "X-Gm-Message-State": "ALyK8tJvYZtFhHhypXAFPj4ekmebks+nESGlRxnZCQUrTGZdxc2Oh18fUrehaqXWR7aSDtY+", "X-Received": "by 10.194.96.208 with SMTP id du16mr17540002wjb.0.1466439075273; \n\tMon, 20 Jun 2016 09:11:15 -0700 (PDT)", "From": "Nelio Laranjeiro <nelio.laranjeiro@6wind.com>", "To": "dev@dpdk.org", "Cc": "Ferruh Yigit <ferruh.yigit@intel.com>,\n\tAdrien Mazarguil <adrien.mazarguil@6wind.com>", "Date": "Mon, 20 Jun 2016 18:10:15 +0200", "Message-Id": "<1466439037-14095-4-git-send-email-nelio.laranjeiro@6wind.com>", "X-Mailer": "git-send-email 2.1.4", "In-Reply-To": [ "<1466439037-14095-1-git-send-email-nelio.laranjeiro@6wind.com>", "<1465379291-25310-1-git-send-email-nelio.laranjeiro@6wind.com>" ], "References": [ "<1465379291-25310-1-git-send-email-nelio.laranjeiro@6wind.com>\n\t<1466439037-14095-1-git-send-email-nelio.laranjeiro@6wind.com>", "<1465379291-25310-1-git-send-email-nelio.laranjeiro@6wind.com>" ], "Subject": "[dpdk-dev] [PATCH v2 03/25] mlx5: remove Tx gather support", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.15", "Precedence": "list", "List-Id": "patches and discussions about DPDK <dev.dpdk.org>", "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://dpdk.org/ml/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "This is done in preparation of bypassing Verbs entirely for the data path\nas a performance improvement. TX gather cannot be maintained during the\ntransition and will be reimplemented later.\n\nSigned-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>\nSigned-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>\n---\n drivers/net/mlx5/mlx5_ethdev.c | 2 +-\n drivers/net/mlx5/mlx5_rxtx.c | 315 ++++++++---------------------------------\n drivers/net/mlx5/mlx5_rxtx.h | 17 ---\n drivers/net/mlx5/mlx5_txq.c | 49 ++-----\n 4 files changed, 69 insertions(+), 314 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_ethdev.c b/drivers/net/mlx5/mlx5_ethdev.c\nindex 0a881b6..280a90a 100644\n--- a/drivers/net/mlx5/mlx5_ethdev.c\n+++ b/drivers/net/mlx5/mlx5_ethdev.c\n@@ -1260,7 +1260,7 @@ mlx5_secondary_data_setup(struct priv *priv)\n \t\tif (txq != NULL) {\n \t\t\tif (txq_setup(priv->dev,\n \t\t\t\t txq,\n-\t\t\t\t primary_txq->elts_n * MLX5_PMD_SGE_WR_N,\n+\t\t\t\t primary_txq->elts_n,\n \t\t\t\t primary_txq->socket,\n \t\t\t\t NULL) == 0) {\n \t\t\t\ttxq->stats.idx = primary_txq->stats.idx;\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.c b/drivers/net/mlx5/mlx5_rxtx.c\nindex aeeddfb..4d90631 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.c\n+++ b/drivers/net/mlx5/mlx5_rxtx.c\n@@ -228,156 +228,6 @@ insert_vlan_sw(struct rte_mbuf *buf)\n \treturn 0;\n }\n \n-#if MLX5_PMD_SGE_WR_N > 1\n-\n-/**\n- * Copy scattered mbuf contents to a single linear buffer.\n- *\n- * @param[out] linear\n- * Linear output buffer.\n- * @param[in] buf\n- * Scattered input buffer.\n- *\n- * @return\n- * Number of bytes copied to the output buffer or 0 if not large enough.\n- */\n-static unsigned int\n-linearize_mbuf(linear_t *linear, struct rte_mbuf *buf)\n-{\n-\tunsigned int size = 0;\n-\tunsigned int offset;\n-\n-\tdo {\n-\t\tunsigned int len = DATA_LEN(buf);\n-\n-\t\toffset = size;\n-\t\tsize += len;\n-\t\tif (unlikely(size > sizeof(*linear)))\n-\t\t\treturn 0;\n-\t\tmemcpy(&(*linear)[offset],\n-\t\t rte_pktmbuf_mtod(buf, uint8_t *),\n-\t\t len);\n-\t\tbuf = NEXT(buf);\n-\t} while (buf != NULL);\n-\treturn size;\n-}\n-\n-/**\n- * Handle scattered buffers for mlx5_tx_burst().\n- *\n- * @param txq\n- * TX queue structure.\n- * @param segs\n- * Number of segments in buf.\n- * @param elt\n- * TX queue element to fill.\n- * @param[in] buf\n- * Buffer to process.\n- * @param elts_head\n- * Index of the linear buffer to use if necessary (normally txq->elts_head).\n- * @param[out] sges\n- * Array filled with SGEs on success.\n- *\n- * @return\n- * A structure containing the processed packet size in bytes and the\n- * number of SGEs. Both fields are set to (unsigned int)-1 in case of\n- * failure.\n- */\n-static struct tx_burst_sg_ret {\n-\tunsigned int length;\n-\tunsigned int num;\n-}\n-tx_burst_sg(struct txq *txq, unsigned int segs, struct txq_elt *elt,\n-\t struct rte_mbuf *buf, unsigned int elts_head,\n-\t struct ibv_sge (*sges)[MLX5_PMD_SGE_WR_N])\n-{\n-\tunsigned int sent_size = 0;\n-\tunsigned int j;\n-\tint linearize = 0;\n-\n-\t/* When there are too many segments, extra segments are\n-\t * linearized in the last SGE. */\n-\tif (unlikely(segs > RTE_DIM(*sges))) {\n-\t\tsegs = (RTE_DIM(*sges) - 1);\n-\t\tlinearize = 1;\n-\t}\n-\t/* Update element. */\n-\telt->buf = buf;\n-\t/* Register segments as SGEs. */\n-\tfor (j = 0; (j != segs); ++j) {\n-\t\tstruct ibv_sge *sge = &(*sges)[j];\n-\t\tuint32_t lkey;\n-\n-\t\t/* Retrieve Memory Region key for this memory pool. */\n-\t\tlkey = txq_mp2mr(txq, txq_mb2mp(buf));\n-\t\tif (unlikely(lkey == (uint32_t)-1)) {\n-\t\t\t/* MR does not exist. */\n-\t\t\tDEBUG(\"%p: unable to get MP <-> MR association\",\n-\t\t\t (void *)txq);\n-\t\t\t/* Clean up TX element. */\n-\t\t\telt->buf = NULL;\n-\t\t\tgoto stop;\n-\t\t}\n-\t\t/* Update SGE. */\n-\t\tsge->addr = rte_pktmbuf_mtod(buf, uintptr_t);\n-\t\tif (txq->priv->sriov)\n-\t\t\trte_prefetch0((volatile void *)\n-\t\t\t\t (uintptr_t)sge->addr);\n-\t\tsge->length = DATA_LEN(buf);\n-\t\tsge->lkey = lkey;\n-\t\tsent_size += sge->length;\n-\t\tbuf = NEXT(buf);\n-\t}\n-\t/* If buf is not NULL here and is not going to be linearized,\n-\t * nb_segs is not valid. */\n-\tassert(j == segs);\n-\tassert((buf == NULL) || (linearize));\n-\t/* Linearize extra segments. */\n-\tif (linearize) {\n-\t\tstruct ibv_sge *sge = &(*sges)[segs];\n-\t\tlinear_t *linear = &(*txq->elts_linear)[elts_head];\n-\t\tunsigned int size = linearize_mbuf(linear, buf);\n-\n-\t\tassert(segs == (RTE_DIM(*sges) - 1));\n-\t\tif (size == 0) {\n-\t\t\t/* Invalid packet. */\n-\t\t\tDEBUG(\"%p: packet too large to be linearized.\",\n-\t\t\t (void *)txq);\n-\t\t\t/* Clean up TX element. */\n-\t\t\telt->buf = NULL;\n-\t\t\tgoto stop;\n-\t\t}\n-\t\t/* If MLX5_PMD_SGE_WR_N is 1, free mbuf immediately. */\n-\t\tif (RTE_DIM(*sges) == 1) {\n-\t\t\tdo {\n-\t\t\t\tstruct rte_mbuf *next = NEXT(buf);\n-\n-\t\t\t\trte_pktmbuf_free_seg(buf);\n-\t\t\t\tbuf = next;\n-\t\t\t} while (buf != NULL);\n-\t\t\telt->buf = NULL;\n-\t\t}\n-\t\t/* Update SGE. */\n-\t\tsge->addr = (uintptr_t)&(*linear)[0];\n-\t\tsge->length = size;\n-\t\tsge->lkey = txq->mr_linear->lkey;\n-\t\tsent_size += size;\n-\t\t/* Include last segment. */\n-\t\tsegs++;\n-\t}\n-\treturn (struct tx_burst_sg_ret){\n-\t\t.length = sent_size,\n-\t\t.num = segs,\n-\t};\n-stop:\n-\treturn (struct tx_burst_sg_ret){\n-\t\t.length = -1,\n-\t\t.num = -1,\n-\t};\n-}\n-\n-#endif /* MLX5_PMD_SGE_WR_N > 1 */\n-\n /**\n * DPDK callback for TX.\n *\n@@ -424,14 +274,14 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\tunsigned int elts_head_next =\n \t\t\t(((elts_head + 1) == elts_n) ? 0 : elts_head + 1);\n \t\tstruct txq_elt *elt = &(*txq->elts)[elts_head];\n-\t\tunsigned int segs = NB_SEGS(buf);\n-#ifdef MLX5_PMD_SOFT_COUNTERS\n-\t\tunsigned int sent_size = 0;\n-#endif\n \t\tuint32_t send_flags = 0;\n #ifdef HAVE_VERBS_VLAN_INSERTION\n \t\tint insert_vlan = 0;\n #endif /* HAVE_VERBS_VLAN_INSERTION */\n+\t\tuintptr_t addr;\n+\t\tuint32_t length;\n+\t\tuint32_t lkey;\n+\t\tuintptr_t buf_next_addr;\n \n \t\tif (i + 1 < max)\n \t\t\trte_prefetch0(buf_next);\n@@ -464,126 +314,81 @@ mlx5_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\t\t\t\tgoto stop;\n \t\t\t}\n \t\t}\n-\t\tif (likely(segs == 1)) {\n-\t\t\tuintptr_t addr;\n-\t\t\tuint32_t length;\n-\t\t\tuint32_t lkey;\n-\t\t\tuintptr_t buf_next_addr;\n-\n-\t\t\t/* Retrieve buffer information. */\n-\t\t\taddr = rte_pktmbuf_mtod(buf, uintptr_t);\n-\t\t\tlength = DATA_LEN(buf);\n-\t\t\t/* Update element. */\n-\t\t\telt->buf = buf;\n-\t\t\tif (txq->priv->sriov)\n-\t\t\t\trte_prefetch0((volatile void *)\n-\t\t\t\t\t (uintptr_t)addr);\n-\t\t\t/* Prefetch next buffer data. */\n-\t\t\tif (i + 1 < max) {\n-\t\t\t\tbuf_next_addr =\n-\t\t\t\t\trte_pktmbuf_mtod(buf_next, uintptr_t);\n-\t\t\t\trte_prefetch0((volatile void *)\n-\t\t\t\t\t (uintptr_t)buf_next_addr);\n-\t\t\t}\n-\t\t\t/* Put packet into send queue. */\n+\t\t/* Retrieve buffer information. */\n+\t\taddr = rte_pktmbuf_mtod(buf, uintptr_t);\n+\t\tlength = DATA_LEN(buf);\n+\t\t/* Update element. */\n+\t\telt->buf = buf;\n+\t\tif (txq->priv->sriov)\n+\t\t\trte_prefetch0((volatile void *)\n+\t\t\t\t (uintptr_t)addr);\n+\t\t/* Prefetch next buffer data. */\n+\t\tif (i + 1 < max) {\n+\t\t\tbuf_next_addr =\n+\t\t\t\trte_pktmbuf_mtod(buf_next, uintptr_t);\n+\t\t\trte_prefetch0((volatile void *)\n+\t\t\t\t (uintptr_t)buf_next_addr);\n+\t\t}\n+\t\t/* Put packet into send queue. */\n #if MLX5_PMD_MAX_INLINE > 0\n-\t\t\tif (length <= txq->max_inline) {\n+\t\tif (length <= txq->max_inline) {\n #ifdef HAVE_VERBS_VLAN_INSERTION\n-\t\t\t\tif (insert_vlan)\n-\t\t\t\t\terr = txq->send_pending_inline_vlan\n-\t\t\t\t\t\t(txq->qp,\n-\t\t\t\t\t\t (void *)addr,\n-\t\t\t\t\t\t length,\n-\t\t\t\t\t\t send_flags,\n-\t\t\t\t\t\t &buf->vlan_tci);\n-\t\t\t\telse\n-#endif /* HAVE_VERBS_VLAN_INSERTION */\n-\t\t\t\t\terr = txq->send_pending_inline\n-\t\t\t\t\t\t(txq->qp,\n-\t\t\t\t\t\t (void *)addr,\n-\t\t\t\t\t\t length,\n-\t\t\t\t\t\t send_flags);\n-\t\t\t} else\n-#endif\n-\t\t\t{\n-\t\t\t\t/* Retrieve Memory Region key for this\n-\t\t\t\t * memory pool. */\n-\t\t\t\tlkey = txq_mp2mr(txq, txq_mb2mp(buf));\n-\t\t\t\tif (unlikely(lkey == (uint32_t)-1)) {\n-\t\t\t\t\t/* MR does not exist. */\n-\t\t\t\t\tDEBUG(\"%p: unable to get MP <-> MR\"\n-\t\t\t\t\t \" association\", (void *)txq);\n-\t\t\t\t\t/* Clean up TX element. */\n-\t\t\t\t\telt->buf = NULL;\n-\t\t\t\t\tgoto stop;\n-\t\t\t\t}\n-#ifdef HAVE_VERBS_VLAN_INSERTION\n-\t\t\t\tif (insert_vlan)\n-\t\t\t\t\terr = txq->send_pending_vlan\n-\t\t\t\t\t\t(txq->qp,\n-\t\t\t\t\t\t addr,\n-\t\t\t\t\t\t length,\n-\t\t\t\t\t\t lkey,\n-\t\t\t\t\t\t send_flags,\n-\t\t\t\t\t\t &buf->vlan_tci);\n-\t\t\t\telse\n+\t\t\tif (insert_vlan)\n+\t\t\t\terr = txq->send_pending_inline_vlan\n+\t\t\t\t\t(txq->qp,\n+\t\t\t\t\t (void *)addr,\n+\t\t\t\t\t length,\n+\t\t\t\t\t send_flags,\n+\t\t\t\t\t &buf->vlan_tci);\n+\t\t\telse\n #endif /* HAVE_VERBS_VLAN_INSERTION */\n-\t\t\t\t\terr = txq->send_pending\n-\t\t\t\t\t\t(txq->qp,\n-\t\t\t\t\t\t addr,\n-\t\t\t\t\t\t length,\n-\t\t\t\t\t\t lkey,\n-\t\t\t\t\t\t send_flags);\n-\t\t\t}\n-\t\t\tif (unlikely(err))\n-\t\t\t\tgoto stop;\n-#ifdef MLX5_PMD_SOFT_COUNTERS\n-\t\t\tsent_size += length;\n+\t\t\t\terr = txq->send_pending_inline\n+\t\t\t\t\t(txq->qp,\n+\t\t\t\t\t (void *)addr,\n+\t\t\t\t\t length,\n+\t\t\t\t\t send_flags);\n+\t\t} else\n #endif\n-\t\t} else {\n-#if MLX5_PMD_SGE_WR_N > 1\n-\t\t\tstruct ibv_sge sges[MLX5_PMD_SGE_WR_N];\n-\t\t\tstruct tx_burst_sg_ret ret;\n-\n-\t\t\tret = tx_burst_sg(txq, segs, elt, buf, elts_head,\n-\t\t\t\t\t &sges);\n-\t\t\tif (ret.length == (unsigned int)-1)\n+\t\t{\n+\t\t\t/* Retrieve Memory Region key for this\n+\t\t\t * memory pool. */\n+\t\t\tlkey = txq_mp2mr(txq, txq_mb2mp(buf));\n+\t\t\tif (unlikely(lkey == (uint32_t)-1)) {\n+\t\t\t\t/* MR does not exist. */\n+\t\t\t\tDEBUG(\"%p: unable to get MP <-> MR\"\n+\t\t\t\t \" association\", (void *)txq);\n+\t\t\t\t/* Clean up TX element. */\n+\t\t\t\telt->buf = NULL;\n \t\t\t\tgoto stop;\n-\t\t\t/* Put SG list into send queue. */\n+\t\t\t}\n #ifdef HAVE_VERBS_VLAN_INSERTION\n \t\t\tif (insert_vlan)\n-\t\t\t\terr = txq->send_pending_sg_list_vlan\n+\t\t\t\terr = txq->send_pending_vlan\n \t\t\t\t\t(txq->qp,\n-\t\t\t\t\t sges,\n-\t\t\t\t\t ret.num,\n+\t\t\t\t\t addr,\n+\t\t\t\t\t length,\n+\t\t\t\t\t lkey,\n \t\t\t\t\t send_flags,\n \t\t\t\t\t &buf->vlan_tci);\n \t\t\telse\n #endif /* HAVE_VERBS_VLAN_INSERTION */\n-\t\t\t\terr = txq->send_pending_sg_list\n+\t\t\t\terr = txq->send_pending\n \t\t\t\t\t(txq->qp,\n-\t\t\t\t\t sges,\n-\t\t\t\t\t ret.num,\n+\t\t\t\t\t addr,\n+\t\t\t\t\t length,\n+\t\t\t\t\t lkey,\n \t\t\t\t\t send_flags);\n-\t\t\tif (unlikely(err))\n-\t\t\t\tgoto stop;\n-#ifdef MLX5_PMD_SOFT_COUNTERS\n-\t\t\tsent_size += ret.length;\n-#endif\n-#else /* MLX5_PMD_SGE_WR_N > 1 */\n-\t\t\tDEBUG(\"%p: TX scattered buffers support not\"\n-\t\t\t \" compiled in\", (void *)txq);\n-\t\t\tgoto stop;\n-#endif /* MLX5_PMD_SGE_WR_N > 1 */\n \t\t}\n-\t\telts_head = elts_head_next;\n-\t\tbuf = buf_next;\n+\t\tif (unlikely(err))\n+\t\t\tgoto stop;\n #ifdef MLX5_PMD_SOFT_COUNTERS\n \t\t/* Increment sent bytes counter. */\n-\t\ttxq->stats.obytes += sent_size;\n+\t\ttxq->stats.obytes += length;\n #endif\n-\t}\n stop:\n+\t\telts_head = elts_head_next;\n+\t\tbuf = buf_next;\n+\t}\n \t/* Take a shortcut if nothing must be sent. */\n \tif (unlikely(i == 0))\n \t\treturn 0;\ndiff --git a/drivers/net/mlx5/mlx5_rxtx.h b/drivers/net/mlx5/mlx5_rxtx.h\nindex 462eddf..8358ccb 100644\n--- a/drivers/net/mlx5/mlx5_rxtx.h\n+++ b/drivers/net/mlx5/mlx5_rxtx.h\n@@ -242,14 +242,6 @@ struct txq_elt {\n \tstruct rte_mbuf *buf;\n };\n \n-/* Linear buffer type. It is used when transmitting buffers with too many\n- * segments that do not fit the hardware queue (see max_send_sge).\n- * Extra segments are copied (linearized) in such buffers, replacing the\n- * last SGE during TX.\n- * The size is arbitrary but large enough to hold a jumbo frame with\n- * 8 segments considering mbuf.buf_len is about 2048 bytes. */\n-typedef uint8_t linear_t[16384];\n-\n /* TX queue descriptor. */\n struct txq {\n \tstruct priv *priv; /* Back pointer to private data. */\n@@ -264,12 +256,6 @@ struct txq {\n \tint (*send_pending_inline_vlan)();\n #endif\n #endif\n-#if MLX5_PMD_SGE_WR_N > 1\n-\tint (*send_pending_sg_list)();\n-#ifdef HAVE_VERBS_VLAN_INSERTION\n-\tint (*send_pending_sg_list_vlan)();\n-#endif\n-#endif\n \tint (*send_flush)(struct ibv_qp *qp);\n \tstruct ibv_cq *cq; /* Completion Queue. */\n \tstruct ibv_qp *qp; /* Queue Pair. */\n@@ -289,9 +275,6 @@ struct txq {\n \t\tuint32_t lkey; /* mr->lkey */\n \t} mp2mr[MLX5_PMD_TX_MP_CACHE]; /* MP to MR translation table. */\n \tstruct mlx5_txq_stats stats; /* TX queue counters. */\n-\t/* Elements used only for init part are here. */\n-\tlinear_t (*elts_linear)[]; /* Linearized buffers. */\n-\tstruct ibv_mr *mr_linear; /* Memory Region for linearized buffers. */\n #ifdef HAVE_VERBS_VLAN_INSERTION\n \tstruct ibv_exp_qp_burst_family_v1 *if_qp; /* QP burst interface. */\n #else\ndiff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c\nindex e20df21..5a248c9 100644\n--- a/drivers/net/mlx5/mlx5_txq.c\n+++ b/drivers/net/mlx5/mlx5_txq.c\n@@ -82,26 +82,13 @@ txq_alloc_elts(struct txq *txq, unsigned int elts_n)\n \tunsigned int i;\n \tstruct txq_elt (*elts)[elts_n] =\n \t\trte_calloc_socket(\"TXQ\", 1, sizeof(*elts), 0, txq->socket);\n-\tlinear_t (*elts_linear)[elts_n] =\n-\t\trte_calloc_socket(\"TXQ\", 1, sizeof(*elts_linear), 0,\n-\t\t\t\t txq->socket);\n-\tstruct ibv_mr *mr_linear = NULL;\n \tint ret = 0;\n \n-\tif ((elts == NULL) || (elts_linear == NULL)) {\n+\tif (elts == NULL) {\n \t\tERROR(\"%p: can't allocate packets array\", (void *)txq);\n \t\tret = ENOMEM;\n \t\tgoto error;\n \t}\n-\tmr_linear =\n-\t\tibv_reg_mr(txq->priv->pd, elts_linear, sizeof(*elts_linear),\n-\t\t\t IBV_ACCESS_LOCAL_WRITE);\n-\tif (mr_linear == NULL) {\n-\t\tERROR(\"%p: unable to configure MR, ibv_reg_mr() failed\",\n-\t\t (void *)txq);\n-\t\tret = EINVAL;\n-\t\tgoto error;\n-\t}\n \tfor (i = 0; (i != elts_n); ++i) {\n \t\tstruct txq_elt *elt = &(*elts)[i];\n \n@@ -119,15 +106,9 @@ txq_alloc_elts(struct txq *txq, unsigned int elts_n)\n \t\t((MLX5_PMD_TX_PER_COMP_REQ < (elts_n / 4)) ?\n \t\t MLX5_PMD_TX_PER_COMP_REQ : (elts_n / 4));\n \ttxq->elts_comp_cd = txq->elts_comp_cd_init;\n-\ttxq->elts_linear = elts_linear;\n-\ttxq->mr_linear = mr_linear;\n \tassert(ret == 0);\n \treturn 0;\n error:\n-\tif (mr_linear != NULL)\n-\t\tclaim_zero(ibv_dereg_mr(mr_linear));\n-\n-\trte_free(elts_linear);\n \trte_free(elts);\n \n \tDEBUG(\"%p: failed, freed everything\", (void *)txq);\n@@ -148,8 +129,6 @@ txq_free_elts(struct txq *txq)\n \tunsigned int elts_head = txq->elts_head;\n \tunsigned int elts_tail = txq->elts_tail;\n \tstruct txq_elt (*elts)[elts_n] = txq->elts;\n-\tlinear_t (*elts_linear)[elts_n] = txq->elts_linear;\n-\tstruct ibv_mr *mr_linear = txq->mr_linear;\n \n \tDEBUG(\"%p: freeing WRs\", (void *)txq);\n \ttxq->elts_n = 0;\n@@ -159,12 +138,7 @@ txq_free_elts(struct txq *txq)\n \ttxq->elts_comp_cd = 0;\n \ttxq->elts_comp_cd_init = 0;\n \ttxq->elts = NULL;\n-\ttxq->elts_linear = NULL;\n-\ttxq->mr_linear = NULL;\n-\tif (mr_linear != NULL)\n-\t\tclaim_zero(ibv_dereg_mr(mr_linear));\n \n-\trte_free(elts_linear);\n \tif (elts == NULL)\n \t\treturn;\n \twhile (elts_tail != elts_head) {\n@@ -286,12 +260,14 @@ txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,\n \tint ret = 0;\n \n \t(void)conf; /* Thresholds configuration (ignored). */\n-\tif ((desc == 0) || (desc % MLX5_PMD_SGE_WR_N)) {\n-\t\tERROR(\"%p: invalid number of TX descriptors (must be a\"\n-\t\t \" multiple of %d)\", (void *)dev, MLX5_PMD_SGE_WR_N);\n+\tif (desc == 0) {\n+\t\tERROR(\"%p: invalid number of TX descriptors\", (void *)dev);\n+\t\treturn EINVAL;\n+\t}\n+\tif (MLX5_PMD_SGE_WR_N > 1) {\n+\t\tERROR(\"%p: TX gather is not supported\", (void *)dev);\n \t\treturn EINVAL;\n \t}\n-\tdesc /= MLX5_PMD_SGE_WR_N;\n \t/* MRs will be registered in mp2mr[] later. */\n \tattr.rd = (struct ibv_exp_res_domain_init_attr){\n \t\t.comp_mask = (IBV_EXP_RES_DOMAIN_THREAD_MODEL |\n@@ -332,10 +308,7 @@ txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,\n \t\t\t\t\tpriv->device_attr.max_qp_wr :\n \t\t\t\t\tdesc),\n \t\t\t/* Max number of scatter/gather elements in a WR. */\n-\t\t\t.max_send_sge = ((priv->device_attr.max_sge <\n-\t\t\t\t\t MLX5_PMD_SGE_WR_N) ?\n-\t\t\t\t\t priv->device_attr.max_sge :\n-\t\t\t\t\t MLX5_PMD_SGE_WR_N),\n+\t\t\t.max_send_sge = 1,\n #if MLX5_PMD_MAX_INLINE > 0\n \t\t\t.max_inline_data = MLX5_PMD_MAX_INLINE,\n #endif\n@@ -440,12 +413,6 @@ txq_setup(struct rte_eth_dev *dev, struct txq *txq, uint16_t desc,\n \ttxq->send_pending_inline_vlan = txq->if_qp->send_pending_inline_vlan;\n #endif\n #endif\n-#if MLX5_PMD_SGE_WR_N > 1\n-\ttxq->send_pending_sg_list = txq->if_qp->send_pending_sg_list;\n-#ifdef HAVE_VERBS_VLAN_INSERTION\n-\ttxq->send_pending_sg_list_vlan = txq->if_qp->send_pending_sg_list_vlan;\n-#endif\n-#endif\n \ttxq->send_pending = txq->if_qp->send_pending;\n #ifdef HAVE_VERBS_VLAN_INSERTION\n \ttxq->send_pending_vlan = txq->if_qp->send_pending_vlan;\n", "prefixes": [ "dpdk-dev", "v2", "03/25" ] }