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GET /api/patches/139755/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 139755,
    "url": "https://patches.dpdk.org/api/patches/139755/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20240430202144.49899-7-andrew.boyer@amd.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20240430202144.49899-7-andrew.boyer@amd.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20240430202144.49899-7-andrew.boyer@amd.com",
    "date": "2024-04-30T20:21:41",
    "name": "[v2,6/9] crypto/ionic: add session support",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "814c3b83852b052b2883d1c85ce54b931d9cb702",
    "submitter": {
        "id": 2861,
        "url": "https://patches.dpdk.org/api/people/2861/?format=api",
        "name": "Andrew Boyer",
        "email": "Andrew.Boyer@amd.com"
    },
    "delegate": {
        "id": 6690,
        "url": "https://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20240430202144.49899-7-andrew.boyer@amd.com/mbox/",
    "series": [
        {
            "id": 31850,
            "url": "https://patches.dpdk.org/api/series/31850/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=31850",
            "date": "2024-04-30T20:21:35",
            "name": "crypto/ionic: introduce AMD Pensando ionic crypto driver",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/31850/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/139755/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/139755/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Andrew Boyer <andrew.boyer@amd.com>",
        "To": "<dev@dpdk.org>",
        "CC": "Andrew Boyer <andrew.boyer@amd.com>",
        "Subject": "[PATCH v2 6/9] crypto/ionic: add session support",
        "Date": "Tue, 30 Apr 2024 13:21:41 -0700",
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    "content": "This defines the session object and related commands.\n\nSigned-off-by: Andrew Boyer <andrew.boyer@amd.com>\n---\n drivers/crypto/ionic/ionic_crypto.h      |  33 ++++++\n drivers/crypto/ionic/ionic_crypto_main.c | 143 +++++++++++++++++++++++\n drivers/crypto/ionic/ionic_crypto_ops.c  | 123 +++++++++++++++++++\n 3 files changed, 299 insertions(+)",
    "diff": "diff --git a/drivers/crypto/ionic/ionic_crypto.h b/drivers/crypto/ionic/ionic_crypto.h\nindex f487768c10..f50c4b4291 100644\n--- a/drivers/crypto/ionic/ionic_crypto.h\n+++ b/drivers/crypto/ionic/ionic_crypto.h\n@@ -14,6 +14,7 @@\n #include <rte_cryptodev.h>\n #include <cryptodev_pmd.h>\n #include <rte_log.h>\n+#include <rte_bitmap.h>\n \n #include \"ionic_common.h\"\n #include \"ionic_crypto_if.h\"\n@@ -154,6 +155,32 @@ struct iocpt_admin_q {\n \tuint16_t flags;\n };\n \n+#define IOCPT_S_F_INITED\tBIT(0)\n+\n+struct iocpt_session_priv {\n+\tstruct iocpt_dev *dev;\n+\n+\tuint32_t index;\n+\n+\tuint16_t iv_offset;\n+\tuint16_t iv_length;\n+\tuint16_t digest_length;\n+\tuint16_t aad_length;\n+\n+\tuint8_t flags;\n+\tuint8_t op;\n+\tuint8_t type;\n+\n+\tuint16_t key_len;\n+\tuint8_t key[IOCPT_SESS_KEY_LEN_MAX_SYMM];\n+};\n+\n+static inline uint32_t\n+iocpt_session_size(void)\n+{\n+\treturn sizeof(struct iocpt_session_priv);\n+}\n+\n #define IOCPT_DEV_F_INITED\t\tBIT(0)\n #define IOCPT_DEV_F_UP\t\t\tBIT(1)\n #define IOCPT_DEV_F_FW_RESET\t\tBIT(2)\n@@ -186,6 +213,8 @@ struct iocpt_dev {\n \n \tstruct iocpt_admin_q *adminq;\n \n+\tstruct rte_bitmap  *sess_bm;\t/* SET bit indicates index is free */\n+\n \tuint64_t features;\n \tuint32_t hw_features;\n \n@@ -239,6 +268,10 @@ void iocpt_dev_reset(struct iocpt_dev *dev);\n \n int iocpt_adminq_post_wait(struct iocpt_dev *dev, struct iocpt_admin_ctx *ctx);\n \n+int iocpt_session_init(struct iocpt_session_priv *priv);\n+int iocpt_session_update(struct iocpt_session_priv *priv);\n+void iocpt_session_deinit(struct iocpt_session_priv *priv);\n+\n struct ionic_doorbell __iomem *iocpt_db_map(struct iocpt_dev *dev,\n \tstruct iocpt_queue *q);\n \ndiff --git a/drivers/crypto/ionic/ionic_crypto_main.c b/drivers/crypto/ionic/ionic_crypto_main.c\nindex 3ff2d51950..cc893ad8e9 100644\n--- a/drivers/crypto/ionic/ionic_crypto_main.c\n+++ b/drivers/crypto/ionic/ionic_crypto_main.c\n@@ -112,6 +112,116 @@ iocpt_q_free(struct iocpt_queue *q)\n \t}\n }\n \n+static int\n+iocpt_session_write(struct iocpt_session_priv *priv,\n+\t\tenum iocpt_sess_control_oper oper)\n+{\n+\tstruct iocpt_dev *dev = priv->dev;\n+\tstruct iocpt_admin_ctx ctx = {\n+\t\t.pending_work = true,\n+\t\t.cmd.sess_control = {\n+\t\t\t.opcode = IOCPT_CMD_SESS_CONTROL,\n+\t\t\t.type = priv->type,\n+\t\t\t.oper = oper,\n+\t\t\t.index = rte_cpu_to_le_32(priv->index),\n+\t\t\t.key_len = rte_cpu_to_le_16(priv->key_len),\n+\t\t\t.key_seg_len = (uint8_t)RTE_MIN(priv->key_len,\n+\t\t\t\t\t\tIOCPT_SESS_KEY_SEG_LEN),\n+\t\t},\n+\t};\n+\tstruct iocpt_sess_control_cmd *cmd = &ctx.cmd.sess_control;\n+\tuint16_t key_offset;\n+\tuint8_t key_segs, seg;\n+\tint err;\n+\n+\tkey_segs = ((priv->key_len - 1) >> IOCPT_SESS_KEY_SEG_SHFT) + 1;\n+\n+\tfor (seg = 0; seg < key_segs; seg++) {\n+\t\tctx.pending_work = true;\n+\n+\t\tkey_offset = seg * cmd->key_seg_len;\n+\t\tmemcpy(cmd->key, &priv->key[key_offset],\n+\t\t\tIOCPT_SESS_KEY_SEG_LEN);\n+\t\tcmd->key_seg_idx = seg;\n+\n+\t\t/* Mark final segment */\n+\t\tif (seg + 1 == key_segs)\n+\t\t\tcmd->flags |= rte_cpu_to_le_16(IOCPT_SCTL_F_END);\n+\n+\t\terr = iocpt_adminq_post_wait(dev, &ctx);\n+\t\tif (err != 0)\n+\t\t\treturn err;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+int\n+iocpt_session_init(struct iocpt_session_priv *priv)\n+{\n+\tstruct iocpt_dev *dev = priv->dev;\n+\tuint64_t bm_slab = 0;\n+\tuint32_t bm_pos = 0;\n+\tint err = 0;\n+\n+\trte_spinlock_lock(&dev->adminq_lock);\n+\n+\tif (rte_bitmap_scan(dev->sess_bm, &bm_pos, &bm_slab) > 0) {\n+\t\tpriv->index = bm_pos + rte_ctz64(bm_slab);\n+\t\trte_bitmap_clear(dev->sess_bm, priv->index);\n+\t} else\n+\t\terr = -ENOSPC;\n+\n+\trte_spinlock_unlock(&dev->adminq_lock);\n+\n+\tif (err != 0) {\n+\t\tIOCPT_PRINT(ERR, \"session index space exhausted\");\n+\t\treturn err;\n+\t}\n+\n+\terr = iocpt_session_write(priv, IOCPT_SESS_INIT);\n+\tif (err != 0) {\n+\t\trte_spinlock_lock(&dev->adminq_lock);\n+\t\trte_bitmap_set(dev->sess_bm, priv->index);\n+\t\trte_spinlock_unlock(&dev->adminq_lock);\n+\t\treturn err;\n+\t}\n+\n+\tpriv->flags |= IOCPT_S_F_INITED;\n+\n+\treturn 0;\n+}\n+\n+int\n+iocpt_session_update(struct iocpt_session_priv *priv)\n+{\n+\treturn iocpt_session_write(priv, IOCPT_SESS_UPDATE_KEY);\n+}\n+\n+void\n+iocpt_session_deinit(struct iocpt_session_priv *priv)\n+{\n+\tstruct iocpt_dev *dev = priv->dev;\n+\tstruct iocpt_admin_ctx ctx = {\n+\t\t.pending_work = true,\n+\t\t.cmd.sess_control = {\n+\t\t\t.opcode = IOCPT_CMD_SESS_CONTROL,\n+\t\t\t.type = priv->type,\n+\t\t\t.oper = IOCPT_SESS_DISABLE,\n+\t\t\t.index = rte_cpu_to_le_32(priv->index),\n+\t\t\t.key_len = rte_cpu_to_le_16(priv->key_len),\n+\t\t},\n+\t};\n+\n+\t(void)iocpt_adminq_post_wait(dev, &ctx);\n+\n+\trte_spinlock_lock(&dev->adminq_lock);\n+\trte_bitmap_set(dev->sess_bm, priv->index);\n+\trte_spinlock_unlock(&dev->adminq_lock);\n+\n+\tpriv->flags &= ~IOCPT_S_F_INITED;\n+}\n+\n static const struct rte_memzone *\n iocpt_dma_zone_reserve(const char *type_name, uint16_t qid, size_t size,\n \t\t\tunsigned int align, int socket_id)\n@@ -305,6 +415,8 @@ iocpt_adminq_free(struct iocpt_admin_q *aq)\n static int\n iocpt_alloc_objs(struct iocpt_dev *dev)\n {\n+\tuint32_t bmsize, i;\n+\tuint8_t *bm;\n \tint err;\n \n \tIOCPT_PRINT(DEBUG, \"Crypto: %s\", dev->name);\n@@ -331,8 +443,33 @@ iocpt_alloc_objs(struct iocpt_dev *dev)\n \tdev->info = dev->info_z->addr;\n \tdev->info_pa = dev->info_z->iova;\n \n+\tbmsize = rte_bitmap_get_memory_footprint(dev->max_sessions);\n+\tbm = rte_malloc_socket(\"iocpt\", bmsize,\n+\t\t\tRTE_CACHE_LINE_SIZE, dev->socket_id);\n+\tif (bm == NULL) {\n+\t\tIOCPT_PRINT(ERR, \"Cannot allocate %uB bitmap memory\", bmsize);\n+\t\terr = -ENOMEM;\n+\t\tgoto err_free_dmazone;\n+\t}\n+\n+\tdev->sess_bm = rte_bitmap_init(dev->max_sessions, bm, bmsize);\n+\tif (dev->sess_bm == NULL) {\n+\t\tIOCPT_PRINT(ERR, \"Cannot initialize bitmap\");\n+\t\terr = -EFAULT;\n+\t\tgoto err_free_bm;\n+\t}\n+\tfor (i = 0; i < dev->max_sessions; i++)\n+\t\trte_bitmap_set(dev->sess_bm, i);\n+\n \treturn 0;\n \n+err_free_bm:\n+\trte_free(bm);\n+err_free_dmazone:\n+\trte_memzone_free(dev->info_z);\n+\tdev->info_z = NULL;\n+\tdev->info = NULL;\n+\tdev->info_pa = 0;\n err_free_adminq:\n \tiocpt_adminq_free(dev->adminq);\n \tdev->adminq = NULL;\n@@ -383,6 +520,12 @@ iocpt_free_objs(struct iocpt_dev *dev)\n {\n \tIOCPT_PRINT_CALL();\n \n+\tif (dev->sess_bm != NULL) {\n+\t\trte_bitmap_free(dev->sess_bm);\n+\t\trte_free(dev->sess_bm);\n+\t\tdev->sess_bm = NULL;\n+\t}\n+\n \tif (dev->adminq != NULL) {\n \t\tiocpt_adminq_free(dev->adminq);\n \t\tdev->adminq = NULL;\ndiff --git a/drivers/crypto/ionic/ionic_crypto_ops.c b/drivers/crypto/ionic/ionic_crypto_ops.c\nindex 74a6ce56ea..e6b3402b63 100644\n--- a/drivers/crypto/ionic/ionic_crypto_ops.c\n+++ b/drivers/crypto/ionic/ionic_crypto_ops.c\n@@ -48,10 +48,133 @@ iocpt_op_info_get(struct rte_cryptodev *cdev, struct rte_cryptodev_info *info)\n \tinfo->min_mbuf_tailroom_req = 0;\n }\n \n+static unsigned int\n+iocpt_op_get_session_size(struct rte_cryptodev *cdev __rte_unused)\n+{\n+\treturn iocpt_session_size();\n+}\n+\n+static inline int\n+iocpt_is_algo_supported(struct rte_crypto_sym_xform *xform)\n+{\n+\tif (xform->next != NULL) {\n+\t\tIOCPT_PRINT(ERR, \"chaining not supported\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tif (xform->type != RTE_CRYPTO_SYM_XFORM_AEAD) {\n+\t\tIOCPT_PRINT(ERR, \"xform->type %d not supported\", xform->type);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static __rte_always_inline int\n+iocpt_fill_sess_aead(struct rte_crypto_sym_xform *xform,\n+\t\tstruct iocpt_session_priv *priv)\n+{\n+\tstruct rte_crypto_aead_xform *aead_form = &xform->aead;\n+\n+\tif (aead_form->algo != RTE_CRYPTO_AEAD_AES_GCM) {\n+\t\tIOCPT_PRINT(ERR, \"Unknown algo\");\n+\t\treturn -EINVAL;\n+\t}\n+\tif (aead_form->op == RTE_CRYPTO_AEAD_OP_ENCRYPT) {\n+\t\tpriv->op = IOCPT_DESC_OPCODE_GCM_AEAD_ENCRYPT;\n+\t} else if (aead_form->op == RTE_CRYPTO_AEAD_OP_DECRYPT) {\n+\t\tpriv->op = IOCPT_DESC_OPCODE_GCM_AEAD_DECRYPT;\n+\t} else {\n+\t\tIOCPT_PRINT(ERR, \"Unknown cipher operations\");\n+\t\treturn -1;\n+\t}\n+\n+\tif (aead_form->key.length < IOCPT_SESS_KEY_LEN_MIN ||\n+\t    aead_form->key.length > IOCPT_SESS_KEY_LEN_MAX_SYMM) {\n+\t\tIOCPT_PRINT(ERR, \"Invalid cipher keylen %u\",\n+\t\t\taead_form->key.length);\n+\t\treturn -1;\n+\t}\n+\tpriv->key_len = aead_form->key.length;\n+\tmemcpy(priv->key, aead_form->key.data, priv->key_len);\n+\n+\tpriv->type = IOCPT_SESS_AEAD_AES_GCM;\n+\tpriv->iv_offset = aead_form->iv.offset;\n+\tpriv->iv_length = aead_form->iv.length;\n+\tpriv->digest_length = aead_form->digest_length;\n+\tpriv->aad_length = aead_form->aad_length;\n+\n+\treturn 0;\n+}\n+\n+static int\n+iocpt_session_cfg(struct iocpt_dev *dev,\n+\t\tstruct rte_crypto_sym_xform *xform,\n+\t\tstruct rte_cryptodev_sym_session *sess)\n+{\n+\tstruct rte_crypto_sym_xform *chain;\n+\tstruct iocpt_session_priv *priv = NULL;\n+\n+\tif (iocpt_is_algo_supported(xform) < 0)\n+\t\treturn -ENOTSUP;\n+\n+\tif (unlikely(sess == NULL)) {\n+\t\tIOCPT_PRINT(ERR, \"invalid session\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tpriv = CRYPTODEV_GET_SYM_SESS_PRIV(sess);\n+\tpriv->dev = dev;\n+\n+\tchain = xform;\n+\twhile (chain) {\n+\t\tswitch (chain->type) {\n+\t\tcase RTE_CRYPTO_SYM_XFORM_AEAD:\n+\t\t\tif (iocpt_fill_sess_aead(chain, priv))\n+\t\t\t\treturn -EIO;\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tIOCPT_PRINT(ERR, \"invalid crypto xform type %d\",\n+\t\t\t\tchain->type);\n+\t\t\treturn -ENOTSUP;\n+\t\t}\n+\t\tchain = chain->next;\n+\t}\n+\n+\treturn iocpt_session_init(priv);\n+}\n+\n+static int\n+iocpt_op_session_cfg(struct rte_cryptodev *cdev,\n+\t\tstruct rte_crypto_sym_xform *xform,\n+\t\tstruct rte_cryptodev_sym_session *sess)\n+{\n+\tstruct iocpt_dev *dev = cdev->data->dev_private;\n+\n+\treturn iocpt_session_cfg(dev, xform, sess);\n+}\n+\n+static void\n+iocpt_session_clear(struct rte_cryptodev_sym_session *sess)\n+{\n+\tiocpt_session_deinit(CRYPTODEV_GET_SYM_SESS_PRIV(sess));\n+}\n+\n+static void\n+iocpt_op_session_clear(struct rte_cryptodev *cdev __rte_unused,\n+\t\tstruct rte_cryptodev_sym_session *sess)\n+{\n+\tiocpt_session_clear(sess);\n+}\n+\n static struct rte_cryptodev_ops iocpt_ops = {\n \t.dev_configure = iocpt_op_config,\n \t.dev_close = iocpt_op_close,\n \t.dev_infos_get = iocpt_op_info_get,\n+\n+\t.sym_session_get_size = iocpt_op_get_session_size,\n+\t.sym_session_configure = iocpt_op_session_cfg,\n+\t.sym_session_clear = iocpt_op_session_clear,\n };\n \n int\n",
    "prefixes": [
        "v2",
        "6/9"
    ]
}