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GET /api/patches/134765/?format=api
HTTP 200 OK
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Content-Type: application/json
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{
    "id": 134765,
    "url": "https://patches.dpdk.org/api/patches/134765/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20231203112543.844014-21-michaelba@nvidia.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20231203112543.844014-21-michaelba@nvidia.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20231203112543.844014-21-michaelba@nvidia.com",
    "date": "2023-12-03T11:25:40",
    "name": "[v1,20/23] net/mlx5: add GENEVE option support for profile 0",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "de2d514ae25406a76f918ee144962f9e3ab94249",
    "submitter": {
        "id": 1949,
        "url": "https://patches.dpdk.org/api/people/1949/?format=api",
        "name": "Michael Baum",
        "email": "michaelba@nvidia.com"
    },
    "delegate": {
        "id": 3268,
        "url": "https://patches.dpdk.org/api/users/3268/?format=api",
        "username": "rasland",
        "first_name": "Raslan",
        "last_name": "Darawsheh",
        "email": "rasland@nvidia.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20231203112543.844014-21-michaelba@nvidia.com/mbox/",
    "series": [
        {
            "id": 30433,
            "url": "https://patches.dpdk.org/api/series/30433/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=30433",
            "date": "2023-12-03T11:25:23",
            "name": "net/mlx5: support Geneve and options for HWS",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/30433/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/134765/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/134765/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Michael Baum <michaelba@nvidia.com>",
        "To": "<dev@dpdk.org>",
        "CC": "Matan Azrad <matan@nvidia.com>, Raslan Darawsheh <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>,\n Suanming Mou <suanmingm@nvidia.com>",
        "Subject": "[PATCH v1 20/23] net/mlx5: add GENEVE option support for profile 0",
        "Date": "Sun, 3 Dec 2023 13:25:40 +0200",
        "Message-ID": "<20231203112543.844014-21-michaelba@nvidia.com>",
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    },
    "content": "Add support for matching and modifying GENEVE option for\nFLEX_PARSER_PROFILE_ENABLE=0.\nBefore this patch it is supported when FLEX_PARSER_PROFILE_ENABLE=8 in\nHW steering and when FLEX_PARSER_PROFILE_ENABLE=0 in SW steering.\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\n---\n doc/guides/nics/mlx5.rst            |   9 ++-\n doc/guides/platform/mlx5.rst        |   6 +-\n drivers/net/mlx5/mlx5_flow_geneve.c | 114 +++++++++++++++++++++-------\n 3 files changed, 95 insertions(+), 34 deletions(-)",
    "diff": "diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst\nindex 645b566d80..b946ce00c2 100644\n--- a/doc/guides/nics/mlx5.rst\n+++ b/doc/guides/nics/mlx5.rst\n@@ -347,6 +347,7 @@ Limitations\n      - Multiple of same Geneve TLV option isn't supported at the same pattern\n        template.\n      - Supported only when ``FLEX_PARSER_PROFILE_ENABLE`` = 8.\n+     - Supported also when ``FLEX_PARSER_PROFILE_ENABLE`` = 0 for single DW only.\n \n - VF: flow rules created on VF devices can only match traffic targeted at the\n   configured MAC addresses (see ``rte_eth_dev_mac_addr_add()``).\n@@ -2429,8 +2430,14 @@ Limitations\n ~~~~~~~~~~~\n \n * Supported only in HW steering (``dv_flow_en`` = 2).\n-* Supported only when ``FLEX_PARSER_PROFILE_ENABLE`` = 8.\n * Supported for FW version **xx.37.0142** and above.\n+* Parser creation can be done only for E-Switch manager.\n+* Supported for multiple DW only when ``FLEX_PARSER_PROFILE_ENABLE`` = 8.\n+* Supported for single DW also when ``FLEX_PARSER_PROFILE_ENABLE`` = 0 with some limitations:\n+\n+   - ``sample_len`` must be equal to ``option_len`` and not bigger than 1.\n+   - ``match_on_class_mode`` different than 1 is not supported.\n+   - ``offset`` must be 0.\n \n \n Testpmd driver specific commands\ndiff --git a/doc/guides/platform/mlx5.rst b/doc/guides/platform/mlx5.rst\nindex d16508d0da..a66cf778d1 100644\n--- a/doc/guides/platform/mlx5.rst\n+++ b/doc/guides/platform/mlx5.rst\n@@ -536,12 +536,10 @@ Below are some firmware configurations listed.\n    or\n    FLEX_PARSER_PROFILE_ENABLE=1\n \n-- enable Geneve TLV option flow matching in SW steering::\n+- enable Geneve TLV option flow matching::\n \n    FLEX_PARSER_PROFILE_ENABLE=0\n-\n-- enable Geneve TLV option flow matching in HW steering::\n-\n+   or\n    FLEX_PARSER_PROFILE_ENABLE=8\n \n - enable GTP flow matching::\ndiff --git a/drivers/net/mlx5/mlx5_flow_geneve.c b/drivers/net/mlx5/mlx5_flow_geneve.c\nindex 2c8dc39e74..f3ee414d02 100644\n--- a/drivers/net/mlx5/mlx5_flow_geneve.c\n+++ b/drivers/net/mlx5/mlx5_flow_geneve.c\n@@ -18,6 +18,8 @@\n #define MAX_GENEVE_OPTION_TOTAL_DATA_SIZE \\\n \t\t(MAX_GENEVE_OPTION_DATA_SIZE * MAX_GENEVE_OPTIONS_RESOURCES)\n \n+#define INVALID_SAMPLE_ID (UINT8_MAX)\n+\n /**\n  * Single DW inside GENEVE TLV option.\n  */\n@@ -265,6 +267,8 @@ mlx5_geneve_tlv_options_unregister(struct mlx5_priv *priv,\n  *   Pointer to header layout structure to update.\n  * @param resource\n  *   Pointer to single sample context to fill.\n+ * @param sample_id\n+ *   The flex parser id for single DW or UINT8_MAX for multiple DWs.\n  *\n  * @return\n  *   0 on success, a negative errno otherwise and rte_errno is set.\n@@ -274,7 +278,7 @@ mlx5_geneve_tlv_option_create_sample(void *ctx,\n \t\t      struct mlx5_devx_geneve_tlv_option_attr *attr,\n \t\t      struct mlx5_devx_match_sample_info_query_attr *query_attr,\n \t\t      struct mlx5_hl_data *match_data,\n-\t\t      struct mlx5_geneve_tlv_resource *resource)\n+\t\t      struct mlx5_geneve_tlv_resource *resource, uint8_t sample_id)\n {\n \tstruct mlx5_devx_obj *obj;\n \tint ret;\n@@ -282,7 +286,10 @@ mlx5_geneve_tlv_option_create_sample(void *ctx,\n \tobj = mlx5_devx_cmd_create_geneve_tlv_option(ctx, attr);\n \tif (obj == NULL)\n \t\treturn -rte_errno;\n-\tret = mlx5_devx_cmd_query_geneve_tlv_option(ctx, obj, query_attr);\n+\tif (sample_id == INVALID_SAMPLE_ID)\n+\t\tret = mlx5_devx_cmd_query_geneve_tlv_option(ctx, obj, query_attr);\n+\telse\n+\t\tret = mlx5_devx_cmd_match_sample_info_query(ctx, sample_id, query_attr);\n \tif (ret) {\n \t\tclaim_zero(mlx5_devx_cmd_destroy(obj));\n \t\treturn ret;\n@@ -335,20 +342,22 @@ should_configure_sample_for_dw0(const struct rte_pmd_mlx5_geneve_tlv *spec)\n  *   Pointer to user configuration.\n  * @param option\n  *   Pointer to single GENEVE TLV option to fill.\n+ * @param sample_id\n+ *   The flex parser id for single DW or UINT8_MAX for multiple DWs.\n  *\n  * @return\n  *   0 on success, a negative errno otherwise and rte_errno is set.\n  */\n static int\n mlx5_geneve_tlv_option_create(void *ctx, const struct rte_pmd_mlx5_geneve_tlv *spec,\n-\t\t\t      struct mlx5_geneve_tlv_option *option)\n+\t\t\t      struct mlx5_geneve_tlv_option *option, uint8_t sample_id)\n {\n \tstruct mlx5_devx_geneve_tlv_option_attr attr = {\n \t\t.option_class = spec->option_class,\n \t\t.option_type = spec->option_type,\n \t\t.option_data_len = spec->option_len,\n \t\t.option_class_ignore = spec->match_on_class_mode == 1 ? 0 : 1,\n-\t\t.offset_valid = 1,\n+\t\t.offset_valid = sample_id == INVALID_SAMPLE_ID ? 1 : 0,\n \t};\n \tstruct mlx5_devx_match_sample_info_query_attr query_attr = {0};\n \tstruct mlx5_geneve_tlv_resource *resource;\n@@ -356,12 +365,14 @@ mlx5_geneve_tlv_option_create(void *ctx, const struct rte_pmd_mlx5_geneve_tlv *s\n \tint ret;\n \n \tif (should_configure_sample_for_dw0(spec)) {\n+\t\tMLX5_ASSERT(sample_id == INVALID_SAMPLE_ID);\n \t\tattr.sample_offset = 0;\n \t\tresource = &option->resources[resource_id];\n \t\tret = mlx5_geneve_tlv_option_create_sample(ctx, &attr,\n \t\t\t\t\t\t\t   &query_attr,\n \t\t\t\t\t\t\t   &option->match_data[0],\n-\t\t\t\t\t\t\t   resource);\n+\t\t\t\t\t\t\t   resource,\n+\t\t\t\t\t\t\t   INVALID_SAMPLE_ID);\n \t\tif (ret)\n \t\t\treturn ret;\n \t\tresource_id++;\n@@ -379,7 +390,8 @@ mlx5_geneve_tlv_option_create(void *ctx, const struct rte_pmd_mlx5_geneve_tlv *s\n \t\tret = mlx5_geneve_tlv_option_create_sample(ctx, &attr,\n \t\t\t\t\t\t\t   &query_attr,\n \t\t\t\t\t\t\t   &option->match_data[i],\n-\t\t\t\t\t\t\t   resource);\n+\t\t\t\t\t\t\t   resource,\n+\t\t\t\t\t\t\t   sample_id);\n \t\tif (ret)\n \t\t\tgoto error;\n \t\tresource_id++;\n@@ -467,6 +479,8 @@ mlx5_geneve_tlv_option_copy(struct rte_pmd_mlx5_geneve_tlv *dst,\n  *   A list of GENEVE TLV options to create parser for them.\n  * @param nb_options\n  *   The number of options in TLV list.\n+ * @param sample_id\n+ *   The flex parser id for single DW or UINT8_MAX for multiple DWs.\n  *\n  * @return\n  *   A pointer to GENEVE TLV options parser structure on success,\n@@ -475,7 +489,7 @@ mlx5_geneve_tlv_option_copy(struct rte_pmd_mlx5_geneve_tlv *dst,\n static struct mlx5_geneve_tlv_options *\n mlx5_geneve_tlv_options_create(struct mlx5_dev_ctx_shared *sh,\n \t\t\t       const struct rte_pmd_mlx5_geneve_tlv tlv_list[],\n-\t\t\t       uint8_t nb_options)\n+\t\t\t       uint8_t nb_options, uint8_t sample_id)\n {\n \tstruct mlx5_geneve_tlv_options *options;\n \tconst struct rte_pmd_mlx5_geneve_tlv *spec;\n@@ -495,7 +509,7 @@ mlx5_geneve_tlv_options_create(struct mlx5_dev_ctx_shared *sh,\n \tfor (i = 0; i < nb_options; ++i) {\n \t\tspec = &tlv_list[i];\n \t\tret = mlx5_geneve_tlv_option_create(sh->cdev->ctx, spec,\n-\t\t\t\t\t\t    &options->options[i]);\n+\t\t\t\t\t\t    &options->options[i], sample_id);\n \t\tif (ret < 0)\n \t\t\tgoto error;\n \t\t/* Copy the user list for comparing future configuration. */\n@@ -705,6 +719,12 @@ mlx5_is_same_geneve_tlv_options(const struct mlx5_geneve_tlv_options *options,\n \treturn true;\n }\n \n+static inline bool\n+multiple_dws_supported(struct mlx5_hca_attr *attr)\n+{\n+\treturn attr->geneve_tlv_option_offset && attr->geneve_tlv_sample;\n+}\n+\n void *\n mlx5_geneve_tlv_parser_create(uint16_t port_id,\n \t\t\t      const struct rte_pmd_mlx5_geneve_tlv tlv_list[],\n@@ -715,8 +735,7 @@ mlx5_geneve_tlv_parser_create(uint16_t port_id,\n \tstruct rte_eth_dev *dev;\n \tstruct mlx5_priv *priv;\n \tstruct mlx5_hca_attr *attr;\n-\tuint8_t total_dws = 0;\n-\tuint8_t i;\n+\tuint8_t sample_id;\n \n \t/*\n \t * Validate the input before taking a lock and before any memory\n@@ -742,34 +761,71 @@ mlx5_geneve_tlv_parser_create(uint16_t port_id,\n \t\treturn NULL;\n \t}\n \tattr = &priv->sh->cdev->config.hca_attr;\n-\tMLX5_ASSERT(MAX_GENEVE_OPTIONS_RESOURCES <=\n-\t\t    attr->max_geneve_tlv_options);\n-\tif (!attr->geneve_tlv_option_offset || !attr->geneve_tlv_sample ||\n-\t    !attr->query_match_sample_info || !attr->geneve_tlv_opt) {\n-\t\tDRV_LOG(ERR, \"Not enough capabilities to support GENEVE TLV parser, maybe old FW version\");\n+\tif (!attr->query_match_sample_info || !attr->geneve_tlv_opt) {\n+\t\tDRV_LOG(ERR, \"Not enough capabilities to support GENEVE TLV parser, is this device eswitch manager?\");\n \t\trte_errno = ENOTSUP;\n \t\treturn NULL;\n \t}\n-\tif (nb_options > MAX_GENEVE_OPTIONS_RESOURCES) {\n+\tDRV_LOG(DEBUG, \"Max DWs supported for GENEVE TLV option is %u\",\n+\t\tattr->max_geneve_tlv_options);\n+\tif (nb_options > attr->max_geneve_tlv_options) {\n \t\tDRV_LOG(ERR,\n \t\t\t\"GENEVE TLV option number (%u) exceeds the limit (%u).\",\n-\t\t\tnb_options, MAX_GENEVE_OPTIONS_RESOURCES);\n+\t\t\tnb_options, attr->max_geneve_tlv_options);\n \t\trte_errno = EINVAL;\n \t\treturn NULL;\n \t}\n-\tfor (i = 0; i < nb_options; ++i) {\n-\t\tif (mlx5_geneve_tlv_option_validate(attr, &tlv_list[i]) < 0) {\n-\t\t\tDRV_LOG(ERR, \"GENEVE TLV option %u is invalid.\", i);\n+\tif (multiple_dws_supported(attr)) {\n+\t\tuint8_t total_dws = 0;\n+\t\tuint8_t i;\n+\n+\t\tMLX5_ASSERT(attr->max_geneve_tlv_options >= MAX_GENEVE_OPTIONS_RESOURCES);\n+\t\tfor (i = 0; i < nb_options; ++i) {\n+\t\t\tif (mlx5_geneve_tlv_option_validate(attr, &tlv_list[i]) < 0) {\n+\t\t\t\tDRV_LOG(ERR, \"GENEVE TLV option %u is invalid.\", i);\n+\t\t\t\treturn NULL;\n+\t\t\t}\n+\t\t\ttotal_dws += mlx5_geneve_tlv_option_get_nb_dws(&tlv_list[i]);\n+\t\t}\n+\t\tif (total_dws > MAX_GENEVE_OPTIONS_RESOURCES) {\n+\t\t\tDRV_LOG(ERR,\n+\t\t\t\t\"Total requested DWs (%u) exceeds the limit (%u).\",\n+\t\t\t\ttotal_dws, MAX_GENEVE_OPTIONS_RESOURCES);\n+\t\t\trte_errno = EINVAL;\n \t\t\treturn NULL;\n \t\t}\n-\t\ttotal_dws += mlx5_geneve_tlv_option_get_nb_dws(&tlv_list[i]);\n-\t}\n-\tif (total_dws > MAX_GENEVE_OPTIONS_RESOURCES) {\n-\t\tDRV_LOG(ERR,\n-\t\t\t\"Total requested DWs (%u) exceeds the limit (%u).\",\n-\t\t\ttotal_dws, MAX_GENEVE_OPTIONS_RESOURCES);\n-\t\trte_errno = EINVAL;\n-\t\treturn NULL;\n+\t\t/* Multiple DWs is supported, each of the has sample ID given later. */\n+\t\tsample_id = INVALID_SAMPLE_ID;\n+\t\tDRV_LOG(DEBUG, \"GENEVE TLV parser supports multiple DWs, FLEX_PARSER_PROFILE_ENABLE == 8\");\n+\t} else {\n+\t\tconst struct rte_pmd_mlx5_geneve_tlv *option = &tlv_list[0];\n+\n+\t\tif (option->offset != 0) {\n+\t\t\tDRV_LOG(ERR,\n+\t\t\t\t\"GENEVE TLV option offset %u is required but not supported.\",\n+\t\t\t\toption->offset);\n+\t\t\trte_errno = ENOTSUP;\n+\t\t\treturn NULL;\n+\t\t}\n+\t\tif (option->sample_len != option->option_len) {\n+\t\t\tDRV_LOG(ERR,\n+\t\t\t\t\"GENEVE TLV option length (%u) should be equal to sample length (%u).\",\n+\t\t\t\toption->option_len, option->sample_len);\n+\t\t\trte_errno = ENOTSUP;\n+\t\t\treturn NULL;\n+\t\t}\n+\t\tif (option->match_on_class_mode != 1) {\n+\t\t\tDRV_LOG(ERR,\n+\t\t\t\t\"GENEVE TLV option match_on_class_mode %u is invalid for flex parser profile 0.\",\n+\t\t\t\toption->match_on_class_mode);\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn NULL;\n+\t\t}\n+\t\tif (mlx5_geneve_tlv_option_validate(attr, option) < 0)\n+\t\t\treturn NULL;\n+\t\t/* Single DW is supported, its sample ID is given. */\n+\t\tsample_id = attr->geneve_tlv_option_sample_id;\n+\t\tDRV_LOG(DEBUG, \"GENEVE TLV parser supports only single DW, FLEX_PARSER_PROFILE_ENABLE == 0\");\n \t}\n \t/* Take lock for this physical device and manage the options. */\n \tphdev = mlx5_get_locked_physical_device(priv);\n@@ -793,7 +849,7 @@ mlx5_geneve_tlv_parser_create(uint16_t port_id,\n \t\tgoto exit;\n \t}\n \t/* Create GENEVE TLV options for this physical device. */\n-\toptions = mlx5_geneve_tlv_options_create(priv->sh, tlv_list, nb_options);\n+\toptions = mlx5_geneve_tlv_options_create(priv->sh, tlv_list, nb_options, sample_id);\n \tif (!options) {\n \t\tmlx5_unlock_physical_device();\n \t\treturn NULL;\n",
    "prefixes": [
        "v1",
        "20/23"
    ]
}