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GET /api/patches/131632/?format=api
{ "id": 131632, "url": "https://patches.dpdk.org/api/patches/131632/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230919134222.2500033-7-amitprakashs@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230919134222.2500033-7-amitprakashs@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230919134222.2500033-7-amitprakashs@marvell.com", "date": "2023-09-19T13:42:22", "name": "[v1,7/7] event/cnxk: support DMA event functions", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "41d8a263bababc2f25467b7176e796b65fc52661", "submitter": { "id": 2699, "url": "https://patches.dpdk.org/api/people/2699/?format=api", "name": "Amit Prakash Shukla", "email": "amitprakashs@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230919134222.2500033-7-amitprakashs@marvell.com/mbox/", "series": [ { "id": 29553, "url": "https://patches.dpdk.org/api/series/29553/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=29553", "date": "2023-09-19T13:42:16", "name": "[v1,1/7] eventdev: introduce DMA event adapter library", "version": 1, "mbox": "https://patches.dpdk.org/series/29553/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/131632/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/131632/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 27A0242604;\n\tTue, 19 Sep 2023 15:43:34 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D722E40DFB;\n\tTue, 19 Sep 2023 15:43:23 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 3023B40E72\n for <dev@dpdk.org>; Tue, 19 Sep 2023 15:43:22 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 38JDZvGr011923; Tue, 19 Sep 2023 06:43:21 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3t7cnq00xb-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Tue, 19 Sep 2023 06:43:21 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Tue, 19 Sep 2023 06:43:19 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Tue, 19 Sep 2023 06:43:19 -0700", "from localhost.localdomain (unknown [10.28.36.157])\n by maili.marvell.com (Postfix) with ESMTP id 8E9793F7099;\n Tue, 19 Sep 2023 06:43:14 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=ffp43xLkvTb61QSxx5g54sdg14z9oAKhL4q6AWdH53I=;\n b=hyZxa8BOK2A/iF1La/cozRBecHrprd1U5ev4WcPRt+lO/uX4EUThJU5gtnUHLZbZa3Jc\n fcjWsCPGeonFgpnvuOsJPgtfE9t10TAQZlROmBfheLS9l6oV8yT5CMq2OkOE98jjim+w\n ztrCmstlr8ACAbQRe89+X6ayr4nUZaKYDKmAfniR2ws/D95N5g82JBi8cV/6s4VX7nUi\n 1NPDHEiyXKQ4KsOyO3SIaN3muiHgKqoyiGPltryDxmnU8oBmVnP2tXHLzB+FMXLF54b4\n KY+nEfFQizZV5BWaiT5XuystIPiQANDgUAB+GaLhdi+YZ9eGP4pSnDBbyfqLwWJ9hlmI tg==", "From": "Amit Prakash Shukla <amitprakashs@marvell.com>", "To": "Pavan Nikhilesh <pbhagavatula@marvell.com>, Shijith Thotton\n <sthotton@marvell.com>", "CC": "<dev@dpdk.org>, <jerinj@marvell.com>, <fengchengwen@huawei.com>,\n <kevin.laatz@intel.com>, <bruce.richardson@intel.com>,\n <conor.walsh@intel.com>, <vattunuru@marvell.com>, <g.singh@nxp.com>,\n <sachin.saxena@oss.nxp.com>, <hemant.agrawal@nxp.com>,\n <cheng1.jiang@intel.com>, <ndabilpuram@marvell.com>,\n <anoobj@marvell.com>, <mb@smartsharesystems.com>,\n Amit Prakash Shukla <amitprakashs@marvell.com>", "Subject": "[PATCH v1 7/7] event/cnxk: support DMA event functions", "Date": "Tue, 19 Sep 2023 19:12:22 +0530", "Message-ID": "<20230919134222.2500033-7-amitprakashs@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230919134222.2500033-1-amitprakashs@marvell.com>", "References": "<20230919134222.2500033-1-amitprakashs@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "g1NIZsjgddGI2G7GxPgM_HtJkxpvG-vX", "X-Proofpoint-GUID": "g1NIZsjgddGI2G7GxPgM_HtJkxpvG-vX", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.601,FMLib:17.11.176.26\n definitions=2023-09-19_06,2023-09-19_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Added support of dma driver callback assignment to eventdev\nenqueue and dequeue. The change also defines dma adapter\ncapabilities function.\n\nSigned-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>\n---\n drivers/event/cnxk/cn10k_eventdev.c | 20 ++++++++++++++++++++\n drivers/event/cnxk/cn10k_worker.h | 3 +++\n drivers/event/cnxk/cn9k_eventdev.c | 17 +++++++++++++++++\n drivers/event/cnxk/cn9k_worker.h | 3 +++\n drivers/event/cnxk/meson.build | 3 +--\n 5 files changed, 44 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c\nindex c5d4be0474..9bb8b8ff01 100644\n--- a/drivers/event/cnxk/cn10k_eventdev.c\n+++ b/drivers/event/cnxk/cn10k_eventdev.c\n@@ -8,6 +8,9 @@\n #include \"cn10k_cryptodev_ops.h\"\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n+#include \"cnxk_dma_event_dp.h\"\n+\n+#include <rte_dmadev_pmd.h>\n \n #define CN10K_SET_EVDEV_DEQ_OP(dev, deq_op, deq_ops) \\\n \tdeq_op = deq_ops[dev->rx_offloads & (NIX_RX_OFFLOAD_MAX - 1)]\n@@ -469,6 +472,8 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \telse\n \t\tevent_dev->ca_enqueue = cn10k_cpt_sg_ver1_crypto_adapter_enqueue;\n \n+\tevent_dev->dma_enqueue = cn10k_dma_adapter_enqueue;\n+\n \tif (dev->tx_offloads & NIX_TX_MULTI_SEG_F)\n \t\tCN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, sso_hws_tx_adptr_enq_seg);\n \telse\n@@ -978,6 +983,19 @@ cn10k_crypto_adapter_vec_limits(const struct rte_eventdev *event_dev,\n \treturn 0;\n }\n \n+static int\n+cn10k_dma_adapter_caps_get(const struct rte_eventdev *event_dev,\n+\t\t\t const struct rte_dma_dev *dma_dev, uint32_t *caps)\n+{\n+\tRTE_SET_USED(dma_dev);\n+\n+\tCNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, \"event_cn10k\", EINVAL);\n+\n+\t*caps = RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_FWD;\n+\n+\treturn 0;\n+}\n+\n static struct eventdev_ops cn10k_sso_dev_ops = {\n \t.dev_infos_get = cn10k_sso_info_get,\n \t.dev_configure = cn10k_sso_dev_configure,\n@@ -1017,6 +1035,8 @@ static struct eventdev_ops cn10k_sso_dev_ops = {\n \t.crypto_adapter_queue_pair_del = cn10k_crypto_adapter_qp_del,\n \t.crypto_adapter_vector_limits_get = cn10k_crypto_adapter_vec_limits,\n \n+\t.dma_adapter_caps_get = cn10k_dma_adapter_caps_get,\n+\n \t.xstats_get = cnxk_sso_xstats_get,\n \t.xstats_reset = cnxk_sso_xstats_reset,\n \t.xstats_get_names = cnxk_sso_xstats_get_names,\ndiff --git a/drivers/event/cnxk/cn10k_worker.h b/drivers/event/cnxk/cn10k_worker.h\nindex e71ab3c523..3d35fcb657 100644\n--- a/drivers/event/cnxk/cn10k_worker.h\n+++ b/drivers/event/cnxk/cn10k_worker.h\n@@ -7,6 +7,7 @@\n \n #include <rte_eventdev.h>\n #include \"cn10k_cryptodev_event_dp.h\"\n+#include \"cnxk_dma_event_dp.h\"\n #include \"cn10k_rx.h\"\n #include \"cnxk_worker.h\"\n #include \"cn10k_eventdev.h\"\n@@ -226,6 +227,8 @@ cn10k_sso_hws_post_process(struct cn10k_sso_hws *ws, uint64_t *u64,\n \t\t/* Mark vector mempool object as get */\n \t\tRTE_MEMPOOL_CHECK_COOKIES(rte_mempool_from_obj((void *)u64[1]),\n \t\t\t\t\t (void **)&u64[1], 1, 1);\n+\t} else if (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) == RTE_EVENT_TYPE_DMADEV) {\n+\t\tu64[1] = cnxk_dma_adapter_dequeue(u64[1]);\n \t}\n }\n \ndiff --git a/drivers/event/cnxk/cn9k_eventdev.c b/drivers/event/cnxk/cn9k_eventdev.c\nindex f77a9d7085..980932bd12 100644\n--- a/drivers/event/cnxk/cn9k_eventdev.c\n+++ b/drivers/event/cnxk/cn9k_eventdev.c\n@@ -510,6 +510,8 @@ cn9k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \t\t\t\t\t sso_hws_dual_tx_adptr_enq);\n \t}\n \n+\tevent_dev->dma_enqueue = cn9k_dma_adapter_enqueue;\n+\n \tevent_dev->txa_enqueue_same_dest = event_dev->txa_enqueue;\n \trte_mb();\n #else\n@@ -991,6 +993,19 @@ cn9k_tim_caps_get(const struct rte_eventdev *evdev, uint64_t flags,\n \t\t\t\t cn9k_sso_set_priv_mem);\n }\n \n+static int\n+cn9k_dma_adapter_caps_get(const struct rte_eventdev *event_dev,\n+\t\t\t const struct rte_dma_dev *dma_dev, uint32_t *caps)\n+{\n+\tRTE_SET_USED(dma_dev);\n+\n+\tCNXK_VALID_DEV_OR_ERR_RET(event_dev->dev, \"event_cn9k\");\n+\n+\t*caps = RTE_EVENT_DMA_ADAPTER_CAP_INTERNAL_PORT_OP_FWD;\n+\n+\treturn 0;\n+}\n+\n static struct eventdev_ops cn9k_sso_dev_ops = {\n \t.dev_infos_get = cn9k_sso_info_get,\n \t.dev_configure = cn9k_sso_dev_configure,\n@@ -1027,6 +1042,8 @@ static struct eventdev_ops cn9k_sso_dev_ops = {\n \t.crypto_adapter_queue_pair_add = cn9k_crypto_adapter_qp_add,\n \t.crypto_adapter_queue_pair_del = cn9k_crypto_adapter_qp_del,\n \n+\t.dma_adapter_caps_get = cn9k_dma_adapter_caps_get,\n+\n \t.xstats_get = cnxk_sso_xstats_get,\n \t.xstats_reset = cnxk_sso_xstats_reset,\n \t.xstats_get_names = cnxk_sso_xstats_get_names,\ndiff --git a/drivers/event/cnxk/cn9k_worker.h b/drivers/event/cnxk/cn9k_worker.h\nindex 9ddab095ac..6ac6fffc86 100644\n--- a/drivers/event/cnxk/cn9k_worker.h\n+++ b/drivers/event/cnxk/cn9k_worker.h\n@@ -11,6 +11,7 @@\n #include \"cnxk_ethdev.h\"\n #include \"cnxk_eventdev.h\"\n #include \"cnxk_worker.h\"\n+#include \"cnxk_dma_event_dp.h\"\n #include \"cn9k_cryptodev_ops.h\"\n \n #include \"cn9k_ethdev.h\"\n@@ -214,6 +215,8 @@ cn9k_sso_hws_post_process(uint64_t *u64, uint64_t mbuf, const uint32_t flags,\n \t\tif (flags & NIX_RX_OFFLOAD_TSTAMP_F)\n \t\t\tcn9k_sso_process_tstamp(u64[1], mbuf, tstamp[port]);\n \t\tu64[1] = mbuf;\n+\t} else if (CNXK_EVENT_TYPE_FROM_TAG(u64[0]) == RTE_EVENT_TYPE_DMADEV) {\n+\t\tu64[1] = cnxk_dma_adapter_dequeue(u64[1]);\n \t}\n }\n \ndiff --git a/drivers/event/cnxk/meson.build b/drivers/event/cnxk/meson.build\nindex 51f1be8848..649419d5d3 100644\n--- a/drivers/event/cnxk/meson.build\n+++ b/drivers/event/cnxk/meson.build\n@@ -314,8 +314,7 @@ foreach flag: extra_flags\n endif\n endforeach\n \n-deps += ['bus_pci', 'common_cnxk', 'net_cnxk', 'crypto_cnxk']\n-\n+deps += ['bus_pci', 'common_cnxk', 'net_cnxk', 'crypto_cnxk', 'dma_cnxk']\n require_iova_in_mbuf = false\n \n annotate_locks = false\n", "prefixes": [ "v1", "7/7" ] }