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GET /api/patches/130169/?format=api
{ "id": 130169, "url": "https://patches.dpdk.org/api/patches/130169/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/8866a5c7ea36e476b2a92e3e4cea6c2c127ab82f.1691768110.git.anatoly.burakov@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<8866a5c7ea36e476b2a92e3e4cea6c2c127ab82f.1691768110.git.anatoly.burakov@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/8866a5c7ea36e476b2a92e3e4cea6c2c127ab82f.1691768110.git.anatoly.burakov@intel.com", "date": "2023-08-11T16:14:44", "name": "[v1,1/3] dmadev: add inter-domain operations", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d35ecb70a5049a16a31e94e5256cf36ac90b6e4b", "submitter": { "id": 4, "url": "https://patches.dpdk.org/api/people/4/?format=api", "name": "Anatoly Burakov", "email": "anatoly.burakov@intel.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/8866a5c7ea36e476b2a92e3e4cea6c2c127ab82f.1691768110.git.anatoly.burakov@intel.com/mbox/", "series": [ { "id": 29192, "url": "https://patches.dpdk.org/api/series/29192/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=29192", "date": "2023-08-11T16:14:43", "name": "Add support for inter-domain DMA operations", "version": 1, "mbox": "https://patches.dpdk.org/series/29192/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/130169/comments/", "check": "warning", "checks": "https://patches.dpdk.org/api/patches/130169/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id E21EC43036;\n\tFri, 11 Aug 2023 18:14:56 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E0DC043258;\n\tFri, 11 Aug 2023 18:14:53 +0200 (CEST)", "from mgamail.intel.com (mgamail.intel.com [192.55.52.136])\n by mails.dpdk.org (Postfix) with ESMTP id 2725242D3F\n for <dev@dpdk.org>; Fri, 11 Aug 2023 18:14:51 +0200 (CEST)", "from orsmga005.jf.intel.com ([10.7.209.41])\n by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Aug 2023 09:14:51 -0700", "from silpixa00401191.ir.intel.com ([10.55.128.139])\n by orsmga005.jf.intel.com with ESMTP; 11 Aug 2023 09:14:49 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1691770492; x=1723306492;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=YI7GWtTlgTWGruKxL2ZuiuUGvv7hZTwrxGqmICJJxvA=;\n b=n6gHvP450/Yu+qDqnMYyZzs4NOk/p3IZgxq38okg/cHNnkZxqXplysvx\n OJtbO9SOfrpjQgdxd/ZR3yMqKExyPS29aXG+ssGFiD34vPtNQbL0rbPrB\n G6osH8i7j8CLW2XoPsd38EfvmofJ2t8yReWjJLsCmRGizJs/Ou36u6be+\n Z68/Q/4GbJpavkIk3ZM5XRUZ8y6vmuGIhKtf5KJV9aduy+i8c5MjK6uOy\n WVI16AUpa/ZFV7eG/VXAM8du8Un9IZb4bx1Mc7NAnk5sclC7ZMV71uwAL\n jrFaTQC3WWbIzrqBF2ypCNi+GmDsni/kQtltFgP6H5kBhQvaE0y3G4ZcH w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10799\"; a=\"351312921\"", "E=Sophos;i=\"6.01,166,1684825200\"; d=\"scan'208\";a=\"351312921\"", "E=McAfee;i=\"6600,9927,10799\"; a=\"906499488\"", "E=Sophos;i=\"6.01,166,1684825200\"; d=\"scan'208\";a=\"906499488\"" ], "X-ExtLoop1": "1", "From": "Anatoly Burakov <anatoly.burakov@intel.com>", "To": "dev@dpdk.org, Chengwen Feng <fengchengwen@huawei.com>,\n Kevin Laatz <kevin.laatz@intel.com>,\n Bruce Richardson <bruce.richardson@intel.com>", "Cc": "Vladimir Medvedkin <vladimir.medvedkin@intel.com>", "Subject": "[PATCH v1 1/3] dmadev: add inter-domain operations", "Date": "Fri, 11 Aug 2023 16:14:44 +0000", "Message-Id": "\n <8866a5c7ea36e476b2a92e3e4cea6c2c127ab82f.1691768110.git.anatoly.burakov@intel.com>", "X-Mailer": "git-send-email 2.37.2", "In-Reply-To": "<cover.1691768109.git.anatoly.burakov@intel.com>", "References": "<cover.1691768109.git.anatoly.burakov@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add a flag to indicate that a specific device supports inter-domain\noperations, and add an API for inter-domain copy and fill.\n\nInter-domain operation is an operation that is very similar to regular\nDMA operation, except either source or destination addresses can be in a\ndifferent process's address space, indicated by source and destination\nhandle values. These values are currently meant to be provided by\nprivate drivers' API's.\n\nThis commit also adds a controller ID field into the DMA device API.\nThis is an arbitrary value that may not be implemented by hardware, but\nit is meant to represent some kind of device hierarchy.\n\nSigned-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>\nSigned-off-by: Anatoly Burakov <anatoly.burakov@intel.com>\n---\n doc/guides/prog_guide/dmadev.rst | 18 +++++\n lib/dmadev/rte_dmadev.c | 2 +\n lib/dmadev/rte_dmadev.h | 133 +++++++++++++++++++++++++++++++\n lib/dmadev/rte_dmadev_core.h | 12 +++\n 4 files changed, 165 insertions(+)", "diff": "diff --git a/doc/guides/prog_guide/dmadev.rst b/doc/guides/prog_guide/dmadev.rst\nindex 2aa26d33b8..e4e5196416 100644\n--- a/doc/guides/prog_guide/dmadev.rst\n+++ b/doc/guides/prog_guide/dmadev.rst\n@@ -108,6 +108,24 @@ completed operations along with the status of each operation (filled into the\n completed operation's ``ring_idx`` which could help user track operations within\n their own application-defined rings.\n \n+.. _dmadev_inter_dom:\n+\n+\n+Inter-domain operations\n+~~~~~~~~~~~~~~~~~~~~~~~\n+\n+For some devices, inter-domain DMA operations may be supported (indicated by\n+`RTE_DMA_CAPA_OPS_INTER_DOM` flag being set in DMA device capabilities flag). An\n+inter-domain operation (such as `rte_dma_copy_inter_dom`) is similar to regular\n+DMA device operation, except the user also needs to specify source and\n+destination handles, which the hardware will then use to get source and/or\n+destination PASID to perform the operation. When `src_handle` value is set,\n+`RTE_DMA_OP_FLAG_SRC_HANDLE` op flag must also be set. Similarly, when\n+`dst_handle` value is set, `RTE_DMA_OP_FLAG_DST_HANDLE` op flag must be set.\n+\n+Currently, source and destination handles are opaque values the user has to get\n+from private API's of those DMA device drivers that support the operation.\n+\n \n Querying Device Statistics\n ~~~~~~~~~~~~~~~~~~~~~~~~~~\ndiff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c\nindex 8c095e1f35..ff00612f84 100644\n--- a/lib/dmadev/rte_dmadev.c\n+++ b/lib/dmadev/rte_dmadev.c\n@@ -425,6 +425,8 @@ rte_dma_info_get(int16_t dev_id, struct rte_dma_info *dev_info)\n \tif (*dev->dev_ops->dev_info_get == NULL)\n \t\treturn -ENOTSUP;\n \tmemset(dev_info, 0, sizeof(struct rte_dma_info));\n+\t/* set to -1 by default, as other drivers may not implement this */\n+\tdev_info->controller_id = -1;\n \tret = (*dev->dev_ops->dev_info_get)(dev, dev_info,\n \t\t\t\t\t sizeof(struct rte_dma_info));\n \tif (ret != 0)\ndiff --git a/lib/dmadev/rte_dmadev.h b/lib/dmadev/rte_dmadev.h\nindex e61d71959e..1cad36f0b6 100644\n--- a/lib/dmadev/rte_dmadev.h\n+++ b/lib/dmadev/rte_dmadev.h\n@@ -278,6 +278,8 @@ int16_t rte_dma_next_dev(int16_t start_dev_id);\n #define RTE_DMA_CAPA_OPS_COPY_SG\tRTE_BIT64(33)\n /** Support fill operation. */\n #define RTE_DMA_CAPA_OPS_FILL\t\tRTE_BIT64(34)\n+/** Support inter-domain operation. */\n+#define RTE_DMA_CAPA_OPS_INTER_DOM\tRTE_BIT64(48)\n /**@}*/\n \n /**\n@@ -307,6 +309,8 @@ struct rte_dma_info {\n \tint16_t numa_node;\n \t/** Number of virtual DMA channel configured. */\n \tuint16_t nb_vchans;\n+\t/** Controller ID, -1 if unknown */\n+\tint16_t controller_id;\n };\n \n /**\n@@ -819,6 +823,16 @@ struct rte_dma_sge {\n * capability bit for this, driver should not return error if this flag was set.\n */\n #define RTE_DMA_OP_FLAG_LLC RTE_BIT64(2)\n+/** Source handle is set.\n+ * Used for inter-domain operations to indicate source handle value will be\n+ * meaningful and can be used by hardware to learn source PASID.\n+ */\n+#define RTE_DMA_OP_FLAG_SRC_HANDLE RTE_BIT64(16)\n+/** Destination handle is set.\n+ * Used for inter-domain operations to indicate destination handle value will be\n+ * meaningful and can be used by hardware to learn destination PASID.\n+ */\n+#define RTE_DMA_OP_FLAG_DST_HANDLE RTE_BIT64(17)\n /**@}*/\n \n /**\n@@ -1141,6 +1155,125 @@ rte_dma_burst_capacity(int16_t dev_id, uint16_t vchan)\n \treturn (*obj->burst_capacity)(obj->dev_private, vchan);\n }\n \n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Enqueue an inter-domain copy operation.\n+ *\n+ * This queues up an inter-domain copy operation to be performed by hardware, if\n+ * the 'flags' parameter contains RTE_DMA_OP_FLAG_SUBMIT then trigger doorbell\n+ * to begin this operation, otherwise do not trigger doorbell.\n+ *\n+ * The source and destination handle parameters are arbitrary opaque values,\n+ * currently meant to be provided by private device driver API's. If the source\n+ * handle value is meaningful, RTE_DMA_OP_FLAG_SRC_HANDLE flag must be set.\n+ * Similarly, if the destination handle value is meaningful,\n+ * RTE_DMA_OP_FLAG_DST_HANDLE flag must be set. Source and destination handle\n+ * values are meant to provide information to the hardware about source and/or\n+ * destination PASID for the inter-domain copy operation.\n+ *\n+ * @param dev_id\n+ * The identifier of the device.\n+ * @param vchan\n+ * The identifier of virtual DMA channel.\n+ * @param src\n+ * The address of the source buffer (if `src_handle` is set, source address\n+ * will be in address space of process referred to by source handle).\n+ * @param dst\n+ * The address of the destination buffer (if `dst_handle` is set, destination\n+ * address will be in address space of process referred to by destination\n+ * handle).\n+ * @param length\n+ * The length of the data to be copied.\n+ * @param src_handle\n+ * Source handle value (if used, RTE_DMA_OP_FLAG_SRC_HANDLE flag must be set).\n+ * @param dst_handle\n+ * Destination handle value (if used, RTE_DMA_OP_FLAG_DST_HANDLE flag must be\n+ * set).\n+ * @param flags\n+ * Flags for this operation.\n+ * @return\n+ * - 0..UINT16_MAX: index of enqueued job.\n+ * - -ENOSPC: if no space left to enqueue.\n+ * - other values < 0 on failure.\n+ */\n+__rte_experimental\n+static inline int\n+rte_dma_copy_inter_dom(int16_t dev_id, uint16_t vchan, rte_iova_t src,\n+\t\trte_iova_t dst, uint32_t length, uint16_t src_handle,\n+\t\tuint16_t dst_handle, uint64_t flags)\n+{\n+\tstruct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];\n+\n+#ifdef RTE_DMADEV_DEBUG\n+\tif (!rte_dma_is_valid(dev_id) || length == 0)\n+\t\treturn -EINVAL;\n+\tif (*obj->copy_inter_dom == NULL)\n+\t\treturn -ENOTSUP;\n+#endif\n+\treturn (*obj->copy_inter_dom)(obj->dev_private, vchan, src, dst, length,\n+\t\t\tsrc_handle, dst_handle, flags);\n+}\n+\n+/**\n+ * @warning\n+ * @b EXPERIMENTAL: this API may change without prior notice.\n+ *\n+ * Enqueue an inter-domain fill operation.\n+ *\n+ * This queues up an inter-domain fill operation to be performed by hardware, if\n+ * the 'flags' parameter contains RTE_DMA_OP_FLAG_SUBMIT then trigger doorbell\n+ * to begin this operation, otherwise do not trigger doorbell.\n+ *\n+ * The source and destination handle parameters are arbitrary opaque values,\n+ * currently meant to be provided by private device driver API's. If the source\n+ * handle value is meaningful, RTE_DMA_OP_FLAG_SRC_HANDLE flag must be set.\n+ * Similarly, if the destination handle value is meaningful,\n+ * RTE_DMA_OP_FLAG_DST_HANDLE flag must be set. Source and destination handle\n+ * values are meant to provide information to the hardware about source and/or\n+ * destination PASID for the inter-domain fill operation.\n+ *\n+ * @param dev_id\n+ * The identifier of the device.\n+ * @param vchan\n+ * The identifier of virtual DMA channel.\n+ * @param pattern\n+ * The pattern to populate the destination buffer with.\n+ * @param dst\n+ * The address of the destination buffer.\n+ * @param length\n+ * The length of the destination buffer.\n+ * @param dst_handle\n+ * Destination handle value (if used, RTE_DMA_OP_FLAG_DST_HANDLE flag must be\n+ * set).\n+ * @param flags\n+ * Flags for this operation.\n+ * @return\n+ * - 0..UINT16_MAX: index of enqueued job.\n+ * - -ENOSPC: if no space left to enqueue.\n+ * - other values < 0 on failure.\n+ */\n+__rte_experimental\n+static inline int\n+rte_dma_fill_inter_dom(int16_t dev_id, uint16_t vchan, uint64_t pattern,\n+\t\trte_iova_t dst, uint32_t length, uint16_t dst_handle,\n+\t\tuint64_t flags)\n+{\n+\tstruct rte_dma_fp_object *obj = &rte_dma_fp_objs[dev_id];\n+\n+#ifdef RTE_DMADEV_DEBUG\n+\tif (!rte_dma_is_valid(dev_id) || length == 0)\n+\t\treturn -EINVAL;\n+\tif (*obj->fill_inter_dom == NULL)\n+\t\treturn -ENOTSUP;\n+#endif\n+\n+\treturn (*obj->fill_inter_dom)(obj->dev_private, vchan, pattern, dst,\n+\t\t\tlength, dst_handle, flags);\n+}\n+\n+\n #ifdef __cplusplus\n }\n #endif\ndiff --git a/lib/dmadev/rte_dmadev_core.h b/lib/dmadev/rte_dmadev_core.h\nindex 064785686f..b3a020f9de 100644\n--- a/lib/dmadev/rte_dmadev_core.h\n+++ b/lib/dmadev/rte_dmadev_core.h\n@@ -50,6 +50,16 @@ typedef uint16_t (*rte_dma_completed_status_t)(void *dev_private,\n /** @internal Used to check the remaining space in descriptor ring. */\n typedef uint16_t (*rte_dma_burst_capacity_t)(const void *dev_private, uint16_t vchan);\n \n+/** @internal Used to enqueue an inter-domain copy operation. */\n+typedef int (*rte_dma_copy_inter_dom_t)(void *dev_private, uint16_t vchan,\n+\t\t\trte_iova_t src, rte_iova_t dst,\tunsigned int length,\n+\t\t\tuint16_t src_handle, uint16_t dst_handle, uint64_t flags);\n+/** @internal Used to enqueue an inter-domain fill operation. */\n+typedef int (*rte_dma_fill_inter_dom_t)(void *dev_private, uint16_t vchan,\n+\t\t\tuint64_t pattern, rte_iova_t dst, uint32_t length,\n+\t\t\tuint16_t dst_handle, uint64_t flags);\n+\n+\n /**\n * @internal\n * Fast-path dmadev functions and related data are hold in a flat array.\n@@ -73,6 +83,8 @@ struct rte_dma_fp_object {\n \trte_dma_completed_t completed;\n \trte_dma_completed_status_t completed_status;\n \trte_dma_burst_capacity_t burst_capacity;\n+\trte_dma_copy_inter_dom_t copy_inter_dom;\n+\trte_dma_fill_inter_dom_t fill_inter_dom;\n } __rte_aligned(128);\n \n extern struct rte_dma_fp_object *rte_dma_fp_objs;\n", "prefixes": [ "v1", "1/3" ] }