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GET /api/patches/126595/?format=api
{ "id": 126595, "url": "https://patches.dpdk.org/api/patches/126595/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20230427062001.478032-29-qiming.yang@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230427062001.478032-29-qiming.yang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230427062001.478032-29-qiming.yang@intel.com", "date": "2023-04-27T06:19:59", "name": "[28/30] net/ice/base: use const array to store link modes", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "3bff1b36322f44992d5f58128974f6c709c4d6d6", "submitter": { "id": 522, "url": "https://patches.dpdk.org/api/people/522/?format=api", "name": "Qiming Yang", "email": "qiming.yang@intel.com" }, "delegate": { "id": 1540, "url": "https://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20230427062001.478032-29-qiming.yang@intel.com/mbox/", "series": [ { "id": 27885, "url": "https://patches.dpdk.org/api/series/27885/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=27885", "date": "2023-04-27T06:19:31", "name": "net/ice/base: share code update", "version": 1, "mbox": "https://patches.dpdk.org/series/27885/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/126595/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/126595/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 1290642A08;\n\tThu, 27 Apr 2023 08:40:55 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 383D04300E;\n\tThu, 27 Apr 2023 08:38:37 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id 129CB42FF2\n for <dev@dpdk.org>; Thu, 27 Apr 2023 08:38:34 +0200 (CEST)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 26 Apr 2023 23:38:34 -0700", "from dpdk-qiming3.sh.intel.com ([10.67.111.4])\n by fmsmga002.fm.intel.com with ESMTP; 26 Apr 2023 23:38:32 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1682577515; x=1714113515;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=FAs8M5VxU+bGxECfHE3AswCJ/rmCPxXPTOdphycIZvE=;\n b=D4jKz2wt0IX6Va+AEOpXc1j4lpLxOJtY/c00sCK+ZtnaFYZTQQVTYm6D\n d2RdkPP02HtTVbfZ21jogY7OtbRbg4HKSEXfDods/lf6wj0bP+8Teq6O9\n zf6HoeoPnqnEP1Psjr9n6g2pR/Y5KsKLJsTGt0/T+daXN+Qz5uX4m1d32\n 1IfXJQM+QSiBetfmMbjNeH56OfN+nUp0s0aNyUqPMJoIvtj2RoedonW8I\n JJdqndE6Mtn4HU9ZA5B9mgA4UaC3gNqT778/hzPK4ufqyB/ObRxajNlfg\n sOIc0tTupk2GSdOqd5Ym3YMDzeNIHDXYi1B4U/m3vyBxs7XEJNZr6A43E Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10692\"; a=\"375324410\"", "E=Sophos;i=\"5.99,230,1677571200\"; d=\"scan'208\";a=\"375324410\"", "E=McAfee;i=\"6600,9927,10692\"; a=\"805845887\"", "E=Sophos;i=\"5.99,230,1677571200\"; d=\"scan'208\";a=\"805845887\"" ], "X-ExtLoop1": "1", "From": "Qiming Yang <qiming.yang@intel.com>", "To": "dev@dpdk.org", "Cc": "qi.z.zhang@intel.com, Qiming Yang <qiming.yang@intel.com>,\n Lukasz Plachno <lukasz.plachno@intel.com>", "Subject": "[PATCH 28/30] net/ice/base: use const array to store link modes", "Date": "Thu, 27 Apr 2023 06:19:59 +0000", "Message-Id": "<20230427062001.478032-29-qiming.yang@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230427062001.478032-1-qiming.yang@intel.com>", "References": "<20230427062001.478032-1-qiming.yang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Change suggested during review on E1000 mailing list.\nImplementation moves 1,5k of .text to .rodata\n\nSigned-off-by: Lukasz Plachno <lukasz.plachno@intel.com>\nSigned-off-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 135 +++++++-----------------------\n 1 file changed, 30 insertions(+), 105 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex e4b25321db..f899e4644c 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -85,118 +85,36 @@ static const char * const ice_link_mode_str_high[] = {\n \tice_arr_elem_idx(3, \"100G_AUI2_AOC_ACC\"),\n \tice_arr_elem_idx(4, \"100G_AUI2\"),\n };\n-/**\n- * dump_phy_type - helper function that prints PHY type strings\n- * @hw: pointer to the HW structure\n- * @phy: 64 bit PHY type to decipher\n- * @i: bit index within phy\n- * @phy_string: string corresponding to bit i in phy\n- * @prefix: prefix string to differentiate multiple dumps\n- */\n-static void\n-dump_phy_type(struct ice_hw *hw, u64 phy, u8 i, const char *phy_string,\n-\t const char *prefix)\n-{\n-\tif (phy & BIT_ULL(i))\n-\t\tice_debug(hw, ICE_DBG_PHY, \"%s: bit(%d): %s\\n\", prefix, i,\n-\t\t\t phy_string);\n-}\n \n /**\n- * ice_dump_phy_type_low - helper function to dump phy_type_low\n+ * ice_dump_phy_type - helper function to dump phy_type\n * @hw: pointer to the HW structure\n * @low: 64 bit value for phy_type_low\n+ * @high: 64 bit value for phy_type_high\n * @prefix: prefix string to differentiate multiple dumps\n */\n static void\n-ice_dump_phy_type_low(struct ice_hw *hw, u64 low, const char *prefix)\n+ice_dump_phy_type(struct ice_hw *hw, u64 low, u64 high, const char *prefix)\n {\n+\tu32 i;\n+\n \tice_debug(hw, ICE_DBG_PHY, \"%s: phy_type_low: 0x%016llx\\n\", prefix,\n \t\t (unsigned long long)low);\n \n-\tdump_phy_type(hw, low, 0, \"100BASE_TX\", prefix);\n-\tdump_phy_type(hw, low, 1, \"100M_SGMII\", prefix);\n-\tdump_phy_type(hw, low, 2, \"1000BASE_T\", prefix);\n-\tdump_phy_type(hw, low, 3, \"1000BASE_SX\", prefix);\n-\tdump_phy_type(hw, low, 4, \"1000BASE_LX\", prefix);\n-\tdump_phy_type(hw, low, 5, \"1000BASE_KX\", prefix);\n-\tdump_phy_type(hw, low, 6, \"1G_SGMII\", prefix);\n-\tdump_phy_type(hw, low, 7, \"2500BASE_T\", prefix);\n-\tdump_phy_type(hw, low, 8, \"2500BASE_X\", prefix);\n-\tdump_phy_type(hw, low, 9, \"2500BASE_KX\", prefix);\n-\tdump_phy_type(hw, low, 10, \"5GBASE_T\", prefix);\n-\tdump_phy_type(hw, low, 11, \"5GBASE_KR\", prefix);\n-\tdump_phy_type(hw, low, 12, \"10GBASE_T\", prefix);\n-\tdump_phy_type(hw, low, 13, \"10G_SFI_DA\", prefix);\n-\tdump_phy_type(hw, low, 14, \"10GBASE_SR\", prefix);\n-\tdump_phy_type(hw, low, 15, \"10GBASE_LR\", prefix);\n-\tdump_phy_type(hw, low, 16, \"10GBASE_KR_CR1\", prefix);\n-\tdump_phy_type(hw, low, 17, \"10G_SFI_AOC_ACC\", prefix);\n-\tdump_phy_type(hw, low, 18, \"10G_SFI_C2C\", prefix);\n-\tdump_phy_type(hw, low, 19, \"25GBASE_T\", prefix);\n-\tdump_phy_type(hw, low, 20, \"25GBASE_CR\", prefix);\n-\tdump_phy_type(hw, low, 21, \"25GBASE_CR_S\", prefix);\n-\tdump_phy_type(hw, low, 22, \"25GBASE_CR1\", prefix);\n-\tdump_phy_type(hw, low, 23, \"25GBASE_SR\", prefix);\n-\tdump_phy_type(hw, low, 24, \"25GBASE_LR\", prefix);\n-\tdump_phy_type(hw, low, 25, \"25GBASE_KR\", prefix);\n-\tdump_phy_type(hw, low, 26, \"25GBASE_KR_S\", prefix);\n-\tdump_phy_type(hw, low, 27, \"25GBASE_KR1\", prefix);\n-\tdump_phy_type(hw, low, 28, \"25G_AUI_AOC_ACC\", prefix);\n-\tdump_phy_type(hw, low, 29, \"25G_AUI_C2C\", prefix);\n-\tdump_phy_type(hw, low, 30, \"40GBASE_CR4\", prefix);\n-\tdump_phy_type(hw, low, 31, \"40GBASE_SR4\", prefix);\n-\tdump_phy_type(hw, low, 32, \"40GBASE_LR4\", prefix);\n-\tdump_phy_type(hw, low, 33, \"40GBASE_KR4\", prefix);\n-\tdump_phy_type(hw, low, 34, \"40G_XLAUI_AOC_ACC\", prefix);\n-\tdump_phy_type(hw, low, 35, \"40G_XLAUI\", prefix);\n-\tdump_phy_type(hw, low, 36, \"50GBASE_CR2\", prefix);\n-\tdump_phy_type(hw, low, 37, \"50GBASE_SR2\", prefix);\n-\tdump_phy_type(hw, low, 38, \"50GBASE_LR2\", prefix);\n-\tdump_phy_type(hw, low, 39, \"50GBASE_KR2\", prefix);\n-\tdump_phy_type(hw, low, 40, \"50G_LAUI2_AOC_ACC\", prefix);\n-\tdump_phy_type(hw, low, 41, \"50G_LAUI2\", prefix);\n-\tdump_phy_type(hw, low, 42, \"50G_AUI2_AOC_ACC\", prefix);\n-\tdump_phy_type(hw, low, 43, \"50G_AUI2\", prefix);\n-\tdump_phy_type(hw, low, 44, \"50GBASE_CP\", prefix);\n-\tdump_phy_type(hw, low, 45, \"50GBASE_SR\", prefix);\n-\tdump_phy_type(hw, low, 46, \"50GBASE_FR\", prefix);\n-\tdump_phy_type(hw, low, 47, \"50GBASE_LR\", prefix);\n-\tdump_phy_type(hw, low, 48, \"50GBASE_KR_PAM4\", prefix);\n-\tdump_phy_type(hw, low, 49, \"50G_AUI1_AOC_ACC\", prefix);\n-\tdump_phy_type(hw, low, 50, \"50G_AUI1\", prefix);\n-\tdump_phy_type(hw, low, 51, \"100GBASE_CR4\", prefix);\n-\tdump_phy_type(hw, low, 52, \"100GBASE_SR4\", prefix);\n-\tdump_phy_type(hw, low, 53, \"100GBASE_LR4\", prefix);\n-\tdump_phy_type(hw, low, 54, \"100GBASE_KR4\", prefix);\n-\tdump_phy_type(hw, low, 55, \"100G_CAUI4_AOC_ACC\", prefix);\n-\tdump_phy_type(hw, low, 56, \"100G_CAUI4\", prefix);\n-\tdump_phy_type(hw, low, 57, \"100G_AUI4_AOC_ACC\", prefix);\n-\tdump_phy_type(hw, low, 58, \"100G_AUI4\", prefix);\n-\tdump_phy_type(hw, low, 59, \"100GBASE_CR_PAM4\", prefix);\n-\tdump_phy_type(hw, low, 60, \"100GBASE_KR_PAM4\", prefix);\n-\tdump_phy_type(hw, low, 61, \"100GBASE_CP2\", prefix);\n-\tdump_phy_type(hw, low, 62, \"100GBASE_SR2\", prefix);\n-\tdump_phy_type(hw, low, 63, \"100GBASE_DR\", prefix);\n-}\n-\n-/**\n- * ice_dump_phy_type_high - helper function to dump phy_type_high\n- * @hw: pointer to the HW structure\n- * @high: 64 bit value for phy_type_high\n- * @prefix: prefix string to differentiate multiple dumps\n- */\n-static void\n-ice_dump_phy_type_high(struct ice_hw *hw, u64 high, const char *prefix)\n-{\n+\tfor (i = 0; i < ARRAY_SIZE(ice_link_mode_str_low); i++) {\n+\t\tif (low & BIT_ULL(i))\n+\t\t\tice_debug(hw, ICE_DBG_PHY, \"%s: bit(%d): %s\\n\",\n+\t\t\t\t prefix, i, ice_link_mode_str_low[i]);\n+\t}\n+\n \tice_debug(hw, ICE_DBG_PHY, \"%s: phy_type_high: 0x%016llx\\n\", prefix,\n \t\t (unsigned long long)high);\n \n-\tdump_phy_type(hw, high, 0, \"100GBASE_KR2_PAM4\", prefix);\n-\tdump_phy_type(hw, high, 1, \"100G_CAUI2_AOC_ACC\", prefix);\n-\tdump_phy_type(hw, high, 2, \"100G_CAUI2\", prefix);\n-\tdump_phy_type(hw, high, 3, \"100G_AUI2_AOC_ACC\", prefix);\n-\tdump_phy_type(hw, high, 4, \"100G_AUI2\", prefix);\n+\tfor (i = 0; i < ARRAY_SIZE(ice_link_mode_str_high); i++) {\n+\t\tif (high & BIT_ULL(i))\n+\t\t\tice_debug(hw, ICE_DBG_PHY, \"%s: bit(%d): %s\\n\",\n+\t\t\t\t prefix, i, ice_link_mode_str_high[i]);\n+\t}\n }\n \n /**\n@@ -551,23 +469,30 @@ ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,\n \t\tcmd->param0 |= CPU_TO_LE16(ICE_AQC_GET_PHY_RQM);\n \n \tcmd->param0 |= CPU_TO_LE16(report_mode);\n+\n \tstatus = ice_aq_send_cmd(hw, &desc, pcaps, pcaps_size, cd);\n \n \tice_debug(hw, ICE_DBG_LINK, \"get phy caps dump\\n\");\n \n-\tif (report_mode == ICE_AQC_REPORT_TOPO_CAP_MEDIA)\n+\tswitch (report_mode) {\n+\tcase ICE_AQC_REPORT_TOPO_CAP_MEDIA:\n \t\tprefix = \"phy_caps_media\";\n-\telse if (report_mode == ICE_AQC_REPORT_TOPO_CAP_NO_MEDIA)\n+\t\tbreak;\n+\tcase ICE_AQC_REPORT_TOPO_CAP_NO_MEDIA:\n \t\tprefix = \"phy_caps_no_media\";\n-\telse if (report_mode == ICE_AQC_REPORT_ACTIVE_CFG)\n+\t\tbreak;\n+\tcase ICE_AQC_REPORT_ACTIVE_CFG:\n \t\tprefix = \"phy_caps_active\";\n-\telse if (report_mode == ICE_AQC_REPORT_DFLT_CFG)\n+\t\tbreak;\n+\tcase ICE_AQC_REPORT_DFLT_CFG:\n \t\tprefix = \"phy_caps_default\";\n-\telse\n+\t\tbreak;\n+\tdefault:\n \t\tprefix = \"phy_caps_invalid\";\n+\t}\n \n-\tice_dump_phy_type_low(hw, LE64_TO_CPU(pcaps->phy_type_low), prefix);\n-\tice_dump_phy_type_high(hw, LE64_TO_CPU(pcaps->phy_type_high), prefix);\n+\tice_dump_phy_type(hw, LE64_TO_CPU(pcaps->phy_type_low),\n+\t\t\t LE64_TO_CPU(pcaps->phy_type_high), prefix);\n \n \tice_debug(hw, ICE_DBG_LINK, \"%s: report_mode = 0x%x\\n\",\n \t\t prefix, report_mode);\n", "prefixes": [ "28/30" ] }