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GET /api/patches/118675/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 118675,
    "url": "https://patches.dpdk.org/api/patches/118675/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20221020000733.4026522-1-abdullah.sevincer@intel.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20221020000733.4026522-1-abdullah.sevincer@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20221020000733.4026522-1-abdullah.sevincer@intel.com",
    "date": "2022-10-20T00:07:33",
    "name": "[v2] event/dlb2: fix port COS range allocation",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "c28cd99b3cb3783d86db41c119a0f433ae997dcf",
    "submitter": {
        "id": 2843,
        "url": "https://patches.dpdk.org/api/people/2843/?format=api",
        "name": "Sevincer, Abdullah",
        "email": "abdullah.sevincer@intel.com"
    },
    "delegate": {
        "id": 310,
        "url": "https://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20221020000733.4026522-1-abdullah.sevincer@intel.com/mbox/",
    "series": [
        {
            "id": 25323,
            "url": "https://patches.dpdk.org/api/series/25323/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=25323",
            "date": "2022-10-20T00:07:33",
            "name": "[v2] event/dlb2: fix port COS range allocation",
            "version": 2,
            "mbox": "https://patches.dpdk.org/series/25323/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/118675/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/118675/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 44274A09FB;\n\tThu, 20 Oct 2022 02:08:25 +0200 (CEST)",
            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id DF19A40DD8;\n\tThu, 20 Oct 2022 02:08:24 +0200 (CEST)",
            "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id BD9BA40A7D;\n Thu, 20 Oct 2022 02:08:22 +0200 (CEST)",
            "from orsmga002.jf.intel.com ([10.7.209.21])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 19 Oct 2022 17:07:36 -0700",
            "from txanpdk02.an.intel.com ([10.123.117.76])\n by orsmga002.jf.intel.com with ESMTP; 19 Oct 2022 17:07:35 -0700"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1666224503; x=1697760503;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=qRoDBunvx4iYbs6dZPL5tKODFTvni72S8t7Rad9+sMk=;\n b=FH2Btus+bF7e9ESovisV1rheXNuQjppXC5gTMT/WrcOxWyJshkGSFuqs\n ISJYQt7whCikJT9hcEKtcPPTL/g8BEDUf41O/C73+8prhL4k0U23mOZT/\n xQo7fO3thnZEmji+nwPee1Ikv6fAqFmEIs4eTMOrDirhfFWhZmxDxkMbX\n 6SmsgwI1sOZRgLwkBJh+fbs/DI9AWwW+914Lv7+KEZSp+t6uTtu+wma8p\n KQWYMEN3I1hNPzvoMadZO6X1Q2214esmDBdMrnX5iybEB2Tcmf0Ks3KBl\n 3oLjHOfPLG3oHmzzRs5h9rAi9grYev+vkyBPnQra0FW/2u2bWkdPJjAdk w==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6500,9779,10505\"; a=\"333125655\"",
            "E=Sophos;i=\"5.95,196,1661842800\"; d=\"scan'208\";a=\"333125655\"",
            "E=McAfee;i=\"6500,9779,10505\"; a=\"629500632\"",
            "E=Sophos;i=\"5.95,196,1661842800\"; d=\"scan'208\";a=\"629500632\""
        ],
        "X-ExtLoop1": "1",
        "From": "Abdullah Sevincer <abdullah.sevincer@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "jerinj@marvell.com, shivani.doneria@intel.com, tirthendu.sarkar@intel.com,\n Abdullah Sevincer <abdullah.sevincer@intel.com>, stable@dpdk.org",
        "Subject": "[PATCH v2] event/dlb2: fix port COS range allocation",
        "Date": "Wed, 19 Oct 2022 19:07:33 -0500",
        "Message-Id": "<20221020000733.4026522-1-abdullah.sevincer@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20221019194734.4009186-1-abdullah.sevincer@intel.com>",
        "References": "<20221019194734.4009186-1-abdullah.sevincer@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "This commit fixes allocation of port COS\nwhen application requested port COS exceeds\n(e.g. beyond 0-15) the number of LDB ports for\nthe domain.\n\nWe limit application specified ports from a\nCOS to the max ports allocated for the COS\nso that the rest of the of the ports can be\nallocated from default(best) COS.\n\nFixes: bec8901bfe9f (\"event/dlb2: support ldb port specific COS\")\nCc: stable@dpdk.org\n\nSigned-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>\n---\n drivers/event/dlb2/dlb2.c      | 14 +++++++++-----\n drivers/event/dlb2/dlb2_priv.h |  2 ++\n 2 files changed, 11 insertions(+), 5 deletions(-)",
    "diff": "diff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c\nindex 7fd89e940b..62e2bbeb3d 100644\n--- a/drivers/event/dlb2/dlb2.c\n+++ b/drivers/event/dlb2/dlb2.c\n@@ -180,11 +180,14 @@ dlb2_init_port_cos(struct dlb2_eventdev *dlb2, int *port_cos)\n {\n \tint q;\n \n-\tfor (q = 0; q < DLB2_MAX_NUM_PORTS_ALL; q++)\n-\t\tif (port_cos[q] != DLB2_COS_DEFAULT) {\n-\t\t\tdlb2->ev_ports[q].cos_id = port_cos[q];\n+\tfor (q = 0; q < DLB2_MAX_NUM_PORTS_ALL; q++) {\n+\t\tdlb2->ev_ports[q].cos_id = port_cos[q];\n+\t\tif (port_cos[q] != DLB2_COS_DEFAULT &&\n+\t\t    dlb2->cos_ports[port_cos[q]] < DLB2_MAX_NUM_LDB_PORTS_PER_COS) {\n \t\t\tdlb2->cos_ports[port_cos[q]]++;\n+\t\t\tdlb2->max_cos_port = q;\n \t\t}\n+\t}\n }\n \n static void\n@@ -840,8 +843,9 @@ dlb2_hw_create_sched_domain(struct dlb2_eventdev *dlb2,\n \tcos_ports = dlb2->cos_ports[0] + dlb2->cos_ports[1] +\n \t\t    dlb2->cos_ports[2] + dlb2->cos_ports[3];\n \n-\tif (cos_ports > resources_asked->num_ldb_ports) {\n-\t\tDLB2_LOG_ERR(\"dlb2: num_ldb_ports < nonzero cos_ports\\n\");\n+\tif (cos_ports > resources_asked->num_ldb_ports ||\n+\t    (cos_ports && dlb2->max_cos_port >= resources_asked->num_ldb_ports)) {\n+\t\tDLB2_LOG_ERR(\"dlb2: num_ldb_ports < cos_ports\\n\");\n \t\tret = EINVAL;\n \t\tgoto error_exit;\n \t}\ndiff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h\nindex 9ef5bcb901..03ef15ac51 100644\n--- a/drivers/event/dlb2/dlb2_priv.h\n+++ b/drivers/event/dlb2/dlb2_priv.h\n@@ -93,6 +93,7 @@\n #define DLB2_NUM_SN_GROUPS 2\n #define DLB2_MAX_LDB_SN_ALLOC 1024\n #define DLB2_MAX_QUEUE_DEPTH_THRESHOLD 8191\n+#define DLB2_MAX_NUM_LDB_PORTS_PER_COS (DLB2_MAX_NUM_LDB_PORTS/DLB2_COS_NUM_VALS)\n \n /* 2048 total hist list entries and 64 total ldb ports, which\n  * makes for 2048/64 == 32 hist list entries per port. However, CQ\n@@ -636,6 +637,7 @@ struct dlb2_eventdev {\n \t};\n \tuint32_t cos_ports[DLB2_COS_NUM_VALS]; /* total ldb ports in each class */\n \tuint32_t cos_bw[DLB2_COS_NUM_VALS]; /* bandwidth per cos domain */\n+\tuint8_t max_cos_port; /* Max LDB port from any cos */\n };\n \n /* used for collecting and passing around the dev args */\n",
    "prefixes": [
        "v2"
    ]
}