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{
    "id": 114617,
    "url": "https://patches.dpdk.org/api/patches/114617/?format=api",
    "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220804134430.6192-2-adwivedi@marvell.com/",
    "project": {
        "id": 1,
        "url": "https://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20220804134430.6192-2-adwivedi@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20220804134430.6192-2-adwivedi@marvell.com",
    "date": "2022-08-04T13:44:25",
    "name": "[1/6] ethdev: add trace points",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "5d0be043427385c910355b9e837a5224edb76e46",
    "submitter": {
        "id": 1561,
        "url": "https://patches.dpdk.org/api/people/1561/?format=api",
        "name": "Ankur Dwivedi",
        "email": "adwivedi@marvell.com"
    },
    "delegate": {
        "id": 3961,
        "url": "https://patches.dpdk.org/api/users/3961/?format=api",
        "username": "arybchenko",
        "first_name": "Andrew",
        "last_name": "Rybchenko",
        "email": "andrew.rybchenko@oktetlabs.ru"
    },
    "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220804134430.6192-2-adwivedi@marvell.com/mbox/",
    "series": [
        {
            "id": 24204,
            "url": "https://patches.dpdk.org/api/series/24204/?format=api",
            "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=24204",
            "date": "2022-08-04T13:44:24",
            "name": "add trace points in ethdev library",
            "version": 1,
            "mbox": "https://patches.dpdk.org/series/24204/mbox/"
        }
    ],
    "comments": "https://patches.dpdk.org/api/patches/114617/comments/",
    "check": "success",
    "checks": "https://patches.dpdk.org/api/patches/114617/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
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        ],
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        "From": "Ankur Dwivedi <adwivedi@marvell.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<thomas@monjalon.net>, <mdr@ashroe.eu>, <orika@nvidia.com>,\n <ferruh.yigit@xilinx.com>, <chas3@att.com>, <humin29@huawei.com>,\n <linville@tuxdriver.com>, <ciara.loftus@intel.com>,\n <qi.z.zhang@intel.com>, <mw@semihalf.com>, <mk@semihalf.com>,\n <shaibran@amazon.com>, <evgenys@amazon.com>, <igorch@amazon.com>,\n <chandu@amd.com>, <irusskikh@marvell.com>,\n <shepard.siegel@atomicrules.com>, <ed.czeck@atomicrules.com>,\n <john.miller@atomicrules.com>, <ajit.khaparde@broadcom.com>,\n <somnath.kotur@broadcom.com>, <jerinj@marvell.com>,\n <mczekaj@marvell.com>, <sthotton@marvell.com>,\n <srinivasan@marvell.com>, <hkalra@marvell.com>,\n <rahul.lakkireddy@chelsio.com>, <johndale@cisco.com>,\n <hyonkim@cisco.com>, <liudongdong3@huawei.com>,\n <yisen.zhuang@huawei.com>, <xuanziyang2@huawei.com>,\n <cloud.wangxiaoyun@huawei.com>, <zhouguoyang@huawei.com>,\n <simei.su@intel.com>, <wenjun1.wu@intel.com>, <qiming.yang@intel.com>,\n <Yuying.Zhang@intel.com>, <beilei.xing@intel.com>,\n <xiao.w.wang@intel.com>, <jingjing.wu@intel.com>,\n <junfeng.guo@intel.com>, <rosen.xu@intel.com>,\n <ndabilpuram@marvell.com>, <kirankumark@marvell.com>,\n <skori@marvell.com>, <skoteshwar@marvell.com>, <lironh@marvell.com>,\n <zr@semihalf.com>, <radhac@marvell.com>, <vburru@marvell.com>,\n <sedara@marvell.com>, <matan@nvidia.com>, <viacheslavo@nvidia.com>,\n <sthemmin@microsoft.com>, <longli@microsoft.com>, <spinler@cesnet.cz>,\n <chaoyong.he@corigine.com>, <niklas.soderlund@corigine.com>,\n <hemant.agrawal@nxp.com>, <sachin.saxena@oss.nxp.com>,\n <g.singh@nxp.com>, <apeksha.gupta@nxp.com>, <sachin.saxena@nxp.com>,\n <aboyer@pensando.io>, <rmody@marvell.com>, <shshaikh@marvell.com>,\n <dsinghrawat@marvell.com>, <andrew.rybchenko@oktetlabs.ru>,\n <jiawenwu@trustnetic.com>, <jianwang@trustnetic.com>,\n <jbehrens@vmware.com>, <maxime.coquelin@redhat.com>,\n <chenbo.xia@intel.com>, <steven.webster@windriver.com>,\n <matt.peters@windriver.com>, <bruce.richardson@intel.com>,\n <mtetsuyah@gmail.com>, <grive@u256.net>, <jasvinder.singh@intel.com>,\n <cristian.dumitrescu@intel.com>, <jgrajcia@cisco.com>,\n Ankur Dwivedi <adwivedi@marvell.com>",
        "Subject": "[PATCH 1/6] ethdev: add trace points",
        "Date": "Thu, 4 Aug 2022 19:14:25 +0530",
        "Message-ID": "<20220804134430.6192-2-adwivedi@marvell.com>",
        "X-Mailer": "git-send-email 2.28.0",
        "In-Reply-To": "<20220804134430.6192-1-adwivedi@marvell.com>",
        "References": "<20220804134430.6192-1-adwivedi@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "otxNh5ddflM8-Y0RLStbzFOEcMm6tKaK",
        "X-Proofpoint-ORIG-GUID": "otxNh5ddflM8-Y0RLStbzFOEcMm6tKaK",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.883,Hydra:6.0.517,FMLib:17.11.122.1\n definitions=2022-08-04_03,2022-08-04_02,2022-06-22_01",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
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        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Add trace points for ethdev functions.\n\nSigned-off-by: Ankur Dwivedi <adwivedi@marvell.com>\n---\n lib/ethdev/ethdev_private.c      |    5 +\n lib/ethdev/ethdev_trace_points.c |  438 +++++++++++\n lib/ethdev/rte_ethdev.c          |  150 ++++\n lib/ethdev/rte_ethdev_trace.h    | 1182 ++++++++++++++++++++++++++++++\n lib/ethdev/version.map           |  147 ++++\n 5 files changed, 1922 insertions(+)",
    "diff": "diff --git a/lib/ethdev/ethdev_private.c b/lib/ethdev/ethdev_private.c\nindex 48090c879a..e483145816 100644\n--- a/lib/ethdev/ethdev_private.c\n+++ b/lib/ethdev/ethdev_private.c\n@@ -5,6 +5,7 @@\n #include <rte_debug.h>\n \n #include \"rte_ethdev.h\"\n+#include \"rte_ethdev_trace.h\"\n #include \"ethdev_driver.h\"\n #include \"ethdev_private.h\"\n \n@@ -291,6 +292,8 @@ rte_eth_call_rx_callbacks(uint16_t port_id, uint16_t queue_id,\n {\n \tconst struct rte_eth_rxtx_callback *cb = opaque;\n \n+\trte_eth_trace_call_rx_callbacks(port_id, queue_id, rx_pkts, nb_rx,\n+\t\t\t\t\tnb_pkts, opaque);\n \twhile (cb != NULL) {\n \t\tnb_rx = cb->fn.rx(port_id, queue_id, rx_pkts, nb_rx,\n \t\t\t\tnb_pkts, cb->param);\n@@ -306,6 +309,8 @@ rte_eth_call_tx_callbacks(uint16_t port_id, uint16_t queue_id,\n {\n \tconst struct rte_eth_rxtx_callback *cb = opaque;\n \n+\trte_eth_trace_call_tx_callbacks(port_id, queue_id, tx_pkts, nb_pkts,\n+\t\t\t\t\topaque);\n \twhile (cb != NULL) {\n \t\tnb_pkts = cb->fn.tx(port_id, queue_id, tx_pkts, nb_pkts,\n \t\t\t\tcb->param);\ndiff --git a/lib/ethdev/ethdev_trace_points.c b/lib/ethdev/ethdev_trace_points.c\nindex 2919409a15..2e80401771 100644\n--- a/lib/ethdev/ethdev_trace_points.c\n+++ b/lib/ethdev/ethdev_trace_points.c\n@@ -29,3 +29,441 @@ RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rx_burst,\n \n RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_tx_burst,\n \tlib.ethdev.tx.burst)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_add_first_rx_callback,\n+\tlib.ethdev.add_first_rx_callback)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_add_rx_callback,\n+\tlib.ethdev.add_rx_callback)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_add_tx_callback,\n+\tlib.ethdev.add_tx_callback)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_allmulticast_disable,\n+\tlib.ethdev.allmulticast_disable)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_allmulticast_enable,\n+\tlib.ethdev.allmulticast_enable)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_allmulticast_get,\n+\tlib.ethdev.allmulticast_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_call_rx_callbacks,\n+\tlib.ethdev.call_rx_callbacks)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_call_tx_callbacks,\n+\tlib.ethdev.call_tx_callbacks)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_mtu,\n+\tlib.ethdev.set_mtu)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_adjust_nb_rx_tx_desc,\n+\tlib.ethdev.adjust_nb_rx_tx_desc)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_callback_register,\n+\tlib.ethdev.callback_register)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_callback_unregister,\n+\tlib.ethdev.callback_unregister)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_default_mac_addr_set,\n+\tlib.ethdev.default_mac_addr_set)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_flow_ctrl_get,\n+\tlib.ethdev.flow_ctrl_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_flow_ctrl_set,\n+\tlib.ethdev.flow_ctrl_set)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_fw_version_get,\n+\tlib.ethdev.fw_version_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_dcb_info,\n+\tlib.ethdev.get_dcb_info)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_eeprom,\n+\tlib.ethdev.get_eeprom)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_eeprom_length,\n+\tlib.ethdev.get_eeprom_length)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_mtu,\n+\tlib.ethdev.get_mtu)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_count_avail,\n+\tlib.ethdev.count_avail)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_count_total,\n+\tlib.ethdev.count_total)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_name_by_port,\n+\tlib.ethdev.get_name_by_port)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_port_by_name,\n+\tlib.ethdev.get_port_by_name)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_reg_info,\n+\tlib.ethdev.get_reg_info)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_sec_ctx,\n+\tlib.ethdev.get_sec_ctx)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_supported_ptypes,\n+\tlib.ethdev.get_supported_ptypes)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_vlan_offload,\n+\tlib.ethdev.get_vlan_offload)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_info_get,\n+\tlib.ethdev.info_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_is_removed,\n+\tlib.ethdev.is_removed)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_is_valid_port,\n+\tlib.ethdev.is_valid_port)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_mac_addr_add,\n+\tlib.ethdev.mac_addr_add)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_mac_addr_remove,\n+\tlib.ethdev.mac_addr_remove)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_pool_ops_supported,\n+\tlib.ethdev.pool_ops_supported)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_priority_flow_ctrl_set,\n+\tlib.ethdev.priority_flow_ctrl_set)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_reset,\n+\tlib.ethdev.reset)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rss_hash_conf_get,\n+\tlib.ethdev.rss_hash_conf_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rss_hash_update,\n+\tlib.ethdev.rss_hash_update)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rss_reta_query,\n+\tlib.ethdev.rss_reta_query)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rss_reta_update,\n+\tlib.ethdev.rss_reta_update)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rx_intr_ctl,\n+\tlib.ethdev.rx_intr_ctl)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rx_intr_ctl_q,\n+\tlib.ethdev.rx_intr_ctl_q)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rx_intr_ctl_q_get_fd,\n+\tlib.ethdev.rx_intr_ctl_q_get_fd)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rx_intr_disable,\n+\tlib.ethdev.rx_intr_disable)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rx_intr_enable,\n+\tlib.ethdev.rx_intr_enable)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rx_offload_name,\n+\tlib.ethdev.rx_offload_name)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rx_queue_start,\n+\tlib.ethdev.rx_queue_start)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_rx_queue_stop,\n+\tlib.ethdev.rx_queue_stop)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_eeprom,\n+\tlib.ethdev.set_eeprom)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_link_down,\n+\tlib.ethdev.set_link_down)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_link_up,\n+\tlib.ethdev.set_link_up)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_mc_addr_list,\n+\tlib.ethdev.set_mc_addr_list)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_ptypes,\n+\tlib.ethdev.set_ptypes)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_rx_queue_stats_mapping,\n+\tlib.ethdev.set_rx_queue_stats_mapping)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_tx_queue_stats_mapping,\n+\tlib.ethdev.set_tx_queue_stats_mapping)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_vlan_ether_type,\n+\tlib.ethdev.set_vlan_ether_type)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_vlan_offload,\n+\tlib.ethdev.set_vlan_offload)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_vlan_pvid,\n+\tlib.ethdev.set_vlan_pvid)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_set_vlan_strip_on_queue,\n+\tlib.ethdev.set_vlan_strip_on_queue)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_socket_id,\n+\tlib.ethdev.socket_id)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_tx_offload_name,\n+\tlib.ethdev.tx_offload_name)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_tx_queue_start,\n+\tlib.ethdev.tx_queue_start)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_tx_queue_stop,\n+\tlib.ethdev.tx_queue_stop)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_uc_all_hash_table_set,\n+\tlib.ethdev.uc_all_hash_table_set)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_uc_hash_table_set,\n+\tlib.ethdev.uc_hash_table_set)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_udp_tunnel_port_add,\n+\tlib.ethdev.udp_tunnel_port_add)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_udp_tunnel_port_delete,\n+\tlib.ethdev.udp_tunnel_port_delete)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_vlan_filter,\n+\tlib.ethdev.vlan_filter)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_find_next,\n+\tlib.ethdev.find_next)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_find_next_of,\n+\tlib.ethdev.find_next_of)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_find_next_owned_by,\n+\tlib.ethdev.find_next_owned_by)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_find_next_sibling,\n+\tlib.ethdev.find_next_sibling)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_iterator_cleanup,\n+\tlib.ethdev.iterator_cleanup)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_iterator_init,\n+\tlib.ethdev.iterator_init)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_iterator_next,\n+\tlib.ethdev.iterator_next)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_led_off,\n+\tlib.ethdev.led_off)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_led_on,\n+\tlib.ethdev.led_on)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_link_get,\n+\tlib.ethdev.link_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_link_get_nowait,\n+\tlib.ethdev.link_get_nowait)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_macaddr_get,\n+\tlib.ethdev.macaddr_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_promiscuous_disable,\n+\tlib.ethdev.promiscuous_disable)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_promiscuous_enable,\n+\tlib.ethdev.promiscuous_enable)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_promiscuous_get,\n+\tlib.ethdev.promiscuous_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_remove_rx_callback,\n+\tlib.ethdev.remove_rx_callback)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_remove_tx_callback,\n+\tlib.ethdev.remove_tx_callback)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_rx_burst_mode_get,\n+\tlib.ethdev.rx_burst_mode_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_rx_queue_info_get,\n+\tlib.ethdev.rx_queue_info_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_rx_queue_setup,\n+\tlib.ethdev.rx_queue_setup)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_set_queue_rate_limit,\n+\tlib.ethdev.set_queue_rate_limit)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_speed_bitflag,\n+\tlib.ethdev.speed_bitflag)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_stats_get,\n+\tlib.ethdev.stats_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_stats_reset,\n+\tlib.ethdev.stats_reset)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_timesync_adjust_time,\n+\tlib.ethdev.timesync_adjust_time)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_timesync_disable,\n+\tlib.ethdev.timesync_disable)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_timesync_enable,\n+\tlib.ethdev.timesync_enable)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_timesync_read_rx_timestamp,\n+\tlib.ethdev.timesync_read_rx_timestamp)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_timesync_read_time,\n+\tlib.ethdev.timesync_read_time)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_timesync_read_tx_timestamp,\n+\tlib.ethdev.timesync_read_tx_timestamp)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_timesync_write_time,\n+\tlib.ethdev.timesync_write_time)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_tx_buffer_count_callback,\n+\tlib.ethdev.tx_buffer_count_callback)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_tx_buffer_drop_callback,\n+\tlib.ethdev.tx_buffer_drop_callback)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_tx_buffer_init,\n+\tlib.ethdev.tx_buffer_init)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_tx_buffer_set_err_callback,\n+\tlib.ethdev.tx_buffer_set_err_callback)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_tx_burst_mode_get,\n+\tlib.ethdev.tx_burst_mode_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_tx_done_cleanup,\n+\tlib.ethdev.tx_done_cleanup)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_tx_queue_info_get,\n+\tlib.ethdev.tx_queue_info_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_tx_queue_setup,\n+\tlib.ethdev.tx_queue_setup)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_xstats_get,\n+\tlib.ethdev.xstats_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_xstats_get_by_id,\n+\tlib.ethdev.xstats_get_by_id)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_xstats_get_id_by_name,\n+\tlib.ethdev.xstats_get_id_by_name)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_xstats_get_names,\n+\tlib.ethdev.xstats_get_names)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_xstats_get_names_by_id,\n+\tlib.ethdev.xstats_get_names_by_id)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_xstats_reset,\n+\tlib.ethdev.xstats_reset)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_owner_delete,\n+\tlib.ethdev.owner_delete)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_owner_get,\n+\tlib.ethdev.owner_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_owner_new,\n+\tlib.ethdev.owner_new)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_owner_set,\n+\tlib.ethdev.owner_set)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_owner_unset,\n+\tlib.ethdev.owner_unset)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_module_eeprom,\n+\tlib.ethdev.get_module_eeprom)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_get_module_info,\n+\tlib.ethdev.get_module_info)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_read_clock,\n+\tlib.ethdev.read_clock)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_hairpin_capability_get,\n+\tlib.ethdev.hairpin_capability_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_rx_hairpin_queue_setup,\n+\tlib.ethdev.rx.hairpin_queue_setup)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_tx_hairpin_queue_setup,\n+\tlib.ethdev.tx.hairpin_queue_setup)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_hairpin_bind,\n+\tlib.ethdev.hairpin_bind)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_hairpin_get_peer_ports,\n+\tlib.ethdev.hairpin_get_peer_ports)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_hairpin_unbind,\n+\tlib.ethdev.hairpin_unbind)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_link_speed_to_str,\n+\tlib.ethdev.link_speed_to_str)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_link_to_str,\n+\tlib.ethdev.link_to_str)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_fec_get_capability,\n+\tlib.ethdev.fec_get_capability)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_fec_get,\n+\tlib.ethdev.fec_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_fec_set,\n+\tlib.ethdev.fec_set)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_get_monitor_addr,\n+\tlib.ethdev.get_monitor_addr)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_representor_info_get,\n+\tlib.ethdev.representor_info_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_capability_name,\n+\tlib.ethdev.capability_name)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_conf_get,\n+\tlib.ethdev.conf_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_macaddrs_get,\n+\tlib.ethdev.macaddrs_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_rx_metadata_negotiate,\n+\tlib.ethdev.rx_metadata_negotiate)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_priority_flow_ctrl_queue_configure,\n+\tlib.ethdev.priority_flow_ctrl_queue_configure)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_priority_flow_ctrl_queue_info_get,\n+\tlib.ethdev.priority_flow_ctrl_queue_info_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_ethdev_trace_priv_dump,\n+\tlib.ethdev.priv_dump)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_ip_reassembly_capability_get,\n+\tlib.ethdev.ip_reassembly_capability_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_ip_reassembly_conf_get,\n+\tlib.ethdev.ip_reassembly_conf_get)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_ip_reassembly_conf_set,\n+\tlib.ethdev.ip_reassembly_conf_set)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_rx_avail_thresh_query,\n+\tlib.ethdev.rx_avail_thresh_query)\n+\n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_rx_avail_thresh_set,\n+\tlib.ethdev.rx_avail_thresh_set)\ndiff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c\nindex 1979dc0850..a6fb370b22 100644\n--- a/lib/ethdev/rte_ethdev.c\n+++ b/lib/ethdev/rte_ethdev.c\n@@ -167,6 +167,7 @@ rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)\n \tchar *cls_str = NULL;\n \tint str_size;\n \n+\trte_eth_trace_iterator_init(iter, devargs_str);\n \tif (iter == NULL) {\n \t\tRTE_ETHDEV_LOG(ERR, \"Cannot initialize NULL iterator\\n\");\n \t\treturn -EINVAL;\n@@ -273,6 +274,7 @@ rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)\n uint16_t\n rte_eth_iterator_next(struct rte_dev_iterator *iter)\n {\n+\trte_eth_trace_iterator_next(iter);\n \tif (iter == NULL) {\n \t\tRTE_ETHDEV_LOG(ERR,\n \t\t\t\"Cannot get next device from NULL iterator\\n\");\n@@ -308,6 +310,7 @@ rte_eth_iterator_next(struct rte_dev_iterator *iter)\n void\n rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)\n {\n+\trte_eth_trace_iterator_cleanup(iter);\n \tif (iter == NULL) {\n \t\tRTE_ETHDEV_LOG(ERR, \"Cannot do clean up from NULL iterator\\n\");\n \t\treturn;\n@@ -323,6 +326,7 @@ rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)\n uint16_t\n rte_eth_find_next(uint16_t port_id)\n {\n+\trte_eth_trace_find_next(port_id);\n \twhile (port_id < RTE_MAX_ETHPORTS &&\n \t\t\trte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)\n \t\tport_id++;\n@@ -345,6 +349,7 @@ rte_eth_find_next(uint16_t port_id)\n uint16_t\n rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)\n {\n+\trte_eth_trace_find_next_of(port_id, parent);\n \tport_id = rte_eth_find_next(port_id);\n \twhile (port_id < RTE_MAX_ETHPORTS &&\n \t\t\trte_eth_devices[port_id].device != parent)\n@@ -356,6 +361,7 @@ rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)\n uint16_t\n rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)\n {\n+\trte_eth_trace_find_next_sibling(port_id, ref_port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);\n \treturn rte_eth_find_next_of(port_id,\n \t\t\trte_eth_devices[ref_port_id].device);\n@@ -370,6 +376,7 @@ eth_dev_is_allocated(const struct rte_eth_dev *ethdev)\n int\n rte_eth_dev_is_valid_port(uint16_t port_id)\n {\n+\trte_ethdev_trace_is_valid_port(port_id);\n \tif (port_id >= RTE_MAX_ETHPORTS ||\n \t    (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))\n \t\treturn 0;\n@@ -389,6 +396,7 @@ eth_is_valid_owner_id(uint64_t owner_id)\n uint64_t\n rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)\n {\n+\trte_eth_trace_find_next_owned_by(port_id, owner_id);\n \tport_id = rte_eth_find_next(port_id);\n \twhile (port_id < RTE_MAX_ETHPORTS &&\n \t\t\trte_eth_devices[port_id].data->owner.id != owner_id)\n@@ -412,6 +420,7 @@ rte_eth_dev_owner_new(uint64_t *owner_id)\n \t*owner_id = eth_dev_shared_data->next_owner_id++;\n \n \trte_spinlock_unlock(&eth_dev_shared_data->ownership_lock);\n+\trte_ethdev_trace_owner_new(*owner_id);\n \treturn 0;\n }\n \n@@ -468,6 +477,7 @@ rte_eth_dev_owner_set(const uint16_t port_id,\n {\n \tint ret;\n \n+\trte_ethdev_trace_owner_set(port_id, owner);\n \teth_dev_shared_data_prepare();\n \n \trte_spinlock_lock(&eth_dev_shared_data->ownership_lock);\n@@ -485,6 +495,7 @@ rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)\n \t\t\t{.id = RTE_ETH_DEV_NO_OWNER, .name = \"\"};\n \tint ret;\n \n+\trte_ethdev_trace_owner_unset(port_id, owner_id);\n \teth_dev_shared_data_prepare();\n \n \trte_spinlock_lock(&eth_dev_shared_data->ownership_lock);\n@@ -525,6 +536,7 @@ rte_eth_dev_owner_delete(const uint64_t owner_id)\n \n \trte_spinlock_unlock(&eth_dev_shared_data->ownership_lock);\n \n+\trte_ethdev_trace_owner_delete(owner_id, ret);\n \treturn ret;\n }\n \n@@ -554,12 +566,14 @@ rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)\n \trte_memcpy(owner, &ethdev->data->owner, sizeof(*owner));\n \trte_spinlock_unlock(&eth_dev_shared_data->ownership_lock);\n \n+\trte_ethdev_trace_owner_get(port_id, owner);\n \treturn 0;\n }\n \n int\n rte_eth_dev_socket_id(uint16_t port_id)\n {\n+\trte_ethdev_trace_socket_id(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);\n \treturn rte_eth_devices[port_id].data->numa_node;\n }\n@@ -567,6 +581,7 @@ rte_eth_dev_socket_id(uint16_t port_id)\n void *\n rte_eth_dev_get_sec_ctx(uint16_t port_id)\n {\n+\trte_ethdev_trace_get_sec_ctx(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);\n \treturn rte_eth_devices[port_id].security_ctx;\n }\n@@ -582,6 +597,7 @@ rte_eth_dev_count_avail(void)\n \tRTE_ETH_FOREACH_DEV(p)\n \t\tcount++;\n \n+\trte_ethdev_trace_count_avail(count);\n \treturn count;\n }\n \n@@ -593,6 +609,7 @@ rte_eth_dev_count_total(void)\n \tRTE_ETH_FOREACH_VALID_DEV(port)\n \t\tcount++;\n \n+\trte_ethdev_trace_count_total(count);\n \treturn count;\n }\n \n@@ -613,6 +630,7 @@ rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)\n \t * because it might be overwritten by VDEV PMD */\n \ttmp = eth_dev_shared_data->data[port_id].name;\n \tstrcpy(name, tmp);\n+\trte_ethdev_trace_get_name_by_port(port_id, name);\n \treturn 0;\n }\n \n@@ -635,6 +653,7 @@ rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)\n \tRTE_ETH_FOREACH_VALID_DEV(pid)\n \t\tif (!strcmp(name, eth_dev_shared_data->data[pid].name)) {\n \t\t\t*port_id = pid;\n+\t\t\trte_ethdev_trace_get_port_by_name(name, *port_id);\n \t\t\treturn 0;\n \t\t}\n \n@@ -705,6 +724,7 @@ rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_rx_queue_start(port_id, rx_queue_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -744,6 +764,7 @@ rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_rx_queue_stop(port_id, rx_queue_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -776,6 +797,7 @@ rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_tx_queue_start(port_id, tx_queue_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -815,6 +837,7 @@ rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_tx_queue_stop(port_id, tx_queue_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -844,6 +867,7 @@ rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)\n uint32_t\n rte_eth_speed_bitflag(uint32_t speed, int duplex)\n {\n+\trte_eth_trace_speed_bitflag(speed, duplex);\n \tswitch (speed) {\n \tcase RTE_ETH_SPEED_NUM_10M:\n \t\treturn duplex ? RTE_ETH_LINK_SPEED_10M : RTE_ETH_LINK_SPEED_10M_HD;\n@@ -889,6 +913,7 @@ rte_eth_dev_rx_offload_name(uint64_t offload)\n \t\t}\n \t}\n \n+\trte_ethdev_trace_rx_offload_name(offload, name);\n \treturn name;\n }\n \n@@ -905,6 +930,7 @@ rte_eth_dev_tx_offload_name(uint64_t offload)\n \t\t}\n \t}\n \n+\trte_ethdev_trace_tx_offload_name(offload, name);\n \treturn name;\n }\n \n@@ -921,6 +947,7 @@ rte_eth_dev_capability_name(uint64_t capability)\n \t\t}\n \t}\n \n+\trte_ethdev_trace_capability_name(capability, name);\n \treturn name;\n }\n \n@@ -1538,6 +1565,7 @@ rte_eth_dev_set_link_up(uint16_t port_id)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_set_link_up(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -1550,6 +1578,7 @@ rte_eth_dev_set_link_down(uint16_t port_id)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_set_link_down(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -1596,6 +1625,7 @@ rte_eth_dev_reset(uint16_t port_id)\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_reset(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -1631,6 +1661,7 @@ rte_eth_dev_is_removed(uint16_t port_id)\n \t\t/* Device is physically removed. */\n \t\tdev->state = RTE_ETH_DEV_REMOVED;\n \n+\trte_ethdev_trace_is_removed(port_id, ret);\n \treturn ret;\n }\n \n@@ -1910,6 +1941,8 @@ rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,\n \tint i;\n \tint count;\n \n+\trte_eth_trace_rx_hairpin_queue_setup(port_id, rx_queue_id, nb_rx_desc,\n+\t\t\t\t\t     conf);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -1985,6 +2018,8 @@ rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n+\trte_eth_trace_tx_queue_setup(port_id, tx_queue_id, nb_tx_desc,\n+\t\t\t\t     socket_id, tx_conf);\n \tif (tx_queue_id >= dev->data->nb_tx_queues) {\n \t\tRTE_ETHDEV_LOG(ERR, \"Invalid Tx queue_id=%u\\n\", tx_queue_id);\n \t\treturn -EINVAL;\n@@ -2076,6 +2111,7 @@ rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,\n \tint count;\n \tint ret;\n \n+\trte_eth_trace_tx_hairpin_queue_setup(port_id, tx_queue_id, nb_tx_desc, conf);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -2144,6 +2180,7 @@ rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_eth_trace_hairpin_bind(tx_port, rx_port);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);\n \tdev = &rte_eth_devices[tx_port];\n \n@@ -2168,6 +2205,7 @@ rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_eth_trace_hairpin_unbind(tx_port, rx_port);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);\n \tdev = &rte_eth_devices[tx_port];\n \n@@ -2193,6 +2231,7 @@ rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_eth_trace_hairpin_get_peer_ports(port_id, peer_ports, len, direction);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -2226,6 +2265,7 @@ void\n rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,\n \t\tvoid *userdata __rte_unused)\n {\n+\trte_eth_trace_tx_buffer_drop_callback(pkts, unsent);\n \trte_pktmbuf_free_bulk(pkts, unsent);\n }\n \n@@ -2237,12 +2277,14 @@ rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,\n \n \trte_pktmbuf_free_bulk(pkts, unsent);\n \t*count += unsent;\n+\trte_eth_trace_tx_buffer_count_callback(pkts, unsent, *count);\n }\n \n int\n rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,\n \t\tbuffer_tx_error_fn cbfn, void *userdata)\n {\n+\trte_eth_trace_tx_buffer_set_err_callback(buffer, cbfn, userdata);\n \tif (buffer == NULL) {\n \t\tRTE_ETHDEV_LOG(ERR,\n \t\t\t\"Cannot set Tx buffer error callback to NULL buffer\\n\");\n@@ -2259,6 +2301,7 @@ rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)\n {\n \tint ret = 0;\n \n+\trte_eth_trace_tx_buffer_init(buffer, size);\n \tif (buffer == NULL) {\n \t\tRTE_ETHDEV_LOG(ERR, \"Cannot initialize NULL buffer\\n\");\n \t\treturn -EINVAL;\n@@ -2279,6 +2322,7 @@ rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_eth_trace_tx_done_cleanup(port_id, queue_id, free_cnt);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -2296,6 +2340,7 @@ rte_eth_promiscuous_enable(uint16_t port_id)\n \tstruct rte_eth_dev *dev;\n \tint diag = 0;\n \n+\trte_eth_trace_promiscuous_enable(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -2316,6 +2361,7 @@ rte_eth_promiscuous_disable(uint16_t port_id)\n \tstruct rte_eth_dev *dev;\n \tint diag = 0;\n \n+\trte_eth_trace_promiscuous_disable(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -2337,6 +2383,7 @@ rte_eth_promiscuous_get(uint16_t port_id)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_promiscuous_get(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -2349,6 +2396,7 @@ rte_eth_allmulticast_enable(uint16_t port_id)\n \tstruct rte_eth_dev *dev;\n \tint diag;\n \n+\trte_eth_trace_allmulticast_enable(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -2368,6 +2416,7 @@ rte_eth_allmulticast_disable(uint16_t port_id)\n \tstruct rte_eth_dev *dev;\n \tint diag;\n \n+\trte_eth_trace_allmulticast_disable(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -2388,6 +2437,7 @@ rte_eth_allmulticast_get(uint16_t port_id)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_allmulticast_get(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -2416,6 +2466,7 @@ rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)\n \t\t*eth_link = dev->data->dev_link;\n \t}\n \n+\trte_eth_trace_link_get(port_id, eth_link);\n \treturn 0;\n }\n \n@@ -2441,12 +2492,14 @@ rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)\n \t\t*eth_link = dev->data->dev_link;\n \t}\n \n+\trte_eth_trace_link_get_nowait(port_id, eth_link);\n \treturn 0;\n }\n \n const char *\n rte_eth_link_speed_to_str(uint32_t link_speed)\n {\n+\trte_eth_trace_link_speed_to_str(link_speed);\n \tswitch (link_speed) {\n \tcase RTE_ETH_SPEED_NUM_NONE: return \"None\";\n \tcase RTE_ETH_SPEED_NUM_10M:  return \"10 Mbps\";\n@@ -2470,6 +2523,7 @@ rte_eth_link_speed_to_str(uint32_t link_speed)\n int\n rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)\n {\n+\trte_eth_trace_link_to_str(str, len, eth_link);\n \tif (str == NULL) {\n \t\tRTE_ETHDEV_LOG(ERR, \"Cannot convert link to NULL string\\n\");\n \t\treturn -EINVAL;\n@@ -2502,6 +2556,7 @@ rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_stats_get(port_id, stats);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -2524,6 +2579,7 @@ rte_eth_stats_reset(uint16_t port_id)\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_eth_trace_stats_reset(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -2598,6 +2654,7 @@ rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,\n \t\treturn -ENOMEM;\n \t}\n \n+\trte_eth_trace_xstats_get_id_by_name(port_id, xstat_name, id);\n \t/* Get count */\n \tcnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);\n \tif (cnt_xstats  < 0) {\n@@ -2770,6 +2827,8 @@ rte_eth_xstats_get_names_by_id(uint16_t port_id,\n \t\t\treturn -1;\n \t\t}\n \t\txstats_names[i] = xstats_names_copy[ids[i]];\n+\t\trte_eth_trace_xstats_get_names_by_id(port_id, &xstats_names[i],\n+\t\t\t\t\t\t     ids[i]);\n \t}\n \n \tfree(xstats_names_copy);\n@@ -2809,6 +2868,7 @@ rte_eth_xstats_get_names(uint16_t port_id,\n \t\tcnt_used_entries += cnt_driver_entries;\n \t}\n \n+\trte_eth_trace_xstats_get_names(port_id, xstats_names, size, cnt_used_entries);\n \treturn cnt_used_entries;\n }\n \n@@ -2884,6 +2944,7 @@ rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n+\trte_eth_trace_xstats_get_by_id(port_id, ids, values, size);\n \tret = eth_dev_get_xstats_count(port_id);\n \tif (ret < 0)\n \t\treturn ret;\n@@ -3005,6 +3066,8 @@ rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,\n \tfor ( ; i < count + xcount; i++)\n \t\txstats[i].id += count;\n \n+\tfor (i = 0; i < n; i++)\n+\t\trte_eth_trace_xstats_get(port_id, xstats[i], i);\n \treturn count + xcount;\n }\n \n@@ -3017,6 +3080,7 @@ rte_eth_xstats_reset(uint16_t port_id)\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n+\trte_eth_trace_xstats_reset(port_id);\n \t/* implemented by the driver */\n \tif (dev->dev_ops->xstats_reset != NULL)\n \t\treturn eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));\n@@ -3051,6 +3115,8 @@ int\n rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,\n \t\tuint8_t stat_idx)\n {\n+\trte_ethdev_trace_set_tx_queue_stats_mapping(port_id, tx_queue_id,\n+\t\t\t\t\t\t    stat_idx);\n \treturn eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,\n \t\t\t\t\t\ttx_queue_id,\n \t\t\t\t\t\tstat_idx, STAT_QMAP_TX));\n@@ -3060,6 +3126,8 @@ int\n rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,\n \t\tuint8_t stat_idx)\n {\n+\trte_ethdev_trace_set_rx_queue_stats_mapping(port_id, rx_queue_id,\n+\t\t\t\t\t\t    stat_idx);\n \treturn eth_err(port_id, eth_dev_set_queue_stats_mapping(port_id,\n \t\t\t\t\t\trx_queue_id,\n \t\t\t\t\t\tstat_idx, STAT_QMAP_RX));\n@@ -3070,6 +3138,7 @@ rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_fw_version_get(port_id, fw_version, fw_size);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3141,6 +3210,7 @@ rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)\n \n \tdev_info->dev_flags = &dev->data->dev_flags;\n \n+\trte_ethdev_trace_info_get(port_id, dev_info);\n \treturn 0;\n }\n \n@@ -3149,6 +3219,7 @@ rte_eth_dev_conf_get(uint16_t port_id, struct rte_eth_conf *dev_conf)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_conf_get(port_id, dev_conf);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3172,6 +3243,7 @@ rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,\n \tstruct rte_eth_dev *dev;\n \tconst uint32_t *all_ptypes;\n \n+\trte_ethdev_trace_get_supported_ptypes(port_id, ptype_mask, ptypes, num);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3217,6 +3289,7 @@ rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,\n \tunsigned int i, j;\n \tint ret;\n \n+\trte_ethdev_trace_set_ptypes(port_id, ptype_mask, set_ptypes, num);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3296,6 +3369,7 @@ rte_eth_macaddrs_get(uint16_t port_id, struct rte_ether_addr *ma,\n \tstruct rte_eth_dev *dev;\n \tstruct rte_eth_dev_info dev_info;\n \n+\trte_eth_trace_macaddrs_get(port_id, ma, num);\n \tif (ma == NULL) {\n \t\tRTE_ETHDEV_LOG(ERR, \"%s: invalid parameters\\n\", __func__);\n \t\treturn -EINVAL;\n@@ -3318,6 +3392,7 @@ rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_macaddr_get(port_id, mac_addr);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3348,6 +3423,7 @@ rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)\n \t}\n \n \t*mtu = dev->data->mtu;\n+\trte_ethdev_trace_get_mtu(port_id, *mtu);\n \treturn 0;\n }\n \n@@ -3389,6 +3465,7 @@ rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)\n \tif (ret == 0)\n \t\tdev->data->mtu = mtu;\n \n+\trte_ethdev_trace_set_mtu(port_id, mtu, ret);\n \treturn eth_err(port_id, ret);\n }\n \n@@ -3398,6 +3475,7 @@ rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_vlan_filter(port_id, vlan_id, on);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3440,6 +3518,7 @@ rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_set_vlan_strip_on_queue(port_id, rx_queue_id, on);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3461,6 +3540,7 @@ rte_eth_dev_set_vlan_ether_type(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_set_vlan_ether_type(port_id, vlan_type, tpid);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3481,6 +3561,7 @@ rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)\n \tuint64_t dev_offloads;\n \tuint64_t new_offloads;\n \n+\trte_ethdev_trace_set_vlan_offload(port_id, offload_mask);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3583,6 +3664,7 @@ rte_eth_dev_get_vlan_offload(uint16_t port_id)\n \tif (*dev_offloads & RTE_ETH_RX_OFFLOAD_QINQ_STRIP)\n \t\tret |= RTE_ETH_QINQ_STRIP_OFFLOAD;\n \n+\trte_ethdev_trace_get_vlan_offload(port_id, ret);\n \treturn ret;\n }\n \n@@ -3591,6 +3673,7 @@ rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_set_vlan_pvid(port_id, pvid, on);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3603,6 +3686,7 @@ rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_flow_ctrl_get(port_id, fc_conf);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3623,6 +3707,7 @@ rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_flow_ctrl_set(port_id, fc_conf);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3648,6 +3733,7 @@ rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_priority_flow_ctrl_set(port_id, pfc_conf);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3735,6 +3821,7 @@ rte_eth_dev_priority_flow_ctrl_queue_info_get(uint16_t port_id,\n \t\treturn -EINVAL;\n \t}\n \n+\trte_ethdev_trace_priority_flow_ctrl_queue_info_get(port_id, pfc_queue_info);\n \tif (*dev->dev_ops->priority_flow_ctrl_queue_info_get)\n \t\treturn eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_queue_info_get)\n \t\t\t(dev, pfc_queue_info));\n@@ -3750,6 +3837,8 @@ rte_eth_dev_priority_flow_ctrl_queue_configure(uint16_t port_id,\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_priority_flow_ctrl_queue_configure(port_id,\n+\t\t\t\t\t\t\t     pfc_queue_conf);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3865,6 +3954,7 @@ rte_eth_dev_rss_reta_update(uint16_t port_id,\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_rss_reta_update(port_id, reta_conf, reta_size);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3912,6 +4002,7 @@ rte_eth_dev_rss_reta_query(uint16_t port_id,\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_rss_reta_query(port_id, reta_conf, reta_size);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3941,6 +4032,7 @@ rte_eth_dev_rss_hash_update(uint16_t port_id,\n \tenum rte_eth_rx_mq_mode mq_mode;\n \tint ret;\n \n+\trte_ethdev_trace_rss_hash_update(port_id, rss_conf);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -3982,6 +4074,7 @@ rte_eth_dev_rss_hash_conf_get(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_rss_hash_conf_get(port_id, rss_conf);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4003,6 +4096,7 @@ rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_udp_tunnel_port_add(port_id, udp_tunnel);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4029,6 +4123,7 @@ rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_udp_tunnel_port_delete(port_id, udp_tunnel);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4054,6 +4149,7 @@ rte_eth_led_on(uint16_t port_id)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_led_on(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4066,6 +4162,7 @@ rte_eth_led_off(uint16_t port_id)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_led_off(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4081,6 +4178,7 @@ rte_eth_fec_get_capability(uint16_t port_id,\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_eth_trace_fec_get_capability(port_id, speed_fec_capa, num);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4102,6 +4200,7 @@ rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_fec_get(port_id, fec_capa);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4121,6 +4220,7 @@ rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_fec_set(port_id, fec_capa);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4163,6 +4263,7 @@ rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,\n \tuint64_t pool_mask;\n \tint ret;\n \n+\trte_ethdev_trace_mac_addr_add(port_id, addr, pool);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4221,6 +4322,7 @@ rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)\n \tstruct rte_eth_dev *dev;\n \tint index;\n \n+\trte_ethdev_trace_mac_addr_remove(port_id, addr);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4260,6 +4362,7 @@ rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_default_mac_addr_set(port_id, addr);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4322,6 +4425,7 @@ rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,\n \tint ret;\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_uc_hash_table_set(port_id, addr, on);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4379,6 +4483,7 @@ rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_uc_all_hash_table_set(port_id, on);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4395,6 +4500,7 @@ int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,\n \tstruct rte_eth_link link;\n \tint ret;\n \n+\trte_eth_trace_set_queue_rate_limit(port_id, queue_idx, tx_rate);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4428,6 +4534,7 @@ int rte_eth_rx_avail_thresh_set(uint16_t port_id, uint16_t queue_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_rx_avail_thresh_set(port_id, queue_id, avail_thresh);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4462,6 +4569,7 @@ int rte_eth_rx_avail_thresh_query(uint16_t port_id, uint16_t *queue_id,\n \tif (*queue_id >= dev->data->nb_rx_queues)\n \t\t*queue_id = 0;\n \n+\trte_eth_trace_rx_avail_thresh_query(port_id, *queue_id);\n \tRTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_avail_thresh_query, -ENOTSUP);\n \treturn eth_err(port_id, (*dev->dev_ops->rx_queue_avail_thresh_query)(dev,\n \t\t\t\t\t\t\t     queue_id, avail_thresh));\n@@ -4493,6 +4601,7 @@ rte_eth_dev_callback_register(uint16_t port_id,\n \tuint16_t next_port;\n \tuint16_t last_port;\n \n+\trte_ethdev_trace_callback_register(port_id, event, cb_fn, cb_arg);\n \tif (cb_fn == NULL) {\n \t\tRTE_ETHDEV_LOG(ERR,\n \t\t\t\"Cannot register ethdev port %u callback from NULL\\n\",\n@@ -4560,6 +4669,7 @@ rte_eth_dev_callback_unregister(uint16_t port_id,\n \tuint16_t next_port;\n \tuint16_t last_port;\n \n+\trte_ethdev_trace_callback_unregister(port_id, event, cb_fn, cb_arg);\n \tif (cb_fn == NULL) {\n \t\tRTE_ETHDEV_LOG(ERR,\n \t\t\t\"Cannot unregister ethdev port %u callback from NULL\\n\",\n@@ -4619,6 +4729,7 @@ rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)\n \tuint16_t qid;\n \tint rc;\n \n+\trte_ethdev_trace_rx_intr_ctl(port_id, epfd, op, data);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4679,6 +4790,7 @@ rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)\n \t\t(vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;\n \tfd = rte_intr_efds_index_get(intr_handle, efd_idx);\n \n+\trte_ethdev_trace_rx_intr_ctl_q_get_fd(port_id, queue_id, fd);\n \treturn fd;\n }\n \n@@ -4691,6 +4803,7 @@ rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,\n \tstruct rte_intr_handle *intr_handle;\n \tint rc;\n \n+\trte_ethdev_trace_rx_intr_ctl_q(port_id, queue_id, epfd, op, data);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4729,6 +4842,7 @@ rte_eth_dev_rx_intr_enable(uint16_t port_id,\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_rx_intr_enable(port_id, queue_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4747,6 +4861,7 @@ rte_eth_dev_rx_intr_disable(uint16_t port_id,\n \tstruct rte_eth_dev *dev;\n \tint ret;\n \n+\trte_ethdev_trace_rx_intr_disable(port_id, queue_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -4769,6 +4884,7 @@ rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,\n #endif\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_add_rx_callback(port_id, queue_id, fn, user_param);\n \t/* check input parameters */\n \tif (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||\n \t\t    queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {\n@@ -4824,6 +4940,7 @@ rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,\n \trte_errno = ENOTSUP;\n \treturn NULL;\n #endif\n+\trte_eth_trace_add_first_rx_callback(port_id, queue_id, fn, user_param);\n \t/* check input parameters */\n \tif (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||\n \t\tqueue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {\n@@ -4865,6 +4982,7 @@ rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,\n #endif\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_add_tx_callback(port_id, queue_id, fn, user_param);\n \t/* check input parameters */\n \tif (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||\n \t\t    queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {\n@@ -4932,6 +5050,7 @@ rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,\n \tstruct rte_eth_rxtx_callback **prev_cb;\n \tint ret = -EINVAL;\n \n+\trte_eth_trace_remove_rx_callback(port_id, queue_id, user_cb);\n \trte_spinlock_lock(&eth_dev_rx_cb_lock);\n \tprev_cb = &dev->post_rx_burst_cbs[queue_id];\n \tfor (; *prev_cb != NULL; prev_cb = &cb->next) {\n@@ -4966,6 +5085,7 @@ rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,\n \tstruct rte_eth_rxtx_callback *cb;\n \tstruct rte_eth_rxtx_callback **prev_cb;\n \n+\trte_eth_trace_remove_tx_callback(port_id, queue_id, user_cb);\n \trte_spinlock_lock(&eth_dev_tx_cb_lock);\n \tprev_cb = &dev->pre_tx_burst_cbs[queue_id];\n \tfor (; *prev_cb != NULL; prev_cb = &cb->next) {\n@@ -5024,6 +5144,7 @@ rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,\n \tdev->dev_ops->rxq_info_get(dev, queue_id, qinfo);\n \tqinfo->queue_state = dev->data->rx_queue_state[queue_id];\n \n+\trte_eth_trace_rx_queue_info_get(port_id, queue_id, qinfo);\n \treturn 0;\n }\n \n@@ -5069,6 +5190,7 @@ rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,\n \tdev->dev_ops->txq_info_get(dev, queue_id, qinfo);\n \tqinfo->queue_state = dev->data->tx_queue_state[queue_id];\n \n+\trte_eth_trace_tx_queue_info_get(port_id, queue_id, qinfo);\n \treturn 0;\n }\n \n@@ -5078,6 +5200,7 @@ rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_rx_burst_mode_get(port_id, queue_id, mode);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5105,6 +5228,7 @@ rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_tx_burst_mode_get(port_id, queue_id, mode);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5132,6 +5256,7 @@ rte_eth_get_monitor_addr(uint16_t port_id, uint16_t queue_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_get_monitor_addr(port_id, queue_id, pmc);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5159,6 +5284,7 @@ rte_eth_dev_set_mc_addr_list(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_set_mc_addr_list(port_id, mc_addr_set, nb_mc_addr);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5172,6 +5298,7 @@ rte_eth_timesync_enable(uint16_t port_id)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_timesync_enable(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5184,6 +5311,7 @@ rte_eth_timesync_disable(uint16_t port_id)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_timesync_disable(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5197,6 +5325,7 @@ rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_timesync_read_rx_timestamp(port_id, timestamp, flags);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5218,6 +5347,7 @@ rte_eth_timesync_read_tx_timestamp(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_timesync_read_tx_timestamp(port_id, timestamp);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5238,6 +5368,7 @@ rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_timesync_adjust_time(port_id, delta);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5250,6 +5381,7 @@ rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_timesync_read_time(port_id, timestamp);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5270,6 +5402,7 @@ rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_timesync_write_time(port_id, timestamp);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5290,6 +5423,7 @@ rte_eth_read_clock(uint16_t port_id, uint64_t *clock)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_read_clock(port_id, clock);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5308,6 +5442,7 @@ rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_get_reg_info(port_id, info);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5327,6 +5462,7 @@ rte_eth_dev_get_eeprom_length(uint16_t port_id)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_get_eeprom_length(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5339,6 +5475,7 @@ rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_get_eeprom(port_id, info);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5358,6 +5495,7 @@ rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_set_eeprom(port_id, info);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5378,6 +5516,7 @@ rte_eth_dev_get_module_info(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_get_module_info(port_id, modinfo);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5398,6 +5537,7 @@ rte_eth_dev_get_module_eeprom(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_get_module_eeprom(port_id, info);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5432,6 +5572,7 @@ rte_eth_dev_get_dcb_info(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_get_dcb_info(port_id, dcb_info);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5481,6 +5622,7 @@ rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,\n \tif (nb_tx_desc != NULL)\n \t\teth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);\n \n+\trte_ethdev_trace_adjust_nb_rx_tx_desc(port_id, *nb_rx_desc, *nb_tx_desc);\n \treturn 0;\n }\n \n@@ -5490,6 +5632,7 @@ rte_eth_dev_hairpin_capability_get(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_hairpin_capability_get(port_id, cap);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5510,6 +5653,7 @@ rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_pool_ops_supported(port_id, pool);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5772,6 +5916,7 @@ rte_eth_representor_info_get(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_representor_info_get(port_id, info);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5784,6 +5929,7 @@ rte_eth_rx_metadata_negotiate(uint16_t port_id, uint64_t *features)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_rx_metadata_negotiate(port_id, features);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5810,6 +5956,7 @@ rte_eth_ip_reassembly_capability_get(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_ip_reassembly_capability_get(port_id, reassembly_capa);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5840,6 +5987,7 @@ rte_eth_ip_reassembly_conf_get(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_ip_reassembly_conf_get(port_id, conf);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5869,6 +6017,7 @@ rte_eth_ip_reassembly_conf_set(uint16_t port_id,\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_eth_trace_ip_reassembly_conf_set(port_id, conf);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \n@@ -5905,6 +6054,7 @@ rte_eth_dev_priv_dump(uint16_t port_id, FILE *file)\n {\n \tstruct rte_eth_dev *dev;\n \n+\trte_ethdev_trace_priv_dump(port_id);\n \tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n \tdev = &rte_eth_devices[port_id];\n \ndiff --git a/lib/ethdev/rte_ethdev_trace.h b/lib/ethdev/rte_ethdev_trace.h\nindex 1491c815c3..de728d355d 100644\n--- a/lib/ethdev/rte_ethdev_trace.h\n+++ b/lib/ethdev/rte_ethdev_trace.h\n@@ -88,6 +88,1188 @@ RTE_TRACE_POINT(\n \trte_trace_point_emit_u16(port_id);\n )\n \n+RTE_TRACE_POINT(\n+\trte_eth_trace_add_first_rx_callback,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\trte_rx_callback_fn fn, void *user_param),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_ptr(fn);\n+\trte_trace_point_emit_ptr(user_param);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_add_rx_callback,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\trte_rx_callback_fn fn, void *user_param),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_ptr(fn);\n+\trte_trace_point_emit_ptr(user_param);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_add_tx_callback,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\trte_tx_callback_fn fn, void *user_param),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_ptr(fn);\n+\trte_trace_point_emit_ptr(user_param);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_allmulticast_disable,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_allmulticast_enable,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_allmulticast_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_call_rx_callbacks,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\tstruct rte_mbuf **rx_pkts, uint16_t nb_rx,\n+\t\tuint16_t nb_pkts, void *opaque),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_ptr(rx_pkts);\n+\trte_trace_point_emit_u16(nb_rx);\n+\trte_trace_point_emit_u16(nb_pkts);\n+\trte_trace_point_emit_ptr(opaque);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_call_tx_callbacks,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\tstruct rte_mbuf **tx_pkts, uint16_t nb_pkts,\n+\t\tvoid *opaque),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_ptr(tx_pkts);\n+\trte_trace_point_emit_u16(nb_pkts);\n+\trte_trace_point_emit_ptr(opaque);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_mtu,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t mtu, int ret),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(mtu);\n+\trte_trace_point_emit_int(ret);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_adjust_nb_rx_tx_desc,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t nb_rx_desc,\n+\t\t\t     uint16_t nb_tx_desc),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(nb_rx_desc);\n+\trte_trace_point_emit_u16(nb_tx_desc);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_callback_register,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, enum rte_eth_event_type event,\n+\t\t\t     rte_eth_dev_cb_fn cb_fn, void *cb_arg),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_int(event);\n+\trte_trace_point_emit_ptr(cb_fn);\n+\trte_trace_point_emit_ptr(cb_arg);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_callback_unregister,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, enum rte_eth_event_type event,\n+\t\t\t     rte_eth_dev_cb_fn cb_fn, void *cb_arg),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_int(event);\n+\trte_trace_point_emit_ptr(cb_fn);\n+\trte_trace_point_emit_ptr(cb_arg);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_default_mac_addr_set,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_ether_addr *addr),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(addr);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_flow_ctrl_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_fc_conf *fc_conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(fc_conf);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_flow_ctrl_set,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_fc_conf *fc_conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u32(fc_conf->high_water);\n+\trte_trace_point_emit_u32(fc_conf->low_water);\n+\trte_trace_point_emit_u16(fc_conf->pause_time);\n+\trte_trace_point_emit_u16(fc_conf->send_xon);\n+\trte_trace_point_emit_int(fc_conf->mode);\n+\trte_trace_point_emit_u8(fc_conf->mac_ctrl_frame_fwd);\n+\trte_trace_point_emit_u8(fc_conf->autoneg);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_fw_version_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, char *fw_version, size_t fw_size),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(fw_version);\n+\trte_trace_point_emit_size_t(fw_size);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_dcb_info,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_dcb_info *dcb_info),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(dcb_info);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_eeprom,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_dev_eeprom_info *info),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(info);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_eeprom_length,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_mtu,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t mtu),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(mtu);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_count_avail,\n+\tRTE_TRACE_POINT_ARGS(uint16_t count),\n+\trte_trace_point_emit_u16(count);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_count_total,\n+\tRTE_TRACE_POINT_ARGS(uint16_t count),\n+\trte_trace_point_emit_u16(count);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_name_by_port,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, char *name),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_string(name);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_port_by_name,\n+\tRTE_TRACE_POINT_ARGS(const char *name, uint16_t port_id),\n+\trte_trace_point_emit_string(name);\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_reg_info,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_dev_reg_info *info),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(info);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_sec_ctx,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_supported_ptypes,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint32_t ptype_mask,\n+\t\tuint32_t *ptypes, int num),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u32(ptype_mask);\n+\trte_trace_point_emit_ptr(ptypes);\n+\trte_trace_point_emit_int(num);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_vlan_offload,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, int ret),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_int(ret);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_info_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_dev_info *dev_info),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_string(dev_info->driver_name);\n+\trte_trace_point_emit_u32(dev_info->if_index);\n+\trte_trace_point_emit_u16(dev_info->min_mtu);\n+\trte_trace_point_emit_u16(dev_info->max_mtu);\n+\trte_trace_point_emit_u32(dev_info->min_rx_bufsize);\n+\trte_trace_point_emit_u32(dev_info->max_rx_pktlen);\n+\trte_trace_point_emit_u64(dev_info->rx_offload_capa);\n+\trte_trace_point_emit_u64(dev_info->tx_offload_capa);\n+\trte_trace_point_emit_u64(dev_info->rx_queue_offload_capa);\n+\trte_trace_point_emit_u64(dev_info->tx_queue_offload_capa);\n+\trte_trace_point_emit_u16(dev_info->reta_size);\n+\trte_trace_point_emit_u8(dev_info->hash_key_size);\n+\trte_trace_point_emit_u16(dev_info->nb_rx_queues);\n+\trte_trace_point_emit_u16(dev_info->nb_tx_queues);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_is_removed,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, int ret),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_int(ret);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_is_valid_port,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_mac_addr_add,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_ether_addr *addr,\n+\t\tuint32_t pool),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(addr);\n+\trte_trace_point_emit_u32(pool);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_mac_addr_remove,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_ether_addr *addr),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(addr);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_pool_ops_supported,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, const char *pool),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(pool);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_priority_flow_ctrl_set,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_pfc_conf *pfc_conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u32(pfc_conf->fc.high_water);\n+\trte_trace_point_emit_u32(pfc_conf->fc.low_water);\n+\trte_trace_point_emit_u16(pfc_conf->fc.pause_time);\n+\trte_trace_point_emit_u16(pfc_conf->fc.send_xon);\n+\trte_trace_point_emit_int(pfc_conf->fc.mode);\n+\trte_trace_point_emit_u8(pfc_conf->fc.mac_ctrl_frame_fwd);\n+\trte_trace_point_emit_u8(pfc_conf->fc.autoneg);\n+\trte_trace_point_emit_u8(pfc_conf->priority);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_reset,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rss_hash_conf_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_rss_conf *rss_conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(rss_conf);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rss_hash_update,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_rss_conf *rss_conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(rss_conf->rss_key);\n+\trte_trace_point_emit_u8(rss_conf->rss_key_len);\n+\trte_trace_point_emit_u64(rss_conf->rss_hf);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rss_reta_query,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(reta_conf);\n+\trte_trace_point_emit_u16(reta_size);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rss_reta_update,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_rss_reta_entry64 *reta_conf, uint16_t reta_size),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u64(reta_conf->mask);\n+\trte_trace_point_emit_u16(reta_size);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rx_intr_ctl,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, int epfd, int op, void *data),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_int(epfd);\n+\trte_trace_point_emit_int(op);\n+\trte_trace_point_emit_ptr(data);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rx_intr_ctl_q,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id, int epfd,\n+\t\tint op, void *data),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_int(epfd);\n+\trte_trace_point_emit_int(op);\n+\trte_trace_point_emit_ptr(data);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rx_intr_ctl_q_get_fd,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id, int fd),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_int(fd);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rx_intr_disable,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rx_intr_enable,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rx_offload_name,\n+\tRTE_TRACE_POINT_ARGS(uint64_t offload, const char *name),\n+\trte_trace_point_emit_u64(offload);\n+\trte_trace_point_emit_string(name);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rx_queue_start,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t rx_queue_id),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(rx_queue_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_rx_queue_stop,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t rx_queue_id),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(rx_queue_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_eeprom,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_dev_eeprom_info *info),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(info->data);\n+\trte_trace_point_emit_u32(info->offset);\n+\trte_trace_point_emit_u32(info->length);\n+\trte_trace_point_emit_u32(info->magic);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_link_down,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_link_up,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_mc_addr_list,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_ether_addr *mc_addr_set,\n+\t\tuint32_t nb_mc_addr),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(mc_addr_set);\n+\trte_trace_point_emit_u32(nb_mc_addr);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_ptypes,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint32_t ptype_mask,\n+\t\tuint32_t *set_ptypes, unsigned int num),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u32(ptype_mask);\n+\trte_trace_point_emit_ptr(set_ptypes);\n+\trte_trace_point_emit_u32(num);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_rx_queue_stats_mapping,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t rx_queue_id,\n+\t\tuint8_t stat_idx),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(rx_queue_id);\n+\trte_trace_point_emit_u8(stat_idx);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_tx_queue_stats_mapping,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t tx_queue_id,\n+\t\tuint8_t stat_idx),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(tx_queue_id);\n+\trte_trace_point_emit_u8(stat_idx);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_vlan_ether_type,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, enum rte_vlan_type vlan_type,\n+\t\tuint16_t tag_type),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_int(vlan_type);\n+\trte_trace_point_emit_u16(tag_type);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_vlan_offload,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, int offload_mask),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_int(offload_mask);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_vlan_pvid,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t pvid, int on),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(pvid);\n+\trte_trace_point_emit_int(on);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_set_vlan_strip_on_queue,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t rx_queue_id,\n+\t\tint on),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(rx_queue_id);\n+\trte_trace_point_emit_int(on);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_socket_id,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_tx_offload_name,\n+\tRTE_TRACE_POINT_ARGS(uint64_t offload, const char *name),\n+\trte_trace_point_emit_u64(offload);\n+\trte_trace_point_emit_string(name);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_tx_queue_start,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t tx_queue_id),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(tx_queue_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_tx_queue_stop,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t tx_queue_id),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(tx_queue_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_uc_all_hash_table_set,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint8_t on),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u8(on);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_uc_hash_table_set,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_ether_addr *addr,\n+\t\tuint8_t on),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(addr);\n+\trte_trace_point_emit_u8(on);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_udp_tunnel_port_add,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(tunnel_udp->udp_port);\n+\trte_trace_point_emit_u8(tunnel_udp->prot_type);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_udp_tunnel_port_delete,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_udp_tunnel *tunnel_udp),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(tunnel_udp->udp_port);\n+\trte_trace_point_emit_u8(tunnel_udp->prot_type);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_vlan_filter,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t vlan_id, int on),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(vlan_id);\n+\trte_trace_point_emit_int(on);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_find_next,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_find_next_of,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id_start,\n+\t\tconst struct rte_device *parent),\n+\trte_trace_point_emit_u16(port_id_start);\n+\trte_trace_point_emit_ptr(parent);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_find_next_owned_by,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tconst uint64_t owner_id),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u64(owner_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_find_next_sibling,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id_start, uint16_t ref_port_id),\n+\trte_trace_point_emit_u16(port_id_start);\n+\trte_trace_point_emit_u16(ref_port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_iterator_cleanup,\n+\tRTE_TRACE_POINT_ARGS(struct rte_dev_iterator *iter),\n+\trte_trace_point_emit_ptr(iter);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_iterator_init,\n+\tRTE_TRACE_POINT_ARGS(struct rte_dev_iterator *iter, const char *devargs),\n+\trte_trace_point_emit_ptr(iter);\n+\trte_trace_point_emit_ptr(devargs);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_iterator_next,\n+\tRTE_TRACE_POINT_ARGS(struct rte_dev_iterator *iter),\n+\trte_trace_point_emit_ptr(iter);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_led_off,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_led_on,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_link_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_link *link),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u32(link->link_speed);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_link_get_nowait,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_link *link),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u32(link->link_speed);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_macaddr_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_ether_addr *mac_addr),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(mac_addr);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_promiscuous_disable,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_promiscuous_enable,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_promiscuous_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_remove_rx_callback,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\tconst struct rte_eth_rxtx_callback *user_cb),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_ptr(user_cb);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_remove_tx_callback,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\tconst struct rte_eth_rxtx_callback *user_cb),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_ptr(user_cb);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_rx_burst_mode_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\tstruct rte_eth_burst_mode *mode),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_ptr(mode);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_rx_queue_info_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\tstruct rte_eth_rxq_info *qinfo),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_ptr(qinfo->mp);\n+\trte_trace_point_emit_u8(qinfo->scattered_rx);\n+\trte_trace_point_emit_u8(qinfo->queue_state);\n+\trte_trace_point_emit_u16(qinfo->nb_desc);\n+\trte_trace_point_emit_u16(qinfo->rx_buf_size);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_rx_queue_setup,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t rx_queue_id,\n+\t\tuint16_t nb_rx_desc, unsigned int socket_id,\n+\t\tconst struct rte_eth_rxconf *rx_conf,\n+\t\tstruct rte_mempool *mb_pool),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(rx_queue_id);\n+\trte_trace_point_emit_u16(nb_rx_desc);\n+\trte_trace_point_emit_u32(socket_id);\n+\trte_trace_point_emit_ptr(rx_conf);\n+\trte_trace_point_emit_ptr(mb_pool);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_set_queue_rate_limit,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_idx,\n+\t\tuint16_t tx_rate),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_idx);\n+\trte_trace_point_emit_u16(tx_rate);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_speed_bitflag,\n+\tRTE_TRACE_POINT_ARGS(uint32_t speed, int duplex),\n+\trte_trace_point_emit_u32(speed);\n+\trte_trace_point_emit_int(duplex);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_stats_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_stats *stats),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(stats);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_stats_reset,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_timesync_adjust_time,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, int64_t delta),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_i64(delta);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_timesync_disable,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_timesync_enable,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_timesync_read_rx_timestamp,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct timespec *timestamp, uint32_t flags),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(timestamp);\n+\trte_trace_point_emit_u32(flags);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_timesync_read_time,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct timespec *time),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(time);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_timesync_read_tx_timestamp,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct timespec *timestamp),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(timestamp);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_timesync_write_time,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, const struct timespec *time),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(time);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_tx_buffer_count_callback,\n+\tRTE_TRACE_POINT_ARGS(struct rte_mbuf **pkts, uint16_t unsent,\n+\t\tuint64_t count),\n+\trte_trace_point_emit_ptr(pkts);\n+\trte_trace_point_emit_u16(unsent);\n+\trte_trace_point_emit_u64(count);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_tx_buffer_drop_callback,\n+\tRTE_TRACE_POINT_ARGS(struct rte_mbuf **pkts, uint16_t unsent),\n+\trte_trace_point_emit_ptr(pkts);\n+\trte_trace_point_emit_u16(unsent);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_tx_buffer_init,\n+\tRTE_TRACE_POINT_ARGS(struct rte_eth_dev_tx_buffer *buffer, uint16_t size),\n+\trte_trace_point_emit_ptr(buffer);\n+\trte_trace_point_emit_u16(size);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_tx_buffer_set_err_callback,\n+\tRTE_TRACE_POINT_ARGS(struct rte_eth_dev_tx_buffer *buffer,\n+\t\tbuffer_tx_error_fn callback, void *userdata),\n+\trte_trace_point_emit_ptr(buffer);\n+\trte_trace_point_emit_ptr(callback);\n+\trte_trace_point_emit_ptr(userdata);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_tx_burst_mode_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\tstruct rte_eth_burst_mode *mode),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_ptr(mode);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_tx_done_cleanup,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_u32(free_cnt);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_tx_queue_info_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\tstruct rte_eth_txq_info *qinfo),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_u16(qinfo->nb_desc);\n+\trte_trace_point_emit_u8(qinfo->queue_state);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_tx_queue_setup,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t tx_queue_id,\n+\t\tuint16_t nb_tx_desc, unsigned int socket_id,\n+\t\tconst struct rte_eth_txconf *tx_conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(tx_queue_id);\n+\trte_trace_point_emit_u16(nb_tx_desc);\n+\trte_trace_point_emit_u32(socket_id);\n+\trte_trace_point_emit_ptr(tx_conf);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_xstats_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_xstat xstats,\n+\t\tint i),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u64(xstats.id);\n+\trte_trace_point_emit_u64(xstats.value);\n+\trte_trace_point_emit_u32(i);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_xstats_get_by_id,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, const uint64_t *ids,\n+\t\tuint64_t *values, unsigned int size),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(ids);\n+\trte_trace_point_emit_ptr(values);\n+\trte_trace_point_emit_u32(size);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_xstats_get_id_by_name,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, const char *xstat_name,\n+\t\tuint64_t *id),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_string(xstat_name);\n+\trte_trace_point_emit_ptr(id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_xstats_get_names,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_xstat_name *xstats_names,\n+\t\tunsigned int size, int cnt_used_entries),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_string(xstats_names->name);\n+\trte_trace_point_emit_u32(size);\n+\trte_trace_point_emit_int(cnt_used_entries);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_xstats_get_names_by_id,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_xstat_name *xstats_names, uint64_t ids),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_string(xstats_names->name);\n+\trte_trace_point_emit_u64(ids);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_xstats_reset,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_owner_delete,\n+\tRTE_TRACE_POINT_ARGS(const uint64_t owner_id, int ret),\n+\trte_trace_point_emit_u64(owner_id);\n+\trte_trace_point_emit_int(ret);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_owner_get,\n+\tRTE_TRACE_POINT_ARGS(const uint16_t port_id,\n+\t\tstruct rte_eth_dev_owner *owner),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u64(owner->id);\n+\trte_trace_point_emit_string(owner->name);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_owner_new,\n+\tRTE_TRACE_POINT_ARGS(uint64_t owner_id),\n+\trte_trace_point_emit_u64(owner_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_owner_set,\n+\tRTE_TRACE_POINT_ARGS(const uint16_t port_id,\n+\t\tconst struct rte_eth_dev_owner *owner),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u64(owner->id);\n+\trte_trace_point_emit_string(owner->name);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_owner_unset,\n+\tRTE_TRACE_POINT_ARGS(const uint16_t port_id,\n+\t\tconst uint64_t owner_id),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u64(owner_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_module_eeprom,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_dev_eeprom_info *info),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(info);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_get_module_info,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_dev_module_info *modinfo),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(modinfo);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_read_clock,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint64_t *clk),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(clk);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_hairpin_capability_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_hairpin_cap *cap),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(cap);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_rx_hairpin_queue_setup,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t rx_queue_id,\n+\t\tuint16_t nb_rx_desc, const struct rte_eth_hairpin_conf *conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(rx_queue_id);\n+\trte_trace_point_emit_u16(nb_rx_desc);\n+\trte_trace_point_emit_ptr(conf);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_tx_hairpin_queue_setup,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t tx_queue_id,\n+\t\tuint16_t nb_tx_desc, const struct rte_eth_hairpin_conf *conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(tx_queue_id);\n+\trte_trace_point_emit_u16(nb_tx_desc);\n+\trte_trace_point_emit_ptr(conf);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_hairpin_bind,\n+\tRTE_TRACE_POINT_ARGS(uint16_t tx_port, uint16_t rx_port),\n+\trte_trace_point_emit_u16(tx_port);\n+\trte_trace_point_emit_u16(rx_port);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_hairpin_get_peer_ports,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t *peer_ports,\n+\t\tsize_t len, uint32_t direction),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(peer_ports);\n+\trte_trace_point_emit_size_t(len);\n+\trte_trace_point_emit_u32(direction);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_hairpin_unbind,\n+\tRTE_TRACE_POINT_ARGS(uint16_t tx_port, uint16_t rx_port),\n+\trte_trace_point_emit_u16(tx_port);\n+\trte_trace_point_emit_u16(rx_port);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_link_speed_to_str,\n+\tRTE_TRACE_POINT_ARGS(uint32_t link_speed),\n+\trte_trace_point_emit_u32(link_speed);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_link_to_str,\n+\tRTE_TRACE_POINT_ARGS(char *str, size_t len,\n+\t\tconst struct rte_eth_link *eth_link),\n+\trte_trace_point_emit_ptr(str);\n+\trte_trace_point_emit_size_t(len);\n+\trte_trace_point_emit_ptr(eth_link);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_fec_get_capability,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_fec_capa *speed_fec_capa,\n+\t\tunsigned int num),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(speed_fec_capa);\n+\trte_trace_point_emit_u32(num);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_fec_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint32_t *fec_capa),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(fec_capa);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_fec_set,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint32_t fec_capa),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u32(fec_capa);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_get_monitor_addr,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\tstruct rte_power_monitor_cond *pmc),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_ptr(pmc);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_representor_info_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_representor_info *info),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(info);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_capability_name,\n+\tRTE_TRACE_POINT_ARGS(uint64_t capability, const char *name),\n+\trte_trace_point_emit_u64(capability);\n+\trte_trace_point_emit_string(name);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_conf_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_eth_conf *dev_conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(dev_conf);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_macaddrs_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, struct rte_ether_addr *ma,\n+\t\tunsigned int num),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(ma);\n+\trte_trace_point_emit_u32(num);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_rx_metadata_negotiate,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint64_t *features),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(features);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_priority_flow_ctrl_queue_configure,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_pfc_queue_conf *pfc_queue_conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(pfc_queue_conf);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_priority_flow_ctrl_queue_info_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_pfc_queue_info *pfc_queue_info),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(pfc_queue_info);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_ethdev_trace_priv_dump,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id),\n+\trte_trace_point_emit_u16(port_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_ip_reassembly_capability_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_ip_reassembly_params *capa),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(capa);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_ip_reassembly_conf_get,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tstruct rte_eth_ip_reassembly_params *conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(conf);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_ip_reassembly_conf_set,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id,\n+\t\tconst struct rte_eth_ip_reassembly_params *conf),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_ptr(conf);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_rx_avail_thresh_query,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+)\n+\n+RTE_TRACE_POINT(\n+\trte_eth_trace_rx_avail_thresh_set,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, uint16_t queue_id,\n+\t\tuint8_t avail_thresh),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_u16(queue_id);\n+\trte_trace_point_emit_u8(avail_thresh);\n+)\n+\n #ifdef __cplusplus\n }\n #endif\ndiff --git a/lib/ethdev/version.map b/lib/ethdev/version.map\nindex d46f31b63f..79bf947042 100644\n--- a/lib/ethdev/version.map\n+++ b/lib/ethdev/version.map\n@@ -285,6 +285,153 @@ EXPERIMENTAL {\n \trte_mtr_color_in_protocol_priority_get;\n \trte_mtr_color_in_protocol_set;\n \trte_mtr_meter_vlan_table_update;\n+\n+\t# added in 22.11\n+\t__rte_eth_trace_add_first_rx_callback;\n+\t__rte_eth_trace_add_rx_callback;\n+\t__rte_eth_trace_add_tx_callback;\n+\t__rte_eth_trace_allmulticast_disable;\n+\t__rte_eth_trace_allmulticast_enable;\n+\t__rte_eth_trace_allmulticast_get;\n+\t__rte_eth_trace_call_rx_callbacks;\n+\t__rte_eth_trace_call_tx_callbacks;\n+\t__rte_ethdev_trace_count_avail;\n+\t__rte_ethdev_trace_count_total;\n+\t__rte_ethdev_trace_set_mtu;\n+\t__rte_ethdev_trace_adjust_nb_rx_tx_desc;\n+\t__rte_ethdev_trace_callback_register;\n+\t__rte_ethdev_trace_callback_unregister;\n+\t__rte_ethdev_trace_default_mac_addr_set;\n+\t__rte_ethdev_trace_flow_ctrl_get;\n+\t__rte_ethdev_trace_flow_ctrl_set;\n+\t__rte_ethdev_trace_fw_version_get;\n+\t__rte_ethdev_trace_get_dcb_info;\n+\t__rte_ethdev_trace_get_eeprom;\n+\t__rte_ethdev_trace_get_eeprom_length;\n+\t__rte_ethdev_trace_get_mtu;\n+\t__rte_ethdev_trace_get_name_by_port;\n+\t__rte_ethdev_trace_get_port_by_name;\n+\t__rte_ethdev_trace_get_reg_info;\n+\t__rte_ethdev_trace_get_sec_ctx;\n+\t__rte_ethdev_trace_get_supported_ptypes;\n+\t__rte_ethdev_trace_get_vlan_offload;\n+\t__rte_ethdev_trace_info_get;\n+\t__rte_ethdev_trace_is_removed;\n+\t__rte_ethdev_trace_is_valid_port;\n+\t__rte_ethdev_trace_mac_addr_add;\n+\t__rte_ethdev_trace_mac_addr_remove;\n+\t__rte_ethdev_trace_pool_ops_supported;\n+\t__rte_ethdev_trace_priority_flow_ctrl_set;\n+\t__rte_ethdev_trace_reset;\n+\t__rte_ethdev_trace_rss_hash_conf_get;\n+\t__rte_ethdev_trace_rss_hash_update;\n+\t__rte_ethdev_trace_rss_reta_query;\n+\t__rte_ethdev_trace_rss_reta_update;\n+\t__rte_ethdev_trace_rx_intr_ctl;\n+\t__rte_ethdev_trace_rx_intr_ctl_q;\n+\t__rte_ethdev_trace_rx_intr_ctl_q_get_fd;\n+\t__rte_ethdev_trace_rx_intr_disable;\n+\t__rte_ethdev_trace_rx_intr_enable;\n+\t__rte_ethdev_trace_rx_offload_name;\n+\t__rte_ethdev_trace_rx_queue_start;\n+\t__rte_ethdev_trace_rx_queue_stop;\n+\t__rte_ethdev_trace_set_eeprom;\n+\t__rte_ethdev_trace_set_link_down;\n+\t__rte_ethdev_trace_set_link_up;\n+\t__rte_ethdev_trace_set_mc_addr_list;\n+\t__rte_ethdev_trace_set_ptypes;\n+\t__rte_ethdev_trace_set_rx_queue_stats_mapping;\n+\t__rte_ethdev_trace_set_tx_queue_stats_mapping;\n+\t__rte_ethdev_trace_set_vlan_ether_type;\n+\t__rte_ethdev_trace_set_vlan_offload;\n+\t__rte_ethdev_trace_set_vlan_pvid;\n+\t__rte_ethdev_trace_set_vlan_strip_on_queue;\n+\t__rte_ethdev_trace_socket_id;\n+\t__rte_ethdev_trace_tx_offload_name;\n+\t__rte_ethdev_trace_tx_queue_start;\n+\t__rte_ethdev_trace_tx_queue_stop;\n+\t__rte_ethdev_trace_uc_all_hash_table_set;\n+\t__rte_ethdev_trace_uc_hash_table_set;\n+\t__rte_ethdev_trace_udp_tunnel_port_add;\n+\t__rte_ethdev_trace_udp_tunnel_port_delete;\n+\t__rte_ethdev_trace_vlan_filter;\n+\t__rte_eth_trace_find_next;\n+\t__rte_eth_trace_find_next_of;\n+\t__rte_eth_trace_find_next_owned_by;\n+\t__rte_eth_trace_find_next_sibling;\n+\t__rte_eth_trace_iterator_cleanup;\n+\t__rte_eth_trace_iterator_init;\n+\t__rte_eth_trace_iterator_next;\n+\t__rte_eth_trace_led_off;\n+\t__rte_eth_trace_led_on;\n+\t__rte_eth_trace_link_get;\n+\t__rte_eth_trace_link_get_nowait;\n+\t__rte_eth_trace_macaddr_get;\n+\t__rte_eth_trace_promiscuous_disable;\n+\t__rte_eth_trace_promiscuous_enable;\n+\t__rte_eth_trace_promiscuous_get;\n+\t__rte_eth_trace_remove_rx_callback;\n+\t__rte_eth_trace_remove_tx_callback;\n+\t__rte_eth_trace_rx_burst_mode_get;\n+\t__rte_eth_trace_rx_queue_info_get;\n+\t__rte_eth_trace_rx_queue_setup;\n+\t__rte_eth_trace_set_queue_rate_limit;\n+\t__rte_eth_trace_speed_bitflag;\n+\t__rte_eth_trace_stats_get;\n+\t__rte_eth_trace_stats_reset;\n+\t__rte_eth_trace_timesync_adjust_time;\n+\t__rte_eth_trace_timesync_disable;\n+\t__rte_eth_trace_timesync_enable;\n+\t__rte_eth_trace_timesync_read_rx_timestamp;\n+\t__rte_eth_trace_timesync_read_time;\n+\t__rte_eth_trace_timesync_read_tx_timestamp;\n+\t__rte_eth_trace_timesync_write_time;\n+\t__rte_eth_trace_tx_buffer_count_callback;\n+\t__rte_eth_trace_tx_buffer_drop_callback;\n+\t__rte_eth_trace_tx_buffer_init;\n+\t__rte_eth_trace_tx_buffer_set_err_callback;\n+\t__rte_eth_trace_tx_burst_mode_get;\n+\t__rte_eth_trace_tx_done_cleanup;\n+\t__rte_eth_trace_tx_queue_info_get;\n+\t__rte_eth_trace_tx_queue_setup;\n+\t__rte_eth_trace_xstats_get;\n+\t__rte_eth_trace_xstats_get_by_id;\n+\t__rte_eth_trace_xstats_get_id_by_name;\n+\t__rte_eth_trace_xstats_get_names;\n+\t__rte_eth_trace_xstats_get_names_by_id;\n+\t__rte_eth_trace_xstats_reset;\n+\t__rte_ethdev_trace_owner_delete;\n+\t__rte_ethdev_trace_owner_get;\n+\t__rte_ethdev_trace_owner_new;\n+\t__rte_ethdev_trace_owner_set;\n+\t__rte_ethdev_trace_owner_unset;\n+\t__rte_ethdev_trace_get_module_eeprom;\n+\t__rte_ethdev_trace_get_module_info;\n+\t__rte_ethdev_trace_hairpin_capability_get;\n+\t__rte_eth_trace_rx_hairpin_queue_setup;\n+\t__rte_eth_trace_tx_hairpin_queue_setup;\n+\t__rte_eth_trace_hairpin_bind;\n+\t__rte_eth_trace_hairpin_get_peer_ports;\n+\t__rte_eth_trace_hairpin_unbind;\n+\t__rte_eth_trace_link_speed_to_str;\n+\t__rte_eth_trace_link_to_str;\n+\t__rte_eth_trace_fec_get_capability;\n+\t__rte_eth_trace_fec_get;\n+\t__rte_eth_trace_fec_set;\n+\t__rte_eth_trace_get_monitor_addr;\n+\t__rte_eth_trace_representor_info_get;\n+\t__rte_ethdev_trace_capability_name;\n+\t__rte_ethdev_trace_conf_get;\n+\t__rte_eth_trace_macaddrs_get;\n+\t__rte_eth_trace_rx_metadata_negotiate;\n+\t__rte_ethdev_trace_priority_flow_ctrl_queue_configure;\n+\t__rte_ethdev_trace_priority_flow_ctrl_queue_info_get;\n+\t__rte_ethdev_trace_priv_dump;\n+\t__rte_eth_trace_ip_reassembly_capability_get;\n+\t__rte_eth_trace_ip_reassembly_conf_get;\n+\t__rte_eth_trace_ip_reassembly_conf_set;\n+\t__rte_eth_trace_rx_avail_thresh_query;\n+\t__rte_eth_trace_rx_avail_thresh_set;\n };\n \n INTERNAL {\n",
    "prefixes": [
        "1/6"
    ]
}