Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/114296/?format=api
https://patches.dpdk.org/api/patches/114296/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220727225431.600913-1-cristian.dumitrescu@intel.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220727225431.600913-1-cristian.dumitrescu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220727225431.600913-1-cristian.dumitrescu@intel.com", "date": "2022-07-27T22:54:15", "name": "[V4,01/17] pipeline: add pipeline name", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "740e7620c81f2343b82833e7c33c807aadcb2682", "submitter": { "id": 19, "url": "https://patches.dpdk.org/api/people/19/?format=api", "name": "Cristian Dumitrescu", "email": "cristian.dumitrescu@intel.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220727225431.600913-1-cristian.dumitrescu@intel.com/mbox/", "series": [ { "id": 24107, "url": "https://patches.dpdk.org/api/series/24107/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=24107", "date": "2022-07-27T22:54:15", "name": "[V4,01/17] pipeline: add pipeline name", "version": 4, "mbox": "https://patches.dpdk.org/series/24107/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/114296/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/114296/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id EF114A00C4;\n\tThu, 28 Jul 2022 00:54:35 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B1132427ED;\n\tThu, 28 Jul 2022 00:54:35 +0200 (CEST)", "from mga11.intel.com (mga11.intel.com [192.55.52.93])\n by mails.dpdk.org (Postfix) with ESMTP id 2841541156\n for <dev@dpdk.org>; Thu, 28 Jul 2022 00:54:34 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 27 Jul 2022 15:54:33 -0700", "from silpixa00400573.ir.intel.com (HELO\n silpixa00400573.ger.corp.intel.com.) ([10.237.223.157])\n by orsmga008.jf.intel.com with ESMTP; 27 Jul 2022 15:54:31 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1658962474; x=1690498474;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=eqJK7rM0AIyqLHe6hbcrRFn7PUbXHjOuexm3zcWcmBw=;\n b=GwwC0UTIyA8O/p7po1LgQ5zBUY0CNOs/cw5iXKQShGVsRfF5p0N+Cxp8\n HZL02hXCZFEfQAp7p6sqaybWaAjB2A9/hhJRQNiYm2IXqDx2p8kT9SZea\n ey8g1olaizCBRFgCN8Nm3e8jJQlbvUjWZ0wffsVIKJlXp3hXflGqer+7g\n I4K5iI0GD5Q6/5aLFFLcjW3FxyK60Jd03pwxGdGhLoUTtwGec8GvQuslh\n H0xsGJ9hF05COwP6fhQUcFZpcgpLtEqbAhy/z5grcDbq1oLZa8vaBYmnJ\n d5xgD7ImWXNzFYV9XuicVWxTNESKW/lVTFlxHfqR5jo9LhxD8CVL8Fzr1 w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6400,9594,10421\"; a=\"285912153\"", "E=Sophos;i=\"5.93,196,1654585200\"; d=\"scan'208\";a=\"285912153\"", "E=Sophos;i=\"5.93,196,1654585200\"; d=\"scan'208\";a=\"628572562\"" ], "X-ExtLoop1": "1", "From": "Cristian Dumitrescu <cristian.dumitrescu@intel.com>", "To": "dev@dpdk.org", "Cc": "\"Kamalakannan R .\" <kamalakannan.r@intel.com>", "Subject": "[PATCH V4 01/17] pipeline: add pipeline name", "Date": "Wed, 27 Jul 2022 22:54:15 +0000", "Message-Id": "<20220727225431.600913-1-cristian.dumitrescu@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20220727223639.598932-1-cristian.dumitrescu@intel.com>", "References": "<20220727223639.598932-1-cristian.dumitrescu@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add an unique name to every pipeline. This enables the library to\nmaintain a list of the existing pipeline objects, which can be\nqueried by the application.\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\nSigned-off-by: Kamalakannan R. <kamalakannan.r@intel.com>\n---\n examples/pipeline/obj.c | 2 +-\n lib/pipeline/rte_swx_ctl.c | 99 +++++++++++++++++++++\n lib/pipeline/rte_swx_ctl.h | 15 ++++\n lib/pipeline/rte_swx_pipeline.c | 107 ++++++++++++++++++++++-\n lib/pipeline/rte_swx_pipeline.h | 18 +++-\n lib/pipeline/rte_swx_pipeline_internal.h | 2 +\n lib/pipeline/version.map | 4 +\n 7 files changed, 244 insertions(+), 3 deletions(-)", "diff": "diff --git a/examples/pipeline/obj.c b/examples/pipeline/obj.c\nindex b79f044ac7..967342c580 100644\n--- a/examples/pipeline/obj.c\n+++ b/examples/pipeline/obj.c\n@@ -533,7 +533,7 @@ pipeline_create(struct obj *obj, const char *name, int numa_node)\n \t\treturn NULL;\n \n \t/* Resource create */\n-\tstatus = rte_swx_pipeline_config(&p, numa_node);\n+\tstatus = rte_swx_pipeline_config(&p, name, numa_node);\n \tif (status)\n \t\tgoto error;\n \ndiff --git a/lib/pipeline/rte_swx_ctl.c b/lib/pipeline/rte_swx_ctl.c\nindex 710e89a46a..1b776fc543 100644\n--- a/lib/pipeline/rte_swx_ctl.c\n+++ b/lib/pipeline/rte_swx_ctl.c\n@@ -9,6 +9,8 @@\n \n #include <rte_common.h>\n #include <rte_byteorder.h>\n+#include <rte_tailq.h>\n+#include <rte_eal_memconfig.h>\n \n #include <rte_swx_table_selector.h>\n \n@@ -1157,12 +1159,103 @@ table_state_create(struct rte_swx_ctl_pipeline *ctl)\n \treturn status;\n }\n \n+/* Global list of pipeline instances. */\n+TAILQ_HEAD(rte_swx_ctl_pipeline_list, rte_tailq_entry);\n+\n+static struct rte_tailq_elem rte_swx_ctl_pipeline_tailq = {\n+\t.name = \"RTE_SWX_CTL_PIPELINE\",\n+};\n+\n+EAL_REGISTER_TAILQ(rte_swx_ctl_pipeline_tailq)\n+\n+struct rte_swx_ctl_pipeline *\n+rte_swx_ctl_pipeline_find(const char *name)\n+{\n+\tstruct rte_swx_ctl_pipeline_list *ctl_list;\n+\tstruct rte_tailq_entry *te = NULL;\n+\n+\tif (!name || !name[0] || (strnlen(name, RTE_SWX_CTL_NAME_SIZE) >= RTE_SWX_CTL_NAME_SIZE))\n+\t\treturn NULL;\n+\n+\tctl_list = RTE_TAILQ_CAST(rte_swx_ctl_pipeline_tailq.head, rte_swx_ctl_pipeline_list);\n+\n+\trte_mcfg_tailq_read_lock();\n+\n+\tTAILQ_FOREACH(te, ctl_list, next) {\n+\t\tstruct rte_swx_ctl_pipeline *ctl = (struct rte_swx_ctl_pipeline *)te->data;\n+\n+\t\tif (!strncmp(name, ctl->info.name, sizeof(ctl->info.name))) {\n+\t\t\trte_mcfg_tailq_read_unlock();\n+\t\t\treturn ctl;\n+\t\t}\n+\t}\n+\n+\trte_mcfg_tailq_read_unlock();\n+\treturn NULL;\n+}\n+\n+static int\n+ctl_register(struct rte_swx_ctl_pipeline *ctl)\n+{\n+\tstruct rte_swx_ctl_pipeline_list *ctl_list;\n+\tstruct rte_tailq_entry *te = NULL;\n+\n+\tctl_list = RTE_TAILQ_CAST(rte_swx_ctl_pipeline_tailq.head, rte_swx_ctl_pipeline_list);\n+\n+\trte_mcfg_tailq_write_lock();\n+\n+\tTAILQ_FOREACH(te, ctl_list, next) {\n+\t\tstruct rte_swx_ctl_pipeline *ctl_crt = (struct rte_swx_ctl_pipeline *)te->data;\n+\n+\t\tif (!strncmp(ctl->info.name, ctl_crt->info.name, sizeof(ctl->info.name))) {\n+\t\t\trte_mcfg_tailq_write_unlock();\n+\t\t\treturn -EEXIST;\n+\t\t}\n+\t}\n+\n+\tte = calloc(1, sizeof(struct rte_tailq_entry));\n+\tif (!te) {\n+\t\trte_mcfg_tailq_write_unlock();\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tte->data = (void *)ctl;\n+\tTAILQ_INSERT_TAIL(ctl_list, te, next);\n+\trte_mcfg_tailq_write_unlock();\n+\treturn 0;\n+}\n+\n+static void\n+ctl_unregister(struct rte_swx_ctl_pipeline *ctl)\n+{\n+\tstruct rte_swx_ctl_pipeline_list *ctl_list;\n+\tstruct rte_tailq_entry *te = NULL;\n+\n+\tctl_list = RTE_TAILQ_CAST(rte_swx_ctl_pipeline_tailq.head, rte_swx_ctl_pipeline_list);\n+\n+\trte_mcfg_tailq_write_lock();\n+\n+\tTAILQ_FOREACH(te, ctl_list, next) {\n+\t\tif (te->data == (void *)ctl) {\n+\t\t\tTAILQ_REMOVE(ctl_list, te, next);\n+\t\t\trte_mcfg_tailq_write_unlock();\n+\t\t\tfree(te);\n+\t\t\treturn;\n+\t\t}\n+\t}\n+\n+\trte_mcfg_tailq_write_unlock();\n+}\n+\n void\n rte_swx_ctl_pipeline_free(struct rte_swx_ctl_pipeline *ctl)\n {\n \tif (!ctl)\n \t\treturn;\n \n+\tif (ctl->info.name[0])\n+\t\tctl_unregister(ctl);\n+\n \taction_free(ctl);\n \n \ttable_state_free(ctl);\n@@ -1441,6 +1534,12 @@ rte_swx_ctl_pipeline_create(struct rte_swx_pipeline *p)\n \tif (status)\n \t\tgoto error;\n \n+\tif (ctl->info.name[0]) {\n+\t\tstatus = ctl_register(ctl);\n+\t\tif (status)\n+\t\t\tgoto error;\n+\t}\n+\n \treturn ctl;\n \n error:\ndiff --git a/lib/pipeline/rte_swx_ctl.h b/lib/pipeline/rte_swx_ctl.h\nindex d771389d26..63ee479e47 100644\n--- a/lib/pipeline/rte_swx_ctl.h\n+++ b/lib/pipeline/rte_swx_ctl.h\n@@ -35,6 +35,9 @@ struct rte_swx_pipeline;\n \n /** Pipeline info. */\n struct rte_swx_ctl_pipeline_info {\n+\t/** Pipeline name. */\n+\tchar name[RTE_SWX_CTL_NAME_SIZE];\n+\n \t/** Number of input ports. */\n \tuint32_t n_ports_in;\n \n@@ -812,6 +815,18 @@ rte_swx_pipeline_table_state_set(struct rte_swx_pipeline *p,\n /** Pipeline control opaque data structure. */\n struct rte_swx_ctl_pipeline;\n \n+/**\n+ * Pipeline control find\n+ *\n+ * @param[in] name\n+ * Pipeline name.\n+ * @return\n+ * Valid pipeline control handle if found or NULL otherwise.\n+ */\n+__rte_experimental\n+struct rte_swx_ctl_pipeline *\n+rte_swx_ctl_pipeline_find(const char *name);\n+\n /**\n * Pipeline control create\n *\ndiff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c\nindex 3e1c6e9edb..c8ccded4f8 100644\n--- a/lib/pipeline/rte_swx_pipeline.c\n+++ b/lib/pipeline/rte_swx_pipeline.c\n@@ -6,6 +6,8 @@\n #include <errno.h>\n #include <dlfcn.h>\n \n+#include <rte_tailq.h>\n+#include <rte_eal_memconfig.h>\n #include <rte_jhash.h>\n #include <rte_hash_crc.h>\n \n@@ -9578,6 +9580,95 @@ metarray_free(struct rte_swx_pipeline *p)\n /*\n * Pipeline.\n */\n+\n+/* Global list of pipeline instances. */\n+TAILQ_HEAD(rte_swx_pipeline_list, rte_tailq_entry);\n+\n+static struct rte_tailq_elem rte_swx_pipeline_tailq = {\n+\t.name = \"RTE_SWX_PIPELINE\",\n+};\n+\n+EAL_REGISTER_TAILQ(rte_swx_pipeline_tailq)\n+\n+struct rte_swx_pipeline *\n+rte_swx_pipeline_find(const char *name)\n+{\n+\tstruct rte_swx_pipeline_list *pipeline_list;\n+\tstruct rte_tailq_entry *te = NULL;\n+\n+\tif (!name || !name[0] || (strnlen(name, RTE_SWX_NAME_SIZE) >= RTE_SWX_NAME_SIZE))\n+\t\treturn NULL;\n+\n+\tpipeline_list = RTE_TAILQ_CAST(rte_swx_pipeline_tailq.head, rte_swx_pipeline_list);\n+\n+\trte_mcfg_tailq_read_lock();\n+\n+\tTAILQ_FOREACH(te, pipeline_list, next) {\n+\t\tstruct rte_swx_pipeline *p = (struct rte_swx_pipeline *)te->data;\n+\n+\t\tif (!strncmp(name, p->name, sizeof(p->name))) {\n+\t\t\trte_mcfg_tailq_read_unlock();\n+\t\t\treturn p;\n+\t\t}\n+\t}\n+\n+\trte_mcfg_tailq_read_unlock();\n+\treturn NULL;\n+}\n+\n+static int\n+pipeline_register(struct rte_swx_pipeline *p)\n+{\n+\tstruct rte_swx_pipeline_list *pipeline_list;\n+\tstruct rte_tailq_entry *te = NULL;\n+\n+\tpipeline_list = RTE_TAILQ_CAST(rte_swx_pipeline_tailq.head, rte_swx_pipeline_list);\n+\n+\trte_mcfg_tailq_write_lock();\n+\n+\tTAILQ_FOREACH(te, pipeline_list, next) {\n+\t\tstruct rte_swx_pipeline *pipeline = (struct rte_swx_pipeline *)te->data;\n+\n+\t\tif (!strncmp(p->name, pipeline->name, sizeof(p->name))) {\n+\t\t\trte_mcfg_tailq_write_unlock();\n+\t\t\treturn -EEXIST;\n+\t\t}\n+\t}\n+\n+\tte = calloc(1, sizeof(struct rte_tailq_entry));\n+\tif (!te) {\n+\t\trte_mcfg_tailq_write_unlock();\n+\t\treturn -ENOMEM;\n+\t}\n+\n+\tte->data = (void *)p;\n+\tTAILQ_INSERT_TAIL(pipeline_list, te, next);\n+\trte_mcfg_tailq_write_unlock();\n+\treturn 0;\n+}\n+\n+static void\n+pipeline_unregister(struct rte_swx_pipeline *p)\n+{\n+\tstruct rte_swx_pipeline_list *pipeline_list;\n+\tstruct rte_tailq_entry *te = NULL;\n+\n+\tpipeline_list = RTE_TAILQ_CAST(rte_swx_pipeline_tailq.head, rte_swx_pipeline_list);\n+\n+\trte_mcfg_tailq_write_lock();\n+\n+\tTAILQ_FOREACH(te, pipeline_list, next) {\n+\t\tif (te->data == (void *)p) {\n+\t\t\tTAILQ_REMOVE(pipeline_list, te, next);\n+\t\t\trte_mcfg_tailq_write_unlock();\n+\t\t\tfree(te);\n+\t\t\treturn;\n+\t\t}\n+\t}\n+\n+\trte_mcfg_tailq_write_unlock();\n+}\n+\n void\n rte_swx_pipeline_free(struct rte_swx_pipeline *p)\n {\n@@ -9586,6 +9677,9 @@ rte_swx_pipeline_free(struct rte_swx_pipeline *p)\n \tif (!p)\n \t\treturn;\n \n+\tif (p->name[0])\n+\t\tpipeline_unregister(p);\n+\n \tlib = p->lib;\n \n \tfree(p->instruction_data);\n@@ -9720,13 +9814,14 @@ hash_funcs_register(struct rte_swx_pipeline *p)\n }\n \n int\n-rte_swx_pipeline_config(struct rte_swx_pipeline **p, int numa_node)\n+rte_swx_pipeline_config(struct rte_swx_pipeline **p, const char *name, int numa_node)\n {\n \tstruct rte_swx_pipeline *pipeline = NULL;\n \tint status = 0;\n \n \t/* Check input parameters. */\n \tCHECK(p, EINVAL);\n+\tCHECK(!name || (strnlen(name, RTE_SWX_NAME_SIZE) < RTE_SWX_NAME_SIZE), EINVAL);\n \n \t/* Memory allocation. */\n \tpipeline = calloc(1, sizeof(struct rte_swx_pipeline));\n@@ -9736,6 +9831,9 @@ rte_swx_pipeline_config(struct rte_swx_pipeline **p, int numa_node)\n \t}\n \n \t/* Initialization. */\n+\tif (name)\n+\t\tstrcpy(pipeline->name, name);\n+\n \tTAILQ_INIT(&pipeline->struct_types);\n \tTAILQ_INIT(&pipeline->port_in_types);\n \tTAILQ_INIT(&pipeline->ports_in);\n@@ -9776,6 +9874,12 @@ rte_swx_pipeline_config(struct rte_swx_pipeline **p, int numa_node)\n \tif (status)\n \t\tgoto error;\n \n+\tif (pipeline->name[0]) {\n+\t\tstatus = pipeline_register(pipeline);\n+\t\tif (status)\n+\t\t\tgoto error;\n+\t}\n+\n \t*p = pipeline;\n \treturn 0;\n \n@@ -9966,6 +10070,7 @@ rte_swx_ctl_pipeline_info_get(struct rte_swx_pipeline *p,\n \tTAILQ_FOREACH(table, &p->tables, node)\n \t\tn_tables++;\n \n+\tstrcpy(pipeline->name, p->name);\n \tpipeline->n_ports_in = p->n_ports_in;\n \tpipeline->n_ports_out = p->n_ports_out;\n \tpipeline->n_mirroring_slots = p->n_mirroring_slots;\ndiff --git a/lib/pipeline/rte_swx_pipeline.h b/lib/pipeline/rte_swx_pipeline.h\nindex c41ca5cb15..ef50a0fa70 100644\n--- a/lib/pipeline/rte_swx_pipeline.h\n+++ b/lib/pipeline/rte_swx_pipeline.h\n@@ -44,22 +44,38 @@ extern \"C\" {\n /** Pipeline opaque data structure. */\n struct rte_swx_pipeline;\n \n+/**\n+ * Pipeline find\n+ *\n+ * @param[in] name\n+ * Pipeline name.\n+ * @return\n+ * Valid pipeline handle if found or NULL otherwise.\n+ */\n+__rte_experimental\n+struct rte_swx_pipeline *\n+rte_swx_pipeline_find(const char *name);\n+\n /**\n * Pipeline configure\n *\n * @param[out] p\n * Pipeline handle. Must point to valid memory. Contains valid pipeline handle\n * when the function returns successfully.\n+ * @param[in] name\n+ * Pipeline unique name.\n * @param[in] numa_node\n * Non-Uniform Memory Access (NUMA) node.\n * @return\n * 0 on success or the following error codes otherwise:\n * -EINVAL: Invalid argument;\n- * -ENOMEM: Not enough space/cannot allocate memory.\n+ * -ENOMEM: Not enough space/cannot allocate memory;\n+ * -EEXIST: Pipeline with this name already exists.\n */\n __rte_experimental\n int\n rte_swx_pipeline_config(struct rte_swx_pipeline **p,\n+\t\t\tconst char *name,\n \t\t\tint numa_node);\n \n /*\ndiff --git a/lib/pipeline/rte_swx_pipeline_internal.h b/lib/pipeline/rte_swx_pipeline_internal.h\nindex a35635efb7..588cad62b5 100644\n--- a/lib/pipeline/rte_swx_pipeline_internal.h\n+++ b/lib/pipeline/rte_swx_pipeline_internal.h\n@@ -1459,6 +1459,8 @@ instr_operand_nbo(struct thread *t, const struct instr_operand *x)\n #endif\n \n struct rte_swx_pipeline {\n+\tchar name[RTE_SWX_NAME_SIZE];\n+\n \tstruct struct_type_tailq struct_types;\n \tstruct port_in_type_tailq port_in_types;\n \tstruct port_in_tailq ports_in;\ndiff --git a/lib/pipeline/version.map b/lib/pipeline/version.map\nindex 8312307a7a..50029aadcf 100644\n--- a/lib/pipeline/version.map\n+++ b/lib/pipeline/version.map\n@@ -145,4 +145,8 @@ EXPERIMENTAL {\n \trte_swx_ctl_pipeline_learner_timeout_get;\n \trte_swx_ctl_pipeline_learner_timeout_set;\n \trte_swx_pipeline_hash_func_register;\n+\n+\t#added in 22.11\n+\trte_swx_ctl_pipeline_find;\n+\trte_swx_pipeline_find;\n };\n", "prefixes": [ "V4", "01/17" ] }{ "id": 114296, "url": "