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GET /api/patches/108536/?format=api
{ "id": 108536, "url": "https://patches.dpdk.org/api/patches/108536/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20220304120833.312776-1-dsinghrawat@marvell.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220304120833.312776-1-dsinghrawat@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220304120833.312776-1-dsinghrawat@marvell.com", "date": "2022-03-04T12:08:31", "name": "[1/3] net/qede: fix Tx callback completion routine", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "0e3e512c53f307c7c79330e26c06a79ac98701da", "submitter": { "id": 1791, "url": "https://patches.dpdk.org/api/people/1791/?format=api", "name": "Devendra Singh Rawat", "email": "dsinghrawat@marvell.com" }, "delegate": { "id": 310, "url": "https://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20220304120833.312776-1-dsinghrawat@marvell.com/mbox/", "series": [ { "id": 22022, "url": "https://patches.dpdk.org/api/series/22022/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=22022", "date": "2022-03-04T12:08:31", "name": "[1/3] net/qede: fix Tx callback completion routine", "version": 1, "mbox": "https://patches.dpdk.org/series/22022/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/108536/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/108536/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BF858A0351;\n\tFri, 4 Mar 2022 13:08:54 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4BB54427A9;\n\tFri, 4 Mar 2022 13:08:54 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 6C6C64013F;\n Fri, 4 Mar 2022 13:08:52 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.16.1.2/8.16.1.2) with ESMTP id\n 2247N6E7002105;\n Fri, 4 Mar 2022 04:08:51 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3ek4j63c2a-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Fri, 04 Mar 2022 04:08:51 -0800", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Fri, 4 Mar 2022 04:08:49 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Fri, 4 Mar 2022 04:08:49 -0800", "from localhost.marvell.com (unknown [10.30.47.116])\n by maili.marvell.com (Postfix) with ESMTP id 0359E3F7083;\n Fri, 4 Mar 2022 04:08:46 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-type; s=pfpt0220;\n bh=FzbVRAmzq8dsurdFXpfJCGruNA8u9frz3Ozh/CjQwrc=;\n b=boWNOvDQ3XeU45YUM2d5zfFDStObVNuMZaj+L69L5lYV1pfDVH2b6yt1w91eMB8bKckY\n P7brnEK0J8suau/5wUfp08vpWwq2iCadB701Dif1oPbtwb4NrUIpvOKsbXiE0H0DAHY5\n r2yUHc6eGEcPDp3+OXlcXEz3IDcnSRD4lJ0104mDlLZgHszomjmv+Mys2KFnJRyoFl7f\n B2YBqBZkrSfIW1r8fNOEL3MXBc3gxoLJYb27H/C9ClYwSC/Wa67V8jPM4fhUp1JoqkCs\n HJNzYMQdDkqfXiPlQiY0q5NuLAxz0phpTnjPpaDpdqAlc2wduBqHmF0SzkEd3ExSdos8 Zw==", "From": "Devendra Singh Rawat <dsinghrawat@marvell.com>", "To": "<dev@dpdk.org>, <thomas@monjalon.net>, <jerinj@marvell.com>,\n <ferruh.yigit@intel.com>, <rmody@marvell.com>", "CC": "<palok@marvell.com>, Devendra Singh Rawat <dsinghrawat@marvell.com>,\n <stable@dpdk.org>", "Subject": "[PATCH 1/3] net/qede: fix Tx callback completion routine", "Date": "Fri, 4 Mar 2022 17:38:31 +0530", "Message-ID": "<20220304120833.312776-1-dsinghrawat@marvell.com>", "X-Mailer": "git-send-email 2.18.2", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "M5iUtdFMYt0qOJYsoHU5Sr2NVidaFo2w", "X-Proofpoint-ORIG-GUID": "M5iUtdFMYt0qOJYsoHU5Sr2NVidaFo2w", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.816,Hydra:6.0.425,FMLib:17.11.64.514\n definitions=2022-03-04_02,2022-03-04_01,2022-02-23_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Tx completion routine was first incrementing no. of free slots in Tx\nring and then freeing corresponding mbufs in bulk. In some situations\nno. of mbufs freed were less than no. of Tx ring slots freed. This\ncaused TX ring to get into an inconsistent state and ultimately\napplication fails to transmit further traffic.\n\nThe fix first updates Tx ring SW consumer index, then increments Tx ring\nfree slot no. and finally frees the mbuf, this is done in a single\niteration of loop.\n\nFixes: 2c41740bf19e (\"net/qede: get consumer index once\")\nFixes: 4996b959cde6 (\"net/qede: free packets in bulk\")\nCc: stable@dpdk.org\n\nSigned-off-by: Devendra Singh Rawat <dsinghrawat@marvell.com>\nSigned-off-by: Rasesh Mody <rmody@marvell.com>\n---\n drivers/net/qede/qede_rxtx.c | 79 +++++++++++++++---------------------\n 1 file changed, 33 insertions(+), 46 deletions(-)", "diff": "diff --git a/drivers/net/qede/qede_rxtx.c b/drivers/net/qede/qede_rxtx.c\nindex 911bb1a260..0c52568180 100644\n--- a/drivers/net/qede/qede_rxtx.c\n+++ b/drivers/net/qede/qede_rxtx.c\n@@ -885,68 +885,55 @@ qede_tx_queue_start(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)\n }\n \n static inline void\n-qede_process_tx_compl(__rte_unused struct ecore_dev *edev,\n-\t\t struct qede_tx_queue *txq)\n+qede_free_tx_pkt(struct qede_tx_queue *txq)\n {\n-\tuint16_t hw_bd_cons;\n-\tuint16_t sw_tx_cons;\n-\tuint16_t remaining;\n-\tuint16_t mask;\n \tstruct rte_mbuf *mbuf;\n \tuint16_t nb_segs;\n \tuint16_t idx;\n-\tuint16_t first_idx;\n-\n-\trte_compiler_barrier();\n-\trte_prefetch0(txq->hw_cons_ptr);\n-\tsw_tx_cons = ecore_chain_get_cons_idx(&txq->tx_pbl);\n-\thw_bd_cons = rte_le_to_cpu_16(*txq->hw_cons_ptr);\n-#ifdef RTE_LIBRTE_QEDE_DEBUG_TX\n-\tPMD_TX_LOG(DEBUG, txq, \"Tx Completions = %u\\n\",\n-\t\t abs(hw_bd_cons - sw_tx_cons));\n-#endif\n-\n-\tmask = NUM_TX_BDS(txq);\n-\tidx = txq->sw_tx_cons & mask;\n \n-\tremaining = hw_bd_cons - sw_tx_cons;\n-\ttxq->nb_tx_avail += remaining;\n-\tfirst_idx = idx;\n-\n-\twhile (remaining) {\n-\t\tmbuf = txq->sw_tx_ring[idx];\n-\t\tRTE_ASSERT(mbuf);\n+\tidx = TX_CONS(txq);\n+\tmbuf = txq->sw_tx_ring[idx];\n+\tif (mbuf) {\n \t\tnb_segs = mbuf->nb_segs;\n-\t\tremaining -= nb_segs;\n-\n-\t\t/* Prefetch the next mbuf. Note that at least the last 4 mbufs\n-\t\t * that are prefetched will not be used in the current call.\n-\t\t */\n-\t\trte_mbuf_prefetch_part1(txq->sw_tx_ring[(idx + 4) & mask]);\n-\t\trte_mbuf_prefetch_part2(txq->sw_tx_ring[(idx + 4) & mask]);\n-\n \t\tPMD_TX_LOG(DEBUG, txq, \"nb_segs to free %u\\n\", nb_segs);\n-\n \t\twhile (nb_segs) {\n+\t\t\t/* It's like consuming rxbuf in recv() */\n \t\t\tecore_chain_consume(&txq->tx_pbl);\n+\t\t\ttxq->nb_tx_avail++;\n \t\t\tnb_segs--;\n \t\t}\n-\n-\t\tidx = (idx + 1) & mask;\n+\t\trte_pktmbuf_free(mbuf);\n+\t\ttxq->sw_tx_ring[idx] = NULL;\n+\t\ttxq->sw_tx_cons++;\n \t\tPMD_TX_LOG(DEBUG, txq, \"Freed tx packet\\n\");\n-\t}\n-\ttxq->sw_tx_cons = idx;\n-\n-\tif (first_idx > idx) {\n-\t\trte_pktmbuf_free_bulk(&txq->sw_tx_ring[first_idx],\n-\t\t\t\t\t\t\t mask - first_idx + 1);\n-\t\trte_pktmbuf_free_bulk(&txq->sw_tx_ring[0], idx);\n \t} else {\n-\t\trte_pktmbuf_free_bulk(&txq->sw_tx_ring[first_idx],\n-\t\t\t\t\t\t\t idx - first_idx);\n+\t\tecore_chain_consume(&txq->tx_pbl);\n+\t\ttxq->nb_tx_avail++;\n \t}\n }\n \n+static inline void\n+qede_process_tx_compl(__rte_unused struct ecore_dev *edev,\n+\t\t struct qede_tx_queue *txq)\n+{\n+\tuint16_t hw_bd_cons;\n+#ifdef RTE_LIBRTE_QEDE_DEBUG_TX\n+\tuint16_t sw_tx_cons;\n+#endif\n+\n+\thw_bd_cons = rte_le_to_cpu_16(*txq->hw_cons_ptr);\n+\t/* read barrier prevents speculative execution on stale data */\n+\trte_rmb();\n+\n+#ifdef RTE_LIBRTE_QEDE_DEBUG_TX\n+\tsw_tx_cons = ecore_chain_get_cons_idx(&txq->tx_pbl);\n+\tPMD_TX_LOG(DEBUG, txq, \"Tx Completions = %u\\n\",\n+\t\t abs(hw_bd_cons - sw_tx_cons));\n+#endif\n+\twhile (hw_bd_cons != ecore_chain_get_cons_idx(&txq->tx_pbl))\n+\t\tqede_free_tx_pkt(txq);\n+}\n+\n static int qede_drain_txq(struct qede_dev *qdev,\n \t\t\t struct qede_tx_queue *txq, bool allow_drain)\n {\n", "prefixes": [ "1/3" ] }