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    "id": 104,
    "url": "",
    "web_url": "",
    "project": {
        "id": 1,
        "url": "",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "",
        "list_email": "",
        "web_url": "",
        "scm_url": "git://",
        "webscm_url": ""
    "msgid": "<>",
    "date": "2014-07-28T08:25:54",
    "name": "[dpdk-dev,v2,5/6] i40e: Initialize hash function during port initialization.",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "4caca549c0c7f7ea2d0c2229d62fc8114872b847",
    "submitter": {
        "id": 14,
        "url": "",
        "name": "Helin Zhang",
        "email": ""
    "delegate": null,
    "mbox": "",
    "series": [],
    "comments": "",
    "check": "pending",
    "checks": "",
    "tags": {},
    "headers": {
        "X-Mailman-Version": "2.1.15",
        "X-ExtLoop1": "1",
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        "Precedence": "list",
        "From": "Helin Zhang <>",
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        "List-Id": "patches and discussions about DPDK <>",
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        "Date": "Mon, 28 Jul 2014 16:25:54 +0800",
        "List-Subscribe": "<>,\n\t<>",
        "Subject": "[dpdk-dev] [PATCH v2 5/6] i40e: Initialize hash function during\n\tport initialization."
    "content": "As hash function are configured in gloabal registers, those\nregisters will not be reloaded unless a gloabl NIC hardware\nreset. That means a DPDK application launch will not load\nthe default configuration of hash functions. It needs an\ninitialization of those registers during the port\ninitialization to make sure all those registers are in an\nexpected state.\n\nSigned-off-by: Helin Zhang <>\n---\n lib/librte_pmd_i40e/i40e_ethdev.c | 71 +++++++++++++++++++++++++++++++++++++++\n 1 file changed, 71 insertions(+)",
    "diff": "diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c\nindex 87a4999..386d864 100644\n--- a/lib/librte_pmd_i40e/i40e_ethdev.c\n+++ b/lib/librte_pmd_i40e/i40e_ethdev.c\n@@ -204,6 +204,7 @@ static int i40e_dev_rss_hash_update(struct rte_eth_dev *dev,\n \t\t\t\t    struct rte_eth_rss_conf *rss_conf);\n static int i40e_dev_rss_hash_conf_get(struct rte_eth_dev *dev,\n \t\t\t\t      struct rte_eth_rss_conf *rss_conf);\n+static void i40e_init_hash_function(struct i40e_hw *hw);\n static int i40e_dev_is_command_supported(struct rte_eth_dev *dev __rte_unused,\n \t\t\t\t\t enum rte_eth_command cmd);\n static int i40e_rx_classification_filter_ctl(struct rte_eth_dev *dev,\n@@ -392,6 +393,9 @@ eth_i40e_dev_init(__rte_unused struct eth_driver *eth_drv,\n \t\treturn ret;\n \t}\n \n+\t/* Init hash functions */\n+\ti40e_init_hash_function(hw);\n+\n \t/* Initialize the shared code (base driver) */\n \tret = i40e_init_shared_code(hw);\n \tif (ret) {\n@@ -4369,3 +4373,70 @@ i40e_rx_classification_filter_ctl(struct rte_eth_dev *dev,\n \n \treturn ret;\n }\n+\n+/**\n+ * Initialize hash functions. It includes,\n+ * - set hash function to Toeplitz.\n+ * - set the default filter swap configurations.\n+ * - disable hash function enable per port.\n+ * - disable hash function enable per pctype.\n+ * Only global reset can reload the firmware configurations.\n+ */\n+static void\n+i40e_init_hash_function(struct i40e_hw *hw)\n+{\n+\tstatic struct rte_i40e_filter_swap_info swap_info[] = {\n+\t\t{ETH_PCTYPE_NONF_IPV4_UDP,\n+\t\t\t0x1e, 0x36, 0x04, 0x3a, 0x3c, 0x02},\n+\t\t{ETH_PCTYPE_NONF_IPV4_TCP,\n+\t\t\t0x1e, 0x36, 0x04, 0x3a, 0x3c, 0x02},\n+\t\t{ETH_PCTYPE_NONF_IPV4_SCTP,\n+\t\t\t0x1e, 0x36, 0x04, 0x00, 0x00, 0x00},\n+\t\t{ETH_PCTYPE_NONF_IPV4_OTHER,\n+\t\t\t0x1e, 0x36, 0x04, 0x00, 0x00, 0x00},\n+\t\t{ETH_PCTYPE_FRAG_IPV4,\n+\t\t\t0x1e, 0x36, 0x04, 0x00, 0x00, 0x00},\n+\t\t{ETH_PCTYPE_NONF_IPV6_UDP,\n+\t\t\t0x1a, 0x2a, 0x10, 0x3a, 0x3c, 0x02},\n+\t\t{ETH_PCTYPE_NONF_IPV6_TCP,\n+\t\t\t0x1a, 0x2a, 0x10, 0x3a, 0x3c, 0x02},\n+\t\t{ETH_PCTYPE_NONF_IPV6_SCTP,\n+\t\t\t0x1a, 0x2a, 0x10, 0x00, 0x00, 0x00},\n+\t\t{ETH_PCTYPE_NONF_IPV6_OTHER,\n+\t\t\t0x1a, 0x2a, 0x10, 0x00, 0x00, 0x00},\n+\t\t{ETH_PCTYPE_FRAG_IPV6,\n+\t\t\t0x1a, 0x2a, 0x10, 0x00, 0x00, 0x00},\n+\t\t{ETH_PCTYPE_L2_PAYLOAD,\n+\t\t\t0x00, 0x00, 0x00, 0x00, 0x00, 0x00},\n+\t};\n+\tstatic struct rte_i40e_sym_hash_enable_info sym_hash_ena_info[] = {\n+\t\t{ETH_PCTYPE_NONF_IPV4_UDP, 0},\n+\t\t{ETH_PCTYPE_NONF_IPV4_TCP, 0},\n+\t\t{ETH_PCTYPE_NONF_IPV4_SCTP, 0},\n+\t\t{ETH_PCTYPE_NONF_IPV4_OTHER, 0},\n+\t\t{ETH_PCTYPE_FRAG_IPV4, 0},\n+\t\t{ETH_PCTYPE_NONF_IPV6_UDP, 0},\n+\t\t{ETH_PCTYPE_NONF_IPV6_TCP, 0},\n+\t\t{ETH_PCTYPE_NONF_IPV6_SCTP, 0},\n+\t\t{ETH_PCTYPE_NONF_IPV6_OTHER, 0},\n+\t\t{ETH_PCTYPE_FRAG_IPV6, 0},\n+\t\t{ETH_PCTYPE_L2_PAYLOAD, 0},\n+\t};\n+\tstatic enum rte_i40e_hash_function hf = rte_i40e_hash_function_toeplitz;\n+\tuint32_t i;\n+\n+\t/* set hash function to Toeplitz by default */\n+\ti40e_set_hash_function(hw, &hf);\n+\n+\t/* initialize filter swap */\n+\tfor (i = 0; i < RTE_DIM(swap_info); i++)\n+\t\ti40e_set_filter_swap(hw, &swap_info[i]);\n+\n+\t/* disable all symmetric hash per pctype */\n+\tfor (i = 0; i < RTE_DIM(sym_hash_ena_info); i++)\n+\t\ti40e_set_symmetric_hash_enable_per_pctype(hw,\n+\t\t\t\t\t&sym_hash_ena_info[i]);\n+\n+\t/* disable symmetric hash per port */\n+\ti40e_set_symmetric_hash_enable_per_port(hw, 0);\n+}\n",
    "prefixes": [