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GET /api/patches/102318/?format=api
{ "id": 102318, "url": "https://patches.dpdk.org/api/patches/102318/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/patch/20211019205602.3188203-14-michaelba@nvidia.com/", "project": { "id": 1, "url": "https://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20211019205602.3188203-14-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20211019205602.3188203-14-michaelba@nvidia.com", "date": "2021-10-19T20:55:57", "name": "[v3,13/18] common/mlx5: add MR ctrl init function", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "cc893c6f3b29b44cd7d422a235386b4dc12087fa", "submitter": { "id": 1949, "url": "https://patches.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 1, "url": "https://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "https://patches.dpdk.org/project/dpdk/patch/20211019205602.3188203-14-michaelba@nvidia.com/mbox/", "series": [ { "id": 19808, "url": "https://patches.dpdk.org/api/series/19808/?format=api", "web_url": "https://patches.dpdk.org/project/dpdk/list/?series=19808", "date": "2021-10-19T20:55:44", "name": "mlx5: sharing global MR cache between drivers", "version": 3, "mbox": "https://patches.dpdk.org/series/19808/mbox/" } ], "comments": "https://patches.dpdk.org/api/patches/102318/comments/", "check": "success", "checks": "https://patches.dpdk.org/api/patches/102318/checks/", "tags": {}, "related": [], "headers": { "Return-Path": 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"X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN7PR12MB2659", "Subject": "[dpdk-dev] [PATCH v3 13/18] common/mlx5: add MR ctrl init function", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org", "Sender": "\"dev\" <dev-bounces@dpdk.org>" }, "content": "From: Michael Baum <michaelba@oss.nvidia.com>\n\nAdd function for MR control structure initialization.\nThis function include:\n - btree initialization.\n - dev_gen_ptr initialization.\n\nSigned-off-by: Michael Baum <michaelba@oss.nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/mlx5_common_mr.c | 28 +++++++++++++++++++++++++\n drivers/common/mlx5/mlx5_common_mr.h | 3 +++\n drivers/common/mlx5/version.map | 1 +\n drivers/compress/mlx5/mlx5_compress.c | 6 ++----\n drivers/crypto/mlx5/mlx5_crypto.c | 5 ++---\n drivers/net/mlx5/mlx5_rxq.c | 6 ++----\n drivers/net/mlx5/mlx5_txq.c | 6 ++----\n drivers/regex/mlx5/mlx5_regex_control.c | 6 ++----\n 8 files changed, 42 insertions(+), 19 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_common_mr.c b/drivers/common/mlx5/mlx5_common_mr.c\nindex 2e039a4e70..8fd65484cf 100644\n--- a/drivers/common/mlx5/mlx5_common_mr.c\n+++ b/drivers/common/mlx5/mlx5_common_mr.c\n@@ -271,6 +271,34 @@ mlx5_mr_btree_dump(struct mlx5_mr_btree *bt __rte_unused)\n #endif\n }\n \n+/**\n+ * Initialize per-queue MR control descriptor.\n+ *\n+ * @param mr_ctrl\n+ * Pointer to MR control structure.\n+ * @param dev_gen_ptr\n+ * Pointer to generation number of global cache.\n+ * @param socket\n+ * NUMA socket on which memory must be allocated.\n+ *\n+ * @return\n+ * 0 on success, a negative errno value otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_mr_ctrl_init(struct mlx5_mr_ctrl *mr_ctrl, uint32_t *dev_gen_ptr,\n+\t\t int socket)\n+{\n+\tif (mr_ctrl == NULL) {\n+\t\trte_errno = EINVAL;\n+\t\treturn -rte_errno;\n+\t}\n+\t/* Save pointer of global generation number to check memory event. */\n+\tmr_ctrl->dev_gen_ptr = dev_gen_ptr;\n+\t/* Initialize B-tree and allocate memory for bottom-half cache table. */\n+\treturn mlx5_mr_btree_init(&mr_ctrl->cache_bh, MLX5_MR_BTREE_CACHE_N,\n+\t\t\t\t socket);\n+}\n+\n /**\n * Find virtually contiguous memory chunk in a given MR.\n *\ndiff --git a/drivers/common/mlx5/mlx5_common_mr.h b/drivers/common/mlx5/mlx5_common_mr.h\nindex 15489cd399..1392d9b55a 100644\n--- a/drivers/common/mlx5/mlx5_common_mr.h\n+++ b/drivers/common/mlx5/mlx5_common_mr.h\n@@ -124,6 +124,9 @@ mlx5_mr_lookup_lkey(struct mr_cache_entry *lkp_tbl, uint16_t *cached_idx,\n \treturn UINT32_MAX;\n }\n \n+__rte_internal\n+int mlx5_mr_ctrl_init(struct mlx5_mr_ctrl *mr_ctrl, uint32_t *dev_gen_ptr,\n+\t\t int socket);\n __rte_internal\n int mlx5_mr_btree_init(struct mlx5_mr_btree *bt, int n, int socket);\n __rte_internal\ndiff --git a/drivers/common/mlx5/version.map b/drivers/common/mlx5/version.map\nindex 44c4593888..6200c013fb 100644\n--- a/drivers/common/mlx5/version.map\n+++ b/drivers/common/mlx5/version.map\n@@ -111,6 +111,7 @@ INTERNAL {\n \tmlx5_mr_btree_free;\n \tmlx5_mr_btree_init;\n \tmlx5_mr_create_primary;\n+ mlx5_mr_ctrl_init;\n \tmlx5_mr_dump_cache;\n \tmlx5_mr_flush_local_cache;\n \tmlx5_mr_free;\ndiff --git a/drivers/compress/mlx5/mlx5_compress.c b/drivers/compress/mlx5/mlx5_compress.c\nindex 8fe65293a6..66b80a46c3 100644\n--- a/drivers/compress/mlx5/mlx5_compress.c\n+++ b/drivers/compress/mlx5/mlx5_compress.c\n@@ -206,8 +206,8 @@ mlx5_compress_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,\n \t\treturn -rte_errno;\n \t}\n \tdev->data->queue_pairs[qp_id] = qp;\n-\tif (mlx5_mr_btree_init(&qp->mr_ctrl.cache_bh, MLX5_MR_BTREE_CACHE_N,\n-\t\t\t priv->dev_config.socket_id)) {\n+\tif (mlx5_mr_ctrl_init(&qp->mr_ctrl, &priv->mr_scache.dev_gen,\n+\t\t\t priv->dev_config.socket_id)) {\n \t\tDRV_LOG(ERR, \"Cannot allocate MR Btree for qp %u.\",\n \t\t\t(uint32_t)qp_id);\n \t\trte_errno = ENOMEM;\n@@ -258,8 +258,6 @@ mlx5_compress_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,\n \tret = mlx5_devx_qp2rts(&qp->qp, 0);\n \tif (ret)\n \t\tgoto err;\n-\t/* Save pointer of global generation number to check memory event. */\n-\tqp->mr_ctrl.dev_gen_ptr = &priv->mr_scache.dev_gen;\n \tDRV_LOG(INFO, \"QP %u: SQN=0x%X CQN=0x%X entries num = %u\",\n \t\t(uint32_t)qp_id, qp->qp.qp->id, qp->cq.cq->id, qp->entries_n);\n \treturn 0;\ndiff --git a/drivers/crypto/mlx5/mlx5_crypto.c b/drivers/crypto/mlx5/mlx5_crypto.c\nindex ff4c67c0a0..77f0688ba0 100644\n--- a/drivers/crypto/mlx5/mlx5_crypto.c\n+++ b/drivers/crypto/mlx5/mlx5_crypto.c\n@@ -677,14 +677,13 @@ mlx5_crypto_queue_pair_setup(struct rte_cryptodev *dev, uint16_t qp_id,\n \t\tDRV_LOG(ERR, \"Failed to create QP.\");\n \t\tgoto error;\n \t}\n-\tif (mlx5_mr_btree_init(&qp->mr_ctrl.cache_bh, MLX5_MR_BTREE_CACHE_N,\n-\t\t\t priv->dev_config.socket_id) != 0) {\n+\tif (mlx5_mr_ctrl_init(&qp->mr_ctrl, &priv->mr_scache.dev_gen,\n+\t\t\t priv->dev_config.socket_id) != 0) {\n \t\tDRV_LOG(ERR, \"Cannot allocate MR Btree for qp %u.\",\n \t\t\t(uint32_t)qp_id);\n \t\trte_errno = ENOMEM;\n \t\tgoto error;\n \t}\n-\tqp->mr_ctrl.dev_gen_ptr = &priv->mr_scache.dev_gen;\n \t/*\n \t * In Order to configure self loopback, when calling devx qp2rts the\n \t * remote QP id that is used is the id of the same QP.\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 43ea890d2b..53c8c5439d 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -1449,13 +1449,11 @@ mlx5_rxq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,\n \t\tgoto error;\n \t}\n \ttmpl->type = MLX5_RXQ_TYPE_STANDARD;\n-\tif (mlx5_mr_btree_init(&tmpl->rxq.mr_ctrl.cache_bh,\n-\t\t\t MLX5_MR_BTREE_CACHE_N, socket)) {\n+\tif (mlx5_mr_ctrl_init(&tmpl->rxq.mr_ctrl,\n+\t\t\t &priv->sh->share_cache.dev_gen, socket)) {\n \t\t/* rte_errno is already set. */\n \t\tgoto error;\n \t}\n-\t/* Rx queues don't use this pointer, but we want a valid structure. */\n-\ttmpl->rxq.mr_ctrl.dev_gen_ptr = &priv->sh->share_cache.dev_gen;\n \ttmpl->socket = socket;\n \tif (dev->data->dev_conf.intr_conf.rxq)\n \t\ttmpl->irq = 1;\ndiff --git a/drivers/net/mlx5/mlx5_txq.c b/drivers/net/mlx5/mlx5_txq.c\nindex ffb252525d..f12510712a 100644\n--- a/drivers/net/mlx5/mlx5_txq.c\n+++ b/drivers/net/mlx5/mlx5_txq.c\n@@ -1117,13 +1117,11 @@ mlx5_txq_new(struct rte_eth_dev *dev, uint16_t idx, uint16_t desc,\n \t\trte_errno = ENOMEM;\n \t\treturn NULL;\n \t}\n-\tif (mlx5_mr_btree_init(&tmpl->txq.mr_ctrl.cache_bh,\n-\t\t\t MLX5_MR_BTREE_CACHE_N, socket)) {\n+\tif (mlx5_mr_ctrl_init(&tmpl->txq.mr_ctrl,\n+\t\t\t &priv->sh->share_cache.dev_gen, socket)) {\n \t\t/* rte_errno is already set. */\n \t\tgoto error;\n \t}\n-\t/* Save pointer of global generation number to check memory event. */\n-\ttmpl->txq.mr_ctrl.dev_gen_ptr = &priv->sh->share_cache.dev_gen;\n \tMLX5_ASSERT(desc > MLX5_TX_COMP_THRESH);\n \ttmpl->txq.offloads = conf->offloads |\n \t\t\t dev->data->dev_conf.txmode.offloads;\ndiff --git a/drivers/regex/mlx5/mlx5_regex_control.c b/drivers/regex/mlx5/mlx5_regex_control.c\nindex 545bbbcf89..6735e51976 100644\n--- a/drivers/regex/mlx5/mlx5_regex_control.c\n+++ b/drivers/regex/mlx5/mlx5_regex_control.c\n@@ -242,10 +242,8 @@ mlx5_regex_qp_setup(struct rte_regexdev *dev, uint16_t qp_ind,\n \t\tnb_sq_config++;\n \t}\n \n-\t/* Save pointer of global generation number to check memory event. */\n-\tqp->mr_ctrl.dev_gen_ptr = &priv->mr_scache.dev_gen;\n-\tret = mlx5_mr_btree_init(&qp->mr_ctrl.cache_bh, MLX5_MR_BTREE_CACHE_N,\n-\t\t\t\t rte_socket_id());\n+\tret = mlx5_mr_ctrl_init(&qp->mr_ctrl, &priv->mr_scache.dev_gen,\n+\t\t\t\trte_socket_id());\n \tif (ret) {\n \t\tDRV_LOG(ERR, \"Error setting up mr btree\");\n \t\tgoto err_btree;\n", "prefixes": [ "v3", "13/18" ] }